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The Buck-Boost Power Design A Viable Topology for Wearable IoT

By Noah Madinger, Colorado Electronic Product Design (CEPD)

Editor’s note: The antithetical choices required for designing a wearable Internet of Things (IoT) product underscore the need for a reliable and stable power system design. Specific considerations for this design include the following wearable product features: the product’s compact physical size, its dependency upon wireless communications, the need for efficient battery-powered management, and the regulatory compliance challenges. This article discusses how a power system design based upon a buck-boost switching regulator can address and satisfy these design challenges. To establish this, the operational specifications of commercially available components are explored. The power requirements for LTE cellular transceiver modules, the performance metrics of buck-boost switching regulators, and the derating, ESR and capacitance of tantalum capacitors are all provided. At its conclusion, the article provides a power system topology and a use-case example to demonstrate the buck-boost regulator’s empirical performance in meeting the demands of a wearable IoT product.

Introduction

The performance of cellular transceivers depends upon the reliability and stability of the power rails. Design choices must be made to ensure adequate power margin, proper ground plane dimensions, and sufficiently reduced ripple. These choices are all the more complicated when designs are compressed into a wearable product, which is also battery powered, and subjected to regulatory standards.

This article addresses some of the power design challenges encountered within wearable IoT devices, and proposes a design topology for addressing these challenges using commercially available components. Throughout, critical design tradeoffs will be discussed and recommended mitigations provided. The ultimate goal of this article is to present a robust power design topology, which provides the designer with an efficient solution that operates within the constraints of a wearable IoT device.

Defining the challenge: reliability and stability

For purposes of this article, reliability is defined as the power system’s ability to provide a voltage rail within the operating range of the radio transceiver – in this case, a cellular transceiver. This ability must also include sourcing current that satisfies both the typical and peak current draws anticipated in the IoT product.

Stability is defined as the ripple present on the voltage rail within the specification of the device. This ripple may be due to the switching characteristics of the regulator, or may be due to a transient response to a sudden jump in current demand. Regardless of the cause, the ability of the regulator to respond is the basis of determining its stability.

The power of cellular transceivers

Undoubtedly, cellular transceiver modules have enabled wireless connectivity to devices great and small at an unprecedented level of adoption. These devices have become increasingly integrated, even incorporating on-board power regulators, temperature-compensated oscillators, and sophisticated co-processors. However, all of these devices remain dependent upon key power parameters, namely reliability and stability.

The following product samples are presented to underscore this latter point. Even though each of these products is commercially available, and any of these would be appropriate to base a wearable IoT product upon, power considerations remain a must. To say it another way, if not properly powered, none of these devices will perform to their peak performance and capability.

u-blox

Table 1 provides a high-level view of the power parameters for the MPCI-L201-02S-00 cellular module.

Part Number Power Parameters
Operating Voltage Range Current Power Range
MPCI-L201-02S-00 3.0 V to 3.5 V
Typical: 3.5 V
Average: 0.88 A
Peak: 2.5 A
Power Range: 2.64 W to 9 W

Table 1: u-blox power parameters.

From the technical documentation, u-blox has some fairly stringent requirements for powering this module.

The characteristics of the switching regulator connected to the VCC or 3.3 Vaux pins should meet the following prerequisites to comply with the module VCC or 3.3 Vaux requirements:

  • Power capability: The switching regulator, with its output circuit, must be capable of providing a voltage value to the VCC or 3.3 Vaux pins within the specified operating range and must be capable of delivering the maximum peak/pulse current consumption during a transmission (Tx) burst at the maximum Tx power specified in the TOBY-L2 or MPCI-L2 series data sheet.
  • Low output ripple: The switching regulator, together with its output circuit, must be capable of providing a clean (low noise) VCC or 3.3 Vaux voltage profile.
  • The voltage drop cannot exceed 400 mV.

Within these requirements, the two critical aspects, reliability and stability, are emphasized. Not only must the power rail be within the appropriate voltage range, ripple must be minimized. Interestingly, “ripple” is separated into two different types in this requirement specification: switching ripple and voltage drop. The first can be thought of high-frequency ripple, related to the switching of the regulator. The second is low-frequency ripple likely caused by the power source’s inability to quickly respond to a higher current load. This could be related to the regulator’s performance; however, it could also come from excessive resistance or inductance within the power path.

Likely, a regulator used in a cellular development kit design would suffice, but a wall-powered development kit design would not be suitable for battery-powered, wearable applications. Moreover, the reduction of the design’s physical space, a necessity for wearable products, could also affect the parasitic resistance and inductance within the power path. This complication may not be solved by proper regulator selection alone, but require additional mitigations, especially if these parasitic features threaten the product’s regulatory compliance.

Digi

Table 2 provides a high-level view of the power parameters for the XBC-V1-UT-001 cellular module.

Part Number Power Parameters
Operating Voltage Range Current Power Range
XBC-V1-UT-001 3.0 V to 5.5 V Average: 0.86 A
Peak: 1.02 A
Power Range: 2.58 W to 5.61 W

Table 2: Digi power parameters.

From the technical documentation, Digi has some fairly stringent requirements for powering this module, as can be seen below:

  • Power supply ripple should be less than 75 mV peak to peak.
  • The power supply should be capable of providing a minimum of 1.5 A at 3.3 V (5 W). Keep in mind that operating at a lower voltage requires higher current capability from the power supply to achieve the 5 W requirement.
  • Place sufficient bulk capacitance on the XBee VCC pin to maintain voltage above the minimum specification during inrush current. Inrush current is about 2 A during initial power up of cellular communications and wakeup from sleep mode.
  • Place smaller high frequency ceramic capacitors very close to the XBee Cellular Modem VCC pin to decrease high frequency noise.
  • Use a wide power supply trace or power plane to ensure it can handle the peak current requirements with minimal voltage drop. Colorado Electronic Product Design recommends that the power supply and trace be designed such that the voltage at the XBee VCC pin does not vary by more than 0.1 V between light load (~0.5 W) and heavy load (~3 W).

Similarly, to other cellular modules, the stability and reliability of the power rail are key considerations. These directives, however, are more specific, calling out maximum ripple voltage, expected inrush current, and providing some help hints for circuit board layout.

The buck-boost power topology – A stable and reliable solution for battery powered IoT wearables

The challenge is set forth. Design a power system that meets these requirements:

  • Provide a power rail within the operating range of the selected module.
  • Supply sufficient current to account for both the average and peak current demands of the module.
  • Meet all aforementioned requirements without exceeding the ripple voltage maximum and without allowing too much voltage droop in the power rail.
  • Do all of this while being confined to a physical space appropriate for a wearable application and manage to pass regulatory standards germane to this product’s use case.

As was stated, cellular modules have stringent requirements for their power systems. All of these can be met within a confined physical space; however, higher-order considerations must be employed for the product’s success. The Figure 1 topology captures the recommended approach.

Diagram of high-level buck-boost switching regulator diagramFigure 1: High-level buck-boost switching regulator diagram. (Image source: Colorado Electronic Product Design)

This topology performs better than some of the common design alternatives, which are also discussed below. The following goes through each of the aspects of this recommended topology, the respective design challenges each present, and how to mitigate these changes.

Battery and battery pack resistance

The internal resistance of a battery pack will be higher than the resistance of the battery itself. This is due to the protection circuitry, the interconnection wires, the fuses and other items, which go into a wearable application’s battery pack. Table 3 shows the breakdown for the average, small Lithium Polymer battery pack used in a mobile phone, which is an appropriate model for a wearable IoT device.

Source of Resistance Resistance (milli-Ohms) Notes
Cell, single, high capacity prismatic 50 subject to increase with age
Connection, welded 1
PTC welded to cable, cell 25 18 mΩ to 30 mΩ according to spec
Protection circuit, PCB 50
Total internal resistance 130

Table 3: Battery pack resistances (itemized). (Image source: Battery University Group)

1) Connecting the Cellular Module Directly to the Battery

Under typical current draw, this resistance does not produce a significant voltage drop; however, under peak load, 0.13 V – 0.33 V could be dropped from the battery’s voltage (the voltage values are based upon the smallest and highest current drawn of the presented cellular modules). Although this voltage drop may not knock the power rail below the module’s minimum operating value, it will produce drop and ripple, which is outside the specification of these cellular modules. Performance will be impacted, and thus, supplying the module directly from a battery is not advised.

2) Using More Bulk Capacitance

Another attempt at overcoming this voltage drop could be to add more local capacitance. However, this capacitance would have to supply enough current throughout the duration of the current draw and do this over the entire operating temperature range of the product. This in itself is a demanding request for passive components to fulfill.

This approach is further complicated when the shear amount of capacitance required is considered. Based upon a capacitor’s current equation,

Equation 1 Equation 1

The equation can be solved to calculate the required capacitance for a given voltage, current and time duration,

 Equation 2

Using the u-blox part as a reference, it can be seen that the high current pulse could be active for 0.6 ms (4.615 ms / 8).

Diagram of u-blox current consumption profileFigure 2: u-blox current consumption profile. (Image source: u-blox)

So, how much capacitance is required to supply 2 Amps for 0.6 ms in order to overcome a voltage drop of 0.26 V? Using the equation above, the calculated value is 4.62 mF (4.62 X 10-3 Farad). The largest ceramic capacitors, which would be best since they typically have lower equivalent series resistance (ESR), are around 680 μF and are not typically surface mount components. Several of these would have to be placed in parallel, and voltage derating, temperature variance and tolerance would all have to be considered. There are large-value tantalum capacitors, but with these, the ESR limits the amount of current which can be supplied. Again, several of these would have to be placed in parallel to account for the undesired parasitic properties of the components.

The fact that several capacitors would have to be used would consume precious circuit board space within an already-confined wearable product, and would increase the bill of materials costs significantly. Furthermore, capacitance would have to be redesigned each time there was a change of the battery, or anything else within the power path. These restrictions make the capacitive solution a problematic approach to resolving this design consideration.

Buck-boost switching regulator

This regulator is the heart of this power design topology. In this section, two commercially available buck-boost regulators will be presented. Each of these would be suitable options for a wearable IoT application. However, before diving into these specifics, the few points will help to explain the need for such a regulator.

1) A buck regulator is not enough

At this point, it has been argued that connecting a cellular module directly to the battery is not a good design choice. However, this section goes one step further and argues that although the use of a buck regulator would be an improvement over a direct-battery connection, it is still not a design choice that works for a majority of wearable IoT use cases. The boost is needed, and the following explains why.

Graph of lithium battery (3.7 V nominal) discharge curveFigure 3: Lithium battery (3.7 V nominal) discharge curve at discharge currents of 0.2 C, 0.5 C and 1 C. (Image source: Innovative Battery Technology)

When a battery has 20% of its charge remaining, the battery’s voltage could be within the range of 2.8 V – 3.7 V. Now, undervoltage protection circuity may disconnect the battery when the voltage falls below 3.0 V. Based upon this, assume that the “effective” voltage range for a battery with 20% capacity remaining is from 3.7 V – 3.0 V. Coupling this information with the fact that a buck regulator requires the input voltage to be greater than or equal to the output voltage, the design dilemma begins to come into focus.

If VOUT is set to be 3.3 V and if a buck regulator is used, then the lowest usable battery voltage is going to be the value the battery can sustain while the cellular module pulls its peak current, so long as this value is 3.3 V or greater.

Mathematically, efficiency is calculated as,

Equation 3 Equation 3

Rearranging this equation,

Equation 4 Equation 4

Assuming 90% efficiency for the buck regulator, it must provide 3.3 V * 2.5 A = 8.25 W, if the u-blox module is designed in. This means that the input power must be 8.25 W / 0.9 = 9.2 W.

Applying the equation,

Equation 5 Equation 5

It can be seen that the input voltage at its battery’s nominal value of 3.7 V must supply 2.49 A. However, this is the current supplied to the regulator, which must have first passed through the series resistance of the battery pack. Therefore, the actual battery voltage must be the sum of the voltage at the input of the regulator and the voltage dropped across the battery pack’s series resistance: 3.7 V + (2.49 A * 0.13 ohms) = 4.02 V. Thus, a 0.32-V drop is realized over the battery pack’s series resistance.

This means that the lowest usable value this battery can have is 3.3 V + VSeries_Resistance = ~3.62 V. Should the battery pack’s voltage fall below this, the input voltage to the buck regulator will no longer be greater than or equal to the output voltage, and as such, regulation would fail. This failure in regulation would cause the cellular module’s power rail to droop and would also violate the ripple voltage and droop requirements. Performance would suffer.

2) Additional considerations

In short, the boost portion of the buck-boost regulator allows the system access to the final 20% of battery pack capacity. With the buck-boost, the module’s power rail will be held up as long as the battery can sustain power to the regulator, and it will not cease operation prematurely - with charge still remaining in the battery.

It is worth noting that with a buck-boost regulator, the last 20% of battery charge will be consumed faster than the previous 80%. This is due to the increase of input current needed once the input voltage falls below the output voltage set point. However, this increase in current should be accounted for when selecting the battery pack’s maximum discharge current.

3) Product example – Renesas ISL91110

The following graphs showcase the capabilities of this part. This part has automatic switchover from light-load operation to heavy-load operation. The effective result of this is improved efficiency over the output current’s full operating range.

Graph of Renesas ISL91110 Efficiency vs. VINFigure 4: Renesas ISL91110 Efficiency vs. VIN. (Image source: Renesas)

Graph of Renesas ISL91110 0 A to 2 A load transient (VIN = 3.6 V, VOUT = 3.3 V)Figure 5: Renesas ISL91110 0 A to 2 A load transient (VIN = 3.6 V, VOUT = 3.3 V). (Image source: Renesas)

4) Product example – ON Semiconductor FAN49103

This part also has automatic switchover from light-load operation to heavy-load operation. Although the parameters are for an output voltage set to 3.4 V (as opposed to 3.3 V), this part would work for this example application.

Graph of ON Semiconductor FAN49103 Efficiency vs. I Load (mA)Figure 6: ON Semiconductor FAN49103 Efficiency vs. I Load (mA). (Image source: ON Semiconductor)

Graph of ON Semiconductor FAN49103 0 A to 2 A load transientFigure 7: ON Semiconductor FAN49103 0 A to 2 A load transient (VIN = 3.6 V, VOUT = 3.4 V). (Image source: ON Semiconductor)

Local capacitors

The local capacitors are tasked with two important functions: supplying local energy storage to satisfy sudden increases in load current, and filtering out high-frequency transients and ripple voltages that may be detrimental to performance.

The recommended capacitor placement within the design’s layout is critical. Placement should be done so that the cellular module is powered by the cleanest voltage rail achievable. This means that the capacitors immediately next to the cellular module must have the lowest ESR and ESL. In fact, their actual capacitance rating can be in the pico-farad range. C0G ceramic capacitors are recommended.

Now although these small-value capacitors accomplish high-frequency filtering quite well, they have little energy storage. For this goal, a larger tantalum capacitor in the hundreds of micro-farad range is placed farthest out from the cellular module’s power supply pins. This does not mean that it is far away; it is still close, just not as close as the aforementioned ceramic capacitors. An additional, important feature of this large capacitor is that its ESR is low at the fundamental frequency of the anticipated current transient. An ESR of 100 mΩ @ 100 KHz is recommended.

Figure 8 illustrates the recommended layout for the MPCI u-blox cellular module.

Diagram of recommended local capacitor layout scheme for the u-blox MPCI-L2 SeriesFigure 8: Recommended local capacitor layout scheme for the u-blox MPCI-L2 Series. (Image source: u-blox)

In Figure 8, C1 – C3 are the low-value, low-ESR, low-ESL, C0G capacitors. C4 – C5 are ceramics within the range 0.1 – 10 μF. Last of all, C6 is the large value tantalum for low ESR at the fundamental frequency of the transient load current.

It is extremely important that voltage ratings be selected so that derating is mitigated. This is especially true for the ceramic capacitors.

This section concludes with a couple of commercially-available capacitors. Applicable parameters are provided.

1) KEMET

Part Number: T520D337M006ATE045

Capacitance: 330 μF

Tolerance: 20%

Voltage Rating: 6.3 V

ESR @ 100 KHz: 45 mΩ

2) Panasonic Electronic Components

Part Number: 6TPF470MAH

Capacitance: 470 μF

Tolerance: 20%

Voltage Rating: 6.3 V

ESR @ 100 KHz: 10 mΩ

Layout design considerations

Although each of the selected components will have their specific layout recommendations listed within their datasheets, there are some general layout guidelines, which lead to efficient and low-noise performance.

1) Ground and power pours

Use polygon pours wherever possible. This is especially true for connections to the input voltage, the output voltage, the inductor and the ground nodes. In short, do not spare copper as these planes provide low-resistance and low-inductance paths for current flow, which includes any spurious or switching currents. Figure 9 is a recommended top-layer layout for the LTC3113 buck-boost from Linear Technology, and it well illustrates the preference of copper pours.

Diagram of Linear Tech LTC3113 recommended top-layer layoutFigure 9: Linear Tech LTC3113 recommended top-layer layout. (Image source: Linear Technology)

2) Snubber

Although every effort has been made to reduce parasitic resistances and inductances, this is a size-constrained, wearable design. Ground and power planes are not going to be as large as they should be. Provisions in this layout should allow for the placement of an RC snubber circuit. Although these components do not need to be populated initially, designers will benefit from having the footprints allocated should this circuit be needed to reduce emissions.

These parasitic elements contribute to ringing within the switch current (Figure 10).

Graph of ringing within buck regulator switching inductor currentFigure 10: Ringing within buck regulator switching inductor current. (Image source: ROHM Semiconductor)

Now, as already stated, this may be unavoidable due to meeting the spatial requirements. The snubber circuit, Figure 11, siphons these spurious energies to ground. Without doing this, these oscillations could push the design’s emissions over the acceptable limits for regulatory compliance. The snubber circuit is a useful tool for quieting the spatially-constrained regulator.

Diagram of buck regulator recommended RC Snubber locationFigure 11: Buck regulator recommended RC Snubber location. (Image source: ROHM Semiconductor)

3) Ferrite bead

The last recommendation is to address any enduring, high-frequency noise that is conducting along with the output power. Place a high-current ferrite bead, selected to have the proper attenuation at key frequencies, in series with the buck-boost regulator’s output. This should be placed between the regulator’s output and the bulk, by-pass capacitors.

Case study – LTC3113 powering the u-blox SARA module

The SARA module is a 3G cellular transceiver. Just like the aforementioned cellular modules, it too can draw large currents in spurts that cause the battery’s voltage to sag due to series resistance. The Figure 12 circuit design for the LTC3113 buck-boost switching regulator was used to maintain a stable and reliable 3.3 V power rail for this design.

Diagram of case study LTC3113 buck-boost switching regulator circuit (click to enlarge)Figure 12: Case study LTC3113 buck-boost switching regulator circuit. (Image source: Colorado Electronic Product Design)

This regulator design, in combination with local bypass capacitors arranged as shown in Figure 12, produced a stable power rail under all operating currents drawn. The Figure 13 scope plot captures the current drawn by the SARA (blue), the output power rail at 3.3 V coming from the buck-boost regulator (green), the input battery voltage and any sag on this rail (purple), and the ripple voltage measured on the output power rail (orange).

As can be seen, this large current spike does not cause sag on or significant ripple on the regulated 3.3 V output rail. However, it does cause the input rail to sag.

Graph of case study LTC3113 buck-boost switching regulator circuitFigure 13: Case study LTC3113 buck-boost switching regulator circuit, SARA module drawing ~0.9 A module current (blue), 3.3 V output rail (green), battery input rail (purple), and 3.3 V output rail ripple (orange). (Image source: Colorado Electronic Product Design)

Again, the stability and reliability of the output rail remain consistent at a solid 3.3 V and with minimum ripple. The battery input rail, however, experiences a sag of ~0.32 V, which is outside of the SARA module’s specification and outside the specification of the other modules mentioned in this paper. The buck-boost regulator is able to accommodate for these current spikes and maintain a power rail suitable for the cellular module’s operation under all of its expected conditions.

Conclusion

Wearable IoT designs present an array of challenges to design engineers, and the power system is located at the convergence of many of these. The buck-boost regulator topology directly addresses these changes by providing a stable and reliable power rail under a cellular module’s range of operating conditions. This is not to say that careful design work is not needed. Rather, it is to say that if good design practices are followed, this topology will function. As wearable IoT designs become more and more compact, performance expectations will also increase. Consider this robust topology for powering compact, high-performance wearable IoT designs.

Acknowledgement: Special thanks to Linear Tech/Analog Devices and to the CEPD (Colorado Electronic Product Design) management and staff.

Disclaimer: The opinions, beliefs, and viewpoints expressed by the various authors and/or forum participants on this website do not necessarily reflect the opinions, beliefs, and viewpoints of Digi-Key Electronics or official policies of Digi-Key Electronics.

About this author

Noah Madinger, Colorado Electronic Product Design (CEPD)

Noah Madinger is a Senior Engineer at Colorado Electronic Product Design (CEPD) and has been involved in bringing novel products to market since the early 2000’s. In his role, he is responsible for developing technical solutions, which cover a vast array of disciplines in both hardware and software design. This role also includes the managing projects and technical teams, as well as engaging in business development activities. Noah is actively involved in writing articles and publications, as these provide opportunities to dive deeper into interesting topics and to engage a broader audience.

Noah’s professional interests include feedback control systems, FPGA and MCU-based embedded designs, and aerospace applications. He is an advocate of process-driven and test-driven development paradigms and has worked to implement engineering processes into team dynamics. He cherishes the reward of seeing a new product come to maturity and to have it live up to everyone’s expectations.