NXP's LPC4370 are ARM Cortex-M4-based microcontrollers for embedded applications which include an ARM Cortex-M0 coprocessor and an ARM Cortex-M0 subsystem for managing peripherals, 282 kB of SRAM, advanced configurable peripherals such as the state configurable timer (SCT) and the serial general purpose I/O (SGPIO) interface, two high-speed USB controllers, Ethernet, LCD, an external memory controller, and multiple digital and analog peripherals including a high-speed 12-bit ADC. The LPC4370 operate at CPU frequencies of up to 204 MHz.
The ARM Cortex-M4 is a next-generation 32-bit core that offers system enhancements such as low power consumption, enhanced debug features, and a high level of support-block integration. The ARM Cortex-M4 CPU incorporates a 3-stage pipeline, uses a Harvard architecture with separate local instruction and data buses, as well as a third bus for peripherals, and includes an internal prefetch unit that supports speculative branching. The ARM Cortex-M4 supports single-cycle digital signal processing and SIMD instructions. A hardware floating-point processor is integrated in the core.
The LPC4370 includes a sophisticated Cortex-M4 processor with floating-point unit plus a Cortex-M0 coprocessor for offloading the interrupt driven tasks like USB from the main CPU and a Cortex-M0 based peripheral handler for fast I/O over the serial general purpose I/O (SGPIO) and a SPI peripheral. This multi-core approach makes it easy to partition a design for maximum efficiency, letting the powerful Cortex-M4 core crunch numbers and allowing the ARM Cortex-M0 coprocessors manage data movement and I/O handling. The Cortex-M0 core is an energy-efficient and easy-to-use 32-bit core which is code- and tool-compatible with the Cortex-M4 core. Both Cortex-M0 cores offer up to 204 MHz performance with a simple instruction set and reduced code size.
- 204 MHz, 32-bit ARM Cortex-M4 with FPU
- 204 MHz, 32-bit ARM Cortex-M0 coprocessor
- Up to 1 MB dual-bank flash
- Up to 282 KB SRAM
- Up to 4 KB EEPROM
- Memory protection unit (MPU)
- Two high-speed USB 2.0 interfaces, with on-chip high-speed PHY
- 10 / 100T Ethernet MAC with MII and RMII interfaces
- LCD controller with 1024 x 768 pixel display resolution
- Innovative quad SPI Flash interface (SPIFI)
- State configurable timer (SCT) subsystem
- Configurable serial GPIO
- Two CAN 2.0B
- Up to 164 GPIO
- Pin-compatible with the LPC1800 series