The NXP Semiconductors family of low voltage GPIO with Agile I/O expands the two wires of the I2C-bus into 8 or 16 general purpose I/O pins that can interface to keyboards, switches, LEDs, displays or even stepping motors - saving valuable pins on the microprocessor or custom ASIC. The family has eight members with Agile I/O and eight members without. The devices that do not implement Agile I/O are 100% compatible with industry-standard devices, giving users supply alternatives and the advantage of second sources.
The members of the low voltage GPIO family are differentiated by the number of I/O pins: 8 or 16. Other differences come from implementing features like reset and interrupt. To aid in printed-circuit board layout, the device pinout is very similar between devices allowing the designer to simply select the family and delay feature selection until later in the process.
Low voltage operation from 1.65 V to 5.5 V and low current consumption make these devices ideal for a wide range of applications - from portable to industrial to automotive. Dual power supply components allow for bidirectional level translation in today’s systems that must interface with the harsh outside world.
|Unique Features of Agile I/O Versions
- Backward-compatible with industry-standard versions
- New registers to control configurable features
- Input latch locks in any changes on input pins until the input port register is read
- Programmable pull-up or pull-down resistors
- Output drive strength selectable to ¼, ½, ¾ or max to conserve battery power and reduce power-supply noise when simultaneous outputs switch
- Interrupt mask to limit interrupt sources
- Interrupt status register shows interrupt source
- Output selection of open-drain or push-pull configuration