74HC7266 Datasheet by NXP USA Inc.

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@ PHILIPS
DATA SHEET
Product specification
File under Integrated Circuits, IC06
December 1990
INTEGRATED CIRCUITS
74HC7266
Quad 2-input EXCLUSIVE-NOR
gate
For a complete data sheet, please also download:
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
December 1990 2
Philips Semiconductors Product specification
Quad 2-input EXCLUSIVE-NOR gate 74HC7266
FEATURES
Output capability: standard
ICC category: SSI
GENERAL DESCRIPTION
The 74HC7266 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL).
They are specified in compliance with JEDEC standard no. 7A.
The 74HC7266 provide the EXCLUSIVE-NOR function with active push-pull output.
QUICK REFERENCE DATA
GND = 0 V; Tamb =25°C; tr=t
f= 6 ns
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW):
PD=C
PD × VCC2× fi+ (CL×VCC2×fo) where:
fi= input frequency in MHz
fo= output frequency in MHz
CL= output load capacitance in pF
VCC = supply voltage in V
(CL×VCC2×fo) = sum of outputs
2. For HC the condition is VI= GND to VCC
For HCT the condition is VI= GND to VCC 1.5 V
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”
.
SYMBOL PARAMETER CONDITIONS TYPICAL UNIT
HC
tPHL/ tPLH propagation delay nA, nB to nY CL= 15 pF; VCC =5 V 11 ns
C
Iinput capacitance 3.5 pF
CPD power dissipation capacitance per gate note 1 17 pF
7266 ma - ma.- . , ’— '— + m .. ., m, mun
December 1990 3
Philips Semiconductors Product specification
Quad 2-input EXCLUSIVE-NOR gate 74HC7266
PIN DESCRIPTION
PIN NO. SYMBOL NAME AND FUNCTION
1, 5, 8, 12 1A to 4A data inputs
2, 6, 9, 13 1B to 4B data inputs
3, 4, 10, 11 1Y to 4Y data outputs
7 GND ground (0 V)
14 VCC positive supply voltage
Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.
Fig.4 Functional diagram. Fig.5 Logic diagram (one gate).
FUNCTION TABLE
Notes
1. H = HIGH voltage level
L = LOW voltage level
INPUTS OUTPUT
nA nB nY
L
L
H
H
L
H
L
H
H
L
L
H
11A. “- mwr w‘” “v ovum vu‘” 1mm ‘wL 'an
December 1990 4
Philips Semiconductors Product specification
Quad 2-input EXCLUSIVE-NOR gate 74HC7266
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”
.
Output capability: standard
ICC category: SSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; tr=t
f= 6 ns; CL= 50 pF
AC WAVEFORMS
PACKAGE OUTLINES
See
“74HC/HCT/HCU/HCMOS Logic Package Outlines”
.
SYMBOL PARAMETER
Tamb (°C)
UNIT
TEST CONDITIONS
74HC VCC
(V)
WAVEFORMS
+25 40 to +85 40 to +125
min. typ. max. min. max. min. max.
tPHL/ tPLH propagation delay
nA, nB to nY
39
14
11
115
23
20
145
29
25
175
35
30
ns 2.0
4.5
6.0
Fig.6
tTHL/ tTLH output transition time 19
7
6
75
15
13
95
19
16
110
22
19
ns 2.0
4.5
6.0
Fig.6
Fig.6 Waveforms showing the input (nA, nB) to output (nY) propagation delays and the output transition times.
(1) HC : VM= 50%; VI= GND to VCC.

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