74HC564 Datasheet by NXP USA Inc.

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PHILIPS
1. General description
The 74HC564 is a high-speed Si-gate CMOS device and is pin compatible with low-power
Schottky TTL (LSTTL). The 74HC564 is specified in compliance with JEDEC
standard no. 7A.
The 74HC564 is a octal D-type flip-flop featuring separate D-type inputs for each flip-flop
and inverting 3-state outputs for bus oriented applications. A clock (CP) and an output
enable (OE) input are common to all flip-flops.
The 8 flip-flops will store the state of their individual D-inputs that meet the set-up and hold
times requirements on the LOW-to-HIGH CP transition. When OE is LOW, the contents of
the 8 flip-flops are available at the outputs. When OE is HIGH, the outputs go to the
high-impedance OFF-state. Operation of the OE input does not affect the state of the
flip-flops.
The 74HC564 is functionally identical to the 74HC574 but has inverting outputs. The
74HC564 is functionally identical to the 74HC534, but has a different pinning.
2. Features
3-state inverting outputs for bus oriented applications
8-bit positive-edge triggered register
Common 3-state output enable input
Independent register and 3-state buffer operation
Low-power dissipation
Complies with JEDEC standard no. 7A
ESD protection:
HBM EIA/JESD22-A114-B exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
Multiple package options
Specified from 40 °Cto+80°C and from 40 °C to +125 °C.
74HC564
Octal D-type flip-flop; positive-edge trigger; 3-state; inverting
Rev. 03 — 11 November 2004 Product data sheet
9397 750 13814 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet Rev. 03 — 11 November 2004 2 of 18
Philips Semiconductors 74HC564
Octal D-type flip-flop; positive-edge trigger; 3-state; inverting
3. Quick reference data
[1] CPD is used to determine the dynamic power dissipation (PD in µW).
PD=C
PD ×VCC2×fi×N+(CL×VCC2×fo) where:
fi= input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CL×VCC2×fo) = sum of outputs.
4. Ordering information
Table 1: Quick reference data
GND = 0 V; T
amb
=25
°
C; t
r
=t
f
= 6 ns.
Symbol Parameter Conditions Min Typ Max Unit
tPHL, tPLH propagation delay CP
to Qn CL= 15 pF;
VCC =5 V -15 -ns
fmax maximum clock
frequency CL= 15 pF;
VCC =5 V - 127 - MHz
CIinput capacitance - 3.5 - pF
CPD power dissipation
capacitance per
flip-flop
VI= GND to VCC [1] -27 -pF
Table 2: Ordering information
Type number Package
Temperature range Name Description Version
74HC564N 40 °C to +125 °C DIP20 plastic dual in-line package; 20 leads (300 mil) SOT146-1
74HC564D 40 °C to +125 °C SO20 plastic small outline package; 20 leads;
body width 7.5 mm SOT163-1
9397 750 13814 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet Rev. 03 — 11 November 2004 3 of 18
Philips Semiconductors 74HC564
Octal D-type flip-flop; positive-edge trigger; 3-state; inverting
5. Functional diagram
Fig 1. Functional diagram
Fig 2. Logic symbol Fig 3. IEC logic symbol
001aab936
Q0
Q1
Q2
3 STATE
OUTPUTS
FF1 TO
FF8
Q3
Q4
Q5
Q6
Q7 12
13
14
15
16
17
18
19
D0
D1
CP
OE
D2
4
11
1
3
D3
D4
6
5
D5
D6
8
7
D7
9
2
001aab934
D0
D1
D2
D3
D4
D5
D6
D7
CP
OE
11
1
Q0
9
8
7
6
5
4
3
2
12
13
14
15
16
17
18
19
Q1
Q2
Q3
Q4
Q5
Q6
Q7
001aab935
11
1EN
1D 19
2
18
3
17
4
16
5
15
6
14
7
13
8
12
9
C1
l Ti f if i f 5f ff 3,3,31,31,31: WWWWWWLY EEEEEEEEEE ,
9397 750 13814 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet Rev. 03 — 11 November 2004 4 of 18
Philips Semiconductors 74HC564
Octal D-type flip-flop; positive-edge trigger; 3-state; inverting
6. Pinning information
6.1 Pinning
Fig 4. Logic diagram
001aab937
Q7
D7
Q6
D6
Q5
D5
Q4
D4
Q3
D3
Q2
D2
Q1
D1
FF
1
D
Q0
Q
CP
FF
2
DQ
CP
FF
3
DQ
CP
FF
4
DQ
CP
FF
5
DQ
CP
FF
6
DQ
CP
FF
7
DQ
CP
FF
8
DQ
CP
OE
CP
D0
Fig 5. Pin configuration
564
OE VCC
D0 Q0
D1 Q1
D2 Q2
D3 Q3
D4 Q4
D5 Q5
D6 Q6
D7 Q7
GND CP
001aab844
1
2
3
4
5
6
7
8
9
10
12
11
14
13
16
15
18
17
20
19
9397 750 13814 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet Rev. 03 — 11 November 2004 5 of 18
Philips Semiconductors 74HC564
Octal D-type flip-flop; positive-edge trigger; 3-state; inverting
6.2 Pin description
7. Functional description
7.1 Function table
[1] H = HIGH voltage level;
h = HIGH voltage level one set-up time prior to the LOW-to-HIGH CP transition;
L = LOW voltage level;
l = LOW voltage level one set-up time prior to the LOW-to-HIGH CP transition;
Z = high-impedance OFF-state;
= LOW-to-HIGH clock transition.
Table 3: Pin description
Symbol Pin Description
OE 1 3-state output enable input (active LOW)
D0 2 data input 0
D1 3 data input 1
D2 4 data input 2
D3 5 data input 3
D4 6 data input 4
D5 7 data input 5
D6 8 data input 6
D7 9 data input 7
GND 10 ground (0 V)
CP 11 clock input (LOW-to-HIGH, edge-triggered)
Q7 12 3-state flip-flop output 7
Q6 13 3-state flip-flop output 6
Q5 14 3-state flip-flop output 5
Q4 15 3-state flip-flop output 4
Q3 16 3-state flip-flop output 3
Q2 17 3-state flip-flop output 2
Q1 18 3-state flip-flop output 1
Q0 19 3-state flip-flop output 0
VCC 20 positive supply voltage
Table 4: Function table[1]
Operating mode Input Internal
flip-flop Output
OE CP Dn Qn
Load and read
register LlLH
hHL
Load register and
disable output HlLZ
hHZ
9397 750 13814 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet Rev. 03 — 11 November 2004 6 of 18
Philips Semiconductors 74HC564
Octal D-type flip-flop; positive-edge trigger; 3-state; inverting
8. Limiting values
[1] Above 70 °C: Ptot derates linearly with 12 mW/K.
[2] Above 70 °C: Ptot derates linearly with 8 mW/K.
9. Recommended operating conditions
Table 5: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage 0.5 +7 V
IIK input diode current VI < 0.5 V or VI>V
CC + 0.5 V - ±20 mA
IOK output diode current VO<0.5 V or
VO>V
CC + 0.5 V -±20 mA
IOoutput source or sink
current VO = 0.5 V to VCC + 0.5 V - ±35 mA
ICC, IGND VCC or GND current - ±70 mA
Tstg storage temperature 65 +150 °C
Ptot power dissipation
DIP20 package [1] - 750 mW
SO20 package [2] - 500 mW
Table 6: Recommended operating conditions
Symbol Parameter Conditions Min Typ Max Unit
VCC supply voltage 2.0 5.0 6.0 V
VIinput voltage 0 - VCC V
VOoutput voltage 0 - VCC V
tr, tfinput rise and fall times VCC = 2.0 V - - 1000 ns
VCC = 4.5 V - 6.0 500 ns
VCC = 6.0 V - - 400 ns
Tamb ambient temperature 40 - +125 °C
9397 750 13814 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet Rev. 03 — 11 November 2004 7 of 18
Philips Semiconductors 74HC564
Octal D-type flip-flop; positive-edge trigger; 3-state; inverting
10. Static characteristics
Table 7: Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Typ Max Unit
Tamb =25°C
VIH HIGH-level input voltage VCC = 2.0 V 1.5 1.2 - V
VCC = 4.5 V 3.15 2.4 - V
VCC = 6.0 V 4.2 3.2 - V
VIL LOW-level input voltage VCC = 2.0 V - 0.8 0.5 V
VCC = 4.5 V - 2.1 1.35 V
VCC = 6.0 V - 2.8 1.8 V
VOH HIGH-level output voltage VI=V
IH or VIL
IO=20 µA; VCC = 2.0 V 1.9 2.0 - V
IO=20 µA; VCC = 4.5 V 4.4 4.5 - V
IO=20 µA; VCC = 6.0 V 5.9 6.0 - V
IO=6.0 mA; VCC = 4.5 V 3.98 4.32 - V
IO=7.8 mA; VCC = 6.0 V 5.48 5.81 - V
VOL LOW-level output voltage VI=V
IH or VIL
IO=20µA; VCC = 2.0 V - 0 0.1 V
IO=20µA; VCC = 4.5 V - 0 0.1 V
IO=20µA; VCC = 6.0 V - 0 0.1 V
IO= 6.0 mA; VCC = 4.5 V - 0.15 0.26 V
IO= 7.8 mA; VCC = 6.0 V - 0.16 0.26 V
ILI input leakage current VI=V
CC or GND; VCC = 6.0 V - - ±0.1 µA
IOZ 3-state OFF-state current VI=V
IH or VIL; VCC = 6.0 V; VO=V
CC or GND - - ±0.5 µA
ICC quiescent supply current VI=V
CC or GND; IO= 0 A; VCC = 6.0 V - - 8.0 µA
CIinput capacitance - 3.5 - pF
Tamb =40 °C to +85 °C
VIH HIGH-level input voltage VCC = 2.0 V 1.5 - - V
VCC = 4.5 V 3.15 - - V
VCC = 6.0 V 4.2 - - V
VIL LOW-level input voltage VCC = 2.0 V - - 0.5 V
VCC = 4.5 V - - 1.35 V
VCC = 6.0 V - - 1.8 V
VOH HIGH-level output voltage VI=V
IH or VIL
IO=20 µA; VCC = 2.0 V 1.9 - - V
IO=20 µA; VCC = 4.5 V 4.4 - - V
IO=20 µA; VCC = 6.0 V 5.9 - - V
IO=6.0 mA; VCC = 4.5 V 3.84 - - V
IO=7.8 mA; VCC = 6.0 V 5.34 - - V
9397 750 13814 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet Rev. 03 — 11 November 2004 8 of 18
Philips Semiconductors 74HC564
Octal D-type flip-flop; positive-edge trigger; 3-state; inverting
VOL LOW-level output voltage VI=V
IH or VIL
IO=20µA; VCC = 2.0 V - - 0.1 V
IO=20µA; VCC = 4.5 V - - 0.1 V
IO=20µA; VCC = 6.0 V - - 0.1 V
IO= 6.0 mA; VCC = 4.5 V - - 0.33 V
IO= 7.8 mA; VCC = 6.0 V - - 0.33 V
ILI input leakage current VI=V
CC or GND; VCC = 6.0 V - - ±1.0 µA
IOZ 3-state OFF-state current VI=V
IH or VIL; VCC = 6.0 V; VO=V
CC or GND - - ±5.0 µA
ICC quiescent supply current VI=V
CC or GND; IO= 0 A; VCC = 6.0 V - - 80 µA
Tamb =40 °C to +125 °C
VIH HIGH-level input voltage VCC = 2.0 V 1.5 - - V
VCC = 4.5 V 3.15 - - V
VCC = 6.0 V 4.2 - - V
VIL LOW-level input voltage VCC = 2.0 V - - 0.5 V
VCC = 4.5 V - - 1.35 V
VCC = 6.0 V - - 1.8 V
VOH HIGH-level output voltage VI=V
IH or VIL -
IO=20 µA; VCC = 2.0 V 1.9 - - V
IO=20 µA; VCC = 4.5 V 4.4 - - V
IO=20 µA; VCC = 6.0 V 5.9 - - V
IO=6.0 mA; VCC = 4.5 V 3.7 - - V
IO=7.8 mA; VCC = 6.0 V 5.2 - - V
VOL LOW-level output voltage VI=V
IH or VIL -
IO=20µA; VCC = 2.0 V - - 0.1 V
IO=20µA; VCC = 4.5 V - - 0.1 V
IO=20µA; VCC = 6.0 V - - 0.1 V
IO= 6.0 mA; VCC = 4.5 V - - 0.4 V
IO= 7.8 mA; VCC = 6.0 V - - 0.4 V
ILI input leakage current VI=V
CC or GND; VCC = 6.0 V - - ±1.0 µA
IOZ 3-state OFF-state current VI=V
IH or VIL; VCC = 6.0 V; VO=V
CC or GND - - ±10.0 µA
ICC quiescent supply current VI=V
CC or GND; IO= 0 A; VCC = 6.0 V - - 160 µA
Table 7: Static characteristics
…continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Typ Max Unit
9397 750 13814 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet Rev. 03 — 11 November 2004 9 of 18
Philips Semiconductors 74HC564
Octal D-type flip-flop; positive-edge trigger; 3-state; inverting
11. Dynamic characteristics
Table 8: Dynamic characteristics
GND = 0 V; t
r
=t
f
= 6 ns; C
L
= 50 pF; see Figure 9.
Symbol Parameter Conditions Min Typ Max Unit
Tamb = 25 °C
tPHL, tPLH propagation delay CP to Qn see Figure 6
VCC = 2.0 V - 50 165 ns
VCC = 4.5 V - 18 33 ns
VCC = 6.0 V - 14 28 ns
VCC = 5.0 V; CL=15pF - 15 - ns
tPZH, tPZL 3-state output enable time OE to Qn see Figure 7
VCC = 2.0 V - 44 140 ns
VCC = 4.5 V - 16 28 ns
VCC = 6.0 V - 13 24 ns
tPHZ, tPLZ 3-state output disable time OE to Qn see Figure 7
VCC = 2.0 V - 50 135 ns
VCC = 4.5 V - 18 27 ns
VCC = 6.0 V - 14 23 ns
tTHL, tTLH output transition time see Figure 6
VCC = 2.0 V - 14 60 ns
VCC = 4.5 V - 5 12 ns
VCC = 6.0 V - 4 10 ns
tWCP clock pulse width HIGH or LOW see Figure 6
VCC = 2.0 V 80 14 - ns
VCC = 4.5 V 16 5 - ns
VCC = 6.0 V 14 4 - ns
tsu set-up time Dn to CP see Figure 8
VCC = 2.0 V 60 6 - ns
VCC = 4.5 V 12 2 - ns
VCC = 6.0 V 10 2 - ns
thhold time Dn to CP see Figure 8
VCC = 2.0 V 5 0 - ns
VCC = 4.5 V 5 0 - ns
VCC = 6.0 V 5 0 - ns
fmax maximum clock frequency see Figure 6
VCC = 2.0 V 6.0 38 - MHz
VCC = 4.5 V 30 115 - MHz
VCC = 6.0 V 35 137 - MHz
VCC = 5.0 V; CL= 15 pF - 127 - MHz
CPD power dissipation capacitance per flip-flop VI= GND to VCC [1] -27- pF
9397 750 13814 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet Rev. 03 — 11 November 2004 10 of 18
Philips Semiconductors 74HC564
Octal D-type flip-flop; positive-edge trigger; 3-state; inverting
Tamb = 40 °C to +85 °C
tPHL, tPLH propagation delay CP to Qn see Figure 6
VCC = 2.0 V - - 205 ns
VCC = 4.5 V - - 41 ns
VCC = 6.0 V - - 35 ns
tPZH, tPZL 3-state output enable time OE to Qn see Figure 7
VCC = 2.0 V - - 175 ns
VCC = 4.5 V - - 35 ns
VCC = 6.0 V - - 30 ns
tPHZ, tPLZ 3-state output disable time OE to Qn see Figure 7
VCC = 2.0 V - - 170 ns
VCC = 4.5 V - - 34 ns
VCC = 6.0 V - - 29 ns
tTHL, tTLH output transition time see Figure 6
VCC = 2.0 V - - 75 ns
VCC = 4.5 V - - 15 ns
VCC = 6.0 V - - 13 ns
tWCP clock pulse width HIGH or LOW see Figure 6
VCC = 2.0 V 100 - - ns
VCC = 4.5 V 20 - - ns
VCC = 6.0 V 17 - - ns
tsu set-up time Dn to CP see Figure 8
VCC = 2.0 V 75 - - ns
VCC = 4.5 V 15 - - ns
VCC = 6.0 V 13 - - ns
thhold time Dn to CP see Figure 8
VCC = 2.0 V 5 - - ns
VCC = 4.5 V 5 - - ns
VCC = 6.0 V 5 - - ns
fmax maximum clock frequency see Figure 6
VCC = 2.0 V 4.8 - - MHz
VCC = 4.5 V 24 - - MHz
VCC = 6.0 V 28 - - MHz
Table 8: Dynamic characteristics
…continued
GND = 0 V; t
r
=t
f
= 6 ns; C
L
= 50 pF; see Figure 9.
Symbol Parameter Conditions Min Typ Max Unit
9397 750 13814 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet Rev. 03 — 11 November 2004 11 of 18
Philips Semiconductors 74HC564
Octal D-type flip-flop; positive-edge trigger; 3-state; inverting
[1] CPD is used to determine the dynamic power dissipation (PD in µW).
PD=C
PD ×VCC2×fi×N+(CL×VCC2×fo) where:
fi= input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CL×VCC2×fo) = sum of outputs.
Tamb = 40 °C to +125 °C
tPHL, tPLH propagation delay CP to Qn see Figure 6
VCC = 2.0 V - - 250 ns
VCC = 4.5 V - - 50 ns
VCC = 6.0 V - - 43 ns
tPZH, tPZL 3-state output enable time OE to Qn see Figure 7
VCC = 2.0 V - - 210 ns
VCC = 4.5 V - - 42 ns
VCC = 6.0 V - - 36 ns
tPHZ, tPLZ 3-state output disable time OE to Qn see Figure 7
VCC = 2.0 V - - 205 ns
VCC = 4.5 V - - 41 ns
VCC = 6.0 V - - 35 ns
tTHL, tTLH output transition time see Figure 6
VCC = 2.0 V - - 90 ns
VCC = 4.5 V - - 18 ns
VCC = 6.0 V - - 15 ns
tWCP clock pulse width HIGH or LOW see Figure 6
VCC = 2.0 V 120 - - ns
VCC = 4.5 V 24 - - ns
VCC = 6.0 V 20 - - ns
tsu set-up time Dn to CP see Figure 8
VCC = 2.0 V 90 - - ns
VCC = 4.5 V 18 - - ns
VCC = 6.0 V 15 - - ns
thhold time Dn to CP see Figure 8
VCC = 2.0 V 5 - - ns
VCC = 4.5 V 5 - - ns
VCC = 6.0 V 5 - - ns
fmax maximum clock frequency see Figure 6
VCC = 2.0 V 4.0 - - MHz
VCC = 4.5 V 20 - - MHz
VCC = 6.0 V 24 - - MHz
Table 8: Dynamic characteristics
…continued
GND = 0 V; t
r
=t
f
= 6 ns; C
L
= 50 pF; see Figure 9.
Symbol Parameter Conditions Min Typ Max Unit
AL
9397 750 13814 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet Rev. 03 — 11 November 2004 12 of 18
Philips Semiconductors 74HC564
Octal D-type flip-flop; positive-edge trigger; 3-state; inverting
12. Waveforms
VM= 0.5 ×VI.
Fig 6. Waveforms showing the clock (CP) to output (Qn) propagation delays, the clock
pulse width, the output transition times and the maximum clock frequency
VM= 0.5 ×VI.
Fig 7. Waveforms showing the 3-state enable and disable times
001aab938
CP input
Qn output
VM
tPHL
tTHL tTLH
tPLH
VM
tW
1/fmax
VM
OE input
output
LOW to OFF
OFF to LOW
output
HIGH to OFF
OFF to HIGH
VM
001aab940
tf
tr
90 %
10 %
tPLZ
VM
tPZL
tPHZ tPZH
10 %
90 %
outputs
enabled
outputs
disabled
outputs
enabled
9397 750 13814 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet Rev. 03 — 11 November 2004 13 of 18
Philips Semiconductors 74HC564
Octal D-type flip-flop; positive-edge trigger; 3-state; inverting
The shaded areas indicate when the input is permitted to change for predictable output
performance.
VM= 0.5 ×VI.
Fig 8. Waveforms showing the data set-up and hold times for the data input (Dn)
Test data is given in Table 9.
Definitions for test circuit:
RL = Load resistor.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse
generator.
Fig 9. Load circuitry for switching times
Table 9: Test data
Supply Input Load S1
VCC VItr = tfCLRLtPZL, tPLZ tPZH, tPHZ tPHL, tPLH
2.0 V VCC 6 ns 50 pF 1 kVCC GND open
4.5 V VCC 6 ns 50 pF 1 kVCC GND open
6.0 V VCC 6 ns 50 pF 1 kVCC GND open
5.0 V VCC 6 ns 15 pF 1 kVCC GND open
Dn input
VM
VM
001aab939
tsu th
CP input
Qn input
tsu th
VM
open
GND
VCC
VCC
VIVO
mna232
D.U.T.
CL
RT
RL =
1000
PULSE
GENERATOR
S1
rt, ‘ 4 D +LI \ 99999199999
9397 750 13814 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet Rev. 03 — 11 November 2004 14 of 18
Philips Semiconductors 74HC564
Octal D-type flip-flop; positive-edge trigger; 3-state; inverting
13. Package outline
Fig 10. Package outline SOT146-1 (DIP20)
UNIT A
max. 1 2 b1cD E e M
H
L
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm
inches
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
SOT146-1 99-12-27
03-02-13
A
min. A
max. bZ
max.
w
ME
e1
1.73
1.30 0.53
0.38 0.36
0.23 26.92
26.54 6.40
6.22 3.60
3.05 0.2542.54 7.62 8.25
7.80 10.0
8.3 24.2 0.51 3.2
0.068
0.051 0.021
0.015 0.014
0.009 1.060
1.045 0.25
0.24 0.14
0.12 0.010.1 0.3 0.32
0.31 0.39
0.33 0.0780.17 0.02 0.13
SC-603MS-001
MH
c
(e )
1
ME
A
L
seating plane
A1
wM
b1
e
D
A2
Z
20
1
11
10
b
E
pin 1 index
0 5 10 mm
scale
Note
1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
(1)
(1) (1)
DIP20: plastic dual in-line package; 20 leads (300 mil) SOT146-1
‘HHHHHHHHH HHHHH 7H H Hfi 90 a©
9397 750 13814 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet Rev. 03 — 11 November 2004 15 of 18
Philips Semiconductors 74HC564
Octal D-type flip-flop; positive-edge trigger; 3-state; inverting
Fig 11. Package outline SOT163-1 (SO20)
UNIT A
max. A1A2A3bpcD
(1) E(1) (1)
eH
ELL
pQZ
ywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm
inches
2.65 0.3
0.1 2.45
2.25 0.49
0.36 0.32
0.23 13.0
12.6 7.6
7.4 1.27 10.65
10.00 1.1
1.0 0.9
0.4 8
0
o
o
0.25 0.1
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
1.1
0.4
SOT163-1
10
20
wM
bp
detail X
Z
e
11
1
D
y
0.25
075E04 MS-013
pin 1 index
0.1 0.012
0.004 0.096
0.089 0.019
0.014 0.013
0.009 0.51
0.49 0.30
0.29 0.05
1.4
0.055
0.419
0.394 0.043
0.039 0.035
0.016
0.01
0.25
0.01 0.004
0.043
0.016
0.01
0 5 10 mm
scale
X
θ
A
A1
A2
HE
Lp
Q
E
c
L
vMA
(A )
3
A
SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1
99-12-27
03-02-19
9397 750 13814 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet Rev. 03 — 11 November 2004 16 of 18
Philips Semiconductors 74HC564
Octal D-type flip-flop; positive-edge trigger; 3-state; inverting
14. Revision history
Table 10: Revision history
Document ID Release
date Data sheet status Change notice Doc. number Supersedes
74HC564_3 20041111 Product data sheet - 9397 750 13814 74HC_HCT564_CNV_2
Modifications: The format of this data sheet has been redesigned to comply with the current presentation
and information standard of Philips Semiconductors.
Removed type number 74HCT564.
Inserted family specification.
74HC_HCT564_CNV_2 19970905 Product specification - - 74HC_HCT564_1
74HC_HCT564_1 19901201 Product specification - - -
Philips Semiconductors 74HC564
Octal D-type flip-flop; positive-edge trigger; 3-state; inverting
9397 750 13814 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet Rev. 03 — 11 November 2004 17 of 18
15. Data sheet status
[1] Please consult the most recently issued data sheet before initiating or completing a design.
[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at
URL http://www.semiconductors.philips.com.
[3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
16. Definitions
Short-form specification — The data in a short-form specification is
extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with
the Absolute Maximum Rating System (IEC 60134). Stress above one or
more of the limiting values may cause permanent damage to the device.
These are stress ratings only and operation of the device at these or at any
other conditions above those given in the Characteristics sections of the
specification is not implied. Exposure to limiting values for extended periods
may affect device reliability.
Application information — Applications that are described herein for any
of these products are for illustrative purposes only. Philips Semiconductors
make no representation or warranty that such applications will be suitable for
the specified use without further testing or modification.
17. Disclaimers
Life support — These products are not designed for use in life support
appliances, devices, or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors
customers using or selling these products for use in such applications do so
at their own risk and agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to
make changes in the products - including circuits, standard cells, and/or
software - described or contained herein in order to improve design and/or
performance. When the product is in full production (status ‘Production’),
relevant changes will be communicated via a Customer Product/Process
Change Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no
license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are
free from patent, copyright, or mask work right infringement, unless otherwise
specified.
18. Contact information
For additional information, please visit: http://www.semiconductors.philips.com
For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com
Level Data sheet status [1] Product status [2] [3] Definition
I Objective data Development This data sheet contains data from the objective specification for product development. Philips
Semiconductors reserves the right to change the specification in any manner without notice.
II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
order to improve the design and supply the best possible product.
III Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
changes will be communicated via a Customer Product/Process Change Notification (CPCN).
© Koninklijke Philips Electronics N.V. 2004
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner. The information presented in this document does
not form part of any quotation or contract, is believed to be accurate and reliable and may
be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under
patent- or other industrial or intellectual property rights.
Date of release: 11 November 2004
Document number: 9397 750 13814
Published in The Netherlands
Philips Semiconductors 74HC564
Octal D-type flip-flop; positive-edge trigger; 3-state; inverting
19. Contents
1 General description . . . . . . . . . . . . . . . . . . . . . . 1
2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
3 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2
4 Ordering information . . . . . . . . . . . . . . . . . . . . . 2
5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3
6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 4
6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5
7 Functional description . . . . . . . . . . . . . . . . . . . 5
7.1 Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 5
8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 6
9 Recommended operating conditions. . . . . . . . 6
10 Static characteristics. . . . . . . . . . . . . . . . . . . . . 7
11 Dynamic characteristics . . . . . . . . . . . . . . . . . . 9
12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 14
14 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 16
15 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 17
16 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
17 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
18 Contact information . . . . . . . . . . . . . . . . . . . . 17

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