74AHC1G06, 74AHCT1G06 Datasheet by NXP USA Inc.

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1. General description
74AHC1G06 and 74AHCT1G06 are high-speed Si-gate CMOS devices. They provide an
inverting buffer. The output of these devices is an open-drain and can be connected to
other open-drain outputs to implement active-LOW, wired-OR or active-HIGH, wired-AND
functions. For digital operation this device must have a pull-up resistor to establish a logic
HIGH-level.
The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V.
The AHCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V.
2. Features and benefits
High noise immunity
Low power dissipation
SOT353-1 and SOT753 package options
ESD protection:
HBM JESD22-A114E: exceeds 2000 V
MM JESD22-A115-A: exceeds 200 V
CDM JESD22-C101C: exceeds 1000 V
Specified from 40 C to +125 C
3. Ordering information
74AHC1G06; 74AHCT1G06
Inverter with open-drain output
Rev. 7 — 18 November 2014 Product data sheet
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74AHC1G06GW 40 C to +125 C TSSOP5 plastic thin shrink small outline package;
5 leads; body width 1.25 mm SOT353-1
74AHCT1G06GW
74AHC1G06GV 40 C to +125 C SC-74A plastic surface-mounted package; 5 leads SOT753
74AHCT1G06GV
GND fl
74AHC_AHCT1G06 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 7 — 18 November 2014 2 of 12
NXP Semiconductors 74AHC1G06; 74AHCT1G06
Inverter with open-drain output
4. Marking
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
6. Pinning information
6.1 Pinning
6.2 Pin description
Table 2. Marking codes
Type number Marking[1]
74AHC1G06GW AR
74AHC1G06GV A06
74AHCT1G06GW CR
74AHCT1G06GV C06
Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram
mna584
AY
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Fig 4. Pin configuration
74AHC1G06
74AHCT1G06
n.c. V
CC
A
GND Y
001aaf097
1
2
3
5
4
Table 3. Pin description
Symbol Pin Description
n.c. 1 not connected
A 2 data input
GND 3 ground (0 V)
Y 4 data output
VCC 5 supply voltage
74AHC_AHCT1G06 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 7 — 18 November 2014 3 of 12
NXP Semiconductors 74AHC1G06; 74AHCT1G06
Inverter with open-drain output
7. Functional description
8. Limiting values
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For both TSSOP5 and SC-74A packages: above 87.5 C the value of Ptot derates linearly with 4.0 mW/K.
9. Recommended operating conditions
Table 4. Function table
H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state
Input Output
A Y
LZ
HL
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage 0.5 +7.0 V
VIinput voltage 0.5 +7.0 V
IIK input clamping current VI < 0.5 V 20 - mA
IOK output clamping current VO < 0.5 V [1] -20 mA
IOoutput current VO > 0.5 V - 25 mA
VOoutput voltage active mode [1] 0.5 +7.0 V
high-impedance mode [1] 0.5 +7.0 V
ICC supply current - 75 mA
IGND ground current 75 - mA
Tstg storage temperature 65 +150 C
Ptot total power dissipation Tamb = 40 C to +125 C[2] - 250 mW
Table 6. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 74AHC1G06 74AHCT1G06 Unit
Min Typ Max Min Typ Max
VCC supply voltage 2.0 5.0 5.5 4.5 5.0 5.5 V
VIinput voltage 0 - 5.5 0 - 5.5 V
VOoutput voltage active mode 0 - VCC 0-V
CC V
high-impedance mode 0 - 6.0 0 - 6.0 V
Tamb ambient temperature 40 +25 +125 40 +25 +125 C
t/V input transition rise
and fall rate VCC = 3.3 V 0.3 V - - 100 - - - ns/V
VCC = 5.0 V 0.5 V - - 20 - - 20 ns/V
74AHC_AHCT1G06 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 7 — 18 November 2014 4 of 12
NXP Semiconductors 74AHC1G06; 74AHCT1G06
Inverter with open-drain output
10. Static characteristics
Table 7. Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 25 C40 C to +85 C40 C to +125 CUnit
Min Typ Max Min Max Min Max
For type 74AHC1G06
VIH HIGH-level
input voltage VCC = 2.0 V 1.5 - - 1.5 - 1.5 - V
VCC = 3.0 V 2.1 - - 2.1 - 2.1 - V
VCC = 5.5 V 3.85 - - 3.85 - 3.85 - V
VIL LOW-level
input voltage VCC = 2.0 V - - 0.5 - 0.5 - 0.5 V
VCC = 3.0 V - - 0.9 - 0.9 - 0.9 V
VCC = 5.5 V - - 1.65 - 1.65 - 1.65 V
VOL LOW-level
output voltage VI= VIH or VIL
IO= 50 A; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V
IO= 50 A; VCC = 3.0 V - 0 0.1 - 0.1 - 0.1 V
IO= 50 A; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V
IO= 4.0 mA; VCC = 3.0 V - - 0.36 - 0.44 - 0.55 V
IO= 8.0 mA; VCC = 4.5 V - - 0.36 - 0.44 - 0.55 V
IIinput leakage
current VI= 5.5 V or GND;
VCC =0Vto5.5V - - 0.1 - 1.0 - 2.0 A
IOZ OFF-state
output current VI= VIH or VIL; VO = VCC or
GND; VCC = 5.5 V --0.25 2.5 10.0 A
ICC supply current VI=V
CC or GND; IO = 0 A;
VCC = 5.5 V --1.0- 10 - 20A
CIinput
capacitance - 1.5 10 - 10 - 10 pF
For type 74AHCT1G06
VIH HIGH-level
input voltage VCC = 4.5 V to 5.5 V 2.0 - - 2.0 - 2.0 - V
VIL LOW-level
input voltage VCC = 4.5 V to 5.5 V - - 0.8 - 0.8 - 0.8 V
VOL LOW-level
output voltage VI= VIH or VIL; VCC = 4.5 V
IO= 50 A - 0 0.1 - 0.1 - 0.1 V
IO= 8.0 mA - - 0.36 - 0.44 - 0.55 V
IIinput leakage
current VI= 5.5 V or GND;
VCC =0Vto5.5V - - 0.1 - 1.0 - 2.0 A
IOZ OFF-state
output current VI= VIH or VIL; VO = VCC or
GND; VCC = 5.5 V --0.25 2.5 10.0 A
ICC supply current VI=V
CC or GND; IO = 0 A;
VCC = 5.5 V --1.0- 10 - 20A
ICC additional
supply current per input pin; VI=3.4V;
other inputs at VCC or GND;
IO=0 A; V
CC = 5.5 V
- - 1.35 - 1.5 - 1.5 mA
CIinput
capacitance - 1.5 10 - 10 - 10 pF
Figure 6 Figure 5 Figure 5 Figure 5 Figure 5
74AHC_AHCT1G06 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 7 — 18 November 2014 5 of 12
NXP Semiconductors 74AHC1G06; 74AHCT1G06
Inverter with open-drain output
11. Dynamic characteristics
[1] Typical values are measured at VCC = 3.3 V.
[2] Typical values are measured at VCC = 5.0 V.
[3] CPD is used to determine the dynamic power dissipation PD(W).
PD=C
PD VCC2fi+(CLVCC2fo)where:
fi= input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;
VCC = supply voltage in Volts
Table 8. Dynamic characteristics
GND = 0 V; tr = tf =
3.0 ns. For test circuit see Figure 6.
Symbol Parameter Conditions 25 C40 C to +85 C40 C to +125 CUnit
Min Typ Max Min Max Min Max
For type 74AHC1G06
tPZL OFF-state
to LOW
propagation
delay
A to Y; see Figure 5
VCC = 3.0 V to 3.6 V [1]
CL= 15 pF - 3.7 7.0 1.0 7.7 1.0 8.1 ns
CL= 50 pF - 5.2 10.0 1.0 11.0 1.0 11.5 ns
VCC = 4.5 V to 5.5 V [2]
CL= 15 pF - 2.7 4.9 1.0 5.3 1.0 5.6 ns
CL= 50 pF - 3.8 7.0 1.0 7.5 1.0 8.0 ns
tPLZ LOW to
OFF-state
propagation
delay
A to Y; see Figure 5
VCC = 3.0 V to 3.6 V [1]
CL= 15 pF - 4.8 6.4 1.0 6.9 1.0 7.4 ns
CL= 50 pF - 6.9 10.0 1.0 10.5 1.0 11.0 ns
VCC = 4.5 V to 5.5 V [2]
CL= 15 pF - 3.0 4.1 1.0 4.6 1.0 5.1 ns
CL= 50 pF - 4.3 6.5 1.0 7.0 1.0 7.5 ns
CPD power
dissipation
capacitance
per buffer;
CL=50pF;f= 1 MHz;
VI=GNDtoV
CC
[3] -3- - - - -pF
For type 74AHCT1G06
tPZL OFF-state
to LOW
propagation
delay
A to Y; see Figure 5
VCC = 4.5 V to 5.5 V [2]
CL= 15 pF - 3.0 5.3 1.0 6.0 1.0 6.3 ns
CL= 50 pF - 4.2 7.5 1.0 8.5 1.0 9.0 ns
tPLZ LOW to
OFF-state
propagation
delay
A to Y; see Figure 5
VCC = 4.5 V to 5.5 V [2]
CL= 15 pF - 3.2 4.6 1.0 5.1 1.0 5.6 ns
CL= 50 pF - 4.5 7.0 1.0 7.5 1.0 8.0 ns
CPD power
dissipation
capacitance
per buffer;
CL=50pF;f= 1 MHz;
VI=GNDtoV
CC
[3] -4.5- - - - - pF
74AHC_AHCT1G06 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 7 — 18 November 2014 6 of 12
NXP Semiconductors 74AHC1G06; 74AHCT1G06
Inverter with open-drain output
12. Waveforms
Measurement points are given in Table 9.
Fig 5. Input (A) to output (Y) propagation delays
mna587
tPLZ
VOL + 0.3 V
A input
Y output
VI
VCC
VM(1)
VOL
GND
tPZL
VM(2)
Table 9. Measurement point
Type Input Output
VIVM(1) VM(2)
74AHC1G06 GND to VCC 0.5 VCC 0.5 VCC
74AHCT1G06 GND to 3.0 V 1.5 V 0.5 VCC
Test data is given in Table 8. Definitions for test circuit:
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
For tPLZ, tPZL, S1 = VCC
Fig 6. Test circuit for measuring switching times
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74AHC_AHCT1G06 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 7 — 18 November 2014 7 of 12
NXP Semiconductors 74AHC1G06; 74AHCT1G06
Inverter with open-drain output
13. Package outline
Fig 7. Package outline SOT353-1 (TSSOP5)
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74AHC_AHCT1G06 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 7 — 18 November 2014 8 of 12
NXP Semiconductors 74AHC1G06; 74AHCT1G06
Inverter with open-drain output
Fig 8. Package outline SOT753 (SC-74A)
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Section 4 Seclion 3 Section 13
74AHC_AHCT1G06 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 7 — 18 November 2014 9 of 12
NXP Semiconductors 74AHC1G06; 74AHCT1G06
Inverter with open-drain output
14. Abbreviations
15. Revision history
Table 10. Abbreviations
Acronym Description
CDM Charged Device Model
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
MM Machine Model
TTL Transistor-Transistor Logic
Table 11. Revision history
Document ID Release date Data sheet status Change notice Supersedes
74AHC_AHCT1G06 v.7 20141118 Product data sheet - 74AHC_AHCT1G06 v.6
Modifications: Section 4: table note added.
74AHC_AHCT1G06 v.6 20070607 Product data sheet - 74AHC_AHCT1G06 v.5
Modifications: The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
Legal texts have been adapted to the new company name where appropriate.
Package SOT353 changed to SOT353-1 in Section 3 and Section 13.
Quick reference data and Soldering sections removed.
74AHC_AHCT1G06 v.5 20021002 Product specification - 74AHC_AHCT1G06 v.4
74AHC_AHCT1G06 v.4 20020528 Product specification - 74AHC_AHCT1G06 v.3
74AHC_AHCT1G06 v.3 20020221 Product specification - 74AHC_AHCT1G06 v.2
74AHC_AHCT1G06 v.2 20010209 Product specification - 74AHC_AHCT1G06 v.1
74AHC_AHCT1G06 v.1 20000501 Product specification - -
74AHC_AHCT1G06 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 7 — 18 November 2014 10 of 12
NXP Semiconductors 74AHC1G06; 74AHCT1G06
Inverter with open-drain output
16. Legal information
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[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
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Document status[1][2] Product status[3] Definition
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Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
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74AHC_AHCT1G06 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 7 — 18 November 2014 11 of 12
NXP Semiconductors 74AHC1G06; 74AHCT1G06
Inverter with open-drain output
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
16.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
17. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
NXP Semiconductors 74AHC1G06; 74AHCT1G06
Inverter with open-drain output
© NXP Semiconductors N.V. 2014. All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 18 November 2014
Document identifier: 74AHC_AHCT1G06
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
18. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 1
4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2
7 Functional description . . . . . . . . . . . . . . . . . . . 3
8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
9 Recommended operating conditions. . . . . . . . 3
10 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4
11 Dynamic characteristics . . . . . . . . . . . . . . . . . . 5
12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 7
14 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . . 9
15 Revision history. . . . . . . . . . . . . . . . . . . . . . . . . 9
16 Legal information. . . . . . . . . . . . . . . . . . . . . . . 10
16.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 10
16.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
16.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
16.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 11
17 Contact information. . . . . . . . . . . . . . . . . . . . . 11
18 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

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