2N7002K Datasheet by NXP USA Inc.

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fl? PHILIPS
2N7002K
TrenchMOS™ logic level FET
Rev. 01 — 20 October 2003 Product data
M3D088
1. Product profile
1.1 Description
N-channel enhancement mode field-effect transistor in a plastic package using
TrenchMOS™ technology.
1.2 Features
1.3 Applications
1.4 Quick reference data
2. Pinning information
Logic level compatible Very fast switching
Subminiature surface mount package Gate-source ESD protection diodes.
Relay driver High speed line driver.
VDS 60 V ID340 mA
Ptot 0.83 W RDSon 3.9 .
Table 1: Pinning - SOT23, simplified outline and symbol
Pin Description Simplified outline Symbol
1 gate (g)
SOT23
2 source (s)
3 drain (d)
MSB003
Top view
12
3
g
d
s
03ab60
Philips Semiconductors 2N7002K
TrenchMOS™ logic level FET
Product data Rev. 01 — 20 October 2003 2 of 12
9397 750 11703 © Koninklijke Philips Electronics N.V. 2003. All rights reserved.
3. Ordering information
4. Limiting values
Table 2: Ordering information
Type number Package
Name Description Version
2N7002K SOT23 Plastic surface mounted package; 3 leads. SOT23
Table 3: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VDS drain-source voltage (DC) 25 °CTj150 °C - 60 V
VDGR drain-gate voltage (DC) 25 °CTj150 °C; RGS =20k-60V
VGS gate-source voltage (DC) - ±15 V
IDdrain current (DC) Tsp =25°C; VGS =10V;Figure 2 and 3- 340 mA
Tsp = 100 °C; VGS =10V;Figure 2 - 215 mA
IDM peak drain current Tsp =25°C; pulsed; tp10 µs; Figure 3 - 680 mA
Ptot total power dissipation Tsp =25°C; Figure 1 - 0.83 W
Tstg storage temperature 65 +150 °C
Tjjunction temperature 65 +150 °C
Source-drain diode
ISsource (diode forward) current (DC) Tsp =25°C - 340 mA
ISM peak source (diode forward) current Tsp =25°C; pulsed; tp10 µs - 680 mA
Electrostatic discharge voltage
Vesd electrostatic discharge voltage Human Body Model 1; C = 100 pF; R = 1.5 k-1kV
Philips Semiconductors 2N7002K
TrenchMOS™ logic level FET
Product data Rev. 01 — 20 October 2003 3 of 12
9397 750 11703 © Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Fig 1. Normalized total power dissipation as a
function of solder point temperature. Fig 2. Normalized continuous drain current as a
function of solder point temperature.
Tsp =25°C; IDM is single pulse; VGS =10V
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
03aa17
0
40
80
120
0 50 100 150 200
(%)
Tsp (°C)
Pder
03aa25
0
40
80
120
0 50 100 150 200
Tsp (°C)
Ider
(%)
Pder
Ptot
Ptot 25 C
°
()
----------------------- 100%×=Ider
ID
ID25C
°
()
------------------- 100%×=
03an66
10-2
10-1
1
1 10 102
VDS (V)
ID
(A)
DC
100 ms
10 ms
Limit RDSon = VDS/ ID
1 ms
tp = 10 µs
100 µs
Philips Semiconductors 2N7002K
TrenchMOS™ logic level FET
Product data Rev. 01 — 20 October 2003 4 of 12
9397 750 11703 © Koninklijke Philips Electronics N.V. 2003. All rights reserved.
5. Thermal characteristics
5.1 Transient thermal impedance
Table 4: Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
Rth(j-sp) thermal resistance from junction to solder point Figure 4 - - 150 K/W
Rth(j-a) thermal resistance from junction to ambient minimum footprint;
mounted on a printed-circuit board
- 350 - K/W
Fig 4. Transient thermal impedance from junction to solder point as a function of pulse duration.
03aa39
1
10
102
103
10-5 10-4 10-3 10-2 10-1 1 10
tp (s)
Zth(j-sp)
(K/W)
single pulse
δ = 0.5
0.2
0.1
0.05
0.02
tp
tp
T
P
t
T
δ =
Philips Semiconductors 2N7002K
TrenchMOS™ logic level FET
Product data Rev. 01 — 20 October 2003 5 of 12
9397 750 11703 © Koninklijke Philips Electronics N.V. 2003. All rights reserved.
6. Characteristics
Table 5: Characteristics
T
j
=25
°
C unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Static characteristics
V(BR)DSS drain-source breakdown voltage ID=10µA; VGS =0V
Tj=25°C 6075- V
Tj=55 °C 55--V
V(BR)GSS drain-source breakdown voltage IG=±1 mA; VDS = 0 V 16 22 - V
VGS(th) gate-source threshold voltage ID= 1 mA; VDS =V
GS;Figure 9 V
Tj=25°C 12- V
Tj= 150 °C 0.6 - - V
Tj=55 °C - - 3.5 V
IDSS drain-source leakage current VDS =48V; V
GS =0V
Tj=25°C - 0.01 1 µA
Tj= 150 °C --10µA
IGSS gate-source leakage current VGS =±10 V; VDS = 0 V - 50 500 nA
RDSon drain-source on-state resistance VGS = 10 V; ID= 500 mA; Figure 7 and 8
Tj=25°C - 2.8 3.9
Tj= 150 °C - 5.2 7.2
VGS = 4.5 V; ID= 200 mA; Figure 7 and 8- 3.8 5.3
Dynamic characteristics
Ciss input capacitance VGS =0V; V
DS = 10 V; f = 1 MHz;
Figure 11
- 1340pF
Coss output capacitance - 8 30 pF
Crss reverse transfer capacitance - 4 10 pF
ton turn-on time VDD =50V; R
L= 250 ;
VGS =10V;R
G=50; RGS =50- 3 10 ns
toff turn-off time - 9 15 ns
Source-drain diode
VSD source-drain (diode forward) voltage IS= 300 mA; VGS =0V;Figure 12 - 0.93 1.5 V
trr reverse recovery time IS= 300 mA; dIS/dt = 100 A/µs;
VGS =0V; V
R=25V
-30-ns
Qrrecovered charge - 30 - nC
Philips Semiconductors 2N7002K
TrenchMOS™ logic level FET
Product data Rev. 01 — 20 October 2003 6 of 12
9397 750 11703 © Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Tj=25°CT
j=25°C and 150 °C; VDS >IDxR
DSon
Fig 5. Output characteristics: drain current as a
function of drain-source voltage; typical values. Fig 6. Transfer characteristics: drain current as a
function of gate-source voltage; typical values.
Tj=25°C
Fig 7. Drain-source on-state resistance as a function
of drain current; typical values. Fig 8. Normalized drain-source on-state resistance
factor as a function of junction temperature.
03an70
0
0.1
0.2
0.3
0.4
0.5
0 0.5 1 1.5 2
VDS (V)
ID
(A)
3.5 V
Tj = 25 °CVGS = 10V
4 V
4.5 V
3 V
6 V
03an72
0
0.1
0.2
0.3
0.4
0.5
0246
VGS (V)
ID
(A) VDS > ID x RDSon
Tj = 25 °C150 °C
03an71
0
2
4
6
8
10
0 0.1 0.2 0.3 0.4 0.5
ID (A)
RDSon
()
VGS = 3.5 V Tj = 25 °C
4.5 V
4 V
10 V
6 V
03aa28
0
0.6
1.2
1.8
2.4
-60 0 60 120 180
a
Tj (°C)
aRDSon
RDSon 25 C
°
()
-----------------------------
=
Philips Semiconductors 2N7002K
TrenchMOS™ logic level FET
Product data Rev. 01 — 20 October 2003 7 of 12
9397 750 11703 © Koninklijke Philips Electronics N.V. 2003. All rights reserved.
ID= 1 mA; VDS =V
GS Tj=25°C; VDS =5V
Fig 9. Gate-source threshold voltage as a function of
junction temperature. Fig 10. Sub-threshold drain current as a function of
gate-source voltage.
VGS = 0 V; f = 1 MHz
Fig 11. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values.
03aa34
0
0.6
1.2
1.8
2.4
-60 0 60 120 180
Tj (°C)
VGS(th)
(V) typ
min
03aa37
10-6
10-5
10-4
10-3
10-2
10-1
0 0.6 1.2 1.8 2.4
VGS (V)
ID
(A)
typmin
03aa46
1
10
102
10-1 1 10 102
VDS (V)
C
(pF)
Ciss
Coss
Crss
Philips Semiconductors 2N7002K
TrenchMOS™ logic level FET
Product data Rev. 01 — 20 October 2003 8 of 12
9397 750 11703 © Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Tj=25°C and 150 °C; VGS =0V I
D= 0.5 A; VDD =48V
Fig 12. Source (diode forward) current as a function of
source-drain (diode forward) voltage; typical
values.
Fig 13. Gate-source voltage as a function of gate
charge; typical values.
03an73
0
0.1
0.2
0.3
0.4
0.5
0 0.3 0.6 0.9 1.2
VSD (V)
IS
(A)
Tj = 25 °C
150 °C
VGS = 0 V
03ab09
0
5
10
15
0 0.3 0.6 0.9 1.2
QG (nC)
VGS
(V)
ID = 0.5A
VDD = 48 V
Tj = 25 °C
Philips Semiconductors 2N7002K
TrenchMOS™ logic level FET
Product data Rev. 01 — 20 October 2003 9 of 12
9397 750 11703 © Koninklijke Philips Electronics N.V. 2003. All rights reserved.
7. Package outline
Fig 14. SOT23.
UNIT A1
max. bpcDE e1HELpQwv
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
97-02-28
99-09-13
IEC JEDEC EIAJ
mm 0.1 0.48
0.38 0.15
0.09 3.0
2.8 1.4
1.2 0.95
e
1.9 2.5
2.1 0.55
0.45 0.1
0.2
DIMENSIONS (mm are the original dimensions)
0.45
0.15
SOT23 TO-236AB
bp
D
e1
e
A
A1
Lp
Q
detail X
HE
E
wM
vMA
B
AB
0 1 2 mm
scale
A
1.1
0.9
c
X
12
3
Plastic surface mounted package; 3 leads SOT23
Philips Semiconductors 2N7002K
TrenchMOS™ logic level FET
Product data Rev. 01 — 20 October 2003 10 of 12
9397 750 11703 © Koninklijke Philips Electronics N.V. 2003. All rights reserved.
8. Revision history
Table 6: Revision history
Rev Date CPCN Description
01 20031020 Product data (9397 750 11703)
9397 750 11703
Philips Semiconductors 2N7002K
TrenchMOS™ logic level FET
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data Rev. 01 — 20 October 2003 11 of 12
9397 750 11703
Philips Semiconductors 2N7002K
TrenchMOS™ logic level FET
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data Rev. 01 — 20 October 2003 11 of 12
Contact information
For additional information, please visit http://www.semiconductors.philips.com.
For sales office addresses, send e-mail to: sales.addresses@www.semiconductors.philips.com.Fax: +31 40 27 24825
9. Data sheet status
[1] Please consult the most recently issued data sheet before initiating or completing a design.
[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at
URL http://www.semiconductors.philips.com.
[3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
10. Definitions
Short-form specification — The data in a short-form specification is
extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with
the Absolute Maximum Rating System (IEC 60134). Stress above one or
more of the limiting values may cause permanent damage to the device.
These are stress ratings only and operation of the device at these or at any
other conditions above those given in the Characteristics sections of the
specification is not implied. Exposure to limiting values for extended periods
may affect device reliability.
Application information — Applications that are described herein for any
of these products are for illustrative purposes only. Philips Semiconductors
make no representation or warranty that such applications will be suitable for
the specified use without further testing or modification.
11. Disclaimers
Life support — These products are not designed for use in life support
appliances, devices, or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors
customers using or selling these products for use in such applications do so
at their own risk and agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to
make changes in the products - including circuits, standard cells, and/or
software - described or contained herein in order to improve design and/or
performance. When the product is in full production (status ‘Production’),
relevant changes will be communicated via a Customer Product/Process
Change Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no
licence or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are
free from patent, copyright, or mask work right infringement, unless otherwise
specified.
12. Trademarks
TrenchMOS — is a trademark of Koninklijke Philips Electronics N.V.
Level Data sheet status[1] Product status[2][3] Definition
I Objective data Development This data sheet contains data from the objective specification for product development. Philips
Semiconductors reserves the right to change the specification in any manner without notice.
II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
order to improve the design and supply the best possible product.
III Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
changes will be communicated via a Customer Product/Process Change Notification (CPCN).
PHILIPS Lefémalefmysbeflw
© Koninklijke Philips Electronics N.V. 2003.
Printed in The Netherlands
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner.
The information presented in this document does not form part of any quotation or
contract, is believed to be accurate and reliable and may be changed without notice. No
liability will be accepted by the publisher for any consequence of its use. Publication
thereof does not convey nor imply any license under patent- or other industrial or
intellectual property rights.
Date of release: 20 October 2003 Document order number: 9397 750 11703
Contents
Philips Semiconductors 2N7002K
TrenchMOS™ logic level FET
1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.4 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 1
3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2
4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4
5.1 Transient thermal impedance . . . . . . . . . . . . . . 4
6 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 5
7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9
8 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 10
9 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 11
10 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
11 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
12 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

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