MCP65R41,46 Datasheet by Microchip Technology

View All Related Products | Download PDF Datasheet
MICRQICHIP MCP65R41/6 WWW BMW
2010-2011 Microchip Technology Inc. DS22269B-page 1
MCP65R41/6
Features:
Factory Set Reference Voltage
- Available Voltage: 1.21V and 2.4V
- Tolerance: ±1% (typical)
Low Quiescent Current: 2.5 µA (typical)
Propagation Delay: 4 µs with 100 mV Overdrive
Input Offset Voltage: ±3mV (typical)
Rail-to-Rail Input: VSS - 0.3V to VDD + 0.3V
Output Options:
- MCP65R41 Push-Pull
- MCP65R46 Open-Drain
Wide Supply Voltage Range: 1.8V to 5.5V
Packages: SOT23-6
Typical Applications:
Laptop Computers
Mobile Phones
Hand-held Metering Systems
Hand-held Electronics
RC Timers
Alarm and Monitoring Circuits
Window Comparators
Design Aids:
Microchip Advanced Part Selector (MAPS)
Analog Demonstration and Evaluation Boards
Typical Application
Description:
The Microchip Technology Inc. MCP65R41/6 family of
push-pull and open-drain output comparators are
offered with integrated reference voltages of 1.21V and
2.4V. This family provides ±1% (typical) tolerance while
consuming 2.5 µA (typical) current. These comparators
operate with a single-supply voltage as low as 1.8V to
5.5V, which makes them ideal for low cost and/or
battery powered applications.
These comparators are optimized for low-power,
single-supply applications with greater than rail-to-rail
input operation. The output limits supply current surges
and dynamic power consumption while switching. The
internal input hysteresis eliminates output switching
due to internal noise voltage, reducing current draw.
The MCP65R41 output interfaces to CMOS/TTL logic.
The open-drain output device MCP65R46 can be used
as a level-shifter from 1.6V to 10V using a pull-up
resistor. It can also be used as a wired-OR logic.
This family of devices is available in the 6-lead SOT-23
package.
Package Types
V
OUT
V
DD
R
2
R
F
R
3
V
REF
V
PU
R
PU
*
* Pull-up resistor required for the MCP65R46 only.
R
4
Thermistor
V
REF
Over-Temperature Alert
6
4
SOT23-6
MCP65R41/6
1
2
3
-
+
5
OUT
VSS
+IN
VDD
VREF
-IN
3 µA Comparator with Integrated Reference Voltage
MCP65R41/6
DS22269B-page 2 2010-2011 Microchip Technology Inc.
NOTES:
2010-2011 Microchip Technology Inc. DS22269B-page 3
MCP65R41/6
1.0 ELECTRICAL
CHARACTERISTICS
1.1 Absolute Maximum Ratings†
VDD - VSS ....................................................................... 7.0V
All other inputs and outputs...........VSS0.3V to VDD + 0.3V
Difference Input voltage ......................................|VDD - VSS|
Output Short Circuit Current .................................... ±25 mA
Current at Input Pins .................................................. ±2 mA
Current at Output and Supply Pins .......................... ±50 mA
Storage temperature ................................... -65°C to +150°C
Ambient temperature with power applied.... -40°C to +125°C
Junction temperature ................................................ +150°C
ESD protection on all pins (HBM/MM)4 kV/200V
ESD protection on MCP65R46 OUT pin (HBM/MM).............
4 kV/175V
†Notice: Stresses above those listed under “Maximum
Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of
the device at those or any other conditions above those
indicated in the operational listings of this specification
is not implied. Exposure to maximum rating conditions
for extended periods may affect device reliability.
DC CHARACTERISTICS
Unless otherwise indicated, all limits are specified for: VDD = +1.8V to +5.5V, VSS = GND, TA = +25°C, VIN+ =
VDD/2, VIN- = VSS, RL= 100 k to VDD/2 (MCP65R41 only), and RPull-Up = 2.74 k to VDD (MCP65R46 only).
Parameters Sym Min Typ Max Units Conditions
Power Supply
Supply Voltage VDD 1.8 — 5.5 V
Quiescent Current per Comparator IQ—2.5 4 µAI
OUT = 0
Input
Input Voltage Range VCMR VSS0.3 — VDD+0.3 V
Common-Mode Rejection Ratio
VDD = 5V
CMRR 55 70 dB VCM = -0.3V to 5.3V
50 65 dB VCM = 2.5V to 5.3V
55 70 dB MCP65R41,
VCM = -0.3V to 2.5V
50 70 dB MCP65R46,
VCM = -0.3V to 2.5V
Power Supply Rejection Ratio PSRR 63 80 dB VCM = VSS
Input Offset Voltage VOS -10 ±3 +10 mV VCM = VSS (Note 1)
Drift with Temperature VOS/T ±10 µV/°C VCM = VSS
Input Hysteresis Voltage VHYST 13.3 5 mVV
CM = VSS (Note 1)
Drift with Temperature VHYST/T 6 µV/°C VCM = VSS
Drift with Temperature VHYST/T2— 5 µV/°C
2VCM = VSS
Input Bias Current IB—1 —pAV
CM = VSS
TA = +85°C IB—50 — pAV
CM = VSS
TA = +125°C IB 5000 pA VCM = VSS
Input Offset Current IOS — ±1 pAV
CM= VSS
Common Mode/
Differential Input Impedance
ZCM/ZDIFF —10
13||4 — ||pF
Note 1: The input offset voltage is the center (average) of the input-referred trip points. The input hysteresis is the
difference between the input-referred trip points.
2: Limit the output current to Absolute Maximum Rating of 30 mA.
3: Do not short the output of the MCP65R46 comparators above VSS + 10V.
4: The low-power reference voltage pin is designed to drive small capacitive loads. See Section 4.5.2.
MCP65R41/6
DS22269B-page 4 2010-2011 Microchip Technology Inc.
Push Pull Output
High Level Output Voltage VOH VDD0.2 — V IOUT = -2 mA, VDD = 5V
Low Level Output Voltage VOL ——V
SS+0.2 V IOUT = 2 mA, VDD = 5V
Short Circuit Current ISC —±50 — mA(Note 2) MCP65R41
ISC —±1.5 — mA(Note 2) MCP65R46
Open Drain Output (MCP65R46)
Low Level Output Voltage VOL ——V
SS+0.2 V IOUT = 2 mA
Short Circuit Current ISC —±50 — mA
High-Level Output Current IOH -100 nA VPU= 10V
Pull-up Voltage VPU 1.6 10 V Note 3
Output Pin Capacitance COUT —8 —pF
Reference Voltage Output
Initial Reference Tolerance VTOL -2 ±1 +2 % IREF = 0A,
VREF = 1.21V and 2.4V
VREF 1.185 1.21 1.234 V IREF = 0A
2.352 2.4 2.448 V
Reference Output Current IREF ±500 µA VTOL = ±2% (maximum)
Drift with Temperature (character-
ized but not production tested)
VREF/T 27 100 ppm VREF = 1.21V, VDD = 1.8V
—22100ppmV
REF = 1.21V, VDD = 5.5V
—23100ppmV
REF = 2.4V, VDD = 5.5V
Capacitive Load CL—200 — pFNote 4
DC CHARACTERISTICS (CONTINUED)
Unless otherwise indicated, all limits are specified for: VDD = +1.8V to +5.5V, VSS = GND, TA = +25°C, VIN+ =
VDD/2, VIN- = VSS, RL= 100 k to VDD/2 (MCP65R41 only), and RPull-Up = 2.74 k to VDD (MCP65R46 only).
Parameters Sym Min Typ Max Units Conditions
Note 1: The input offset voltage is the center (average) of the input-referred trip points. The input hysteresis is the
difference between the input-referred trip points.
2: Limit the output current to Absolute Maximum Rating of 30 mA.
3: Do not short the output of the MCP65R46 comparators above VSS + 10V.
4: The low-power reference voltage pin is designed to drive small capacitive loads. See Section 4.5.2.
2010-2011 Microchip Technology Inc. DS22269B-page 5
MCP65R41/6
1.2 Test Circuit Configuration
FIGURE 1-1: Test Circuit for the Push-Pull
Output Comparators.
FIGURE 1-2: Test Circuit for the Open-
Drain Comparators.
AC CHARACTERISTICS
Unless otherwise indicated, all limits are specified for: VDD = +1.8V to +5.5V, VSS = GND, TA = +25°C,
VIN+ = VDD/2, Step = 200 mV, Overdrive = 100 mV, RL= 100 k to VDD/2 (MCP65R41 only),
RPull-Up = 2.74 k to VDD (MCP65R46 only), and CL = 50 pF.
Parameters Sym Min Typ Max Units Conditions
Rise Time tR—0.85 µs
Fall Time tF—0.85— µs
Propagation Delay (High-to-Low) tPHL —48.0µs
Propagation Delay (Low-to-High) tPLH —48.0µs
Propagation Delay Skew tPDS —±0.2— µsNote 1
Maximum Toggle Frequency fMAX —160—kHzV
DD = 1.8V
fMAX —120—kHzV
DD = 5.5V
Input Noise Voltage EN—200—µV
P-P 10 Hz to 100 kHz
Note 1: Propagation Delay Skew is defined as: tPDS = tPLH - tPHL.
TEMPERATURE SPECIFICATIONS
Unless otherwise indicated, all limits are specified for: VDD = +1.8V to +5.5V and VSS = GND.
Parameters Symbol Min Typ Max Units Conditions
Temperature Ranges
Specified Temperature Range TA-40 — +125 °C
Operating Temperature Range TA-40 — +125 °C
Storage Temperature Range TA-65 — +150 °C
Thermal Package Resistances
Thermal Resistance, SOT23-6 JA —190.5— °C/W
VOUT
VDD
MCP65R41
VIN =V
SS
200k
200k
200k
200k 50p
VSS = 0V
VOUT
VDD
MCP65R46
VIN =V
SS
200k
200k
2.74k
100k 50p
VSS = 0V
MCP65R41/6
DS22269B-page 6 2010-2011 Microchip Technology Inc.
NOTES:
FIGURE 2-1: Input Offset Voltage. FIGURE 2-4: Input Offset Voltage Dn'ft. FIGURE 2-2: Input Offset Voltage FIGURE 2-5: Input Offset Voltage vs. FIGURE 2-3: Input Offset Voltage FIGURE 2-6: Input Offset Voltage vs.
2010-2011 Microchip Technology Inc. DS22269B-page 7
MCP65R41/6
2.0 TYPICAL PERFORMANCE CURVES
Note: Unless otherwise indicated, VDD = +1.8V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN = GND,
RL = 100 k to VDD/2 (MCP65R41 only), RPull-Up = 2.74 k to VDD/2 (MCP65R46 only) and CL = 50 pF.
FIGURE 2-1: Input Offset Voltage.
FIGURE 2-2: Input Offset Voltage
vs. Temperature.
FIGURE 2-3: Input Offset Voltage
vs. Common-Mode Input Voltage.
FIGURE 2-4: Input Offset Voltage Drift.
FIGURE 2-5: Input Offset Voltage vs.
Supply Voltage vs. Temperature.
FIGURE 2-6: Input Offset Voltage vs.
Common-Mode Input Voltage.
Note: The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
0%
10%
20%
30%
40%
50%
-10 -8 -6 -4 -2 0 2 4 6 8 10
VOS (mV)
Occurrences (%)
VDD = 1.8V
VCM = VSS
Avg. = 1.09 mV
StDev = 1.59 mV
850 units
VDD = 5.5V
VCM = VSS
Avg. = 0.61 mV
StDev = 1.48 mV
850 units
-10.0
-8.0
-6.0
-4.0
-2.0
0.0
2.0
4.0
6.0
8.0
10.0
-50 -25 0 25 50 75 100 125
Temperature (°C)
VDD= 1.8V
VDD= 5.5V
VCM = VSS
VOS (mV)
-10.0
-8.0
-6.0
-4.0
-2.0
0.0
2.0
4.0
6.0
8.0
10.0
-0.3 0.0 0.3 0.6 0.9 1.2 1.5 1.8 2.1
VCM (V)
VOS (mV)
VDD = 1.8V
TA= +25°C
TA= +125°C
TA= +85°C
TA= -4C
0%
10%
20%
30%
40%
50%
60%
-60 -48 -36 -24 -12 0 12 24 36 48 60
VOS Drift (µV/°C)
Occurrences (%)
VCM = VSS
Avg. = 9.86 µV/°C
StDev = 4.97 µV/°C
850 Units
TA = -40°C to +125°C
-3.0
-2.0
-1.0
0.0
1.0
2.0
3.0
1.5 2.5 3.5 4.5 5.5
VDD (V)
VOS (mV)
TA= -40°C to +125°C
-10.0
-7.5
-5.0
-2.5
0.0
2.5
5.0
7.5
10.0
-1.0 0.0 1.0 2.0 3.0 4.0 5.0 6.0
VCM (V)
VOS (mV)
TA = -40°C to +125°C
VDD = 5.5V
FIGURE 2-7: Input Hysteresis Voltage FIGURE 2-10: Input Hysteresis Voltage = «.1 Wm "in ~c |n qzs~c , ILllHHl FIGURE 2-8: Input Hysteresis Voltage FIGURE 2-11: Input Hysteresis Voltage //_lf 4%/ FIGURE 2-9: Input Hysteresis Voltage FIGURE 2-12: Input Hysteresis Voltage
MCP65R41/6
DS22269B-page 8 2010-2011 Microchip Technology Inc.
Note: Unless otherwise indicated, VDD = +1.8V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN = GND,
RL = 100 k to VDD/2 (MCP65R41 only), RPull-Up = 2.74 k to VDD/2 (MCP65R46 only) and CL = 50 pF.
FIGURE 2-7: Input Hysteresis Voltage
at -40°C.
FIGURE 2-8: Input Hysteresis Voltage
at +25°C.
FIGURE 2-9: Input Hysteresis Voltage
at +125°C.
FIGURE 2-10: Input Hysteresis Voltage
Drift – Linear Temperature Compensation (TC1).
FIGURE 2-11: Input Hysteresis Voltage
Drift – Quadratic Temperature Compensation
(TC2).
FIGURE 2-12: Input Hysteresis Voltage
vs. Temperature.
0%
5%
10%
15%
20%
25%
30%
1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
VHYST (mV)
Occurrences (%)
VDD = 1.8V
Avg. = 2.4 mV
StDev = 0.17 mV
850 units
VDD = 5.5V
Avg. = 2.3 mV
StDev = 0.17 mV
850 units
T
A
= -40°C
0%
5%
10%
15%
20%
25%
30%
1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
VHYST (mV)
Occurrences (%)
VDD = 1.8V
Avg. = 3.0 mV
StDev = 0.17 mV
850 units
VDD = 5.5V
Avg. = 2.8 mV
StDev = 0.17 mV
850 units
TA = +25°C
0%
5%
10%
15%
20%
25%
30%
1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
VHYST (mV)
Occurrences (%)
VDD = 1.8V
Avg. = 3.4 mV
StDev = 0.14 mV
850 units
VDD = 5.5V
Avg. = 3.2 mV
StDev = 0.13 mV
850 units
TA = +125°C
0%
10%
20%
30%
40%
50%
60%
70%
80%
0 2 4 6 8 101214161820
VHYST Drift, TC1 (µV/°C)
Occurrences (%)
850 Units
TA = -40°C to +125°C
VCM = VSS
VDD = 5.5V
Avg. = 5.7 µV/°C
StDev = 0.50 µV/°C
VDD = 1.8V
Avg. = 6.1 µV/°C
StDev = 0.55 µV/°C
0%
10%
20%
30%
-0.50 -0.25 0.00 0.25 0.50 0.75 1.00
VHYST Drift, TC2 (µV/°C2)
Occurrences (%)
VDD = 5.5V
VCM = VSS
Avg. = 10.4 µV/°C
StDev = 0.6 µVC
VDD = 5.5V
Avg. = 0.25 µV/°C2
StDev = 0.1 µV/°C2
VDD = 1.8V
Avg. = 0.3 µV/°C2
StDev = 0.2 µV/°C2
1380 Units
TA = -40°C to +125°C
VCM = VSS
1.0
2.0
3.0
4.0
5.0
-50 -25 0 25 50 75 100 125
Temperature (°C)
VHYST (mV)
V
DD= 5.5V
VDD = 1.8V
VCM = VSS
VNK FIGURE 2-13: Input Hysteresis Voltage vs. FIGURE 2-16: Quiescent Current. FIGURE 2-14: Input Hysteresis Voltage vs. FIGURE 2-17: Quiescent Current vs. FIGURE 2-15: Input Hysteresis Voltage vs. FIGURE 2-18: Quiescent Current vs.
2010-2011 Microchip Technology Inc. DS22269B-page 9
MCP65R41/6
Note: Unless otherwise indicated, VDD = +1.8V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN = GND,
RL = 100 k to VDD/2 (MCP65R41 only), RPull-Up = 2.74 k to VDD/2 (MCP65R46 only) and CL = 50 pF.
FIGURE 2-13: Input Hysteresis Voltage vs.
Common-Mode Input Voltage.
FIGURE 2-14: Input Hysteresis Voltage vs.
Common-Mode Input Voltage.
FIGURE 2-15: Input Hysteresis Voltage vs.
Supply Voltage vs. Temperature.
FIGURE 2-16: Quiescent Current.
FIGURE 2-17: Quiescent Current vs.
Common-Mode Input Voltage.
FIGURE 2-18: Quiescent Current vs.
Common-Mode Input Voltage.
1.0
2.0
3.0
4.0
5.0
-0.30.00.30.60.91.21.51.82.1
VCM (V)
VHYST (mV)
VDD = 1.8V
TA = +125°C
TA = +85°C
TA = +25°C
TA = -40°C
1.0
2.0
3.0
4.0
5.0
-0.50.51.52.53.54.55.5
VCM (V)
VHYST (mV)
VDD = 5.5V
TA = -40°C
TA = +25°C
TA = +85°C
TA = +12C
1.0
2.0
3.0
4.0
5.0
1.5 2.5 3.5 4.5 5.5
VDD (V)
VHYST (mV)
TA = -40°C
TA = +25°C
TA = +85°C
TA = +125°C
0%
10%
20%
30%
40%
50%
60%
70%
80%
90%
100%
0.01.02.03.04.05.0
IQV/V)
Occurrences (%)
VDD = 1.8V
850 units
Temp +125°C
Avg. = 3.51 µA
StDev= 0.07 µA
Temp +85°C
Avg. = 3 µA
StDev= 0.07 µA
Temp +25°C
Avg. = 2.52 µA
StDev= 0.08 µA
Temp -40°C
Avg. = 1.93 µA
StDev= 0.08 µA
2.0
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
3.0
-0.5 0.0 0.5 1.0 1.5 2.0 2.5
VCM (V)
IQ (µA)
V
DD = 1.8V
Sweep VIN- ,VIN+ =
Sweep VIN+ ,VIN- = VDD/2
Sweep VIN- ,VIN+ = VDD/2
2.0
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
3.0
-1.0 0.0 1.0 2.0 3.0 4.0 5.0 6.0
VCM (V)
IQ (µA)
V
DD = 5.5V
Sweep VIN- ,VIN+ = VDD/2
Sweep VIN+ ,VIN- = VDD/2
FIGURE 2-19: Quiescent Current vs. FIGURE 2-22: Quiescent Current vs. FIGURE 2-20: Quiescent Current vs. FIGURE 2-23: Quiescent Current vs. Pull- FIGURE 2-21: Short Circuit Current vs. FIGURE 2-24: No Phase Reversal.
MCP65R41/6
DS22269B-page 10 2010-2011 Microchip Technology Inc.
Note: Unless otherwise indicated, VDD = +1.8V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN = GND,
RL = 100 k to VDD/2 (MCP65R41 only), RPull-Up = 2.74 k to VDD/2 (MCP65R46 only) and CL = 50 pF.
FIGURE 2-19: Quiescent Current vs.
Supply Voltage vs. Temperature.
FIGURE 2-20: Quiescent Current vs.
Toggle Frequency.
FIGURE 2-21: Short Circuit Current vs.
Supply Voltage vs. Temperature.
FIGURE 2-22: Quiescent Current vs.
Common-Mode Input Voltage.
FIGURE 2-23: Quiescent Current vs. Pull-
Up Voltage.
FIGURE 2-24: No Phase Reversal.
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
0.01.02.03.04.05.06.0
VDD (V)
IQ (µA)
TA = -40°C
TA = +25°C
TA = +85°C
TA = +125°C
0
2
4
6
8
10
12
14
16
18
10 100 1000 10000 100000
Toggle Frequency (Hz)
IQ (µA)
VDD = 5.5V
VDD = 1.8V
10 100
1k 10k 100k
100 mV Over-Drive
VCM = VDD/2
RL = Open
0 dB Out
p
ut Attenuation
-120
-80
-40
0
40
80
120
0.01.02.03.04.05.06.0
VDD (V)
ISC (mA)
TA = -40°C
TA = +8C
TA = +2C
TA = +125°C
TA = -40°C
TA = +8C
TA = +2C
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
-1.0 0.0 1.0 2.0 3.0 4.0 5.0 6.0
VCM (V)
IQ (mA)
VDD = 5.5V
Sweep VIN+ ,VIN- = VDD/2
Sweep VIN- ,VIN+ = VDD/2
MCP65R46
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
10.0
012345678910
VPU (V)
IQ (µA)
VDD = 2.5V
VDD = 1.8V
VDD = 5.5V
VDD = 4. 5V
VDD = 3. 5V
MCP65R46
-1.0
0.0
1.0
2.0
3.0
4.0
5.0
6.0
7.0
Time (3 µs/div)
VOUT (V)
VIN-VOUT
VDD = 5.5V VIN+ = VDD/2
FIGURE 2-25: Output Headroom vs. FIGURE 2-28: Output Headroom vs. FIGURE 2-26: Low-to-High and FIGURE 2-29: Low-tD-Hfgh and FIGURE 2-27: Low-to-High and FIGURE 2-30: Low-to-High and
2010-2011 Microchip Technology Inc. DS22269B-page 11
MCP65R41/6
Note: Unless otherwise indicated, VDD = +1.8V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN = GND,
RL = 100 k to VDD/2 (MCP65R41 only), RPull-Up = 2.74 k to VDD/2 (MCP65R46 only) and CL = 50 pF.
FIGURE 2-25: Output Headroom vs.
Output Current.
FIGURE 2-26: Low-to-High and
High-to-Low Propagation Delays.
FIGURE 2-27: Low-to-High and
High-to-Low Propagation Delays.
FIGURE 2-28: Output Headroom vs.
Output Current.
FIGURE 2-29: Low-to-High and
High-to-Low Propagation Delays.
FIGURE 2-30: Low-to-High and
High-to-Low Propagation Delays.
0.0
0.5
1.0
1.5
2.0
2.5
3.0
0.0 2.0 4.0 6.0 8.0 10.0
IOUT (mA)
VOL, VDD - VOH (V)
VDD = 1.8V
VDD - VOH
TA = +125°C
TA = -40°C
VOL
TA = +125°C
TA = -40°C
0%
10%
20%
30%
40%
50%
60%
70%
80%
90%
100%
012345678910
Prop. Delay (µs)
Occurrences (%)
VDD = 1.8V
100 mV Over-Drive
VCM = VDD/2
tPLH
Avg. = 3.92 µs
StDev= 0.45 µs
850 units
tPHL
Avg. = 3.53 µs
StDev= 0.27 µs
850 units
MCP65R41
0%
10%
20%
30%
40%
50%
60%
70%
80%
90%
100%
012345678910
Prop. Delay (µs)
Occurrences (%)
VDD = 5.5V
100 mV Over-Drive
VCM = VDD/2
tPHL
Avg. = 4.76 µs
StDev = 0.38 µs
850 units
tPLH
Avg. = 4.97 µs
StDev = 0.41 µs
850 units
MCP65R41
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
0 5 10 15 20 25
IOUT (mA)
VOL, VDD - VOH (V)
VDD = 5.5V
VOL
TA
= +125°C
T
= -40°C
VDD - VOH
TA = +125°C
TA = -40°C
0%
10%
20%
30%
40%
50%
60%
70%
80%
012345678910
Prop. Delay (µs)
Occurrences (%)
VDD= 1.8V
100 mV Over-Drive
VCM = VDD/2
tPLH
Avg. = 2.5 µs
StDev= 0.15 µs
850 units
tPHL
Avg. = 3.6 µs
StDev= 0.19 µs
850 units
MCP65R46
0%
10%
20%
30%
40%
50%
60%
70%
80%
012345678910
Prop. Delay (µs)
Occurrences (%)
VDD = 5.5V
100 mV Over-Drive
VCM = VDD/2
tPLH
Avg. = 3.1 µs
StDev = 0.16 µs
850 units
tPHL
Avg. = 4.9 µs
StDev = 0.26 µs
850 units
MCP65R46
FIGURE 2-31: Propagation Delay vs. FIGURE 2-34: Propagation Delay vs. FIGURE 2-32: Propagation Delay vs. FIGURE 2-35: Propagation Delay vs. FIGURE 2-33: Propagation Delay vs. FIGURE 2-36: Propagation Delay vs.
MCP65R41/6
DS22269B-page 12 2010-2011 Microchip Technology Inc.
Note: Unless otherwise indicated, VDD = +1.8V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN = GND,
RL = 100 k to VDD/2 (MCP65R41 only), RPull-Up = 2.74 k to VDD/2 (MCP65R46 only) and CL = 50 pF.
FIGURE 2-31: Propagation Delay vs.
Common-Mode Input Voltage.
FIGURE 2-32: Propagation Delay vs.
Common-Mode Input Voltage.
FIGURE 2-33: Propagation Delay vs.
Supply Voltage.
FIGURE 2-34: Propagation Delay vs.
Common-Mode Input Voltage.
FIGURE 2-35: Propagation Delay vs.
Common-Mode Input Voltage.
FIGURE 2-36: Propagation Delay vs.
Supply Voltage.
0
1
2
3
4
5
6
7
8
0.00 0.50 1.00 1.50 2.00
VCM (V)
Prop. Delay (ns)
t
PLH
t
PHL
VDD = 1.8V
100 mV Over-
Di
MCP65R41
Prop. Delay (µs)
0
1
2
3
4
5
6
7
8
0.01.02.03.04.05.06.0
VCM (V)
Prop. Delay (ns)
t
PLH
t
PHL
VDD = 5.5V
100 mV Over-Drive
MCP65R41
Prop. Delay (µs)
0
4
8
12
16
20
1.5 2.5 3.5 4.5 5.5
VDD (V)
Prop. Delay (ns)
tPHL, 10 mV Over-Drive
tPLH, 10 mV Over-Drive
tPHL
, 100 mV Over-Drive
tPLH
, 100 mV Over-Drive
VCM = VDD/2 MCP65R41
Prop. Delay (µs)
0
1
2
3
4
5
6
7
8
0.0 0.5 1.0 1.5 2.0
VCM (V)
Prop. Delay (ns)
t
PLH
t
PHL
VDD = 1.8V
100 mV Over-Drive
MCP65R46
Prop. Delay (µs)
0
1
2
3
4
5
6
7
8
0.0 1.0 2.0 3.0 4.0 5.0 6.0
VCM (V)
Prop. Delay (ns)
tPLH
t
PHL
VDD = 5.5V
100 mV Over-Drive
MCP65R46
Prop. Delay (µs)
0
5
10
15
20
25
1.52.53.54.55.5
VDD (V)
Prop. Delay (ns)
tPHL
, 10 mV Over-Drive
tPLH
, 10 mV Over-Drive
tPHL
, 100 mV Over-Drive
tPLH
, 100 mV Over-Drive
VCM = VDD/2 MCP65R46
Prop. Delay (µs)
r. I l :' FIGURE 2-37: Propagation Delay vs. FIGURE 2-40: Propagation Delay vs. FIGURE 2-38: Propagation Delay vs. FIGURE 2-41: Propagation Delay vs. m=m=m=m=me E I . : mamamamama FIGURE 2-39: Propagation Delay vs. FIGURE 2-42: Propagation Delay vs.
2010-2011 Microchip Technology Inc. DS22269B-page 13
MCP65R41/6
Note: Unless otherwise indicated, VDD = +1.8V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN = GND,
RL = 100 k to VDD/2 (MCP65R41 only), RPull-Up = 2.74 k to VDD/2 (MCP65R46 only) and CL = 50 pF.
FIGURE 2-37: Propagation Delay vs.
Temperature.
FIGURE 2-38: Propagation Delay vs.
Capacitive Load.
FIGURE 2-39: Propagation Delay vs.
Input Over-Drive.
FIGURE 2-40: Propagation Delay vs.
Temperature.
FIGURE 2-41: Propagation Delay vs.
Capacitive Load.
FIGURE 2-42: Propagation Delay vs.
Input Over-Drive.
0
2
4
6
8
10
-50-25 0 255075100125
Temperature C)
Prop. Delay (ns)
100 mV Over-Drive
VCM = VDD/2
t
PHL, VDD = 5.5V
t
PHL, VDD = 1.8V
tPLH, VDD
= 5.5V
t
PLH
, V
DD = 1.8V
MCP65R41
Prop. Delay (µs)
1
10
100
0.01 0.1 1 10 100
Capacitive Load (nf)
Prop. Delay (µs)
0.01 0.1 1
10 100
VDD = 5.5V, tPLH
VDD = 5.5V, tPHL
100 mV Over-Drive
VCM = VDD/2
VDD = 1.8V, tPLH
VDD = 1.8V, tPHL
MCP65R41
0
5
10
15
20
25
30
35
40
45
50
0.001 0.01 0.1 1
Over-Drive (mV)
Prop. Delay (ns)
tPHL, VDD = 5.5V
tPHL, VDD = 1.8V
VCM = VDD/2
tPLH, VDD = 5.5V
tPLH, VDD = 1.8V
MCP65R41
Prop. Delay (µs)
Prop. Delay (ns)
0
2
4
6
8
10
-50 -25 0 25 50 75 100 125
Temperature (°C)
100mV Over-Drive
VCM = VDD/2
tPLH , VDD = 5.5V
tPLH , VDD = 1.8V
tPHL , VDD = 5.5V
tPHL , VDD = 1.8V
MCP65R46
Prop. Delay (µs)
1
10
100
1000
0.01 0.1 1 10 100
Capacitive Load (nf)
Prop. Delay (µs)
100 mV Over-Drive
VCM = VDD/2
VDD = 1.8V, tPLH
VDD = 5.5V, tPLH
VDD = 1.8V, tPHL
VDD = 5.5V, tPHL
MCP65R46
0
5
10
15
20
25
30
35
40
45
50
0.001 0.01 0.1 1
Over-Drive (mV)
Prop. Delay (ns)
tPHL, VDD
= 5.5V
tPHL, VDD
= 1.8V
VCM = VDD/2
tPLH, VDD = 5.5V
tPLH, VDD = 1.8V
MCP65R46
Prop. Delay (µs)
FIGURE 2-43: Propagation Delay Skew. FIGURE 2-46: Propagation Delay Skew. FIGURE 2-44: Common-Mode Rejection FIGURE 2-47: Common-Mode Rejection M I FIGURE 2-45: Common-Mode Rejection FIGURE 2-48: Common-Mode Rejection
MCP65R41/6
DS22269B-page 14 2010-2011 Microchip Technology Inc.
Note: Unless otherwise indicated, VDD = +1.8V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN = GND,
RL = 100 k to VDD/2 (MCP65R41 only), RPull-Up = 2.74 k to VDD/2 (MCP65R46 only) and CL = 50 pF.
FIGURE 2-43: Propagation Delay Skew.
FIGURE 2-44: Common-Mode Rejection
Ratio and Power Supply Rejection Ratio vs.
Temperature.
FIGURE 2-45: Common-Mode Rejection
Ratio.
FIGURE 2-46: Propagation Delay Skew.
FIGURE 2-47: Common-Mode Rejection
Ratio and Power Supply Rejection Ratio vs.
Temperature.
FIGURE 2-48: Common-Mode Rejection
Ratio.
0%
10%
20%
30%
40%
50%
60%
-1.0 -0.5 0.0 0.5 1.0
Prop. Delay Skew (µs)
Occurrences (%)
VDD= 1.8V
Avg. = -0.36 µs
StDev = 0.07 µs
850 units
100 mV Over-Drive
VCM = VDD/2
VDD= 5.5V
Avg. = -0.21 µs
StDev = 0.07 µs
850 units
MCP65R41
50
55
60
65
70
75
80
85
90
-50-25 0 255075100125
Temperature C)
CMRR/PSRR (dB)
CMRR
PSRR
VCM = -0.3V to VDD + 0.3V
VDD = 5.5V
Input Referred
VCM = VSS
V
DD = 1.8V to 5.5V
MCP65R41
0%
10%
20%
30%
40%
-5 -4 -3 -2 -1 0 1 2 3 4 5
CMRR (mV/V)
Occurrences (%)
VDD = 1.8V
850 units
VCM = -0.3V to VDD/2
Avg. = 0.5 mV/V
StDev = 1.14 mV/V
VCM = VDD/2 to VDD+ 0.3V
Avg. = -0.02 mV/V
StDev = 0.54 mV/V
VCM = -0.3V to VDD + 0.2V
Avg. = 0.23 mV/V
StDev = 0.68 mV/V
0%
10%
20%
30%
40%
50%
60%
70%
80%
-3 -1.5 0 1.5 3
Prop. Delay Skew (ns)
Occurrences (%)
100 mV Over-Drive
VCM = VDD/2
VDD = 1.8V
Avg. = 1.1 µs
StDev = 0.11 µs
850 units
VDD = 5.5V
Avg. = 1.81 µs
StDev = 0.14 µs
850 units
MCP65R46
50
55
60
65
70
75
80
85
90
-50 -25 0 25 50 75 100 125
Temperature (°C)
CMRR/PSRR (dB)
VCM = -0.3V to VDD + 0.3V
VDD = 5.5V
Input Referred
VCM = VSS
V
DD = 1.8V to 5.5V
MCP65R46
PSRR
CMRR
0%
10%
20%
30%
40%
-2.5 -2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 2.5
CMRR (mV/V)
Occurrences (%)
VDD = 5.5V
850 units
VCM = -0.3V to VDD/2
Avg. = 0.05 mV/V
StDev = 0.46 mV/V
VCM = VDD/2 to VDD+ 0.3V
Avg. = 0.02 mV/V
StDev = 0.25 mV/V
VCM = -0.3V to VDD + 0.3V
Avg. = 0.03 mV/V
StDev = 0.3 mV/V
FIGURE 2-49: Input Offset Current and FIGURE 2-52: Power Supply Rejection FIGURE 2-50: Input Offset Current and FIGURE 2-53: V E; vs. V FIGURE 2-51: Input Bias Current vs. FIGURE 2-54: V E; vs. V
2010-2011 Microchip Technology Inc. DS22269B-page 15
MCP65R41/6
Note: Unless otherwise indicated, VDD = +1.8V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN = GND,
RL = 100 k to VDD/2 (MCP65R41 only), RPull-Up = 2.74 k to VDD/2 (MCP65R46 only) and CL = 50 pF.
FIGURE 2-49: Input Offset Current and
Input Bias Current vs. Temperature.
FIGURE 2-50: Input Offset Current and
Input Bias Current vs. Common-Mode Input
Voltage vs. Temperature.
FIGURE 2-51: Input Bias Current vs.
Input Voltage vs. Temperature.
FIGURE 2-52: Power Supply Rejection
Ratio.
FIGURE 2-53: VREF vs. VDD.
FIGURE 2-54: VREF vs. VDD.
0.01
0.1
1
10
100
1000
25 50 75 100 125
Temperature (°C)
IOS & IB (pA)
IB
|IOS|
0.01
0.1
1
10
100
1000
0.0 1.0 2.0 3.0 4.0 5.0 6.0
VCM (V)
IOS & IB (pA)
IB @ TA = +125°C
IB @ TA = +85°C
|IOS| @ TA = +125°C
|IOS| @ TA = +85°C
VDD = 5.5V
1E+00
1E+01
1E+02
1E+03
1E+04
1E+05
1E+06
1E+07
1E+08
1E+09
1E+10
-0.8 -0.6 -0.4 -0.2
Input Voltage (V)
Input Current (A)
TA= -40°C
TA= +125°C
TA= +25°C
TA= +85°C
10p
100p
10n
100n
100µ
1m
10m
10µ
1n
1p
0%
5%
10%
15%
20%
25%
30%
-500 -250 0 250 500
PSRRV/V)
Occurrences (%)
VCM = VSS
Avg. = -127.9 µV/V
StDev = 99.88 µV/V
3588 units
1.185
1.190
1.195
1.200
1.205
1.210
1.215
1.220
1.225
1.230
1.235
1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
VDD (V)
VREF (V)
TA = -40°C
TA = +125°C
TA = +85°C
TA = +25°C
IREF = 0A
2.35
2.37
2.39
2.41
2.43
2.45
1.01.52.02.53.03.54.04.55.05.5
VDD (V)
VREF (V)
TA = -40°C
TA = +125°C
T
A = +85°C
T
A = +25°C
IREF = 0A
FIGURE 2-55: V FvsJ over FIGURE 2-58: V E; vs. Temperature. FIGURE 2-56: V FvsJ over FIGURE 2-59: V E; vs. Temperature. FIGURE 2-57: V FvsJ over FIGURE 2-60: Shun Circuit Current vs.
MCP65R41/6
DS22269B-page 16 2010-2011 Microchip Technology Inc.
Note: Unless otherwise indicated, VDD = +1.8V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN = GND,
RL = 100 k to VDD/2 (MCP65R41 only), RPull-Up = 2.74 k to VDD/2 (MCP65R46 only) and CL = 50 pF.
FIGURE 2-55: VREF vs. IREF over
Temperature.
FIGURE 2-56: VREF vs. IREF over
Temperature.
FIGURE 2-57: VREF vs. IREF over
Temperature.
FIGURE 2-58: VREF vs. Temperature.
FIGURE 2-59: VREF vs. Temperature.
FIGURE 2-60: Short Circuit Current vs.
VDD.
1.185
1.190
1.195
1.200
1.205
1.210
1.215
1.220
1.225
1.230
1.235
-0.5 -0.3 -0.1 0.1 0.3 0.5
IREFA)
VREF (V)
VDD = 1.8V
TA = +85°C
TA = +25°C
TA = -40°C
TA = +125°C
1.185
1.190
1.195
1.200
1.205
1.210
1.215
1.220
1.225
1.230
1.235
-0.5 -0.3 -0.1 0.1 0.3 0.5
IREFA)
VREF (V)
V
DD
= 5.5V
TA = +85°C
TA = +25°C
TA = -4C
TA = +125°C
2.35
2.37
2.39
2.41
2.43
2.45
-0.5 -0.3 -0.1 0.1 0.3 0.5
IREF (µA)
VREF (V)
VDD = 5.5V
TA = +85°C
TA = +25°C
TA = -40°C
TA = +125°C
1.185
1.190
1.195
1.200
1.205
1.210
1.215
1.220
1.225
1.230
1.235
-50 -25 0 25 50 75 100 125
Temperature (°C)
VDD = 1.8V
Temp. Co. = 27ppm
VDD = 5.5V
Temp. Co. = 22ppm
V
REF
(V)
2.35
2.37
2.39
2.41
2.43
2.45
-50 -25 0 25 50 75 100 125
Temperature (°C)
VDD = 5.5V
Temp. Co. = 23ppm
V
REF
(V)
-20.0
-15.0
-10.0
-5.0
0.0
5.0
10.0
15.0
20.0
1.5 2.5 3.5 4.5 5.5
VDD (V)
ISC (mA)
Sourcing
Sinking
VREF = 1.21V
FIGURE 2-61: Reference Voltage FIGURE 2-62: Reference Voltage
2010-2011 Microchip Technology Inc. DS22269B-page 17
MCP65R41/6
Note: Unless otherwise indicated, VDD = +1.8V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN = GND,
RL = 100 k to VDD/2 (MCP65R41 only), RPull-Up = 2.74 k to VDD/2 (MCP65R46 only) and CL = 50 pF.
FIGURE 2-61: Reference Voltage
Tolerance.
FIGURE 2-62: Reference Voltage
Tolerance.
0%
10%
20%
30%
40%
50%
2.0% 1.2% 0.4% -0.4% -1.2% -2.0%
VTOL (mV)
Occurrences (%)
VDD = 5.5V
VREF = 1.21V
Avg. = 0.02%
850 units
VDD = 1.8V
VREF = 1.21V
Avg. = 0.06%
850 units
0%
10%
20%
30%
40%
50%
2.0% 1.2% 0.4% -0.4% -1.2% -2.0%
VTOL (mV)
Occurrences (%)
VDD = 5.5V
VREF = 2.4V
Avg. = -0.22%
850 units
MCP65R41/6
DS22269B-page 18 2010-2011 Microchip Technology Inc.
NOTES:
2010-2011 Microchip Technology Inc. DS22269B-page 19
MCP65R41/6
3.0 PIN DESCRIPTIONS
Descriptions of the pins are listed in Table 3-1.
3.1 Analog Inputs
The comparator non-inverting and inverting inputs are
high-impedance CMOS inputs with low bias currents.
3.2 Digital Outputs
The comparator outputs are CMOS/TTL compatible
push-pull and open-drain digital outputs. The push-pull
is designed to directly interface to a CMOS/TTL com-
patible pin while the open-drain output is designed for
level shifting and wired-OR interfaces.
3.3 Analog Outputs
The VREF Output pin outputs a reference voltage of
1.21V or 2.4V.
3.4 Power Supply (VSS and VDD)
The positive power supply pin (VDD) is 1.8V to 5.5V
higher than the negative power supply pin (VSS). For
normal operation, the other pins are at voltages
between VSS and VDD.
Typically, these parts are used in a single (positive)
supply configuration. In this case, VSS is connected to
ground and VDD is connected to the supply. VDD will
need a local bypass capacitor (typically 0.01 µF to
0.F) within 2mm of the V
DD pin. These can share a
bulk capacitor with the nearby analog parts (within
100 mm), but it is not required.
TABLE 3-1: PIN FUNCTION TABLE
MCP65R41/6
Symbol Description
SOT23-6
1OUTDigital Output
2V
SS Ground
3V
IN+ Non-inverting Input
4V
IN Inverting Input
5V
REF Reference Voltage Output
6V
DD Positive Power Supply
MCP65R41/6
DS22269B-page 20 2010-2011 Microchip Technology Inc.
NOTES:
FIGURE 4-2: Simplified Analog Input £80 an m 2 § 5 E- = o Time [ma ms
2010-2011 Microchip Technology Inc. DS22269B-page 21
MCP65R41/6
4.0 APPLICATIONS INFORMATION
The MCP65R41/6 family of push-pull and open-drain
output comparators are fabricated on Microchip’s state-
of-the-art CMOS process. They are suitable for a wide
range of high-speed applications requiring low power
consumption.
4.1 Comparator Inputs
4.1.1 NORMAL OPERATION
The input stage of this family of devices uses three
differential input stages in parallel: one operates at low
input voltages, one at high input voltages, and one at
mid input voltages. With this topology, the input voltage
range is 0.3V above VDD and 0.3V below VSS, while
providing low offset voltage throughout the Common
mode range. The input offset voltage is measured at
both VSS - 0.3V and VDD + 0.3V to ensure proper
operation.
The MCP65R41/6 family has internally-set hysteresis
VHYST that is small enough to maintain input offset
accuracy, and large enough to eliminate the output
chattering caused by the comparator’s own input noise
voltage ENI. Figure 4-1 depicts this behavior. Input
offset voltage (VOS) is the center (average) of the
(input-referred) low-high and high-low trip points. Input
hysteresis voltage (VHYST) is the difference between
the same trip points.
FIGURE 4-1: The MCP65R41/6
Comparators’ Internal Hysteresis Eliminates
Output Chatter Caused by Input Noise Voltage.
4.1.2 INPUT VOLTAGE AND CURRENT
LIMITS
The ESD protection on the inputs can be depicted as
shown in Figure 4-2. This structure was chosen to pro-
tect the input transistors, and to minimize the input bias
current (IB). The input ESD diodes clamp the inputs
when trying to go more than one diode drop below VSS.
They also clamp any voltages that go too far above
VDD; their breakdown voltage is high enough to allow a
normal operation, and low enough to bypass the ESD
events within the specified limits.
FIGURE 4-2: Simplified Analog Input ESD
Structures.
In order to prevent damage and/or improper operation
of these comparators, the circuit they are connected to
limit the currents (and voltages) at the VIN+ and VIN-
pins (see Absolute Maximum Ratings†). Figure 4-3
shows the recommended approach to protect these
inputs. The internal ESD diodes prevent the input pins
(VIN+ and VIN-) from going too far below ground, and
the resistors R1 and R2 limit the possible current drawn
out of the input pin. Diodes D1 and D2 prevent the input
pin (VIN+ and VIN-) from going too far above VDD.
When implemented as shown, resistors R1 and R2 also
limit the current through D1 and D2.
-3
-2
-1
0
1
2
3
4
5
6
7
8
9
0 100 200 30 0 40 0 500 6 00 700 800 9 00 10 00
Time (100 ms/div)
Output Voltage (V)
-30
-25
-20
-15
-10
-5
0
5
10
15
20
25
30
Input Voltage (10 mV/div)
V
OU
T
VIN-
Hysteresis
VDD
= 5.0
V
Bond
Pad
Bond
Pad
Bond
Pad
VDD
VIN+
VSS
Input
Stage
Bond
Pad VIN
FIGURE 4-3: Protecting the Analog
MCP65R41/6
DS22269B-page 22 2010-2011 Microchip Technology Inc.
FIGURE 4-3: Protecting the Analog
Inputs.
It is also possible to connect the diodes to the left of the
resistors R1 and R2. In this case, the currents through
the diodes D1 and D2 need to be limited by some other
mechanism. The resistor then serves as an in-rush cur-
rent limiter; the DC current into the input pins (VIN+ and
VIN-) should be very small.
A significant amount of current can flow out of the
inputs when the Common mode voltage (VCM) is below
ground (VSS); see Figure 4-3. The applications that are
high impedance may need to limit the usable voltage
range.
4.1.3 PHASE REVERSAL
The MCP65R41/6 comparator family uses CMOS tran-
sistors at the input. They are designed to prevent
phase inversion when the input pins exceed the supply
voltages. Figure 2-3 shows an input voltage exceeding
both supplies with no resulting phase inversion.
4.2 Push-Pull Output
The push-pull output is designed to be compatible with
CMOS and TTL logic, while the output transistors are
configured to give a rail-to-rail output performance.
They are driven with circuitry that minimizes any
switching current (shoot-through current from supply to
supply) when the output is transitioned from high-to-
low, or from low-to-high (see Figures 2-18 and 2-19 for
more information).
4.3 Externally Set Hysteresis
A greater flexibility in selecting the hysteresis (or the
input trip points) is achieved by using external resistors.
Hysteresis reduces output chattering when one input is
slowly moving past the other. It also helps in systems
where it is preferable not to cycle between high and low
states too frequently (e.g., air conditioner thermostatic
controls). Output chatter also increases the dynamic
supply current.
V1
R1
VDD
D1
R2
VSS – (minimum expected V2)
2mA
VOUT
V2
R2R3
D2
+
R1
VSS – (minimum expected V1)
2mA
VPU
RPU*
* Pull-up resistor required for the MCP65R46 only.
VD o 0 FIGURE 4-4: Non-Invemng C/rcmt W/th FIGURE 4-6: Inve r1ing Circuit with A *‘v—v—v—> FIGURE 4-5: Hysteresis Diagram for the FIGURE 4-7: Hysteresis Diagram for the
2010-2011 Microchip Technology Inc. DS22269B-page 23
MCP65R41/6
4.3.1 NON-INVERTING CIRCUIT
Figure 4-4 shows a non-inverting circuit for single-
supply applications using just two resistors. The
resulting hysteresis diagram is shown in Figure 4-5.
FIGURE 4-4: Non-Inverting Circuit with
Hysteresis for Single-Supply.
FIGURE 4-5: Hysteresis Diagram for the
Non-Inverting Circuit.
The trip points for Figures 4-4 and 4-5 are:
EXAMPLE 4-1:
4.3.2 INVERTING CIRCUIT
Figure 4-6 shows an inverting circuit for single-supply
using three resistors. The resulting hysteresis diagram
is shown in Figure 4-7.
FIGURE 4-6: Inverting Circuit with
Hysteresis.
FIGURE 4-7: Hysteresis Diagram for the
Inverting Circuit.
VREF
VIN
VOUT
VDD
R1RF
+
-
VPU
RPU*
VREF
* Pull-up resistor required for the MCP65R46 only.
VOUT
High-to-Low Low-to-High
VDD
VOH
VOL
VSS
VSS VDD
VTHL VTLH
VIN
VTLH VREF 1
R1
RF
-------+



VOL
R1
RF
-------



=
VTHL VREF 1
R1
RF
-------+



VOH
R1
RF
-------



=
Where:
VTLH = trip voltage from low to high
VTHL = trip voltage from high to low
VIN
VOUT
VDD
R2
RF
R3
VREF
VPU
RPU*
* Pull-up resistor required for the MCP65R46 only.
VOUT
High-to-LowLow-to-High
VDD
VOH
VOL
VSS
VSS VDD
VTLH VTHL
VIN
eflfl
MCP65R41/6
DS22269B-page 24 2010-2011 Microchip Technology Inc.
To determine the trip voltages (VTLH and VTHL) for the
circuit shown in Figure 4-6, R2 and R3 can be simplified
to the Thevenin equivalent circuit with respect to VREF
,
as shown in Figure 4-8:
FIGURE 4-8: Thevenin Equivalent Circuit.
By using this simplified circuit, the trip voltage can be
calculated using the following equation:
EQUATION 4-1:
Figures 2-25 and 2-28 can be used to determine the
typical values for VOH and VOL.
4.4 Bypass Capacitors
With this family of comparators, the power supply pin
(VDD for single supply) should have a local bypass
capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm for good
edge rate performance.
4.5 Capacitive Loads
4.5.1 OUT PIN
Reasonable capacitive loads (i.e., logic gates) have lit-
tle impact on the propagation delay (see Figure 2-34).
The supply current increases with the increasing toggle
frequency (Figure 2-22), especially with higher capaci-
tive loads. The output slew rate and propagation delay
performance will be reduced with higher capacitive
loads.
4.5.2 VREF PIN
The reference output is designed to interface to the
comparator input pins, either directly or with some
resistive network (e.g., a voltage divider network) with
minimal capacitive load. The recommended capacitive
load is 200 pF (typical). Capacitive loads greater than
2000 pF may cause the VREF output to oscillate at
power up.
V23
VOUT
VDD
R23 RF
+
-
VSS
VPU
RPU*
* Pull-up resistor required for the MCP65R46 only.
Where:
R23
R2R3
R2R3
+
--------------------=
V23
R3
R2R3
+
--------------------V
REF
=
VTHL VOH
R23
R23 RF
+
-----------------------



V23
RF
R23 RF
+
----------------------


+=
VTLH VOL
R23
R23 RF
+
-----------------------



V23
RF
R23 RF
+
----------------------


+=
Where:
VTLH = trip voltage from low to high
VTHL = trip voltage from high to low
FIGURE 4-10: Precise Inverfing FIGURE 4-9: Example of a Guard Ring I, FIGURE 4-11: Bistable Mufti-Vibrator.
2010-2011 Microchip Technology Inc. DS22269B-page 25
MCP65R41/6
4.6 PCB Surface Leakage
In applications where the low input bias current is
critical, the Printed Circuit Board (PCB) surface
leakage effects need to be considered. Surface
leakage is caused by humidity, dust or other type of
contamination on the board. Under low humidity
conditions, a typical resistance between nearby traces
is 1012. A 5V difference would cause 5 pA of current
to flow. This is greater than the MCP65R41/6 family’s
bias current at +25°C (1 pA, typical).
The easiest way to reduce the surface leakage is to use
a guard ring around the sensitive pins (or traces). The
guard ring is biased at the same voltage as the
sensitive pin. An example of this type of layout is shown
in Figure 4-9.
FIGURE 4-9: Example of a Guard Ring
Layout for Inverting Circuit.
Use the following steps for an inverting configuration
(Figures 4-6):
1. Connect the guard ring to the non-inverting input
pin (VIN+). This biases the guard ring to the
same reference voltage as the comparator
(e.g., VDD/2 or ground).
2. Connect the inverting pin (VIN-) to the input pad
without touching the guard ring.
Use the following steps for a non-inverting
configuration (Figure 4-4):
1. Connect the non-inverting pin (VIN+) to the input
pad without touching the guard ring.
2. Connect the guard ring to the inverting input pin
(VIN-).
4.7 Typical Applications
4.7.1 PRECISE COMPARATOR
Some applications require a higher DC precision. A
simple way to address this need is using an amplifier
(such as the MCP6041 – a 600 nA low power and
14 kHz bandwidth op amp) to gain-up the input signal
before it reaches the comparator. Figure 4-10 shows
an example of this approach, which also level shifts to
VPU using the Open-Drain option, the MCP65R46.
FIGURE 4-10: Precise Inverting
Comparator.
4.7.2 BISTABLE MULTI-VIBRATOR
A simple bistable multi-vibrator design is shown in
Figure 4-11. VREF needs to be between ground and the
maximum comparator internal VREF of 2.4V to achieve
oscillation. The output duty cycle changes with VREF
.
FIGURE 4-11: Bistable Multi-Vibrator.
Guard Ring
V
SS
IN- IN+
VREF
VDD
VDD
R1R2VOUT
VIN
VREF
VPU
RPU
MCP65R46
MCP6041
VREF
VDD
R1R2
R3
VREF
C1
VOUT
MCP65R41
FIGURE 4-12: Over-Temperature Alert
MCP65R41/6
DS22269B-page 26 2010-2011 Microchip Technology Inc.
4.7.3 OVER-TEMPERATURE
PROTECTION CIRCUIT
The MCP65R41 device can be used as an over-
temperature protection circuit using a thermistor. The
2.4V VREF can be used as stable reference to the
thermistor, the alert threshold and hysteresis threshold.
This is ideal for battery powered applications, where
the change in temperature and output toggle
thresholds would remain fixed as battery voltage
decays over time.
FIGURE 4-12: Over-Temperature Alert
Circuit.
V
OUT
V
DD
R
2
R
F
R
3
V
REF
V
PU
R
PU
*
* Pull-up resistor required for the MCP65R46 only.
R
4
Thermistor
V
REF
V
REF
NNN
2010-2011 Microchip Technology Inc. DS22269B-page 27
MCP65R41/6
5.0 PACKAGING INFORMATION
5.1 Package Marking Information
Legend: XX...X Customer-specific information
Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
*This package is Pb-free. The Pb-free JEDEC designator ( )
can be found on the outer packaging for this package.
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
3
e
3
e
6-Lead SOT-23
XXNN
Example
HV25
Part Number Code
MCP65R41T-1202E/CHY HVNN
MCP65R41T-2402E/CHY HWNN
MCP65R46T-1202E/CHY HXNN
MCP65R46T-2402E/CHY HYNN
H, mm A BMW
MCP65R41/6
DS22269B-page 28 2010-2011 Microchip Technology Inc.
6-Lead Plastic Small Outline Transistor (CHY) [SOT-23]
Notes:
1. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.127 mm per side.
2. Dimensioning and tolerancing per ASME Y14.5M.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Units MILLIMETERS
Dimension Limits MIN NOM MAX
Number of Pins N 6
Pitch e 0.95 BSC
Outside Lead Pitch e1 1.90 BSC
Overall Height A 0.90 1.45
Molded Package Thickness A2 0.89 1.30
Standoff A1 0.00 0.15
Overall Width E 2.20 3.20
Molded Package Width E1 1.30 1.80
Overall Length D 2.70 3.10
Foot Length L 0.10 0.60
Footprint L1 0.35 0.80
Foot Angle  30°
Lead Thickness c 0.08 0.26
Lead Width b 0.20 0.51
b
E
4
N
E1
PIN1IDBY
LASER MARK
D
123
e
e1
A
A1
A2 c
L
L1
φ
Microchip Technology Drawing C04-028B
SiLK‘ SCREEN <><——><—gx recommended="" land="" pattern="" urills="" millimeters="" dimension="" limits="" min="" \="" nom="" \="" max="" contact="" pitch="" e="" 0="" 95="" bsc="" contact="" pad="" spacing="" c="" 2.50="" contact="" pad="" width="" (x6)="" x="" 0.50="" contact="" pad="" length="" (x6)="" v="" 1.10="" distance="" between="" pads="" g="" 1.70="" distance="" between="" pads="" gx="" 0.35="" overaii="" width="" 2="" 3.90="" notes="" 1="" dimensioning="" and="" toierancing="" perasme="" y1a="" 5m="" esc="" basic="" dimension="" theoreticaiiy="" exact="" vaiue="" shown="" wilhum="" tolerances="" microchip="" technoiogy="" drawing="" no="" 00472028a="">
2010-2011 Microchip Technology Inc. DS22269B-page 29
MCP65R41/6
6-Lead Plastic Small Outline Transistor (CHY) [SOT-23]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
MCP65R41/6
DS22269B-page 30 2010-2011 Microchip Technology Inc.
NOTES:
2010-2011 Microchip Technology Inc. DS22269B-page 31
MCP65R41/6
APPENDIX A: REVISION HISTORY
Revision B (September 2011)
The following modification was made to this document:
Updated the DC Characteristics table.
Revision A (December 2010)
Original Release of this Document.
MCP65R41/6
DS22269B-page 32 2010-2011 Microchip Technology Inc.
NOTES:
PART No. v X 41x
2010-2011 Microchip Technology Inc. DS22269B-page 33
MCP65R41/6
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
Examples:
a) MCP65R41T-1202E/CHY: Push-Pull Output,
1.2VREF,
Tape and Reel,
6LD SOT-23 Pkg.
b) MCP65R41T-2402E/CHY: Push-Pull Output,
2.4VREF,
Tape and Reel,
6LD SOT-23 Pkg.
c) MCP65R46T-1202E/CHY: Open-Drain Output,
1.2VREF,
Tape and Reel,
6LD SOT-23 Pkg.
d) MCP65R46T-2402E/CHY: Open-Drain Output,
2.4VREF,
Tape and Reel,
6LD SOT-23 Pkg.
PART NO. X/XX
Package
Tape and
Device
X
Temperature
Range
-XX
Reference
XX
Reference
Voltage Tolerance
Device: MCP65R41T: Push-pull Output Comparator
MCP65R46T: Open-drain Output Comparator
Reference Voltage: 12 = 1.21V (typical) Initial Reference Voltage
24 = 2.4V (typical) Initial Reference Voltage
Reference Tolerance: 02 = 2% Reference Voltage Tolerance
Temperature Range: E=-40C to+125C(Extended)
Package: CHY= Plastic Small Outline Transistor, 6-Lead
MCP65R41/6
DS22269B-page 34 2010-2011 Microchip Technology Inc.
NOTES:
QUALITY MANAGEMENT SYSTEM CERTIFIED BY DNV = ISO/TS 169492009:
2010-2011 Microchip Technology Inc. DS22269B-page 35
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART,
PIC32 logo, rfPIC and UNI/O are registered trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MXDEV, MXLAB, SEEVAL and The Embedded Control
Solutions Company are registered trademarks of Microchip
Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, chipKIT,
chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net,
dsPICworks, dsSPEAK, ECAN, ECONOMONITOR,
FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP,
Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB,
MPLINK, mTouch, Omniscient Code Generation, PICC,
PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE,
rfLAB, Select Mode, Total Endurance, TSHARC,
UniWinDriver, WiperLock and ZENA are trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2010-2011, Microchip Technology Incorporated, Printed in
the U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 978-1-61341-513-9
Note the following details of the code protection feature on Microchip devices:
Microchip products meet the specification contained in their particular Microchip Data Sheet.
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
6‘ MICROCHIP AMERICAS ASIA/PACIFIC ASIA/PACIFIC EUROPE
DS22269B-page 36 2010-2011 Microchip Technology Inc.
AMERICAS
Corporate Office
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://www.microchip.com/
support
Web Address:
www.microchip.com
Atlanta
Duluth, GA
Tel: 678-957-9614
Fax: 678-957-1455
Boston
Westborough, MA
Tel: 774-760-0087
Fax: 774-760-0088
Chicago
Itasca, IL
Tel: 630-285-0071
Fax: 630-285-0075
Cleveland
Independence, OH
Tel: 216-447-0464
Fax: 216-447-0643
Dallas
Addison, TX
Tel: 972-818-7423
Fax: 972-818-2924
Detroit
Farmington Hills, MI
Tel: 248-538-2250
Fax: 248-538-2260
Indianapolis
Noblesville, IN
Tel: 317-773-8323
Fax: 317-773-5453
Los Angeles
Mission Viejo, CA
Tel: 949-462-9523
Fax: 949-462-9608
Santa Clara
Santa Clara, CA
Tel: 408-961-6444
Fax: 408-961-6445
Toronto
Mississauga, Ontario,
Canada
Tel: 905-673-0699
Fax: 905-673-6509
ASIA/PACIFIC
Asia Pacific Office
Suites 3707-14, 37th Floor
Tower 6, The Gateway
Harbour City, Kowloon
Hong Kong
Tel: 852-2401-1200
Fax: 852-2401-3431
Australia - Sydney
Tel: 61-2-9868-6733
Fax: 61-2-9868-6755
China - Beijing
Tel: 86-10-8569-7000
Fax: 86-10-8528-2104
China - Chengdu
Tel: 86-28-8665-5511
Fax: 86-28-8665-7889
China - Chongqing
Tel: 86-23-8980-9588
Fax: 86-23-8980-9500
China - Hangzhou
Tel: 86-571-2819-3187
Fax: 86-571-2819-3189
China - Hong Kong SAR
Tel: 852-2401-1200
Fax: 852-2401-3431
China - Nanjing
Tel: 86-25-8473-2460
Fax: 86-25-8473-2470
China - Qingdao
Tel: 86-532-8502-7355
Fax: 86-532-8502-7205
China - Shanghai
Tel: 86-21-5407-5533
Fax: 86-21-5407-5066
China - Shenyang
Tel: 86-24-2334-2829
Fax: 86-24-2334-2393
China - Shenzhen
Tel: 86-755-8203-2660
Fax: 86-755-8203-1760
China - Wuhan
Tel: 86-27-5980-5300
Fax: 86-27-5980-5118
China - Xian
Tel: 86-29-8833-7252
Fax: 86-29-8833-7256
China - Xiamen
Tel: 86-592-2388138
Fax: 86-592-2388130
China - Zhuhai
Tel: 86-756-3210040
Fax: 86-756-3210049
ASIA/PACIFIC
India - Bangalore
Tel: 91-80-3090-4444
Fax: 91-80-3090-4123
India - New Delhi
Tel: 91-11-4160-8631
Fax: 91-11-4160-8632
India - Pune
Tel: 91-20-2566-1512
Fax: 91-20-2566-1513
Japan - Yokohama
Tel: 81-45-471- 6166
Fax: 81-45-471-6122
Korea - Daegu
Tel: 82-53-744-4301
Fax: 82-53-744-4302
Korea - Seoul
Tel: 82-2-554-7200
Fax: 82-2-558-5932 or
82-2-558-5934
Malaysia - Kuala Lumpur
Tel: 60-3-6201-9857
Fax: 60-3-6201-9859
Malaysia - Penang
Tel: 60-4-227-8870
Fax: 60-4-227-4068
Philippines - Manila
Tel: 63-2-634-9065
Fax: 63-2-634-9069
Singapore
Tel: 65-6334-8870
Fax: 65-6334-8850
Taiwan - Hsin Chu
Tel: 886-3-5778-366
Fax: 886-3-5770-955
Taiwan - Kaohsiung
Tel: 886-7-536-4818
Fax: 886-7-330-9305
Taiwan - Taipei
Tel: 886-2-2500-6610
Fax: 886-2-2508-0102
Thailand - Bangkok
Tel: 66-2-694-1351
Fax: 66-2-694-1350
EUROPE
Austria - Wels
Tel: 43-7242-2244-39
Fax: 43-7242-2244-393
Denmark - Copenhagen
Tel: 45-4450-2828
Fax: 45-4485-2829
France - Paris
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
Germany - Munich
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
Spain - Madrid
Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
UK - Wokingham
Tel: 44-118-921-5869
Fax: 44-118-921-5820
Worldwide Sales and Service
08/02/11

Products related to this Datasheet

IC COMPARATOR 2.4V REF SOT-23-6
IC COMPARATOR 1.2V REF SOT-23-6
IC COMPARATOR 1.2V REF SOT-23-6
IC COMPARATOR 2.4V REF SOT-23-6
IC COMPARATOR 2.4V REF SOT-23-6
IC COMPARATOR 1.2V REF SOT-23-6
IC COMPARATOR 1.2V REF SOT-23-6
IC COMPARATOR 2.4V REF SOT-23-6
IC COMPARATOR 1.2V REF SOT-23-6
IC COMPARATOR 2.4V REF SOT-23-6
IC COMPARATOR 1.2V REF SOT-23-6
IC COMPARATOR 2.4V REF SOT-23-6