very high current gain, beta, such as current mirrors and current sources. The high input impedance and the high DC current gain of the Field Effect Transistors result in extremely low current loss through the control gate. The DC current gain is limited by the gate input leakage current, which is specified at 50pA at room temperature. For example, DC peta oI the device at a drain current of 5mA at 25°C is = 5mA/50pA = 100,000,000. FEATU RES Low threshold voltage ol 0.7V Low input capacitance Low Vos grades -- 2mV, 5mV, lOmV High input impedance -- 10‘29 typical Low input and output leakage currents Negative current (IDs) temperature coefficient Enhancement-mode (normally off) DC current gain 109 RoHS compliant ORDERING INFORMATION (“L" suffix denotes lead-free (RoHS)) flflflfl UUUU SAL, PAL. Operating Temperature Range o°c Io +7o°c 0°C to 470°C 755°C to +125°c 3er arPln BrPin Small OuIline Plastic Dip CERDIP Package (SDlC) Package Package ALDI IDEASAL ALDI 102APAL ALDI iozBSAL ALDI iozBPAL ALDI iozsAL ALDI iozPAL ALDI szA TOP VIEW DA PACKAGE . lC pin is internally connected Do not co BLOCK DIAGRAM DRAIN 1 (3| of DRAIN 215) e—L GATE 1 12) i 79—0 sou —0 sun fosou T GATE 2 is) ‘ Contacl factory for leaded (non-RDHS) or high temperature versions. Flev 2.1 @2012 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, CA 9408971706 Tel: (408) 74771155 Fax ( wwwaldinc corn
Rev 2.1 ©2012 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, CA 94089-1706 Tel: (408) 747-1155 Fax: (408) 747-1286
www.aldinc.com
DUAL P-CHANNEL MATCHED MOSFET PAIR
ALD1102A/ALD1102B
ALD1102
A
DVANCED
L
INEAR
D
EVICES,
I
NC.
GENERAL DESCRIPTION
The ALD1102 is a monolithic dual P-channel matched transistor pair
intended for a broad range of analog applications. These enhancement-
mode transistors are manufactured with Advanced Linear Devices' en-
hanced ACMOS silicon gate CMOS process.
The ALD1102 offers high input impedance and negative current tempera-
ture coefficient. The transistor pair is matched for minimum offset voltage
and differential thermal response, and it is designed for switching and
amplifying applications in +2V to +12V systems where low input bias
current, low input capacitance and fast switching speed are desired. Since
these are MOSFET devices, they feature very large (almost infinite)
current gain in a low frequency, or near DC, operating environment. When
used with an ALD1101, a dual CMOS analog switch can be constructed.
In addition, the ALD1102 is intended as a building block for differential
amplifier input stages, transmission gates, and multiplexer applications.
The ALD1102 is suitable for use in precision applications which require
very high current gain, beta, such as current mirrors and current sources.
The high input impedance and the high DC current gain of the Field Effect
Transistors result in extremely low current loss through the control gate.
The DC current gain is limited by the gate input leakage current, which is
specified at 50pA at room temperature. For example, DC beta of the device
at a drain current of 5mA at 25°C is = 5mA/50pA = 100,000,000.
APPLICATIONS
Precision current mirrors
Precision current sources
Analog switches
• Choppers
Differential amplifier input stage
Voltage comparator
Data converters
Sample and Hold
Analog inverter
FEATURES
Low threshold voltage of 0.7V
Low input capacitance
Low Vos grades -- 2mV, 5mV, 10mV
High input impedance -- 1012 typical
Low input and output leakage currents
Negative current (IDS) temperature coefficient
Enhancement-mode (normally off)
DC current gain 109
RoHS compliant
Operating Temperature Range
0°C to +70°C0°C to +70°C -55°C to +125°C
8-Pin 8-Pin 8-Pin
Small Outline Plastic Dip CERDIP
Package (SOIC) Package Package
ALD1102ASAL ALD1102APAL
ALD1102BSAL ALD1102BPAL
ALD1102SAL ALD1102PAL ALD1102DA
* Contact factory for leaded (non-RoHS) or high temperature versions.
ORDERING INFORMATION (“L” suffix denotes lead-free (RoHS))
BLOCK DIAGRAM
PIN CONFIGURATION
TOP VIEW
SAL, PAL, DA PACKAGES
* IC pin is internally connected. Do not connect externally.
SOURCE 1 (1)
SUBSTRATE (8)
SOURCE 2 (7)
GATE 2 (6)
DRAIN 1 (3)
GATE 1 (2)
DRAIN 2 (5)
1
2
3
4
8
7
6
5
SOURCE
1
GATE
1
DRAIN
1
IC
SUBSTRATE
SOURCE
2
GATE
2
DRAIN
2
1102A 11028 1102
ALD1102A/ALD1102B/ALD1102 Advanced Linear Devices 2 of 8
Drain-source voltage, VDS -10.6V
Gate-source voltage, VGS -10.6V
Power dissipation 500mW
Operating temperature range SAL, PALpackages 0°C to +70°C
DA package -55°C to +125°C
Storage temperature range -65°C to +150°C
Lead temperature, 10 seconds +260°C
CAUTION: ESD Sensitive Device. Use static control procedures in ESD controlled environment.
ABSOLUTE MAXIMUM RATINGS
Gate Threshold
Voltage VT-0.4 -0.7 -1.2 -0.4 -0.7 -1.2 -0.4 -0.7 -1.2 V IDS = -10µA VGS = VDS
Offset Voltage VOS 2 5 10 mV IDS = -100µA VGS = VDS
VGS1 - VGS2
Gate Threshold TCVT -1.3 -1.3 -1.3 mV/°C
Temperature Drift
On Drain Current IDS (ON) -8 -16 -8 -16 -8 -16 mA VGS = VDS = -5V
Transconductance Gfs 2 4 2 4 2 4 mmho VDS = -5V IDS= -10mA
Mismatch Gfs 0.5 0.5 0.5 %
Output GOS 500 500 500 µmho VDS = -5V IDS = -10mA
Conductance
Drain Source RDS(ON) 180 270 180 270 180 270 VDS = -0.1V VGS = -5V
ON Resistance
Drain Source
ON Resistance RDS(ON) 0.5 0.5 0.5 % VDS = -0.1V VGS = -5V
Mismatch
Drain Source
Breakdown BVDSS -12 -12 -12 V IDS = -10µA VGS =0V
Voltage
Off Drain Current IDS(OFF) 0.1 4 0.1 4 0.1 4 nA VDS =-12V VGS = 0V
444µAT
A = 125°C
Gate Leakage IGSS 150 150 1 50pA V
DS =0V VGS =-12V
Current 10 10 10 nA TA = 125°C
Input CISS 610 610 6 10pF
Capacitance
OPERATING ELECTRICAL CHARACTERISTICS
TA = 25°C unless otherwise specified
1102A 1102B 1102 Test
Parameter Symbol Min Typ Max Min Typ Max Min Typ Max Unit Conditions
2 o 8 2 c: 3 E o m E § .2 DRAIN - SOURCE VOLTAGE (V) T l I “ 5000 E I “I k ‘3’ ‘66 45 I I HI 0: g 2000 3 O 0 1 L) w A 1 g ‘000 TA=~125’C g 3 40 < 3="" c:="" o="" e="" 5""="" ""="" i="" ’="" i="" wk="" 5="" e="" 5-="" 200="" c:="" e="" d="" j="" j="" j="" j}="" u.="" 100="" 0="" 0="" -2="" .4="" -s="" -a="" 40="" 42="" 0="" -0="" 5="">16 -2.4 DRAW » SOURCE VOLTAGE (V) GATE » SOURCE VOLT \ 7 \ \ \‘\\\ I \\ ALD1102A/ALD1lOZB/ALDHDZ Advanced Lmear Dewces
ALD1102A/ALD1102B/ALD1102 Advanced Linear Devices 3 of 8
TYPICAL PERFORMANCE CHARACTERISTICS
OUTPUT CHARACTERISTICS
DRAIN - SOURCE VOLTAGE (V)
DRAIN - SOURCE CURRENT
(mA)
-80
-60
-40
-20
0
V
BS
= 0V
T
A
= 25°C
-10V
-8V
-6V
-4V
-2V
0-8-2 -6-4 -10 -1
2
V
GS
= -12V
LOW VOLTAGE OUTPUT
CHARACTERISTICS
DRAIN -SOURCE VOLTAGE (mV)
DRAIN-SOURCE CURRENT
(mA)
-320 -160 0 160 320
-4
4
2
0
-2
-4V
V
GS
= -12V
-6V
V
BS
= 0V
T
A
= 25°C
-2V
-12
FORWARD TRANSCONDUCTANCE
vs. DRAIN - SOURCE VOLTAGE
DRAIN - SOURCE VOLTAGE (V)
0-8-2 -6-4 -10
FORWARD TRANSCONDUCTANCE
(µmho)
10000
5000
2000
1000
500
200
100
V
BS
= 0V
f = 1KHz
I
DS
= -5mA
T
A
= +125°C
T
A
= +25°C
I
DS
= -1mA
TRANSFER CHARACTERISTIC
WITH SUBSTRATE BIAS
GATE - SOURCE VOLTAGE (V)
0 -0.8 -1.6 -2.4 -3.2 -4.0
-20
-15
-10
-5
0
DRAIN-SOURCE CURRENT
(µA)
V
BS
= 0V
4V
6V
8V
10V
12V
V
GS
= V
DS
T
A
= 25°C
2V
GATE - SOURCE VOLTAGE (V)
RDS (ON) vs. GATE - SOURCE VOLTAGE
DRAIN - SOURCE ON RESISTANCE
()
10000
1000
100
10
-20 -4 -6 -8 -10 -12
VDS = 0.4V
VBS = 0V
TA = +125°C
TA = +25°C
OFF DRAIN - CURRENT vs.
TEMPERATURE
TEMPERATURE (°C)
OFF - DRAIN SOURCE CURRENT
(A)
-50 -25 +25 +50 +75 +125+1000
-10
X
10
-6
V
DS
= -12V
V
GS
= V
BS
= 0V
-10
X
10
-12
-10
X
10
-9
ALD1102A/ALD1102B/ALD1102 Advanced Linear Devices 4 of 8
DIFFERENTIAL AMPLIFIER CURRENT SOURCE MULTIPLICATION
CURRENT SOURCE MIRROR CURRENT SOURCE WITH GATE CONTROL
TYPICAL APPLICATIONS
I
SET
R
SET
Q
3
V+ = +5V
I
SOURCE
Q
1
, Q
2
: N - Channel MOSFET
Q
3
, Q
4
: P - Channel MOSFET
I
SOURCE
= I
SET
= V+ -Vt
R
SET
= 4
R
SET
~
Q
1
Q
2
V+ = +5V
Q
4
ALD1101,
1/2 ALD1106,
or ALD1116
ALD1102,
1/2 ALD1107,
or ALD1117
V+
PMOS PAIR
Q
4
V
IN
-
NMOS PAIRQ
2
Q
1
V
IN
+
Current
Source
Q
3
Q
1
, Q
2
: N - Channel MOSFET
Q
3
, Q
4
: P - Channel MOSFET
V
OUT
ALD1101,
1/2 ALD1106,
or ALD1116
ALD1102,
1/2 ALD1107,
or ALD1117
V+ = +5V
Q4
ISOURCE
RSET
Q1
Q3
ISET
ON
OFF
Digital Logic Control
of Current Source
Q1 : N - Channel MOSFET
Q3,Q4 : P - Channel MOSFET
ALD1102,
1/2 ALD1107,
or ALD1117
1/2 ALD1101,
1/4 ALD1106,
or 1/2 ALD1116
Q
SET,
Q
1
..Q
N
: ALD1101, ALD1106, or ALD1116
 N - Channel MOSFET
I
SET
V+ = +5V
I
SOURCE
= I
SET
x N
R
SET
Q
2
Q
3
Q
SET
Q
1
Q
N
ALD1102A/ALD1102B/ALD1102 Advanced Linear Devices 5 of 8
CASCODE CURRENT SOURCES
BASIC CURRENT SOURCES
P- CHANNEL CURRENT SOURCE
N- CHANNEL CURRENT SOURCE
TYPICAL APPLICATIONS (cont.)
I
SOURCE
V+ = +5V
R
SET
I
SET
1
2
3
Q
1
56
8
Q
2
7
I
SOURCE
= I
SET
= V+ - Vt
R
SET
= V+ - 1.0
R
SET
Q
1,
Q
2
: N - Channel MOSFET
~= 4
R
SET
~
ALD1101,
1/2 ALD1106,
or ALD1116
I
SET
V+ = +5V
Q
2
I
SOURCE
R
SET
Q
3
Q
1
Q
1
, Q
2
, Q
3
, Q
4
: N - Channel MOSFET
(ALD1101 or ALD1103)
Q
4
2 x ALD1101
or ALD1106
V+ = +5V
2
35
67
8
Q
4
I
SOURCE
Q
3
R
SET
I
SET
Q
3
, Q
4
: P - Channel MOSFET
ALD1102,
1/2 ALD1107,
or ALD1117
ISET
V+ = +5V
Q1
Q3
Q2
Q4
ISOURCE
Q1, Q2, Q3, Q4: P - Channel MOSFET
 (ALD1102 or ALD1103)
ISOURCE = ISET = V+ - 2Vt
RSET = 3
RSET
~
RSET
2 x ALD1102
or ALD1107
ALD1102A/ALD1102B/ALD1102 Advanced Linear Devices 6 of 8
8 Pin Plastic SOIC Package
SOIC-8 PACKAGE DRAWING
Millimeters Inches
Min Max Min MaxDim
A
A1
b
C
D-8
E
e
H
L
S
1.75
0.25
0.45
0.25
5.00
4.05
6.30
0.937
8°
0.50
0.053
0.004
0.014
0.007
0.185
0.140
0.224
0.024
0°
0.010
0.069
0.010
0.018
0.010
0.196
0.160
0.248
0.037
8°
0.020
1.27 BSC 0.050 BSC
1.35
0.10
0.35
0.18
4.69
3.50
5.70
0.60
0°
0.25
ø
L
C
H
S (45°)
ø
e
A
A
1
b
D
S (45°)
E
“WWI—I LILILILI _>
ALD1102A/ALD1102B/ALD1102 Advanced Linear Devices 7 of 8
8 Pin Plastic DIP Package
PDIP-8 PACKAGE DRAWING
b
1
S
b
EE1
D
e
A2
A
1
A
L
c
e
1
ø
Millimeters Inches
Min Max Min MaxDim
A
A
1
A
2
b
b
1
c
D-8
E
E
1
e
e
1
L
S-8
ø
3.81
0.38
1.27
0.89
0.38
0.20
9.40
5.59
7.62
2.29
7.37
2.79
1.02
0°
5.08
1.27
2.03
1.65
0.51
0.30
11.68
7.11
8.26
2.79
7.87
3.81
2.03
15°
0.105
0.015
0.050
0.035
0.015
0.008
0.370
0.220
0.300
0.090
0.290
0.110
0.040
0°
0.200
0.050
0.080
0.065
0.020
0.012
0.460
0.280
0.325
0.110
0.310
0.150
0.080
15°
r—H—H—IW IF A\ l_ll_ll_ll_l a we ¢ L R v j T» + AL 1 ALD1102NALDI1OZB/ALD11D
ALD1102A/ALD1102B/ALD1102 Advanced Linear Devices 8 of 8
8 Pin CERDIP Package
CERDIP-8 PACKAGE DRAWING
A
A
1
b
b
1
C
D-8
E
E
1
e
e
1
L
L
1
L
2
S
Ø
3.55
1.27
0.97
0.36
0.20
--
5.59
7.73
3.81
3.18
0.38
--
0°
5.08
2.16
1.65
0.58
0.38
10.29
7.87
8.26
5.08
--
1.78
2.49
15°
Millimeters Inches
Min Max Min MaxDim
0.140
0.050
0.038
0.014
0.008
--
0.220
0.290
0.150
0.125
0.015
--
0°
0.200
0.085
0.065
0.023
0.015
0.405
0.310
0.325
0.200
--
0.070
0.098
15°
2.54 BSC
7.62 BSC
0.100 BSC
0.300 BSC
EE
1
C
e
1
ø
s
b
L
D
b
1
e
A
L
2
A
1
L
1