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© Semiconductor Components Industries, LLC, 2014
October, 2014 − Rev. 2 1Publication Order Number:
7WBD3126/D
7WBD3126
2-Bit Translating Bus
Switch
The 7WBD3126 is an advanced high−speed low−power 2−bit
translating bus switch in ultra−small footprints.
Features
High Speed: tPD = 0.25 ns (Max) @ VCC = 4.5 V
3 W Switch Connection Between 2 Ports
Power Down Protection Provided on Inputs
Zero Bounce
TTL−Compatible Control Inputs
Ultra−Small Pb−Free Packages
These are Pb−Free Devices
This document contains information on some products that are still under development.
ON Semiconductor reserves the right to change or discontinue these products without
notice.
http://onsemi.com
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
ORDERING INFORMATION
MARKING
DIAGRAMS
UDFN8
MU SUFFIX
CASE 517AJ
1
8AGM
G
18AF M*G
G
1
UQFN8
MU SUFFIX
CASE 523AN
US8
US SUFFIX
CASE 493
1
8
AD M*G
G
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
A = Assembly Location
Y = Year
W = Work Week
M = Date Code
G= Pb−Free Package
UDFN8
1.95 x 1.0
CASE 517CA X M
1
D125
AYWG
G
1
8
Micro8]
DM SUFFIX
CASE 846A
:7 E: Vcc "1 [—7— 052 n] [—5— 31 n] [—5— A2 ure 1. UDFNS (Tap ThruA/Iew) I]: I]: I]: I]: —J_l— T. % T. 7WB D31 26 Vac |:| |:|
7WBD3126
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2
OE1 1 VCC
A1
GND
2
3
8
7
6
45
B2
OE2
B1
A2
Figure 1. UDFN8
(Top Thru−View)
Figure 2. UQFN8
(Top Thru−View)
123
4
765
8
OE2 B1 A2
A1 B2
VCC GND
Figure 3. US8/Micro8
(Top View)
OE1
A1
GND
B2
VCC
OE2
B1
A2
OE1
1
2
3
4
8
7
6
5
Figure 4. Logic Diagram
A1
OE1
B1
A2
OE2
B2
FUNCTION TABLE
Input OEn Function
L Disconnect
HBn = An
7WBD3126
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3
MAXIMUM RATINGS
Symbol Parameter Value Unit
VCC DC Supply Voltage −0.5 to +7.0 V
VIN Control Pin Input Voltage −0.5 to +7.0 V
VI/O Switch Input / Output Voltage −0.5 to +7.0 V
IIK Control Pin DC Input Diode Current VIN < GND −50 mA
IOK Switch I/O Port DC Diode Current VI/O < GND −50 mA
IOON−State Switch Current $128 mA
Continuous Current Through VCC or GND $150 mA
ICC DC Supply Current Per Supply Pin $150 mA
IGND DC Ground Current per Ground Pin $150 mA
TSTG Storage Temperature Range −65 to +150 °C
TLLead Temperature, 1 mm from Case for 10 Seconds 260 °C
TJJunction Temperature Under Bias 150 °C
qJA Thermal Resistance US8 (Note 1)
UDFN8
UQFN8
Micro8
251
111
208
392
°C/W
PDPower Dissipation in Still Air at 85°C US8
UDFN8
UQFN8
Micro8
498
1127
601
319
mW
MSL Moisture Sensitivity Level 1
FRFlammability Rating Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in
VESD ESD Withstand Voltage Human Body Mode (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
> 2000
> 200
N/A
V
ILATCHUP Latchup Performance Above VCC and Below GND at 125°C (Note 5) $200 mA
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2 ounce copper trace no air flow.
2. Tested to EIA / JESD22−A114−A.
3. Tested to EIA / JESD22−A115−A.
4. Tested to JESD22−C101−A.
5. Tested to EIA / JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
VCC Positive DC Supply Voltage 4.0 5.5 V
VIN Control Pin Input Voltage 0 5.5 V
VI/O Switch Input / Output Voltage 0 5.5 V
TAOperating Free−Air Temperature −55 +125 °C
Dt/DVInput Transition Rise or Fall Rate Control Input
Switch I/O 0
05
DC nS/V
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
7WBD3126
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4
DC ELECTRICAL CHARACTERISTICS
Symbol Parameter Conditions
VCC
(V)
TA = 255C
TA =
−555C to +1255C
Unit
Min Typ Max Min Max
VIK Clamp Diode Voltage II/O = −18 mA 4.5 −1.2 −1.2 V
VIH High−Level Input Voltage
(Control) 4.0 to
5.5 2.0 2.0 V
VIL Low−Level Input Voltage
(Control) 4.0 to
5.5 0.8 0.8 V
VOH Output Voltage High See Figure 5
IIN Input Leakage Current 0 v VIN v 5.5 V 5.5 ±0.1 ±1.0 mA
IOFF Power Off Leakage Current VI/O = 0 to 5.5 V 0±0.1 ±1.0 mA
ICC Quiescent Supply Current IO = 0,
VIN = VCC or 0 V
OE1 = OE2 = VCC
OE1 = OE2 = GND
5.5
±1.0
±0.1
±1.0
±1.0 mA
mA
DICC Increase in Supply Current
(Control Pin) One input at 3.4 V;
Other inputs at VCC
or GND
5.5 2.5 mA
RON Switch ON Resistance VI/O = 0,
II/O = 64 mA
II/O = 30 mA
4.5 3
37
77
7
W
VI/O = 2.4,
II/O = 15 mA 15 50 50
VI/O = 2.4,
II/O = 15 mA 4.0 50 70 70
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
AC ELECTRICAL CHARACTERISTICS
Symbol Parameter Test Condition
VCC
(V)
TA = 25 5C
TA =
−555C to +1255C
Unit
Min Typ Max Min Max
tPD Propagation Delay,
Bus to Bus See Figure 6 4.0 to
5.5 0.25 0.25 ns
tEN Output Enable Time See Figure 6 4.5 to
5.5 0.8 2.5 4.2 0.8 4.2 ns
4.0 0.8 3.0 4.6 0.8 4.6
tDIS Output Disable Time 4.5 to
5.5 0.8 3.0 4.8 0.8 4.8 ns
4.0 0.8 2.9 4.4 0.8 4.4
CIN Control Input Capacitance VIN = 5 or 0 V 5.0 2.5 pF
CIO(ON) Switch On Capacitance Switch ON 5.0 10 pF
CIO(OFF) Switch Off Capacitance Switch OFF 5.0 5 pF
7WBD3126
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5
TYPICAL DC CHARACTERISTICS
Figure 5. Output Voltage High vs Supply Voltage
VCC, SUPPLY VOLTAGE (V)
VOH, HIGH LEVEL OUTPUT VOLT-
AGE (V)
3.75
3.50
3.25
3.00
2.75
2.50
2.25
2.004.50 4.75 5.00 5.25 5.50 5.75
IOH =
−0.1 mA
−6 mA
−12 mA
−24 mA
VCC, SUPPLY VOLTAGE (V)
VOH, HIGH LEVEL OUTPUT VOLT-
AGE (V)
3.75
3.50
3.25
3.00
2.75
2.50
2.25
2.004.50 4.75 5.00 5.25 5.50 5.75
IOH =
−0.1 mA
−6 mA
−12 mA
−24 mA
VCC, SUPPLY VOLTAGE (V)
VOH, HIGH LEVEL OUTPUT VOLT-
AGE (V)
3.75
3.50
3.25
3.00
2.75
2.50
2.25
2.004.50 4.75 5.00 5.25 5.50 5.75
IOH =
−0.1 mA
−6 mA
−12 mA
−24 mA
TA = +85°C
VIN = VCC
TA = +25°C
VIN = VCC
TA = −40°C
VIN = VCC
7WBD3126
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6
AC LOADING AND WAVEFORMS
Parameter Measurement Information
CL = 50 pF*
From Output
Under Test
GND
Open
7 V
500 WS1
*CL includes probes and jig capacitance.
500 W
Test S1
tPD Open
tPLZ/tPZL 7 V
tPHZ/tPZH Open
Voltage Waveforms
Propagation Delay Times Voltage Waveforms
Enable and Disable Times
3.5 V
Output
Control
3 V
0 V
1.5 V1.5 V
1.5 V
1.5 V
tPZH tPHZ
VOL
VOH
0 V
Output
Output
Waveform 1
S1 at 7 V
(Note 6)
Waveform 2
S1 at Open
(Note 6)
VOL + 0.3 V
VOH − 0.3 V
6. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control
7. All input pulses are supplied by generators having the following characteristics: PRR v 10 MHz, ZO = 50 W, tr v 2.5 ns, tf v 2.5 ns.
8. The outputs are measured one at a time, with one transition per measurement.
9. tPLZ and tPHZ are the same as tDIS.
10.tPZL and tPZH are the same as tEN.
11. tPHL and tPLH are the same as tPD.
Figure 6. tPD, tEN, tDIS Loading and Waveforms
1.5 V 1.5 V
1.5 V 1.5 V
Input
Output
VOH
VOL
tPHL
tPLH
3 V
0 V tPZL tPLZ
7WBD3126
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7
ORDERING INFORMATION
Device Package Shipping
7WBD3126USG US8
(Pb−Free) 3000 / Tape & Reel
7WBD3126MUTAG UDFN8
(Pb−Free) 3000 / Tape & Reel
7WBD3126AMUTCG UQFN8
(Pb−Free) 3000 / Tape & Reel
7WBD3126DMR2G Micro8
(Pb−Free) 4000 / Tape & Reel
(In Development)
7WBD3126DMUTCG UDFN8, 1.95 x 1.0, 0.5P
(Pb−Free) 3000 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
W E \ W—fla “WE .- I-I filial EL SIDE VIEW m V? W‘ L: HEN+F 7 ‘ firm , FWD A U4 j 45kg“: BOTTOM VIEW Hr.” Mar—H NEH.“ fl f a
7WBD3126
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8
PACKAGE DIMENSIONS
UDFN8 1.8 x 1.2, 0.4P
CASE 517AJ
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.30 mm FROM TERMINAL TIP.
4. MOLD FLASH ALLOWED ON TERMINALS
ALONG EDGE OF PACKAGE. FLASH MAY
NOT EXCEED 0.03 ONTO BOTTOM
SURFACE OF TERMINALS.
5. DETAIL A SHOWS OPTIONAL
CONSTRUCTION FOR TERMINALS.
A B
E
D
BOTTOM VIEW
b
e
8X
BAC
CNOTE 3
0.10 C
PIN ONE
REFERENCE
TOP VIEW
0.10 C
A
A1
(A3)
0.05 C
0.05 C
CSEATING
PLANE
SIDE VIEW
L
8X
14
58
DIM MIN MAX
MILLIMETERS
A0.45 0.55
A1 0.00 0.05
A3 0.127 REF
b0.15 0.25
D1.80 BSC
E1.20 BSC
e0.40 BSC
L0.45 0.55
e/2
b2 0.30 REF
L1 0.00 0.03
L2 0.40 REF
DETAIL A
(L2)
(b2)
NOTE 5
L1
DETAIL A
M
0.10
M
0.05
0.22
0.32
8X
1.50
0.40 PITCH
0.66
DIMENSIONS: MILLIMETERS
MOUNTING FOOTPRINT*
7X
1
SOLDERMASK DEFINED
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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7WBD3126
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9
PACKAGE DIMENSIONS
UDFN8 1.95x1.0, 0.5P
CASE 517CA
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.20 MM FROM TERMINAL TIP.
4. PACKAGE DIMENSIONS EXCLUSIVE OF
BURRS AND MOLD FLASH.
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
RECOMMENDED
DIM MIN MAX
MILLIMETERS
A0.45 0.55
A1 0.00 0.05
A3 0.13 REF
b0.15 0.25
D1.95 BSC
E1.00 BSC
e0.50 BSC
L0.25 0.35
L1 0.30 0.40
A B
E
D
0.10 C
PIN ONE
REFERENCE
TOP VIEW
0.10 C
A
A1
0.05 C
0.05 C
CSEATING
PLANE
SIDE VIEW
2X
2X
A3
BOTTOM VIEW
b
e
8X
L7X
L1
14
58
e/2
DIMENSIONS: MILLIMETERS
0.30
7X
0.49 8X
1.24
0.54 PITCH
0.50
1
PKG
OUTLINE
0.10 B
0.05
AC
CNOTE 3
M
M
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7WBD3126
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10
PACKAGE DIMENSIONS
UQFN8, 1.6x1.6, 0.5P
CASE 523AN
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.30 mm FROM THE TERMINAL TIP.
A
B
E
D
BOTTOM VIEW
b
e
8X
0.10 B
0.05
AC
CNOTE 3
2X
0.10 C
PIN ONE
REFERENCE
TOP VIEW
2X
0.10 C
A
A1
(A3)
0.05 C
0.05 C
CSEATING
PLANE
SIDE VIEW
L
8X
1
35
8
DIM MIN MAX
MILLIMETERS
A0.45 0.60
A1 0.00 0.05
A3 0.13 REF
b0.15 0.25
D1.60 BSC
L1 −−− 0.15
E1.60 BSC
e0.50 BSC
L0.35 0.45
L1
DETAIL A
A1
A3
DETAIL B
OPTIONAL
MOLD CMPD
EXPOSED Cu
b
CONSTRUCTION
OPTIONAL
CONSTRUCTION
DETAIL B
DETAIL A
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
PITCH
0.35
7X
DIMENSIONS: MILLIMETERS
1
7
L3
0.25
1.70
1.70
0.50
L3 0.25 0.35
L3
(0.10) (0.15)
8X
0.53
8X
0.53
8X
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7WBD3126
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11
PACKAGE DIMENSIONS
US8
CASE 493
ISSUE B
DIM
AMIN MAX MIN MAX
INCHES
1.90 2.10 0.075 0.083
MILLIMETERS
B2.20 2.40 0.087 0.094
C0.60 0.90 0.024 0.035
D0.17 0.25 0.007 0.010
F0.20 0.35 0.008 0.014
G0.50 BSC 0.020 BSC
H0.40 REF 0.016 REF
J0.10 0.18 0.004 0.007
K0.00 0.10 0.000 0.004
L3.00 3.20 0.118 0.126
M0 6 0 6
N5 10 5 10
P0.23 0.34 0.010 0.013
R0.23 0.33 0.009 0.013
S0.37 0.47 0.015 0.019
U0.60 0.80 0.024 0.031
V0.12 BSC 0.005 BSC
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION “A” DOES NOT INCLUDE MOLD
FLASH, PROTRUSION OR GATE BURR.
MOLD FLASH. PROTRUSION AND GATE
BURR SHALL NOT EXCEED 0.140 MM
(0.0055”) PER SIDE.
4. DIMENSION “B” DOES NOT INCLUDE
INTER−LEAD FLASH OR PROTRUSION.
INTER−LEAD FLASH AND PROTRUSION
SHALL NOT E3XCEED 0.140 (0.0055”) PER
SIDE.
5. LEAD FINISH IS SOLDER PLATING WITH
THICKNESS OF 0.0076−0.0203 MM.
(300−800 “).
6. ALL TOLERANCE UNLESS OTHERWISE
SPECIFIED ±0.0508 (0.0002 “).
LB
A
PG
41
58
C
K
D
SEATING
J
S
R
U
DETAIL E
V
F
H
N
R 0.10 TYP
M
Y−
−X−
−T−
DETAIL E
T
M
0.10 (0.004) XY
T0.10 (0.004)
____
____
PLANE
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
ǒmm
inchesǓ
SCALE 8:1
3.8
0.15
0.50
0.0197
1.0
0.0394
0.30
0.012
1.8
0.07
ZHLE hm; Lffik WW 1 was; ;
7WBD3126
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12
PACKAGE DIMENSIONS
Micro8t
CASE 846A
ISSUE H
S
B
M
0.08 (0.003) A S
T
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE
BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED
0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE.
5. 846A-01 OBSOLETE, NEW STANDARD 846A-02.
b
e
PIN 1 ID
8 PL
0.038 (0.0015)
−T− SEATING
PLANE
A
A1 cL
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
8X 8X
6X ǒmm
inchesǓ
SCALE 8:1
1.04
0.041 0.38
0.015
5.28
0.208
4.24
0.167
3.20
0.126
0.65
0.0256
DIM
AMIN NOM MAX MIN
MILLIMETERS
−− −− 1.10 −−
INCHES
A1 0.05 0.08 0.15 0.002
b0.25 0.33 0.40 0.010
c0.13 0.18 0.23 0.005
D2.90 3.00 3.10 0.114
E2.90 3.00 3.10 0.114
e0.65 BSC
L0.40 0.55 0.70 0.016
−− 0.043
0.003 0.006
0.013 0.016
0.007 0.009
0.118 0.122
0.118 0.122
0.026 BSC
0.021 0.028
NOM MAX
4.75 4.90 5.05 0.187 0.193 0.199
HE
HE
DD
E
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
P
UBLICATION ORDERING INFORMATION
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
7WBD3126/D
Micro8 is a trademark of International Rectifier.
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