NCP102 Datasheet by ON Semiconductor

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© Semiconductor Components Industries, LLC, 2008
January, 2008 - Rev. 1
1Publication Order Number:
NCP102/D
NCP102
Low Dropout Linear
Regulator Controller
The NCP102 is a low dropout linear regulator controller for
applications requiring high-current and ultra low dropout voltages.
The use of an external N-Channel MOSFET allows the user to adapt
the device to a multitude of applications depending on system
requirements for current and dropout voltage.
An extremely accurate 0.8 V (±2%) reference allows the
implementation of sub 1 V voltage supplies. The reference is
guaranteed over the complete supply and temperature ranges.
Other features of the NCP102 are a dedicated enable input,
internally compensated error amplifier and an adjustable soft-start. A
minimum drive capability of ±5 mA provides fast transient response.
The drive current is internally limited to protect the controller in case
of an external MOSFET failure. The NCP102 is packaged in a space
saving TSOP-6.
Features
4.5 V to 13.5 V Supply Voltage Range
0.8 V (±2%) Voltage Reference (Temperature and Process)
Programmable Regulator Output Voltage Down to 0.8 V
Drive Current Capability of > ±5mA
MLCC and POSCAP Compatible
Programmable Soft-Start
Enable Active High
Space Saving TSOP-6 Package
RoHS Compliant Pb-Free Package
Applications
Desktop and Laptops
Computer Peripherals such as Graphics Cards
Sub 1 V Power Supplies
Figure 1. Typical Application
GND
EN
1
FB
2
3
CHIP
NCP102
6
5
4R1
R2
CSOFT-S
VOUT
Vin
VCC
COUT2
Cin
CCC
VCC
DRV
SOFT-S
U1
CFB
X1 COUT1
ENABLE
RG
PIN CONNECTIONS
1
3SOFT-S
EN
2
FB 4
VCC
6
(Top View)
Device Package Shipping
ORDERING INFORMATION
5DRV
TSOP-6
(SOT23-6)
SN SUFFIX
CASE 318G
MARKING
DIAGRAM
102AYW G
G
102 = Device Code
A = Assembly Location
Y = Year
W = Work Week
G= Pb-Free Package
1
6
GND
For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
NCP102SNT1G TSOP-6
(Pb-Free)
3000/Tape & Reel
1
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(Note: Microdot may be in either location)
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Figure 2. Representative Block Diagram
-
+
9.75 V
FB
9.75 V
VCC
-
+
SOFT-S
EN
15 V
VCC
GND
DRV
UVLO
0.8 V
VCC
ISOFT-S
IEN
9.75 V
0.8 V
PIN FUNCTION DESCRIPTION
Pin Symbol Name Description
1 EN Enable Input (Active High). Pull the EN pin below 0.8 V to disable the regulator and enter the standby
mode operation.
2 GND Ground
3 FB Inverting input of the error amplifier. The output voltage is sampled by means of a resistor divider and ap‐
plied to this pin for regulation.
4 SOFT-S Programmable soft-start. An internal current source charges the capacitor connected to this pin. The soft-
start period ends once the voltage of the soft-start capacitor reaches 0.8 V.
5 DRV Gate drive for external N-Channel MOSFET. It is also the buffered output of the error amplifier.
6 VCC Power supply voltage input. Operating voltage range is from 4.5 to 13.5 V. A decoupling capacitor to GND
should be used. A minimum of 0.1 mF is recommended.
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MAXIMUM RATINGS (TA = 25°C, unless otherwise noted)
Rating Symbol Value Unit
Main Supply Input Voltage
Main Supply Input Current
VCC
ICC
-0.3 to 15
100
V
mA
Enable Voltage
Enable Current
VEN
IEN
-0.3 to 9.75
100
V
mA
Soft-Start Voltage
Soft-Start Current
VSOFT-S
ISOFT-S
-0.3 to 9.75
100
V
mA
Drive Voltage
Drive Current
VDRV
IDRV
-0.3 to 9.75
100
V
mA
Feedback Voltage
Feedback Current
VFB
IFB
-0.3 to 9.75
100
V
mA
Thermal Resistance, Junction-to-Ambient
(0.36 sq in Printed Circuit Copper Clad)
(1.0 sq in Printed Circuit Copper Clad)
RqJA 230
200
°C/W
Power Dissipation (TA = 25°C, 2 oz Cu, 0.36 sq in Printed Circuit Copper Clad) PD0.4 W
Storage Temperature Range Tstg -65 to 150 °C
Operating Junction Temperature Range TJ-40 to 125 °C
Reflow Temperature 10 seconds Treflow 260 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. This device series contains ESD protection and exceeds the following tests:
Human Body Model (HBM) ±2.0 kV per JEDEC standard: JESD22-A114
Machine Model (MM) ±200 V per JEDEC standard: JESD22-A115
2. Latch-up current maximum rating: ±100 mA per JEDEC standard: JESD78.
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ELECTRICAL CHARACTERISTICS (VCC = 12 V, VEN = 1 V, VDRV = VFB, VSS = open, CCC = 0.1 mF. For typical values TJ = 25°C.
For min/max values, TJ = -40°C to 125°C, unless otherwise noted)
Parameter Condition Min Typ Max Unit
POWER SUPPLY
Supply Voltage VCC 4.5 - 13.5 V
Supply Current VCC = 5 V
VCC = 12 V
ICC1
ICC2
-
-
1.4
1.8
3.2
3.2
mA
VCC Startup Voltage VCC increasing VCC(on) 4.0 4.2 4.5 V
VCC Turn Off Voltage VCC decreasing VCC(off) 3.8 4.0 4.4 V
VCC Hysteresis VCC(on) - VCC(off) VCC(hys) 0.10 0.24 0.30 V
Standby Current VEN = 0 V, VCC = 5 V
VEN = 0 V, VCC = 12 V
ICC(off1)
ICC(off2)
-
-
0.3
0.48
0.8
1.5
mA
ERROR AMPLIFIER
Input Bias Current VFB = 1.0 V IFB -1.0 - 1.0 mA
Open Loop DC Gain (Note 3) Av55 70 - dB
Unity Gain Bandwidth VFB = VDRV BW - 0.7 - MHz
Power Supply Rejection Ratio (Note3) VCC = 12 V, 100 Hz PSRR 50 - - dB
DRIVE
Sink Current VDRV = 6 V, VFB = 1 V
VDRV = 2.5 V, VCC = 5 V
VFB = 1 V
IDRV(SNK1)
IDRV(SNK2)
5.0
5.0
-
-
-
-
mA
Source Current VDRV = 6 V, VFB = 0.6 V
VDRV = 2.5 V, VCC = 5 V,
VFB = 0.6 V
IDRV(SRC1)
IDRV(SRC2)
5.0
5.0
-
-
-
-
mA
Output Voltage Low State
High State
IDRV = 5 mA, VFB = 1 V
IDRV = 5 mA, VFB = 0.6 V,
VCC = 9.5 V
VDRV(low)
VDRV(high)
-
9.0
-
-
0.5
-
V
Drive Current Under Fault Conditions
TJ = 25°C
VDRV = 0 V, VFB = 0.6 V
VDRV = open, VFB = 0.6 V
IDRV(MAX1)
IDRV(MAX2)
-
-
-
-
45
40
mA
SOFT-START
Source Current VSOFT-S = 1 V ISOFT-S 3.5 4.5 6.2 mA
ENABLE
Source Current IEN 5.0 10 15 mA
Input Threshold Voltage
On State
Off State
VEN Increasing
VEN Decreasing
VEN(on)
VEN(off)
0.7
0.66
0.8
0.77
0.9
0.88
V
Threshold Voltage Hysteresis VEN(on) - VEN(off) VEN(hys) - 35 - mV
REFERENCE
Reference Voltage VCC = 5 V, VCC = 12 V VREF 0.784 0.8 0.816 V
3. Guaranteed by design.
Stamup Threshold Operanng
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TYPICAL CHARACTERISTICS
TJ, JUNCTION TEMPERATURE (°C)
ICC, SUPPLY CURRENT (mA)
4.0
4.1
4.2
4.3
4.4
4.5
3.6
3.7
3.8
3.9
TJ, JUNCTION TEMPERATURE (°C)
VCC, SUPPLY VOLTAGE (V)
-20
-10
0
10
20
30
40
50
60
80
f, FREQUENCY (kHz)
AVOL, OPEN LOOP VOLTAGE GAIN (dB)
TJ, JUNCTION TEMPERATURE (°C)
PHASE (°)
0
20
40
60
80
100
10
13
16
19
22
25
28
31
34
37
40
TJ, JUNCTION TEMPERATURE (°C)
IDRV(MAX), MAXIMUM DRIVE CURRENT (mA)
Figure 3. Supply Current vs. Junction
Temperature
Figure 4. Supply Voltage Thresholds vs.
Junction Temperature
Figure 5. Error Amplifier Open Loop Voltage
Gain/Phase vs. Frequency
Figure 6. Drive Sink Current vs. Junction
Temperature
Figure 7. Drive Source Current vs. Junction
Temperature
Figure 8. Drive Current Under Fault Conditions
vs. Junction Temperature
VCC = 12 V
0
0.25
0.50
0.75
1.00
1.25
1.50
1.75
2.00
2.25
2.50
2.75
3.00
-50 -25 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125 150
0.1 10 100 1000 -50 -25 0 25 50 75 100 125 150
-50 -25 0 25 50 75 100 125 150
180
Operating
Standby
Minimum Operating
Start-up Threshold
144
108
72
36
-36
-72
-108
-144
-180
IDRV(SNK), DRIVE SINK CURRENT (mA)
TJ = 25°C
VCC = 5 V
10
30
50
70
90
VCC = 5 V, VDRV = 2.5 V, VFB = 1 V
VCC = 12 V, VDRV = 6 V, VFB = 1 V
TJ, JUNCTION TEMPERATURE (°C)
0
5
13
18
25
30
-50 -25 0 25 50 75 100 125 150
IDRV(SRC), DRIVE SOURCE CURRENT (mA)
3
10
15
20
28
VCC = 5 V, VFB = 0.6 V
VCC = 12 V, VFB = 0.6 V
VDRV = open, VFB = 0.6 V
VDRV = 0 V, VFB = 0.6 V
3.5
1
70
0
28
23
8
Phase
Gain
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TYPICAL CHARACTERISTICS
0.60
0.65
0.70
0.75
0.80
0.85
0.90
TJ, JUNCTION TEMPERATURE (°C)
VEN, ENABLE THRESHOLD VOLTAGE (V)
TJ, JUNCTION TEMPERATURE (°C)
0.70
0.74
0.80
0.84
0.90
Figure 9. Soft-Start Charge Current vs.
Junction Temperature
Figure 10. Enable Threshold Voltages vs.
Junction Temperature
Figure 11. Reference Voltage vs. Junction
Temperature
-50 -25 0 25 50 75 100 125 150
-50 -25 0 25 50 75 100 125 150
Off State
On State
VREF
, REFERENCE VOLTAGE (V)
0.72
0.76
0.82
0.88 VCC = 5 V
TJ, JUNCTION TEMPERATURE (°C)
0
2
4
6
8
10
-50 -25 0 25 50 75 100 125 150
ISOFT-S, SOFT-START CHARGE (mA)
1
3
5
7
9
0.78
0.86
(R1+ R2
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DETAILED OPERATING DESCRIPTION
The NCP102 is a low dropout linear regulator controller
for applications requiring high-current and ultra low
dropout voltages. The use of an external N-Channel
MOSFET allows the user to adapt the device to a multitude
of applications depending on system requirements for
current and dropout voltage.
An extremely accurate 0.8 V (±2%) reference allows the
implementation of sub 1 V voltage supplies. The reference
is guaranteed over the complete supply and temperature
ranges.
Other features of the NCP102 are a dedicated enable
input, internally compensated error amplifier and an
adjustable soft-start. A minimum drive capability of ±5 mA
provides fast transient response. The drive current is
internally limited to protect the controller in case of an
external MOSFET failure. The NCP102 is packaged in a
space saving TSOP-6.
SUPPLY VOLTAGE
The NCP102 supply voltage range is between 4.5 V and
13.5 V. The controller is enabled once the supply voltage
exceeds its minimum supply threshold, typically 4.5 V. The
minimum operating voltage is reduced to 4.2 V (typical)
once the controller is enabled to provide noise immunity.
A bypass capacitor is required on the VCC pin to provide
charge storage during power up and transient events. A
minimum of 0.1 mF is recommended.
DRIVE OUTPUT
A powerful error amplifier (EA) capable of driving an
external MOSFET is built into the NCP102. The output of
the error amplifier is connected to the DRV pin. It has a
minimum drive current capability of ±5 mA providing a fast
transient response.
The EA is biased directly from VCC. The DRV voltage
follows VCC up and it is internally clamped to 9.75 V (typ.).
This allows the use of external MOSFETs with a maximum
gate voltage of 12 V.
The DRV current is provided directly from VCC.
Therefore, the VCC capacitor should be large enough to
maintain a constant VCC during power up and transients.
Otherwise, the supply voltage may collapse reaching the
controller undervoltage lockout threshold.
INTERNAL REFERENCE
The internal 0.8 V reference facilitates the
implementation of sub 1 V supplies required in modern
computing equipment. The internal reference is trimmed
during manufacturing to obtain better than ±2% accuracy
over the complete operating range.
The output voltage, Vout, is programmed using a resistor
divider (R1 and R2) as shown in Figure 1.
The resistor divider senses the output voltage and
compares it to the internal 0.8 V reference.
Equation 1 relates the output voltage to the internal
reference voltage and external resistors R1 and R2.
Vout +VREF @ǒR1 )R2
R2 Ǔ(eq. 1)
ERROR AMPLIFIER
The NCP102 has a wide bandwidth error amplifier. It
allows the user to implement a wide bandwidth feedback
loop resulting in better transient response and lower system
cost. It requires the user to compensate the system. A narrow
bandwidth error amplifier usually does not require external
compensation but it requires more output capacitance to
meet typical transient requirements.
The output of the error amplifier is available for frequency
compensation. A capacitor (CCOMP) can be placed between
the DRV and FB pins. In most cases the resistor is not
needed. The uncompensated error amplifier dominant pole
is approximately 1.65 Hz. Any external capacitance
between the DRV and FB pins reduces the dominant pole
frequency due to the Miller multiplication effect. Equation
2 relates the dominant pole frequency to CCOMP
.
fpole +6.7016 @CCOMP*0.846 (eq. 2)
EXTERNAL ENABLE
The EN input allows the NCP102 to be remotely enabled.
An internal 10 mA (typ.) current source pulls up the EN
voltage. The EN pin is internally pulled to VCC or 9.5 V,
whichever is lower.
The controller is enabled once the EN pin voltage exceeds
0.8 V (typ.). The controller is disabled by pulling down on
the EN pin. Figure 12 shows the relationship between enable
and soft-start.
Figure 12. Relationship Between Enable and
Soft-Start
EN
SOFT-S
Vout
tSOFT-S
The EN pin can be connected to VCC if the enable feature
is not used. If connected to VCC and VCC is higher than 9.5 V
a resistor in series should be used to limit the current into the
EN pin as the pin is internally clamped to 9.5 V. A minimum
of 40 kW is recommended.
TIC.T___ I: 3.3 a a Ic:|___ CI: LT... I. Hi _ U E El _
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SOFT-START
Soft-start reduces inrush current and overshoot of the
output voltage. The adjustable soft-start built into the
NCP102 allows the user to select the optimum soft-start
time for the application. The soft-start time is set with a
capacitor from the SOFT-S pin to ground.
Soft-start is achieved by controlling the slope of the DRV
voltage based on the slope of the soft-start capacitor voltage,
CSOFT-S. The capacitor is charged to VCC with a constant
4.5 mA (typ.) current source, ISOFT-S. This results in a linear
charge of the soft-start capacitor and thus the output voltage.
The soft-start period, tSOFT-S, ends once the capacitor
voltage reaches 0.8 V (typ). The soft-start capacitor is
calculated using Equation 3.
tSOFT*S+ǒcSOFT*S@0.8
ISOFT*SǓ(eq. 3)
The soft-start capacitor is internally pulled to GND when
VCC is not within its operating range or the controller is
disabled using the EN pin.
POWER SEQUENCING
Power sequencing can be easily implemented using the
SOFT-S and EN pins. This is achieved by directly
connecting the SOFT-S pin of the master controller to the
EN pin of the slave controller. If VCC is above 9.5 V a
resistor divider is required to limit the voltage on the EN pin
because the pin is internally clamped to 9.5 V. Figure 13
shows the timing waveforms of the master and slave
controllers.
Figure 13. Power-up Sequencing Waveforms
Vout (slave)
Soft-Start (slave)
Soft-Start (master)
Vout (master)
Power sequencing will affect the soft-start time
calculated using Equation 3 because the soft-start capacitor
charge current is now increased by the enable charge current.
The soft-start time is calculated using Equation 3 by
replacing ISOFT-S with the sum of IEN and ISOFT-S.
APPLICATION INFORMATION
ON Semiconductor provides an electronic design tool, a
demonstration board and an application note to facilitate
design using the NCP102 and to reduce development cycle
time. All the tools can be downloaded at www.onsemi.com.
The electronic design tool allows the user to easily
determine most of the system parameters of a linear
regulator. The tool also evaluates the frequency response of
the system. The demonstration board is designed to generate
a 1.2V/3 A voltage supply from a 1.8 V supply. The circuit
schematic is shown in Figure 14 and the regulator design is
described in Application Note AND8303.
GND
EN
1
FB
2
3
6
5
4
R3
R4
C1
C8
C3
DRV
SOFT-S
R1
C4
U1
C7
Q1
R5
R2
C9
C5
C10 C6
Q2
R6
R7
C11
Q3
R8
J2
TP2
J3
TP12
TP5
TP6
TP7
TP6a
J1
TP1
TP3
TP4
J5
J4
TP9
TP10
TP11
TP8
J6
GND
TP2a
ENABLE
VCC
VCC
Vin
Vout
Figure 14. Circuit Schematic
365 k
010 k
20 k
100
470 4.7
1 k
100 p 10 k
MMBT3904
NCP102
0.01
0.01
100 p
200
1000 4.7 0.1
0.1
Open
NTD40N03
fife on Samicandumnv and J
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PACKAGE DIMENSIONS
TSOP-6
CASE 318G-02
ISSUE M
23
456
A
L
1
S
G
D
B
H
C
0.05 (0.002)
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A0.1142 0.12202.90 3.10
B0.0512 0.06691.30 1.70
C0.0354 0.04330.90 1.10
D0.0098 0.01970.25 0.50
G0.0335 0.04130.85 1.05
H0.0005 0.00400.013 0.100
J0.0040 0.01020.10 0.26
K0.0079 0.02360.20 0.60
L0.0493 0.06101.25 1.55
M0 10 0 10
S0.0985 0.11812.50 3.00
____
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. MAXIMUM LEAD THICKNESS INCLUDES
LEAD FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS
OF BASE MATERIAL.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
M
J
K
0.95
0.037
1.9
0.075
0.95
0.037
ǒmm
inchesǓ
SCALE 10:1
1.0
0.039
2.4
0.094
0.7
0.028
*For additional information on our Pb-Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
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to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
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NCP102/D
The products described herein (NCP102), may be covered by one or more of the following U.S. patents: 7,307,476. There may be other patents pending.
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