74HC4049 Datasheet by NXP USA Inc.

View All Related Products | Download PDF Datasheet
1. General description
The 74HC4049 is a hex inverter with over-voltage tolerant inputs. Inputs are overvoltage
tolerant to 15 V. This enables the device to be used in HIGH-to-LOW level shifting
applications.
2. Features and benefits
Low-power dissipation
Complies with JEDEC standard no. 7A
ESD protection:
HBM JESD22-A114F exceeds 2 000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from 40 Cto+85C and from 40 Cto+125C
3. Ordering information
74HC4049
Hex inverting HIGH-to-LOW level shifter
Rev. 6 — 8 January 2013 Product data sheet
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74HC4049N 40 C to +125 C DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4
74HC4049D 40 C to +125 C SO16 plastic small outline package; 16 leads; body width
3.9 mm SOT109-1
74HC4049DB 40 C to +125 C SSOP16 plastic shrink small outline package; 16 leads;
body width 5.3 mm SOT338-1
74HC4049PW 40 C to +125 C TSSOP16 plastic thin shrink small outline package; 16 leads;
body width 4.4 mm SOT403-1
jjjjjjjj O :::::::: e jjjjjjjj EEEEEEEE
74HC4049 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 6 — 8 January 2013 2 of 15
NXP Semiconductors 74HC4049
Hex inverting HIGH-to-LOW level shifter
4. Functional diagram
5. Pinning information
5.1 Pinning
Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram (one level
shifter)
001aai331
3
1A 1Y
2
5
2A 2Y
4
7
3A 3Y
6
9
4A 4Y
10
11
5A 5Y
12
14
6A 6Y
15
001aan374
14 V1/V2 15
11 V1/V2 12
9V1/V2 10
7V1/V2 6
5V1/V2 4
3V1/V2 2
mna341
AY
Fig 4. Pin configuration DIP16 and SO16 Fig 5. Pin configuration SSOP16 and TSSOP16
74HC4049
VCC n.c.
1Y 6Y
1A 6A
2Y n.c.
2A 5Y
3Y 5A
3A 4Y
GND 4A
001aan372
1
2
3
4
5
6
7
8
10
9
12
11
14
13
16
15
74HC4049
VCC n.c.
1Y 6Y
1A 6A
2Y n.c.
2A 5Y
3Y 5A
3A 4Y
GND 4A
001aan373
1
2
3
4
5
6
7
8
10
9
12
11
14
13
16
15
74HC4049 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 6 — 8 January 2013 3 of 15
NXP Semiconductors 74HC4049
Hex inverting HIGH-to-LOW level shifter
5.2 Pin description
6. Functional description
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
7. Limiting values
[1] For DIP16 package: Ptot derates linearly with 12 mW/K above 70 C.
[2] For SO16 package: Ptot derates linearly with 8 mW/K above 70 C.
For SSOP16 and TSSOP16 packages: Ptot derates linearly with 5.5 mW/K above 60 C.
Table 2. Pin description
Symbol Pin Description
VCC 1 supply voltage
1Y to 6Y 2, 4, 6, 10, 12, 15 output
1A to 6A 3, 5, 7, 9, 11, 14 input
GND 8 ground (0 V)
n.c. 13, 16 not connected
Table 3. Function table [1]
Input Output
nA nY
LH
HL
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage 0.5 +7 V
VIK input clamping voltage 0.5 +16 V
IIK input clamping current VI < 0.5 V 20 - mA
IOK output clamping current VO<0.5 V or VO>V
CC +0.5V - 20 mA
IOoutput current VO = 0.5 V to (VCC +0.5V) - 25 mA
ICC supply current - +50 mA
IGND ground current - 50 mA
Tstg storage temperature 65 +150 C
Ptot total power dissipation DIP16 package [1] - 750 mW
SO16, SSOP16 and TSSOP16 packages [2] - 500 mW
74HC4049 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 6 — 8 January 2013 4 of 15
NXP Semiconductors 74HC4049
Hex inverting HIGH-to-LOW level shifter
8. Recommended operating conditions
9. Static characteristics
Fig 6. Input protection for the 74HC4049
001aan375
100 Ω
D1
polysilicon
resistor
to logic
circuit
input
GND
Table 5. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V)
Symbol Parameter Conditions Min Typ Max Unit
VCC supply voltage 2.0 5.0 6.0 V
VIinput voltage 0 - 15 V
VOoutput voltage 0 - VCC V
Tamb ambient temperature 40 +25 +125 C
t/V input transition rise and fall rate VCC = 2.0 V; VI= 2.0 V - - 625 ns/V
VCC = 4.5 V; VI= 4.5 V - 1.67 139 ns/V
VCC = 6.0 V; VI= 6.0 V - - 83 ns/V
VCC = 6.0 V; VI= 10.0 V - - 81 ns/V
VCC = 6.0 V; VI= 15.0 V - - 83 ns/V
Table 6. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Tamb = 25 C Tamb = 40 C to
+85 CTamb = 40 C to
+125 CUnit
Min Typ Max Min Max Min Max
VIH HIGH-level
input voltage VCC = 2.0 V 1.5 1.3 - 1.5 - 1.5 - V
VCC = 4.5 V 3.15 2.4 - 3.15 - 3.15 - V
VCC = 6.0 V 4.2 3.1 - 4.2 - 4.2 - V
VIL LOW-level
input voltage VCC = 2.0 V - 0.7 0.5 - 0.5 - 0.5 V
VCC = 4.5 V - 1.8 1.35 - 1.35 - 1.35 V
VCC = 6.0 V - 2.3 1.8 - 1.8 - 1.8 V
VOH HIGH-level
output voltage VI=V
IH or VIL
IO=20 A; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V
IO=20 A; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V
IO=20 A; VCC = 6.0 V 5.9 6.0 - 5.9 - 5.9 - V
IO=4.0 mA; VCC = 4.5 V 3.98 - - 3.84 - 3.7 - V
IO=5.2 mA; VCC = 6.0 V 5.48 - - 5.34 - 5.2 - V
Figure 8 9 Figure 7 7 Figuve 7 7
74HC4049 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 6 — 8 January 2013 5 of 15
NXP Semiconductors 74HC4049
Hex inverting HIGH-to-LOW level shifter
10. Dynamic characteristics
VOL LOW-level
output voltage VI=V
IH or VIL
IO=20A; VCC = 2.0 V - - 0.1 - 0.1 - 0.1 V
IO=20A; VCC = 4.5 V - - 0.1 - 0.1 - 0.1 V
IO=20A; VCC = 6.0 V - - 0.1 - 0.1 - 0.1 V
IO= 4.0 mA; VCC = 4.5 V - - 0.26 - 0.33 - 0.4 V
IO= 5.2 mA; VCC = 6.0 V - - 0.26 - 0.33 - 0.4 V
IIinput leakage
current VI=V
CC or GND;
VCC =6.0V --0.1 - 1.0 - 1.0 A
VI= 15 V; VCC = 2.0 V to
6.0 V --0.5 - 5.0 - 5.0 A
ICC supply current VI= 15 V or GND; IO=0A;
VCC =6.0V --2.0- 20 - 40A
CIinput
capacitance -3.5- - - - -pF
Table 6. Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Tamb = 25 C Tamb = 40 C to
+85 CTamb = 40 C to
+125 CUnit
Min Typ Max Min Max Min Max
Table 7. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 8.
Symbol Parameter Conditions Tamb = 25 C Tamb = 40 C
to +85 CTamb = 40 C
to +125 CUnit
Min Typ Max Min Max Min Max
tpd propagation
delay nA to nY; see Figure 7 [1]
VCC = 2.0 V - 28 85 - 105 - 130 ns
VCC = 4.5 V - 10 17 - 21 - 26 ns
VCC =5V; C
L=15pF - 8 - - - - - ns
VCC = 6.0 V - 8 14 - 18 - 22 ns
tttransition
time Yn; see Figure 7 [2]
VCC = 2.0 V - 19 75 - 95 - 110 ns
VCC = 4.5 V - 7 15 - 19 - 22 ns
VCC = 6.0 V - 6 13 - 16 - 19 ns
Figure 8
74HC4049 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 6 — 8 January 2013 6 of 15
NXP Semiconductors 74HC4049
Hex inverting HIGH-to-LOW level shifter
[1] tpd is the same as tPLH and tPHL.
[2] tt is the same as tTHL and tTLH.
[3] CPD is used to determine the dynamic power dissipation (PD in W).
PD=C
PD VCC2fiN+(CLVCC2fo) where:
fi = input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CLVCC2fo) = sum of outputs.
11. Waveforms
CPD power
dissipation
capacitance
CL=50pF;f=1 MHz;
VI=GNDtoV
CC
[3] -14- - - - -pF
Table 7. Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 8.
Symbol Parameter Conditions Tamb = 25 C Tamb = 40 C
to +85 CTamb = 40 C
to +125 CUnit
Min Typ Max Min Max Min Max
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 7. The input (nA) to output (nY) propagation delays
Table 8. Measurement points
Type Input Output
VMVM
74HC4049 0.5VCC 0.5VCC
E | MI
74HC4049 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 6 — 8 January 2013 7 of 15
NXP Semiconductors 74HC4049
Hex inverting HIGH-to-LOW level shifter
Test data is given in Table 9.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistance.
S1 = Test selection switch.
Fig 8. Test circuit for measuring switching times
001aah768
tW
tW
tr
tr
tf
VM
VI
negative
pulse
GND
VI
positive
pulse
GND
10 %
90 %
90 %
10 %
VMVM
VM
tf
VCC
DUT
RT
VIVO
CL
G
Table 9. Test data
Type Input Load Test
VItr, tfCL
74HC4049 VCC 6.0 ns 15 pF, 50 pF tPLH, tPHL
T l3 \ f N1 ‘ DH" 3 LlU ‘ “ + »D« +7 mfifimflhflhl ,y ,,,,,, + ,,,,,,, H \ mmmwwmwu
74HC4049 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 6 — 8 January 2013 8 of 15
NXP Semiconductors 74HC4049
Hex inverting HIGH-to-LOW level shifter
12. Package outline
Fig 9. Package outline SOT38-4 (DIP16)
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
SOT38-4 95-01-14
03-02-13
MH
c
(e )
1
ME
A
L
seating plane
A1
wM
b1
b2
e
D
A2
Z
16
1
9
8
E
pin 1 index
b
0 5 10 mm
scale
Note
1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
UNIT A
max. 12 b1(1) (1) (1)
b2cD E e M Z
H
L
mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
min. A
max. bmax.
w
ME
e1
1.73
1.30 0.53
0.38 0.36
0.23 19.50
18.55 6.48
6.20 3.60
3.05 0.2542.54 7.62 8.25
7.80 10.0
8.3 0.764.2 0.51 3.2
inches 0.068
0.051 0.021
0.015 0.014
0.009
1.25
0.85
0.049
0.033 0.77
0.73 0.26
0.24 0.14
0.12 0.010.1 0.3 0.32
0.31 0.39
0.33 0.030.17 0.02 0.13
DIP16: plastic dual in-line package; 16 leads (300 mil) SOT38-4
W FEHHHHHHH 7/ HHEPDEJH H HJH ifi
74HC4049 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 6 — 8 January 2013 9 of 15
NXP Semiconductors 74HC4049
Hex inverting HIGH-to-LOW level shifter
Fig 10. Package outline SOT109-1 (SO16)
X
wM
θ
A
A1
A2
bp
D
HE
Lp
Q
detail X
E
Z
e
c
L
vMA
(A )
3
A
8
9
1
16
y
pin 1 index
UNIT A
max. A1A2A3bpcD
(1) E(1) (1)
eH
ELL
pQZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm
inches
1.75 0.25
0.10 1.45
1.25 0.25 0.49
0.36 0.25
0.19 10.0
9.8 4.0
3.8 1.27 6.2
5.8 0.7
0.6 0.7
0.3 8
0
o
o
0.25 0.1
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
1.0
0.4
SOT109-1 99-12-27
03-02-19
076E07 MS-012
0.069 0.010
0.004 0.057
0.049 0.01 0.019
0.014
0.0100
0.0075 0.39
0.38 0.16
0.15 0.05
1.05
0.041
0.244
0.228 0.028
0.020 0.028
0.012
0.01
0.25
0.01 0.004
0.039
0.016
0 2.5 5 mm
scale
SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
\, l )& H \\ // 4—] E-I EQW
74HC4049 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 6 — 8 January 2013 10 of 15
NXP Semiconductors 74HC4049
Hex inverting HIGH-to-LOW level shifter
Fig 11. Package outline SOT338-1 (SSOP16)
UNIT A1A2A3bpcD
(1) E(1) eH
ELL
pQZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.21
0.05 1.80
1.65 0.25 0.38
0.25 0.20
0.09 6.4
6.0 5.4
5.2 0.65 1.25
7.9
7.6 1.03
0.63 0.9
0.7 1.00
0.55 8
0
o
o
0.130.2 0.1
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
SOT338-1 99-12-27
03-02-19
(1)
wM
bp
D
HE
E
Z
e
c
vMA
X
A
y
18
16 9
θ
A
A1
A2
Lp
Q
detail X
L
(A )
3
MO-150
pin 1 index
0 2.5 5 mm
scale
SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1
A
max.
2
‘ ii. F 7 :J ; x71 .m ‘ “‘7 \ /‘/E-l T a HHHyHHHF + ‘ 7“ _ ‘ 5 i I ’64?” L%%\E*;j i WSW H H} Ea EQW
74HC4049 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 6 — 8 January 2013 11 of 15
NXP Semiconductors 74HC4049
Hex inverting HIGH-to-LOW level shifter
Fig 12. Package outline SOT403-1 (TSSOP16)
UNIT A1A2A3bpcD
(1) E(2) (1)
eH
ELL
pQZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.15
0.05 0.95
0.80 0.30
0.19 0.2
0.1 5.1
4.9 4.5
4.3 0.65 6.6
6.2 0.4
0.3 0.40
0.06 8
0
o
o
0.13 0.10.21
DIMENSIONS (mm are the original dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
0.75
0.50
SOT403-1 MO-153 99-12-27
03-02-18
wM
bp
D
Z
e
0.25
18
16 9
θ
A
A1
A2
Lp
Q
detail X
L
(A )
3
HE
E
c
vMA
X
A
y
0 2.5 5 mm
scale
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1
A
max.
1.1
pin 1 index
74HC4049 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 6 — 8 January 2013 12 of 15
NXP Semiconductors 74HC4049
Hex inverting HIGH-to-LOW level shifter
13. Abbreviations
14. Revision history
Table 10. Abbreviations
Acronym Description
CMOS Complementary Metal Oxide Semiconductor
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
MM Machine Model
Table 11. Revision history
Document ID Release date Data sheet status Change notice Supersedes
74HC4049 v.6 20130108 Product data sheet - 74HC4049 v.5
Modifications: New general description.
74HC4049 v.5 20120803 Product data sheet - 74HC4049 v.4
Modifications: Measurement points added to figure 7 (errata).
74HC4049 v.4 20111212 Product data sheet - 74HC4049 v.3
74HC4049 v.3 20101230 Product data sheet - 74HC4049_CNV v.2
74HC4049_CNV v.2 19970827 Product specification - -
74HC4049 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 6 — 8 January 2013 13 of 15
NXP Semiconductors 74HC4049
Hex inverting HIGH-to-LOW level shifter
15. Legal information
15.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
15.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
15.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
: hitE:I/www.nxg.com salesaddresses®nx9£0m
74HC4049 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 6 — 8 January 2013 14 of 15
NXP Semiconductors 74HC4049
Hex inverting HIGH-to-LOW level shifter
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
15.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
16. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
NXP Semiconductors 74HC4049
Hex inverting HIGH-to-LOW level shifter
© NXP B.V. 2013. All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 8 January 2013
Document identifier: 74HC4049
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
17. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 1
4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
5 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
6 Functional description . . . . . . . . . . . . . . . . . . . 3
7 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
8 Recommended operating conditions. . . . . . . . 4
9 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4
10 Dynamic characteristics . . . . . . . . . . . . . . . . . . 5
11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8
13 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 12
14 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 12
15 Legal information. . . . . . . . . . . . . . . . . . . . . . . 13
15.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13
15.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
15.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
15.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 14
16 Contact information. . . . . . . . . . . . . . . . . . . . . 14
17 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Products related to this Datasheet

IC INVERTER 6CH 6-INP 16DIP