ICE5QSAG Datasheet by Infineon Technologies

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ICE5QSAG
Quasi-Resonant Controller
Product Highlights
Novel Quasi-resonant operation and proprietary implementation for low EMI
Enhanced Active Burst Mode with selectable entry and exit standby power
Active Burst Mode to reach the lowest standby power <100 mW
Fast startup achieved with cascode configuration
Digital frequency reduction for better overall system efficiency
Robust line protection with input OVP and brownout
Comprehensive protection
Pb-free lead plating, halogen free mold compound, RoHS compliant
Features
Minimum switching frequency difference between low & high
line for higher efficiency & better EMI
Enhanced Active Burst Mode with selectable entry and exit
standby power
Active Burst Mode to reach the lowest standby power <100 mW
Fast startup achieved with cascode configuration
Digital frequency reduction up to 10 zero crossings
Built-in digital soft start
Cycle-by-cycle peak current limitation
Maximum on/off time limitation to avoid audible noise during
start up and power down
Robust line protection with input OVP and brownout
Auto restart mode protection for VCC Over Voltage, VCC Under
Voltage, Over load/Open Loop, Output Over Voltage, Over
Temperature and CS (Current Sense) short to GND
Limited charging current for VCC short to GND
Pb-free lead plating, halogen free mold compound, RoHS
compliant
Applications
Auxiliary power supply for Home Appliances/white Goods, TV,
PC & Server
Blu-ray player, Set-top box & LCD/LED Monitor
Description
The Quasi-Resonant, ICE5QSAG is the 5th generation of quasi-
resonant controller optimized for off-line switch power supply in
cascode configuration. The improved digital frequency reduction
with proprietary novel Quasi-Resonant operation offers lower EMI
and higher efficiency for wide AC range by reducing the switching
frequency difference between low and high line. The enhanced
active burst mode enables flexibility in standby power range
selection. The product has a wide operating range (10~25.5 V) of
IC power supply and lower power consumption. The numerous
protection functions including the robust line protection (both
input OVP and brownout) to support the protections of the power
supply system in failure situations. All of these make the
ICE5QSAG an outstanding controller for Quasi-Resonant flyback
converter in the market.
85 ~ 300 VAC
Snubber
Cbus
Dr1~Dr4
RCS
CVCC
DVCC
Power
MOSFET
RVCC
SOURCE
Zero Crossing
Detection
Power Management
Cycle-by-Cycle
current limitation
Active Burst Mode
PWM controller
Current Mode Control
Digital Control
VCC
CS
ICE5QSAG
Controller
FB
GND
VIN
RI1
RI2
Gate
Driver
Protections
RSTARTUP
ZCD
TL431
Optocoupler
Rb1 Rb2
Rc1
Cc1 Cc2
Rovs2
Rovs1
DO1 CO1
Lf1 Cf1 VO1
CPS
DO2 CO2
Lf2 Cf2 VO2
Wp
Wa
Ws1
Ws2
# RSel
RZC
DZC
CZC
# Optional
RSel (Burst mode level 2)
Rovs3 (V02 feedback)
RZCD
# Rovs3
D
GATE
Figure 1 Typical application
Table 1 Output Power of 5th generation Quasi-Resonant Controller
Type
Package
Marking
220VAC ±20%1
ICE5QSAG
PG-DSO-8
5QSAG
109 W
1
Calculated maximum output power rating in an open frame design at Ta=50°C, TJ=125°C. The output power figure is for reference
purpose only. The actual power can vary depending on particular designs. Please contact to a technical expert from Infineon for more
information.
PG-DSO-8
Q Qflneon Table of Contents
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Quasi-Resonant Controller
Table of Contents
Table of Contents
Product Highlights .......................................................................................................................... 1
Features ........................................................................................................................................ 1
Applications ................................................................................................................................... 1
Description .................................................................................................................................... 1
1 Pin Configuration and Functionality ......................................................................................... 4
2 Representative Block Diagram ................................................................................................. 5
3 Functional Description ............................................................................................................ 6
3.1 VCC Pre-Charging and Typical VCC Voltage during Start-up ..................................................................... 6
3.2 Soft-start .................................................................................................................................................. 6
3.3 Normal Operation ................................................................................................................................... 7
3.3.1 Digital Frequency Reduction ............................................................................................................. 7
3.3.1.1 Minimum ZC Count Determination .............................................................................................. 7
3.3.1.2 Up/down counter .......................................................................................................................... 7
3.3.1.3 Zero crossing (ZC counter) ........................................................................................................... 8
3.3.2 Ringing suppression time .................................................................................................................. 9
3.3.2.1 Switch on determination .............................................................................................................. 9
3.3.3 Switch off determination ................................................................................................................... 9
3.3.4 Modulated gate drive ....................................................................................................................... 10
3.4 Current limitation .................................................................................................................................. 10
3.5 Active Burst Mode with selectable power level .................................................................................... 11
3.5.1 Entering Active Burst Mode Operation ............................................................................................ 11
3.5.2 During Active Burst Mode Operation ............................................................................................... 12
3.5.3 Leaving Active Burst Mode Operation ............................................................................................. 12
3.6 Protection Functions ............................................................................................................................. 13
3.6.1 Line Over Voltage ............................................................................................................................. 13
3.6.2 Brownout .......................................................................................................................................... 13
3.6.3 VCC Ovder Voltage or Under Voltage ................................................................................................. 13
3.6.4 Over Load ......................................................................................................................................... 13
3.6.5 Output Over Voltage ........................................................................................................................ 14
3.6.6 Over Temperature ............................................................................................................................ 14
3.6.7 CS Short to GND ............................................................................................................................... 14
4 Electrical Characteristics ....................................................................................................... 16
4.1 Absolute Maximum Ratings .................................................................................................................. 16
4.2 Operating Range .................................................................................................................................... 16
4.3 Operating Conditions ............................................................................................................................ 17
4.4 Internal Voltage Reference.................................................................................................................... 17
4.5 Gate Driver ............................................................................................................................................. 17
4.6 PWM Section .......................................................................................................................................... 18
4.7 Current Sense ........................................................................................................................................ 18
4.8 Soft Start ................................................................................................................................................ 18
4.9 Digital Zero Crossing ............................................................................................................................. 19
4.10 Active Burst Mode .................................................................................................................................. 19
4.11 Line Over Voltage Protection ................................................................................................................ 20
4.12 Brownout Protection ............................................................................................................................. 20
4.13 VCC Over Voltage Protection .................................................................................................................. 20
4.14 Over Load Protection ............................................................................................................................ 20
4.15 Output Over Voltage Protection ........................................................................................................... 21
Q Qflneon Table of Contents
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Quasi-Resonant Controller
Table of Contents
4.16 Thermal Protection ............................................................................................................................... 21
4.17 CS Short to GND Protection .................................................................................................................. 21
4.18 Low side MOSFET .................................................................................................................................. 21
5 Outline Dimension ................................................................................................................. 22
6 Marking ................................................................................................................................ 23
Revision history............................................................................................................................. 24
Q Inflneon Pin Configuration and Functionality E . En E En E En ll: Ell Feedback & Burst entry/exit control FB pin combines the fu nations of fee control and overload/open loop protection. Input Line OVP & Brownout Current Sense Zero Crossing Detection VCC(Positive Voltage Supply) Ground
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Quasi-Resonant Controller
Pin Configuration and Functionality
1 Pin Configuration and Functionality
The pin configuration is shown in Figure 2 and the functions are described in Table 2.
1
6
7
8
4
3
2
5
GNDFB
VIN
CS
VCC
SOURCE
ZCD GATE
PG-DSO-8
Figure 2 Pin Configuration
Table 2 Pin Definitions and Functions
Pin
Symbol
Function
1
FB
Feedback & Burst entry/exit control
FB pin combines the functions of feedback control, selectable burst entry/exit control
and overload/open loop protection.
2
VIN
Input Line OVP & Brownout
VIN pin is connected to the bus via resistor divider (see Figure 1) to sense the line
voltage. This pin combines the functions of input Line OVP, Brownout, minimum
and maximum ZC count setting for low and high line.
3
CS
Current Sense
The CS pin is connected to the shunt resistor for the primary current sensing
externally and to the PWM signal generator block for switch-off determination
(together with the feedback voltage) internally. Moreover, CS pin short to ground
protection is sensed by this pin.
4
ZCD
Zero Crossing Detection
ZCD pin combines the functions of start up, zero crossing detection and output
over voltage protection. During the start up, it is used to provide a voltage level to
the gate of power switch Q1 (see Figure 1) to charge VCC capacitor.
5
GATE
Gate Drive Output
This output signal drives the external main power switch Q1 (see Figure 1).
6
SOURCE
SOURCE
The SOURCE pin is connected to the source of external power switch Q1 (see
Figure 1) which is in series connection with internal low side MOSFET and internal
VCC diode D.
7
VCC
VCC(Positive Voltage Supply)
The VCC pin is the positive voltage supply to the IC. The operating range is
between VVCC_OFF and VVCC_OVP.
8
GND
Ground
The GND pin is the common ground of the controller.
Q infineon Representative Block Diagram
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Quasi-Resonant Controller
Representative Block Diagram
2 Representative Block Diagram
Brown In / Out Thermal Protection
LOVP
1
G2
1
G7
R
SQ
Autorestart
Protect
R
SQ
Autorestart
Protect
Protection
RFB
1
G3
25kΩ
2pF
D1 &
G1
&
G5
1
G4
tFB_BEB
&
G6
Active Burst Block
FB
C11
VFB_BOff
C1
VZCD_RS
fSB
OSC
Active
Burst Mode
Counter
tCOUNT
C2
VZCD_CT
Up/down counter
ZC counter
clk
Comparator
Soft-start
Ringing
Suppression
VREF
R
S
Q
G8
&
G9
SOURCE
CS
VCC
Gate
Drive
GPWM
PWM OP
Current Mode
PWM
Comparator
VPWM
Voltage
Reference
Undervoltage Lockout
16V
10V
50us
Internal
Bias
Power Management
TOnMax
Regulation
Current Limiting/ Current Sense short to Gnd Protection
10kΩ
D2
1pF
Peak
Current
Limit
C13
PWM Control
Zero Crossing
Gate Driver
GND
en
C12
VVCC_OVP
TOffMax
Tj > Tjcon_OTP
C7a
VVIN_LOVP
R
SQ
Autorestart
Protect
Input
OVP
Mode
250 µs
Blanking
time
VCS_FB
C16b
VVIN_BI
R
SQ
Autorestart
Protect
Brown
Out
Mode
250 µs
Blanking
time
ZCD
VCS_BL1
VCS_N
VCS_BL2
C8
VVIN_REF
C16a
VVIN_BO
VFB_EBL1
VFB_EBL2
R
SQ
Autorestart
Protect
Tj < Tjcon_OTP-TjHYS_OTP
OTP
Mode
50 µs
Blanking
time
D3
Gate
Drive
C17 VCS_STG
Delay
tCS_STG_SAM
C6
VZCD_OVP Counter
PZCD_OVP_B
tVIN_REF RZCD
C15
C20
V1
GATE
VIN
C10
VFB_BOn
C4
C3
C5
VFB_R
C12
VFB_OLP/
VFB_LB
tFB_OLP_B
VFB_HLC
VFB_LHC
Leading
Edge
Blanking
tCS_LEB
Burst
Mode
detect
Burst Mode
Level Select
C9
Figure 3 Representative Block Diagram
Q Functional Description @
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Quasi-Resonant Controller
Functional Description
3 Functional Description
3.1 VCC Pre-Charging and Typical VCC Voltage during Start-up
As shown in Figure 1, once the line input voltage is applied, a rectified voltage appears across the capacitor
CBUS. The pull up resistor RSTARTUP provides a current to charge the Ciss (input capacitance) of CoolMOS™ and
gradually generate one voltage level. If the voltage over Ciss is high enough, CoolMOS™ on and VCC capacitor will
be charged through primary inductance of transformer LP, CoolMOS™ and internal diode D3 with two steps
constant current source IVCC_ Charge1
1
and IVCC_ Charge31.
A very small constant current source (IVCC_Charge1) is charged to the VCC capacitor till VCC reach VCC_SCP to protect
the controller from VCC pin short to ground during the start up. After this, the second step constant current
source (IVCC_Charge3) is provided to charge the VCC capacitor further, until the VCC voltage exceeds the turned-on
threshold VVCC_ON. As shown in the time phase I in Figure 4, the VCC voltage increase almost linearly with two
steps.
(VVCC_ON )16V
VVCC
(VVCC_OFF) 10V
t
tAtB
(VVCC_SCP) 1.1V
IVCC_Charge2/3) -3/-3.2mA
IVCC
t
(IVCC_Normal) 0.9mA
(IVCC_Cha rge1) -0.2mA
-IVCC
0
t1 t2
III III
Figure 4 VCC voltage and current at start up
The time taking for the VCC pre-charging can then be approximately calculated as:
  
  


  
  

(1)
When the VCC voltage exceeds the VCC turned on threshold VVCC_ON at time t1, the IC begins to operate with soft
start. Due to power consumption of the IC and the fact that there is still no energy from the auxiliary winding to
charge the VCC capacitor before the output voltage is built up, the VCC voltage drops (Phase II). Once the output
voltage is high enough, the VCC capacitor receives the energy from the auxiliary winding from the time t2 onward
and delivering the IVCC_ Normal
2
to the controller. The VCC then will reach a constant value depending on output
load.
3.2 Soft-start
As shown in Figure 5, at the time ton, the IC begins to operate with a soft-start. By this soft-start the switching
stresses for the MOSFET, diode and transformer are minimized. The soft-start implemented in ICE5QSAG is a
digital time-based function. The preset soft-start time is tSS (12 ms) with 4 steps. If not limited by other
functions, the peak voltage on CS pin will increase step by step from 0.3 V to 1 V finally. During the first 3 ms of
1
IVCC_ Charge1/2/3 is charging current from the controller to VCC capacitor during start up
2
IVCC_ Normal is supply current from VCC capacitor or auxiliary winding to the controller during normal operation
Q infineon Functional Description
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Quasi-Resonant Controller
Functional Description
soft start, the ringing suppression time is set to 25 µs to avoid irregular switching due to switch off oscillation
noise.
ton 3 6 9 12
0.30
0.45
0.60
0.75
VCS_Peak
Vcs (V)
Time(ms)
Figure 5 Maximum current sense voltage during soft start
3.3 Normal Operation
During normal operation, the ICE5QSAG works with a digital signal processing circuit composing an up/down
counter, a zero-crossing counter (ZC counter) and a comparator, and an analog circuit composing a current
measurement unit and a comparator. The switch-on and -off time points are each determined by the digital
circuit and the analog circuit, respectively. The input information of the zero-crossing signal and the value of
the up/down counter are needed to determine the switch-on while the feedback signal VFB and the current
sensing signal VCS are necessary for the switch-off determination.
Details about the full operation of the controller in normal operation are illustrated in the following
paragraphs.
3.3.1 Digital Frequency Reduction
As mentioned above, the digital signal processing circuit consists of an up/down counter, a ZC counter and a
comparator. These three parts are the key to implement digital frequency reduction with decreasing load. In
addition, a ringing suppression time controller is implemented to avoid mis-triggering by the high frequency
oscillation, when the output voltage is very low under conditions such as soft start period or output short
circuit. Functionality of these parts is described as in the following.
3.3.1.1 Minimum ZC Count Determination
To reduce the switching frequency difference between low and high line, minimum ZC count determination is
implemented. Minimum ZC count is set to 1 if VIN less than VVIN_REF which represents for low line. For high line,
minimum ZC count is set to 3 after VIN higher than VVIN_REF. There is also a hysteresis VVIN_REF with certain blanking
time tVIN_REF for stable AC line selection between low and high line.
3.3.1.2 Up/down counter
The up/down counter stores the number of the zero crossing which determines valley numbers to switch-on
the main MOSFET after demagnetization of the transformer. This value is fixed according to the feedback
voltage, VFB, which contains information about the output power. Indeed, in a typical peak current mode
control, a high output power results in a high feedback voltage, and a low output power leads to a low
feedback voltage. Hence, according to VFB, the value in the up/down counter is changed to vary the power
Q infineon Functional Description
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Quasi-Resonant Controller
Functional Description
MOSFET off-time according to the output power. In the following, the variation of the up/down counter value
according to the feedback voltage is explained.
The feedback voltage VFB is internally compared with three threshold voltages VFB_LHC, VFB_HLC and VFB_R at each
clock period of 48 ms. The up/down counter counts then upward, keep unchanged or count downward, as
shown in 0.
Table 3 Operation of up/down counter
VFB
up/down counter action
Always lower than VFB_LHC
Count upwards till n=8/101
Once higher than VF_LHC, but always lower than VFB_HLC
Stop counting, no value changing
Once higher than VFB_HLC, but always lower than VFB_R
Count downwards till n=1/32
Once higher than VFB_R
Set up/down counter to n=1/32
The number of zero crossing is limited and therefore, the counter varies among 1 to 8 (for low line) or 3 to 10
(for high line) and any attempt beyond this range is ignored. When VFB exceeds VFB_R voltage, the up/down
counter is reset to 1 (low line) and 3 (high line) in order to allow the system to react rapidly to a sudden load
increase. The up/down counter value is also reset to 1 (low line) and 3 (high line) at the start-up time, to ensure
an efficient maximum load start up. Figure 6 shows some examples on how up/down counter is changed
according to the feedback voltage over time.
The use of two different thresholds VFB_LHC and VFB_HLC to count upward or downward is to prevent frequency
jittering when the feedback voltage is close to the threshold point.
1Case 3
Case 2
Case 1
Up/down
counter
n
n+1
n+2
n+3
n+3
n+3
n+2
n+1
n
5 6 7 8 8 8 7 6 5
1
1
2 3 4 5 5 5 4 3 2
8 8 8 8 8 8 7 6 5
t
t
VFB
VFB,R1
VFB,HLC
VFB,LHC
clock T=48ms
1
3Case 3
Case 2
Case 1
Up/down
counter
n
n+1
n+2
n+3
n+3
n+3
n+2
n+1
n
6 7 8 9 9 9 8 7 6
3
3
4 5 6 7 7 7 6 5 4
10 10 10 10 10 10 9 8 7
t
t
VFB
VFB,R3
VFB,HLC
VFB,LHC
clock T=48ms
3
low line High line
Figure 6 Up/down counter operation
3.3.1.3 Zero crossing (ZC counter)
In the system, the voltage from the auxiliary winding is applied to the ZCD pin through a RC network, which
provides a time delay to the voltage from the auxiliary winding. Internally this pin is connected to a clamping
network, a zero-crossing detector, an output overvoltage detector and a ringing suppression time controller.
During on-state of the power switch, a positive gate drive voltage is applied to the ZCD pin due to RZCD resistor,
hence external diode DZC (see Figure 1) is added to block the negative voltage from the auxiliary winding.
1
n=8 (for low line) and n=10 (for high line)
2
n=1 (for low line) and n=3 (for high line)
Q infineon Functional Description V1 GPWM VCS VPWM
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Quasi-Resonant Controller
Functional Description
The ZC counter has a minimum value of 1 (for low line) or 3 (for high line) and maximum value of 8 (for low line)
or 10 (for high line). After the Q1 (see Figure 1) is turned off, every time when the falling voltage ramp of on ZCD
pin crosses the VZCD_CT threshold, a zero crossing is detected and ZC counter will increase by 1. It is reset every
time after the DRIVER output is changed to high.
To achieve the switch on at voltage valley, the voltage from the auxiliary winding is fed to a time delay network
(the RC network consists of RZC and CZC as shown in Figure 1) before it is applied to the zero-crossing detector
through the ZCD pin. The needed time delay to the main oscillation signal Δt should be approximately one
fourth of the oscillation period, TOSC (by transformer primary inductor and drain-source capacitor) minus the
propagation delay from the detected zero-crossing to the switch-on of the main switch tdelay, theoretically:
  
 
(2)
This time delay should be matched by adjusting the time constant of the RC network which is calculated as:
   
 
(3)
3.3.2 Ringing suppression time
After Q1 (see Error! Reference source not found.) is turned off, there will be some oscillation on VDS, which will
also appear on the VZCD. To avoid mis-triggering by such oscillations to turn on the Q1, a ringing suppression
timer is implemented. This suppression time is depended on the voltage VZCD. If the voltage VZCD is lower than
the threshold VZCD_RS, a longer preset time tZCD_RS2 is applied. However, if the voltage VZCD is higher than the
threshold, a shorter time tZCD_RS1 is set.
3.3.2.1 Switch on determination
After the gate drive goes to low, it cannot be changed to high during ring suppression time.
After ring suppression time, the gate drive can be turned on when the ZC counter value is equal to up/down
counter value.
However, it is also possible that the oscillation between primary inductor and drain-source capacitor damps
very fast and IC cannot detect zero crossings event. In this case, a maximum off time is implemented. After gate
drive has been remained off for the period of TOffMax, the gate drive will be turned on again regardless of the ZC
counter values and VZCD. This function can effectively prevent the switching frequency from going lower than 20
kHz. Otherwise it will cause audible noise.
3.3.3 Switch off determination
In the converter system, the primary current is sensed by an external shunt resistor, which is connected
between source terminal of the internal MOSFET and the common ground. The sensed voltage across the shunt
resistor VCS is applied to an internal current measurement unit, and its output voltage V1 is compared with the
feedback voltage VFB. Once the voltage V1 exceeds the voltage VFB, the output flip-flop is reset. As a result, the
main power switch is switched off. The relationship between the V1 and the VCS is described by (see Figure 3):



(4)
To avoid mis-triggering caused by the voltage spike across the shunt resistor at the turn on of the main power
switch, a leading edge blanking time, tLEB, is applied to the output of the comparator. In other words, once the
gate drive is turned on, the minimum on time of the gate drive is the leading edge blanking time.
In addition, there is a maximum on time, tOnMax, limitation implemented in the IC. Once the gate drive has been
in high state longer than the maximum ON time, it will be turned off to prevent the switching frequency from
going too low because of long on time.
Q infineon Functional Description
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Quasi-Resonant Controller
Functional Description
In addition, there is a maximum on time, tOnMax, limitation implemented in the IC. Once the gate drive has been
in high state longer than the maximum on time, it will be turned off to prevent the switching frequency from
going too low because of long on time.
3.3.4 Modulated gate drive
The drive-stage is optimized for EMI consideration. The switch on speed is slowed down before it reaches the
CoolMOSTM turn on threshold. That is a slope control of the rising edge at the output of driver (see Figure 7).
Thus the leading switch spike during turn on is minimized.
t (ns)
5V
typ. t = 117ns
VGATE (V)
VGATE_HIGH
Figure 7 Gate rising waveform
3.4 Current limitation
There is a cycle by cycle current limitation realized by the current limit comparator to provide over-current
detection. The source current of the CoolMOSis sensed via a sense resistor RCS. By means of RCS the source
current is transformed to a sense voltage VCS which is fed into the pin CS. If the voltage VCS exceeds an internal
voltage limit, adjusted according to the Line voltage, the comparator immediately turns off the gate drive.
When the main bus voltage increases, the switch on time becomes shorter and therefore the operating
frequency is also increased. As a result, for a constant primary current limit, the maximum possible output
power is increased which is beyond the converter design limit.
To compensate such effect, both the internal peak current limit circuit (VCS) and the ZC count varies with the
bus voltage according to Figure 8.
VCS (V)
VVIN (V)
0.83
0.9
VCS_N, 1
1.29 VVIN_REF
Starting ZC = 1 Starting ZC = 3
Figure 8 Variation of the VCS limit voltage according to the VIN voltage
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Quasi-Resonant Controller
Functional Description
3.5 Active Burst Mode with selectable power level
At light load condition, the IC enters Active Burst Mode operation to minimize the power consumption. Details
about Active Burst Mode operation are explained in the following paragraphs.
The burst mode entry level can be selected by changing the different resistor RSel at FB pin. There are 2 levels to
be selected with different resistor which are targeted for low range of active burst mode power (Level 1) and
high range of active burst mode power (Level 2). The following table shows the control logic for the entry and
exit level with the FB voltage.
Table 4 Two levels entry and exit active burst mode power
Level
VFB
VCS
Entry level
Exit level
VFB_EBLX
VFB_LB
1
VFB > VREF_B
VCS_BL1 = 0.31 V
0.90 V
2.75 V
2
VFB < VREF_B
VCS_BL2 = 0.35 V
1.05 V
2.75 V
During IC first startup, the internal RefGOOD signal is logic low when VCC < 4 V. It will reset the Burst Mode level
Detection latch. When the Burst Mode Level Detection latch is low and IC is in OFF state, the IC internal RFB
resistor is disconnected from the FB pin and a current source Isel is turned on instead.
From Vcc=4 V to Vcc on threshold, the FB pin will start to charge to a voltage level associated with RSel resistor.
When Vcc reaches Vcc on threshold, the FB voltage is sensed. The burst mode thresholds are then chosen
according to the FB voltage level. The Burst Mode Level Detection latch is then set to high. Once the detection
latch is set high, any change of the FB level will not change the threshold selection. The current source Isel is
turned off in 2 μs after VCC reaches VCC on threshold and the RFB resistor is re-connected to FB pin (see Figure 9).
FB
Selection
Lo gic
Vdd
VCS_BLx
VFB _E BL x
Isel
Refgo o d
UVLO
Con trol unit
S1
S2
2μs
delay
R
S
Bu rst mo de
detection latch
RSel
Compare
logic
VREF_B
RFB
Figure 9 Burst mode detect and adjust
3.5.1 Entering Active Burst Mode Operation
For determination of entering Active Burst Mode operation, three conditions apply:
the feedback voltage is lower than the threshold of VFB_EBLX
the up/down counter is 8 for low line or 10 for high line and
the above two conditions remain after a certain blanking time tFB_BEB (20 ms).
Once all of these conditions are fulfilled, the Active Burst Mode flip-flop is set and the controller enters Active
Burst Mode operation. This multi-condition determination for entering Active Burst Mode operation prevents
mis-triggering of entering Active Burst Mode operation, so that the controller enters Active Burst Mode
operation only when the output power is really low during the preset blanking time.
Inflneon 0/ T4 ‘1‘ \\\\\\\t\\" \\\\\\\\\\\\\\\ Functional Description
Datasheet 12 of 25 V 2.0
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Quasi-Resonant Controller
Functional Description
3.5.2 During Active Burst Mode Operation
After entering the Active Burst Mode the feedback voltage rises as VO starts to decrease due to the inactive PWM
section. One comparator observes the feedback signal if the voltage level VFB_BOn is exceeded. In that case the
internal circuit is power up to restart with switching.
Turn-on of the power MOSFET is triggered by ZC counter with a fixed value of 8 ZC for low line and 10 ZC for
high line. Turn-off is resulted if the voltage across the shunt resistor at CS pin hits the threshold VCS_BLX.
If the output load is still low, the feedback signal decreases as the PWM section is operating. When feedback
signal reaches the low threshold VFB_BOff , the internal circuit is reset again and the PWM section is disabled until
next time VFB signal increases beyond the VFB_BOn threshold. In Active Burst Mode, the feedback signal is changing
like a saw tooth between VFB_BOff and VFB_BOn (see Figure 10).
3.5.3 Leaving Active Burst Mode Operation
The feedback voltage immediately increases if there is a high load jump. This is observed by a comparator with
threshold of VFB_LB. As the current limit is VCS_BLX (31% or 35%) during Active Burst Mode, a certain load is needed
so that feedback voltage can exceed VFB_LB. After leaving active burst mode, normal peak current control
through VFB is re-activated. In addition, the up/down counter will be set to 1 (low line) or 3 (high line)
immediately after leaving Active Burst Mode. This is helpful to minimize the output voltage undershoot.
VFB_EBx
VFB_BOn
VFB_LB
VFB
t
VCS_BLx
VCS_N
VCS
VVCC_OFF
VVCC t
t
VO
t
VFB_BOff
Time to 8th/10th ZC and
Blanking time (tFB_BEB)
Current limit level during
Active Burst Mode
Leaving Active
Burst Mode
Entering Active
Burst Mode
Max. Ripple < 1%
Figure 10 Signals in Active Burst Mode
Q infineon Functional Description
Datasheet 13 of 25 V 2.0
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Quasi-Resonant Controller
Functional Description
3.6 Protection Functions
The ICE5QSAG provides numerous protection functions which considerably improve the power supply system
robustness, safety and reliability. The following table summarizes these protection functions. There are 3
different kinds of protection mode; non switch auto restart, auto restart and odd skip auto restart. The details
can refer to the Figure 11, Figure 12 and Figure 13.
Table 5 Protection functions
Protection Functions
Normal Mode
Burst Mode
Protection Mode
Burst ON
Burst OFF
Line Over Voltage
Non switch Auto Restart
Brownout
Non switch Auto Restart
VCC Over Voltage
NA1
Odd skip Auto Restart
VCC Under Voltage
Auto Restart
Over Load
NA1
NA1
Odd skip Auto Restart
Output Over Voltage
NA1
Odd skip Auto Restart
Over Temperature
Non switch Auto Restart
CS Short to GND
NA1
Odd skip Auto Restart
3.6.1 Line Over Voltage
The AC Line Over Voltage Protection is detected by sensing bus capacitor voltage through VIN pin via 2 potential
divider resistors, Rl1 and Rl2 (see Figure 1). Once VVIN voltage is higher than the line over voltage threshold VVIN_LOVP, the
controller enters Line Over Voltage Protection and it releases the protection mode after VVIN is lower than VVIN_LOVP.
3.6.2 Brownout
The Brownout protection is observed by VIN pin similar to line over voltage Protection method with a different
voltage threshold level. When VVIN voltage is lower than the brownout threshold (VVIN_BO), the controller enters
Brownout Protection and it releases the protection mode after VVIN higher than brownin threshold (VVIN_BI).
3.6.3 VCC Ovder Voltage or Under Voltage
During operation, the VCC voltage is continuously monitored. In case of a VCC Over Voltage or Under Voltage,
the IC is reset and the main power switch is then kept off. After the VCC voltage falls below the threshold VVCC_OFF,
the new start up sequence is activated. The VCC capacitor is then charged up. Once the voltage exceeds the
threshold VVCC_ON, the IC begins to operate with a new soft-start.
3.6.4 Over Load
In case of open control loop or output Over Load, the feedback voltage will be pulled up and exceed VFB_OLP.
After a blanking time of tFB_OLP_B, the IC enters auto restart mode. The blanking time here enables the converter
to operate for a certain time during a sudden load jump.
1
Not Applicable
Q infineon Functional Description ‘mmi 1/ ¢ \1 LIIIIII ,
Datasheet 14 of 25 V 2.0
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Quasi-Resonant Controller
Functional Description
3.6.5 Output Over Voltage
During off-time of the power MOSFET, the voltage at the ZCD pin is monitored for Output Over Voltage
detection. If the voltage is higher than the preset threshold VZCD_OVP for 10 consecutive pulses, the IC enters
Output Over Voltage Protection.
3.6.6 Over Temperature
If the junction temperature of controller chip exceeds Tjcon_OTP, the IC enters into Over Temperature protection
(OTP) Non switch auto restart mode. The controller implements with a 40°C hysteresis. In another word, the
controller/IC can only resume from OTP if its junction temperature drops 40°C from OTP trigger point. The over
temperature protection of the controller chip shall prevent turn-on of the power supply if the component
temperature is too high. For appropriate system protection, additional measures may have to be taken by the
designer.
3.6.7 CS Short to GND
If the voltage at the current sense pin is shorted and lower than the preset threshold VCS_STG with certain
blanking time tCS_STG_B for 3 consecutive pulses during on-time of the power MOSFET, the IC enters CS Short to
GND Protection.
VCC_OFF
t
VCS
t
VVCC
No switching
Fault
detected
Fault released
t
Switching start at the
following restart cycle
VCC_ON
Start up and detect at
every charging cycle
Figure 11 Non switch Auto Restart Mode
Q infineon Functional Description A mun n n n 3mm, A mun a n 3 3mm,
Datasheet 15 of 25 V 2.0
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Quasi-Resonant Controller
Functional Description
VCC_OFF
t
VCS
t
VVCC
Fault
detected
Fault released
t
Switching start at the
following restart cycle
VCC_ON
Start up and detect at every
charging cycle
Figure 12 Auto Restart Mode
VCC_OFF
t
VCS
t
VVCC
Fault
detected
Fault released
t
Switching start at the
following even restart
cycle
VCC_ON
Start up and detect at
every even charging
cycle
No detect No detect
Figure 13 Odd skip Auto Restart Mode
Q infineon Electrical Characteristics
Datasheet 16 of 25 V 2.0
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Quasi-Resonant Controller
Electrical Characteristics
4 Electrical Characteristics
Attention: All voltages are measured with respect to ground (Pin 8). The voltage levels are valid if other ratings
are not violated.
4.1 Absolute Maximum Ratings
Attention: Stresses above the maximum values listed here may cause permanent damage to the device. Exposure
to absolute maximum rating conditions for extended periods may affect device reliability. Maximum
ratings are absolute ratings; exceeding only one of these values may cause irreversible damage to the
integrated circuit. System design needs to ensure not to exceed the maximum limit. Ta=25°C unless
otherwise specified.
Table 6 Absolute Maximum Ratings
Parameter
Symbol
Limit Values
Unit
Note / Test
Condition
Min.
Max.
VCC Supply Voltage
VCC
-0.3
27
V
GATE Voltage
VGATE
-0.3
27
V
SOURCE Voltage
VSOURCE
-0.3
27
V
FB Voltage
VFB
-0.3
3.6
V
ZCD Voltage
VZCD
-0.3
27
V
CS Voltage
VCS
-0.3
3.6
V
VIN Voltage
VIN
-0.3
3.6
V
Maximum DC current at SOURCE
pin
ISOURCE
-
0.9
A
Limited by Tj,Max
Single pulse source current at
SOURCE pin
IS_pulse
-
5.8
A
Pulse width tP=20 µs
and limited by Tj,Max
ESD robustness HBM
VESD_HBM
-
2000
V
According to
EIA/JESD22
ESD robustness CDM
VESD_CDM
-
500
V
Junction temperature range
TJ
-40
150
°C
Storage Temperature
TSTORE
-55
150
°C
Thermal Resistance Junction-
Ambient
RthJA
-
185
K/W
Setup according to
the JESD51 standard
4.2 Operating Range
Note: Within the operating range the IC operates as described in the functional description.
Table 7 Operating Range
Parameter
Symbol
Limit Values
Unit
Remark
Min.
Max.
V
VCC Supply Voltage
VVCC
VVCC_OFF
VVCC_OVP
Junction Temperature of controller
TjCon_op
-40
TjCon_OTP
˚C
Max value limited
due to OTP of
controller chip
Q infineon Electrical Characteristics Ira:0
Datasheet 17 of 25 V 2.0
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Quasi-Resonant Controller
Electrical Characteristics
4.3 Operating Conditions
Note: The electrical characteristics involve the spread of values within the specified supply voltage and junction
temperature range TJ from 40 °C to 125 °C. Typical values represent the median values, which are related to 25°C.
If not otherwise stated, a supply voltage of VCC = 18 V is assumed.
Table 8 Operating Conditions
Parameter
Symbol
Limit Values
Unit
Note / Test Condition
Min.
Typ.
Max.
VCC Charge Current
IVCC_Charge1
-0.35
-0.2
-0.09
mA
VVCC=0 V, RStartUp=50
MΩ and VDRAIN=90 V
IVCC_Charge2
-
-3.2
-
mA
VVCC=3 V, RStartUp=50
MΩ and VDRAIN=90 V
IVCC_Charge3
-5
-3
-1
mA
VVCC=15 V, RStartUp=50
MΩ and VDRAIN=90 V
Current Consumption, Startup
Current
IVCC_Startup
-
0.19
-
mA
VVCC=15 V
Current Consumption, Normal
IVCC_Normal
-
0.9
-
mA
IFB=0 A (No gate
switching)
Current Consumption, Auto Restart
IVCC_AR
-
320
-
µA
Current Consumption, Burst Mode
IVCC_Burst Mode
-
0.5
-
mA
VFB=1.8 V
VCC Turn-on Threshold Voltage
VVCC_ON
15.3
16
16.5
V
VCC Turn-off Threshold Voltage
VVCC_OFF
9.5
10
10.5
V
VCC Short Circuit Protection
Voltage
VVCC_SCP
-
1.1
1.9
V
VCC Turn-off blanking
tVCC_OFF_B
-
50
-
µs
4.4 Internal Voltage Reference
Table 9 Internal Voltage Reference
Parameter
Symbol
Limit Values
Unit
Note / Test
Condition
Min.
Typ.
Max.
Internal Reference Voltage
VREF
3.2
3.3
3.4
V
Measured at pin FB
IFB=0
4.5 Gate Driver
Table 10 Gate Driver
Parameter
Symbol
Limit Values
Unit
Note / Test
Condition
Min.
Typ.
Max.
Output voltage at logic low
VGATE_LOW
-
-
1.00
V
Output voltage at logic high
VGATE_HIGH
7.5
10
13
V
Rise Time
tGATE_RISE
-
117
-
ns
Cout = 1nF
Fall Time
tGATE_FALL
-
27
-
ns
Cout = 1nF
Q Inflneon Electrical Characteristics Burst Mode 7 Level 1 Burst Mode 7 Level 2 step soft start
Datasheet 18 of 25 V 2.0
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Quasi-Resonant Controller
Electrical Characteristics
4.6 PWM Section
Table 11 PWM Section
Parameter
Symbol
Limit Values
Unit
Note / Test
Condition
Min.
Typ.
Max.
Feedback Pull-Up Resistor
RFB
11
15
20
k
PWM-OP Gain
GPWM
1.95
2.05
2.15
-
Offset for Voltage Ramp
VPWM
0.42
0.5
0.58
V
Maximum on time in normal
operation
tOnMax
20
35
60
µs
Maximum off time in normal
operation
tOffMax
24
42.5
71
µs
4.7 Current Sense
Table 12 Current Sense
Parameter
Symbol
Limit Values
Unit
Note / Test
Condition
Min.
Typ.
Max.
Peak current limitation in normal
operation
VCS_N
0.94
1.00
1.06
V
Leading Edge Blanking time
tCS_LEB
118
220
462
ns
Peak Current Limitation in Active
Burst Mode Level 1
VCS_BL1
0.26
0.31
0.36
V
Peak Current Limitation in Active
Burst Mode Level 2
VCS_BL2
0.3
0.35
0.4
V
4.8 Soft Start
Table 13 Soft Start
Parameter
Symbol
Limit Values
Unit
Note / Test
Condition
Min.
Typ.
Max.
Soft-Start time
tSS
8.5
12
-
ms
Soft-start time step
tSS_S1
-
3
-
ms
Internal regulation voltage at first
step
VSS11
-
0.30
-
V
CS peak voltage
Internal regulation voltage step at
soft start
VSS_S1
-
0.15
-
V
CS peak voltage
1
The parameter is not subjected to production test - verified by design/characterization
Q Electrical Characteristics @ threshold time selection
Datasheet 19 of 25 V 2.0
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Quasi-Resonant Controller
Electrical Characteristics
4.9 Digital Zero Crossing
Table 14 Digital Zero Crossing
Parameter
Symbol
Limit Values
Unit
Note / Test
Condition
Min.
Typ.
Max.
Zero crossing threshold voltage
VZCD_CT
60
100
150
mV
Zero crossing Ringing suppression
threshold
VZCD_RS
-
0.45
-
V
Minimum ringing suppression time
tZCD_RS1
1.5
2.5
4.1
µs
VZCD > VZCD_RS (except
1st 3 ms of soft-start)
Maximum ringing suppression
time
tZCD_RS2
-
25
-
µs
VZCD < VZCD_RS
Threshold to reset Up/Down
Counter
VFB_R
-
2.80
-
V
Threshold for downward counting
VFB_HLC
-
2.05
-
V
Threshold for upward counting
VFB_LHC
-
1.55
-
V
Counter Time
tCOUNT
-
48
-
ms
ZCD resistance
RZCD
2.5
3.0
3.5
k
Internal resistor at
ZCD pin
VIN voltage threshold for line
selection
VVIN_REF
1.48
1.52
1.58
V
Blanking time for VIN voltage
threshold for line selection
tVIN_REF
-
16
-
ms
4.10 Active Burst Mode
Table 15 Active Burst Mode
Parameter
Symbol
Limit Values
Unit
Note / Test
Condition
Min.
Typ.
Max.
Charging current to select burst
mode
Isel
2.1
3
3.9
µA
Burst mode selection reference
voltage
VREF_B
2.65
2.75
2.85
V
Feedback voltage for entering
Active Burst Mode for level 1
VFB_EBL1
0.86
0.9
0.94
V
Feedback voltage for entering
Active Burst Mode for level 2
VFB_EBL2
1.0
1.05
1.1
V
Blanking time for entering Active
Burst Mode
tFB_BEB
-
20
-
ms
Q infineon Electrical Characteristics Time
Datasheet 20 of 25 V 2.0
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Quasi-Resonant Controller
Electrical Characteristics
Feedback voltage for leaving
Active Burst Mode
VFB_LB
2.65
2.75
2.85
V
Feedback voltage for burst-on
VFB_BOn
2.3
2.4
2.5
V
Feedback voltage for burst-off
VFB_BOff
1.9
2.0
2.1
V
4.11 Line Over Voltage Protection
Table 16 Line OVP
Parameter
Symbol
Limit Values
Unit
Note / Test
Condition
Min.
Typ.
Max.
Line Over Voltage threshold
VVIN_LOVP
2.8
2.9
3.0
V
Line Over Voltage Blanking
tVIN_LOVP_B
-
250
-
µs
4.12 Brownout Protection
Table 17 Brownout Protection
Parameter
Symbol
Limit Values
Unit
Note / Test
Condition
Min.
Typ.
Max.
BrownIn threshold
VVIN_BI
0.63
0.66
0.69
V
BrownIn Blanking
tVIN_BI_B
-
250
-
µs
BrownOut threshold
VVIN_BO
0.37
0.40
0.43
V
BrownOut Blanking
tVIN_BO_B
-
250
-
µs
4.13 VCC Over Voltage Protection
Table 18 Vcc Over Voltage Protection
Parameter
Symbol
Limit Values
Unit
Note / Test
Condition
Min.
Typ.
Max.
VCC Over Voltage threshold
VVCC_OVP
24
25.50
27
V
VCC Over Voltage blanking
tVCC_OVP_B
-
50
-
µs
4.14 Over Load Protection
Table 19 Overload Protection
Parameter
Symbol
Limit Values
Unit
Note / Test
Condition
Min.
Typ.
Max.
Over Load Detection threshold for
OLP protection at FB pin
VFB_OLP
2.65
2.75
2.85
V
Over Load Protection Blanking
Time
tFB_OLP_B
-
30
-
ms
Q infineon Electrical Characteristics
Datasheet 21 of 25 V 2.0
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Quasi-Resonant Controller
Electrical Characteristics
4.15 Output Over Voltage Protection
Table 20 Output OVP
Parameter
Symbol
Limit Values
Unit
Note / Test
Condition
Min.
Typ.
Max.
Output Over Voltage threshold
VZCD_OVP
1.9
2
2.1
V
Output Over Voltage Blanking
Pulse
PZCD_OVP_B
-
10
-
pulse
Consecutive Pulse
4.16 Thermal Protection
Table 21 Thermal Protection
Parameter
Symbol
Limit Values
Unit
Note / Test
Condition
Min.
Typ.
Max.
Over temperature protection1
Tjcon_OTP
129
140
150
°C
Junction
temperature of the
controller chip
Over temperature Hysteresis1
TjHYS_OTP
-
40
-
°C
Over temperature Blanking Time
tjcon_OTP_B
-
50
-
µs
4.17 CS Short to GND Protection
Table 22 CS Short to GND Protection
Parameter
Symbol
Limit Values
Unit
Note / Test
Condition
Min.
Typ.
Max.
CS Short to Gnd Protection
VCS_STG
0.06
0.10
0.15
V
CS Short to Gnd Consecutive
Trigger
PCS_STG
-
3
-
cycle
CS Short to Gnd Sample period
tCS_STG_SAM
2.3
5
-
µs
4.18 Low side MOSFET
Table 23 Low side MOSFET
Parameter
Symbol
Limit Values
Unit
Note / Test
Condition
Min.
Typ.
Max.
Drain Source On-Resistance
RDSon
-
-
0.22
0.311
0.29
-
Tj = 25°C
Tj = 125°C
1
The parameter is not subjected to production test - verified by design/characterization
Q Outline Dimension infineon P‘N 1 \NDEX MARK‘NG 1) DOES NOT \NCLUDE MOLD FLASH OR PROTRUS‘ONS, HE L fiH FOOTPRINT IMEI hx45' F3 DIM MILUMETERS \NCHES DOCUMENT N0 MN MAX Mm MAX zaanuauma A . 1 75 . a use m a m - oouo - SCALE °’ A2 125 165 am a ass b L135 um cm 0020 m, c 017 u 25 n om a mm D «an sun may am a to E 5 an a 20 n 225 a m W72“ E1 330 Am) man 0157 3 ‘27 fl "5" EUROPEAN PROJECTION N a a L n 39 a as n 015 u 035 n o 23 u 50 n 009 a 020 m e a“ a“ o- 3" “\l a - 19- . 19‘ “C u “7 ‘7 0"" \SSUE an: add 025 mm 09012,,“ n 5 59 s 79 o 220 a 22s r2 0 55 u 75 o 022 a 030 REVIS‘ON F3 1 21 1.41 o 048 u use “2
Datasheet 22 of 25 V 2.0
2017-08-11
Quasi-Resonant Controller
Outline Dimension
5 Outline Dimension
Figure 14 PG-DSO-8
@
Datasheet 23 of 25 V 2.0
2017-08-11
Quasi-Resonant Controller
Marking
6 Marking
Figure 15 Marking for ICE5QSAG
Q infineon Revision history
Datasheet 24 of 25 V 2.0
2017-08-11
Quasi-Resonant Controller
Revision history
Revision history
Document
version
Date of release
Description of changes
V2.0
11 Aug 2017
Page 7 ~16
Text content revised
V1.2
10 Mar 2017
Page 1, 3
Updated features and description
Page 6 ~ 14
Typo error
Published by
Infineon Technologies AG
81726 München, Germany
© 2017 Infineon Technologies AG.
All Rights Reserved.
Do you have a question about this
document?
Email: erratum@infineon.com
Document reference
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The information given in this document shall in no
event be regarded as a guarantee of conditions or
characteristics (“Beschaffenheitsgarantie”) .
With respect to any examples, hints or any typical
values stated herein and/or any information
regarding the application of the product, Infineon
Technologies hereby disclaims any and all
warranties and liabilities of any kind, including
without limitation warranties of non-infringement
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In addition, any information given in this document
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Edition 2017-08-11
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