74AVC16835A Datasheet by NXP USA Inc.

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74AVC16835A
18-bit registered driver with Dynamic
Controlled Outputs (3-State)
Product data
Supersedes data of 2000 Jul 25 2002 Mar 15
INTEGRATED CIRCUITS
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Philips Semiconductors Product data
74AVC16835A
18-bit registered driver with
Dynamic Controlled Outputs (3-State)
2
2002 Mar 15 853-2208 27859
FEATURES
Wide supply voltage range of 1.2 V to 3.6 V
Complies with JEDEC standard no. 8-1A/5/7
CMOS low power consumption
Input/output tolerant up to 3.6 V
DCO (Dynamic Controlled Output) circuit dynamically changes
output impedance, resulting in noise reduction without speed
degradation
Low inductance multiple VCC and GND pins for minimum noise
and ground bounce
Power off disables 74AVC16835A outputs, permitting Live
Insertion
Integrated input diodes to minimize input overshoot and
undershoot
Full PC133 solution provided when used with PCK2509S or
PCK2510S and CBT16292
DESCRIPTION
The 74AVC16835A is a 18-bit universal bus driver. Data flow is
controlled by output enable (OE), latch enable (LE) and clock inputs
(CP).
This product is designed to have an extremely fast propagation
delay and a minimum amount of power consumption.
To ensure the high-impedance state during power up or power
down, OE should be tied to VCC through a pullup resistor (Live
Insertion).
A Dynamic Controlled Output (DCO) circuitry is implemented to
support termination line drive during transient. See the graphs on
page 8 for typical curves.
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28 29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56NC
NC
Y0
Y1
Y2
Y3
Y4
Y5
GND
VCC
GND
Y6
Y7
Y8
Y9
Y10
Y11
GND
Y12
Y13
Y14
VCC
Y15
Y16
GND
Y17
OE
LE
GND
NC
A0
GND
A1
A2
VCC
A3
A4
A5
GND
A6
A7
A8
A9
A10
A11
GND
A12
A13
A14
VCC
A15
A16
GND
A17
CP
GND
SH00130
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25°C; tr = tf 2.0 ns; CL = 30 pF.
SYMBOL PARAMETER CONDITIONS TYPICAL UNIT
tPHL/tPLH Propagation delay
An to Yn
VCC = 1.8 V
VCC = 2.5 V
VCC = 3.3 V
2.1
1.7
1.5 ns
tPHL/tPLH
Propagation delay
LE to Yn;
CP to Yn
VCC = 1.8 V
VCC = 2.5 V
VCC = 3.3 V
2.2
1.9
1.7 ns
CIInput capacitance 3.8 pF
CPD
Power dissi
p
ation ca
p
acitance
p
er buffer
VI= GND to VCC1
Outputs enabled 25 p
F
C
PD
Power
dissi ation
ca acitance
er
buffer
V
I =
GND
to
V
CC
1
Output disabled 6
F
NOTE:
1. CPD is used to determine the dynamic power dissipation (PD in µW):
PD = CPD × VCC2 × fi + S (CL × VCC2 × fo) where: fi = input frequency in MHz; CL = output load capacitance in pF;
fo = output frequency in MHz; VCC = supply voltage in V; S (CL × VCC2 × fo) = sum of outputs.
ORDERING INFORMATION
PACKAGES TEMPERATURE
RANGE ORDER CODE DRAWING
NUMBER
56-Pin Plastic 0.5 mm pitch TSSOP –40 to +85 °C 74AVC16835ADGG SOT364-1
56-Pin Plastic 0.4 mm pitch TSSOP (TVSOP) –40 to +85 °C 74AVC16835ADGV SOT481-2
Philips Semiconductors Product data
74AVC16835A
18-bit registered driver with
Dynamic Controlled Outputs (3-State)
2002 Mar 15 3
PIN DESCRIPTION
PIN NUMBER SYMBOL NAME AND FUNCTION
1, 2, 55 NC No connection
3, 5, 6, 8, 9, 10, 12, 13,
14, 15, 16, 17, 19, 20,
21, 23, 24, 26 Y0 to Y17 Data outputs
4, 11, 18, 25, 32, 39, 46,
53, 56 GND Ground (0V)
7, 22, 35, 50 VCC Positive supply voltage
27 OE Output enable input
(active LOW)
28 LE Latch enable input
(active HIGH)
30 CP Clock input
54, 52, 51, 49, 48, 47,
45, 44, 43, 42, 41, 40,
38, 37, 36, 34, 33, 31 A0 to A17 Data inputs
LOGIC SYMBOL
SH00201
CP
LE
D
OE
LE
A1
Y1
TO THE 17 OTHER CHANNELS
CP
TYPICAL INPUT (DATA OR CONTROL)
SH00200
A1
VCC
LOGIC SYMBOL (IEEE/IEC)
1 1
30
28
54
52
51
49
48
47
45
44
43
42
41
40
38
37
36
34
33
31
3
5
6
8
9
10
12
13
14
15
16
17
19
20
21
23
24
26
3D
27
2C3
EN1
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
OE
CP
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
Y9
Y10
Y11
Y12
Y13
Y14
Y15
Y16
Y17
LE C3
G2
SH00154
FUNCTION TABLE
INPUTS
OUTPUTS
OE LE CP A
OUTPUTS
H X X X Z
L H X L L
L H X H H
L L L L
L L H H
L L H X Y01
L L L X Y02
H = HIGH voltage level
L = LOW voltage level
X = Don’t care
Z = High impedance “off” state
= LOW-to-HIGH level transition
NOTES:
1. Output level before the indicated steady-state input conditions
were established, provided that CP is high before LE goes low.
2. Output level before the indicated steady-state input conditions
were established.
3§§§§§§§§§E
Philips Semiconductors Product data
74AVC16835A
18-bit registered driver with
Dynamic Controlled Outputs (3-State)
2002 Mar 15 4
168-pin SDR SDRAM DIMM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
The PLL clock distribution device and AVCM registered drivers reduce
signal loads on the memory controller and prevent timing delays and
waveform distortions that would cause unreliable operation
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
74AVC16835A PCK2509S or PCK2510S74AVC16835A
BACK SIDE
FRONT SIDE
74AVC16835A
SW00726
RECOMMENDED OPERATING CONDITIONS
SYMBOL PARAMETER CONDITIONS MIN MAX UNIT
1.65 1.95
VCC
DC supply voltage (according to JEDEC Low Voltage Standards) 2.3 2.7 V
V
CC 3.0 3.6
DC supply voltage (for low voltage applications) 1.2 3.6 V
VIDC Input voltage range 0 3.6 V
VO
DC output voltage range; output 3-State 0 3.6
V
ODC output voltage range; output HIGH or LOW state 0 VCC
Tamb Operating free-air temperature range –40 +85 °C
VCC = 1.65 to 2.3 V 0 30
tr, tfInput rise and fall times VCC = 2.3 to 3.0 V 0 20 ns/V
VCC = 3.0 to 3.6 V 0 10
ABSOLUTE MAXIMUM RATINGS
In accordance with the Absolute Maximum Rating System (IEC 134). Voltages are referenced to GND (ground = 0V).
SYMBOL PARAMETER CONDITIONS RATING UNIT
VCC DC supply voltage –0.5 to +4.6 V
IIK DC input diode current VI t0 –50 mA
VIDC input voltage For all inputs1–0.5 to 4.6 V
IOK DC output diode current VO uVCC or VO t 0 "50 mA
VODC output voltage; output 3-State Note 1 –0.5 to 4.6 V
VODC output voltage; output HIGH or LOW state Note 1 –0.5 to VCC +0.5 V
IODC output source or sink current VO = 0 to VCC "50 mA
IGND, ICC DC VCC or GND current "100 mA
Tstg Storage temperature range –65 to +150 °C
PTOT Power dissipation per package
–plastic thin-medium-shrink (TSSOP) For temperature range: –40 to +125°C
above +55°C derate linearly with 8 mW/K 600 mW
NOTE:
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
HrGH \e-el 1np"1"o\1age LOW le"e1 Inp‘ r: vonage Input leakage current ‘ 6:25.96 V' 3 State output OFF state current eurescem 5 pm :7 went
Philips Semiconductors Product data
74AVC16835A
18-bit registered driver with
Dynamic Controlled Outputs (3-State)
2002 Mar 15 5
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions. Voltage are referenced to GND (ground = 0 V).
LIMITS
SYMBOL PARAMETER TEST CONDITIONS Temp = –40°C to +85°C UNIT
MIN TYP1MAX
VCC = 1.2 V VCC – –
V
HIGH level In
p
ut voltage
VCC = 1.65 to 1.95 V 0.65VCC 0.9 –
V
V
IH
HIGH
le
v
el
Inp
u
t
v
oltage
VCC = 2.3 to 2.7 V 1.7 1.2
V
VCC = 3.0 to 3.6 V 2.0 1.5
VCC = 1.2 V – GND
V
LOW level In
p
ut voltage
VCC = 1.65 to 1.95 V 0.9 0.35VCC
V
V
IL
LOW
le
v
el
Inp
u
t
v
oltage
VCC = 2.3 to 2.7 V 1.2 0.7
V
VCC = 3.0 to 3.6 V 1.5 0.8
V
CC
= 1.65 to 3.6 V; VI = VIH or VIL;
VCC 020
VCC
CC IIH IL
IO = –100 µA
V
CC
0
.
20
V
CC
V
O
HHIGH level output voltage VCC = 1.65 V; VI = VIH or VIL; IO = –4 mA VCC0.45 VCC0.10 – V
OH
g
VCC = 2.3 V; VI = VIH or VIL; IO = –8 mA VCC0.55 VCC0.28 –
VCC = 3.0 V; VI = VIH or VIL; IO = –12 mA VCC0.70 VCC0.32 –
V
CC
= 1.65 to 3.6 V; VI = VIH or VIL;
GND
020
CC IIH IL
IO = 100 µA
GND
0
.
20
V
O
LLOW level output voltage VCC = 1.65 V; VI = VIH or VIL; IO = 4 mA 0.10 0.45 V
OL
g
VCC = 2.3 V; VI = VIH or VIL; IO = 8 mA 0.26 0.55
VCC = 3.0 V; VI = VIH or VIL; IO = 12 mA 0.36 0.70
VCC = 1 65 to 3 6 V
;
I
I
Input leaka
g
e current
V
CC =
1
.
65
to
3
.
6
V;
V V or GND
0.1 2.5
µ
A
II
In ut
leakage
current
V
I =
V
CC or
GND
0.1
2.5
µA
IOFF 3-State output OFF-state current VCC = 0 V; VI or VO = 3.6 V 0.1 10 µA
IIHZ/IILZ 3-State output OFF-state current VCC = 1.65 to 3.6 V; VI = VCC or GND 0.1 12.5 µA
IO
3 State out
p
ut OFF state current
VCC = 1.65 to 2.7 V; VI = VIH or VIL;
VO = VCC or GND 0.1 5
µA
I
OZ
3
-
State
o
u
tp
u
t
OFF
-
state
c
u
rrent
VCC = 3.0 to 3.6 V; VI = VIH or VIL;
VO = VCC or GND 0.1 10
µ
A
ICC
Quiescent su
pp
ly current
VCC = 1.65 to 2.7 V; VI = VCC or GND; IO = 0 0.1 20
µA
I
CC
Q
u
iescent
s
u
ppl
y
c
u
rrent
VCC = 3.0 to 3.6 V; VI = VCC or GND; IO = 0 0.2 40 µ
A
NOTE:
1. All typical values are at Tamb = 25°C.
Philips Semiconductors Product data
74AVC16835A
18-bit registered driver with
Dynamic Controlled Outputs (3-State)
2002 Mar 15 6
AC CHARACTERISTICS
GND = 0 V; tr = tf 2.0 ns; CL = 30 pF
LIMITS
SYMBOL PARAMETER WAVEFORM VCC = 3.3 ± 0.3 V VCC = 2.5 ± 0.2 V VCC = 1.8 ± 0.15 V VCC =
1.5 ± 0.1 V VCC =
1.5 V VCC =
1.2 V UNIT
MIN TYP1MAX MIN TYP1MAX MIN TYP1MAX MIN MAX TYP TYP
Propagation
delay
An to Yn 1 0.9 1.5 2.5 1.0 1.7 3.0 1.3 2.1 4.2 1.6 5.1 3.6 5.2 ns
tPHL/tPLH
Propagation
delay
LE to Yn 2 0.9 1.6 2.9 1.1 1.9 3.5 1.3 2.2 4.0 1.6 4.6 2.8 4.2 ns
Propagation
delay
CP to Yn 3 0.8 1.7 2.7 1.0 1.8 3.0 1.5 2.2 3.7 1.6 4.6 2.9 4.3 ns
tPZH/tPZL
3-State output
enable time
OE to Yn 6 1.2 2.1 4.0 1.5 2.5 4.5 2.2 3.1 5.8 2.5 7.6 4.4 6.3 ns
tPHZ/tPLZ
3-State output
disable time
OE to Yn 6 1.1 2.6 4.8 1.2 2.2 4.5 2.0 3.1 5.6 2.2 7.6 4.1 5.5 ns
t
CP pulse width
HIGH or LOW 3 1.0 – – 1.2 – – 2.0 – – – ns
t
WLE pulse width
HIGH 2 1.0 – – 1.2 – – 2.0 – – – ns
tS
Set-up time
An to CP 5 0 –0.3 – 0 –0.2 0 –0.2 – 0.2 0 0 ns
t
SU Set-up time
An to LE 4 1.0 0.5 0.7 0.3 1.1 0.6 1.6 0.9 1.5 ns
t
Hold time
An to CP 5 1.3 0.6 0.7 0.3 0.7 0.3 0.7 0.3 0.1 ns
t
hHold time
An to LE 4 0.3 0.8 – 0.2 0 – 0.2 –0.2 0 –0.3 –0.7 ns
fmax Maximum clock
pulse frequency 3 500 – – 400 – – 250 – – – MHz
NOTE:
1. All typical values are measured at Tamb = 25°C and at VCC = 1.8 V, 2.5 V, 3.3 V.
Philips Semiconductors Product data
74AVC16835A
18-bit registered driver with
Dynamic Controlled Outputs (3-State)
2002 Mar 15 7
AC WAVEFORMS FOR VCC = 3.0 V TO 3.6 V
RANGE
VM = 0.5 VCC
VX = VOL + 0.300 V
VY = VOH – 0.300 V
VOL and VOH are the typical output voltage drop that occur with the
output load.
VI = VCC
AC WAVEFORMS FOR VCC = 2.3 V TO 2.7 V AND
VCC < 2.3 V RANGE
VM = 0.5 VCC
VX = VOL + 0.15 V
VY = VOH – 0.15 V
VOL and VOH are the typical output voltage drop that occur with the
output load.
VI = VCC
An
INPUT
tPHL tPLH
VOL
VI
GND
VOH
Yn
OUTPUT
SH00132
VM
VM
NOTE: VM = 0.5VCC at VCC = 2.3 to 2.7 V
Waveform 1. Input (An) to output (Yn) propagation delay
LE INPUT
Yn OUTPUT
VI
GND
VOH
VOL
tPHL tPLH
tW
SH00134
VM
VM
VM
NOTE: VM = 0.5VCC at VCC = 2.3 to 2.7V
Waveform 2. Latch enable input (LE) pulse width, the latch
enable input to output (Yn) propagation delays.
CP INPUT
Yn OUTPUT
VI
GND
VOH
VOL
tPHL tPLH
tW
1/fMAX
SH00135
VM
VM
VM
NOTE: VM = 0.5VCC at VCC = 2.3 to 2.7 V
Waveform 3. The clock (CP) to Yn propagation delays, the
clock pulse width and the maximum clock frequency.
An
INPUT
LE
INPUT
tSU
th
NOTE: The shaded areas indicate when the input is permitted to change
for predictable output performance.
tSU
th
VI
GND
VI
GND
SH00133
VM
VM
VM = 0.5VCC at VCC = 2.3 to 2.7V
Waveform 4. Data set-up and hold times for the An input to the
LE input
VI
GND
An INPUT
VI
GND
VOH
Yn OUTPUT
VOL
CP INPUT
tsu
th
tsu
th
NOTE: The shaded areas indicate when the input is permitted to change
for predictable output performance.
SH00136
VM
VM
VM = 0.5VCC at VCC = 2.3 to 2.7 V
Waveform 5. Data set-up and hold times for the An input to the
clock CP input
tPLZ tPZL
VI
nOE INPUT
GND
VCC
OUTPUT
LOW-to-OFF
OFF-to-LOW
VOL
VOH
OUTPUT
HIGH-to-OFF
OFF-to-HIGH
GND outputs
enabled outputs
enabled
outputs
disabled
tPHZ
VM
VM
VM
tPZH
VX
VY
SH00137
NOTE: VM = 0.5VCC at VCC = 2.3 to 2.7 V
Waveform 6. 3-State enable and disable times
Philips Semiconductors Product data
74AVC16835A
18-bit registered driver with
Dynamic Controlled Outputs (3-State)
2002 Mar 15 8
TEST CIRCUIT
SWITCH POSITION
PULSE
GENERATOR
RT
VI
D.U.T.
VO
CL
VCC
RL
Test Circuit for switching times
Open
GND
S1
DEFINITIONS
VCC VI
< 2.3 V VCC
TEST S1
tPLH/tPHL Open
RL = Load resistor
CL = Load capacitance includes jig and probe capacitance
RT = Termination resistance should be equal to ZOUT of pulse generators.
2 VCC
tPLZ/tPZL VCC
2.3–2.7 V
tPHZ/tPZH GND
RL
2 * VCC
SV01018
RL
1000
500
VCC
3.0 V 500
Figure 1. Load circuitry for switching times
GRAPHS
SH00204
0
0.5
1
1.5
2
2.5
3
3.5
0 50 100 150 200 250
OUTPUT CURRENT (mA)
OUTPUT VOLTAGE (V)
= 3.3 V
VOL
V
CC
= 2.5 V
V
CC
V
CC = 1.8 V
IOL
Figure 2. Output voltage (VOL) vs. output current (IOL)
SH00205
–250 –200 –150 –100 –50 0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
= 3.3 V = 2.5 V = 1.8 V
OUTPUT CURRENT (mA)
OUTPUT VOLTAGE (V)
VOH
V
CC
IOH
V
CC V
CC
Figure 3. Output voltage (VOH) vs. output current (IOH)
A Dynamic Controlled Output (DCO) circuit is designed in. During
the transition, it initially lowers the output impedance to effectively
drive the load and, subsequently, raises the impedance to reduce
noise. Figures 2 and 3 show VOL vs. IOL and VOH vs. IOH curves to
illustrate the output impedance and drive capability of the circuit. At
the beginning of the signal transition, the DCO circuit provides a
maximum dynamic drive that is equivalent to a high drive standard
output device.
-HHHHHHHHHHHHH 1 HHHHHHHHHIZHEHLHHHHHHHWH-HHHljza P scale DIMENSIONS (mm are the original dimensions}. bL- bP I: ah) 5(2) e v w y z e 025 02 V4.1 52 050 05 a“ 017 m 13.9 so 05 n35 0'25 0'05 0‘ m o“ 1. Flash: 0v metal pronusmns No.15 mm maxwmum pevswde are not inc‘uded. 2. Plastic mteneau pvotvusmns of 0.25 mm maxmmm pev side ale not mcmded. REFERENCES EUROPEAN IssuE DATE JEDEC EW PROJECTION {vs-9249 M0453 SQ 994227
Philips Semiconductors Product data
74AVC16835A
18-bit registered driver with
Dynamic Controlled Outputs (3-State)
2002 Mar 15 9
TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1 mm SOT364-1
u 2 5 5 111111 |_._._._._A_._._._._l scale uurr mix A‘ A3 5P c 13(1) 5121 . "E L v w Y Z“, a 015 105 023 020 114 45 as 075 04 5° mm '2 0.05 0.30 025 0.13 009 11.2 43 0" 6.2 ' 045 02 007 0'08 01 0“ Mom 1 P1asuc or metal pvolrmlons 011115 mm maxumum pelsude are net lnc‘uded. 2 Mamie ov metal pvolvusicns 010.25 mm maximum pevside are not inc‘uded. OUYLINE REFERENCES EUROPEAN IssuE DATE VERSION IE5 JEDEC Jan PROJECTION somevz . . . M07194 . E @ 01711724
Philips Semiconductors Product data
74AVC16835A
18-bit registered driver with
Dynamic Controlled Outputs (3-State)
2002 Mar 15 10
TSSOP56: plastic thin shrink small outline package; 56 leads; body width 4.4 mm SOT481-2
Philips Semiconductors Product data
74AVC16835A
18-bit registered driver with
Dynamic Controlled Outputs (3-State)
2002 Mar 15 11
NOTES
sales.addresses@www.semiconduclorsphilipsxmm, Mémmbm PHILIPS
Philips Semiconductors Product data
74AVC16835A
18-bit registered driver with
Dynamic Controlled Outputs (3-State)
2002 Mar 15 12
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Contact information
For additional information please visit
http://www.semiconductors.philips.com. Fax: +31 40 27 24825
For sales offices addresses send e-mail to:
sales.addresses@www.semiconductors.philips.com.
Koninklijke Philips Electronics N.V. 2002
All rights reserved. Printed in U.S.A.
Date of release: 03-02
Document order number: 9397 750 09606
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Data sheet status[1]
Objective data
Preliminary data
Product data
Product
status[2]
Development
Qualification
Production
Definitions
This data sheet contains data from the objective specification for product development.
Philips Semiconductors reserves the right to change the specification in any manner without notice.
This data sheet contains data from the preliminary specification. Supplementary data will be
published at a later date. Philips Semiconductors reserves the right to change the specification
without notice, in order to improve the design and supply the best possible product.
This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply.
Changes will be communicated according to the Customer Product/Process Change Notification
(CPCN) procedure SNW-SQ-650A.
Data sheet status
[1] Please consult the most recently issued data sheet before initiating or completing a design.
[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL
http://www.semiconductors.philips.com.

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