TC7106(A), 107(A) Datasheet by Microchip Technology

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© 2008 Microchip Technology Inc. DS21455D-page 1
TC7106/A/TC7107/A
Features:
Internal Reference with Low Temperature Drift:
- TC7106/TC7107: 80 ppm/°C (Typical)
- TC7106A/TC7107A: 20 ppm/°C (Typical)
Drives LCD (TC7106) or LED (TC7107)
Display Directly
Zero Reading with Zero Input
Low Noise for Stable Display
Auto-Zero Cycle Eliminates Need for Zero
Adjustment
True Polarity Indication for Precision Null
Applications
Convenient 9V Battery Operation (TC7106A)
High-Impedance CMOS Differential Inputs: 1012Ω
Differential Reference Inputs Simplify Ratiometric
Measurements
Low-Power Operation: 10 mW
Applications:
• Thermometry
Bridge Readouts: Strain Gauges, Load Cells, Null
Detectors
Digital Meters: Voltage/Current/Ohms/Power, pH
Digital Scales, Process Monitors
Portable Instrumentation
General Description:
The TC7106A and TC7107A 3-1/2 digit direct display
drive Analog-to-Digital Converters allow existing
TC7106/TC7107 based systems to be upgraded. Each
device has a precision reference with a 20 ppm/°C
maximum temperature coefficient. This represents a 4
to 7 times improvement over similar 3-1/2 digit
converters. Existing TC7106 and TC7107 based
systems may be upgraded without changing external
passive component values. The TC7107A drives
common anode light emitting diode (LED) displays
directly with 8 mA per segment. A low cost, high
resolution indicating meter requires only a display, four
resistors, and four capacitors. The TC7106A low-power
drain and 9V battery operation make it suitable for por-
table applications.
The TC7106A/TC7107A reduces linearity error to less
than 1 count. Rollover error – the difference in readings
for equal magnitude, but opposite polarity input signals,
is below ±1 count. High-impedance differential inputs
offer 1 pA leakage current and a 1012Ω input
impedance. The differential reference input allows
ratiometric measurements for ohms or bridge
transducer measurements. The 15 µVP–P noise
performance ensures a “rock solid” reading. The auto-
zero cycle ensures a zero display reading with a zero
volts input.
3-1/2 Digit Analog-to-Digital Converters
jjjjjjjjjjj 714 Eflfijjjjjjjjjjjjjjjjj TC7I|16ACPL TC7IO7AIPL EEECCCCCCCCCCCCCCCCC (kPLW
TC7106/A/TC7107/A
DS21455D-page 2 © 2008 Microchip Technology Inc.
Package Type
TC7106ACPL
TC7107AIPL
1
2
3
4
OSC1
5
6
7
8
9
10
11
12
TEST
VREF+
ANALOG
COMMON
CAZ
V+
D2
Normal Pin
Configuration
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
C2
B2
A2
F2
E2
D3
B3
F3
E3
AB4
(Minus Sign)
10s
'
100s
'
1000s
'
(7106A/7107A)
100s
'
OSC2
OSC3
VREF-
CREF-
CREF-
VIN+
VIN-
VBUFF
VINT
V-
G2
C3
A3
G3
BP/GND
POL
D1
C1
B1
A1
F1
G1
E1
1s
'
27
26
25
24
23
7
8
9
10
11
NC
G2
NC
NC
TEST
OSC3
NC
OSC2
OSC1
V+
D1
C1
B1
12 13 14 15 16 17 18 19 20 21 22
38 37 36 35 34
REF HI
A1
F1
TC7106ACKW
TC7107ACKW
394041424344
28
29
30
31
32
33
6
5
4
3
2
1
REF LO
CREF
CREF
COM
IN HI
IN LO
A/Z
BUFF
INT
V-
G1
E1
D1
C1
B2
A2
F2
E2
D3
C3
A3
G3
BP/GND
POL
AB4
E3
F3
B3
33
32
31
30
29
13
14
15
16
17
REF LO
CREF
F1
G1
E1
D2
C2
B2
A2
F2
E2
D2
18 19 20 21 22 23 24 25 26 27 28
44 43 42 41 40
A1
B3
F3
TC7106ACLW
TC7107ACLW
123456
34
35
36
37
38
39
12
11
10
9
8
7
B1
C1
D1
V+
NC
OSC1
OSC2
OSC3
TEST
REF
HI
E3
AB4
POL
NC
BP/GND
G3
A3
C3
G2
CREF
COMMON
IN HI
NC
IN LO
A/Z
BUFF
INT
V-
40-Pin PDIP 44-Pin PLCC
44-Pin MQFP
© 2008 Microchip Technology Inc. DS21455D-page 3
TC7106/A/TC7107/A
Typical Application
VREF +
TC7106/A
TC7107/A
9V
VREF
33
34
24 kΩ
1kΩ
29
36
39 38 40
0.47 µF
0.1 µF
V-
OSC1OSC3
OSC2 To Analog
Common (Pin 32)
3 Conversions/Sec
200 mV Full Scale
COSC
100 kΩ
47 kΩ
0.22 µF
CREF -CREF+
VIN+
VIN-
ANALOG
COMMON
VINT
VBUFF
CAZ
20
21
Segment
Drive
2 - 19
22 - 25
POL
BP
V+
Minus Sign Backplane
Drive
28
ROSC 100 pF
LCD Display (TC7106/A) or
Common Node with LED
Display (TC7107/A)
27
100 mV
1
26
35
VREF -
+
31
0.01 µF
Analog
Input
+
1MΩ
30
32
TC7106/A/TC7107/A
DS21455D-page 4 © 2008 Microchip Technology Inc.
1.0 ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings†
TC7106A
Supply Voltage (V+ to V-)..................................................15V
Analog Input Voltage (either Input) (Note 1) .............. V+ to V-
Reference Input Voltage (either Input) ....................... V+ to V-
Clock Input ..............................................................Test to V+
Package Power Dissipation (TA 70°C) (Note 2):
40-Pin PDIP......................................................1.23W
44-Pin PLCC.....................................................1.23W
44-Pin MQFP....................................................1.00W
Operating Temperature Range:
C (Commercial) Devices........................0°C to +70°C
I (Industrial) Devices..........................-25°C to +85°C
Storage Temperature Range.........................-65°C to +150°C
TC7107A
Supply Voltage (V+)..........................................................+6V
Supply Voltage (V-) ............................................................-9V
Analog Input Voltage (either Input) (Note 1).............. V+ to V-
Reference Input Voltage (either Input)....................... V+ to V-
Clock Input.............................................................GND to V+
Package Power Dissipation (TA 70°C) (Note 2):
40-Pin PDIP......................................................1.23W
44-Pin PLCC ....................................................1.23W
44-Pin MQFP....................................................1.00W
Operating Temperature Range:
C (Commercial) Devices ....................... 0°C to +70°C
I (Industrial) Devices.......................... -25°C to +85°C
Storage Temperature Range.........................-65°C to +150°C
Notice: Stresses above those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device. These are
stress ratings only and functional operation of the device at these or
any other conditions above those indicated in the operation sections of
the specifications is not implied. Exposure to Absolute Maximum Rat-
ing conditions for extended periods may affect device reliability.
TC7106/A AND TC7107/A ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise noted, specifications apply to both the TC7106/TC7106A and TC7107/TC7107A at
TA = +25°C, fCLOCK = 48 kHz. Parts are tested in the circuit of the Typical Operating Circuit.
Parameter Symbol Min Typ Max Unit Test Conditions
Zero Input Reading ZIR -000.0 ±000.0 +000.0 Digital
Reading
VIN = 0.0V
Full Scale = 200.0 mV
Ratiometric Reading 999 999/1000 1000 Digital
Reading
VIN = VREF
VREF = 100 mV
Rollover Error (Difference in Reading for
Equal Positive and Negative Reading
Near Full Scale)
R/O -1 ±0.2 +1 Counts VIN- = + VIN+ 200 mV
Linearity (Maximum Deviation from Best
Straight Line Fit)
-1 ±0.2 +1 Counts Full Scale = 200 mV or
Full Scale = 2.000V
Common Mode Rejection Ratio (Note 3) CMRR 50 µV/V VCM = ±1V, VIN = 0V,
Full Scale = 200.0 mV
Noise (Peak to Peak Value not
Exceeded 95% of Time)
eN—15µVV
IN = 0V
Full Scale - 200.0 mV
Leakage Current at Input IL 1 10 pA VIN = 0V
Zero Reading Drift 0.2 1 µV/°C VIN = 0V
“C” Device = 0°C to +70°C
—1.0 2µV/°CV
IN = 0V
“I” Device = -25°C to +85°C
Scale Factor Temperature Coefficient TCSF 1 5 ppm/°C VIN = 199.0 mV,
“C” Device = 0°C to +70°C (Ext.
Ref = 0 ppm°C)
20 ppm/°C VIN = 199.0 mV
“I” Device = -25°C to +85°C
Supply Current (Does not include LED
Current For TC7107/A)
IDD —0.81.8mAV
IN = 0.8
Analog Common Voltage (with Respect
to Positive Supply)
VC2.7 3.05 3.35 V 25 kΩ Between Common and
Positive Supply
Note 1: Input voltages may exceed the supply voltages, provided the input current is limited to ±100 µA.
2: Dissipation rating assumes device is mounted with all leads soldered to printed circuit board.
3: Refer to “Differential Input” discussion.
4: Backplane drive is in phase with segment drive for “OFF” segment, 180° out of phase for “ON” segment. Frequency is 20
times the conversion rate. Average DC component is less than 50 mV.
m
© 2008 Microchip Technology Inc. DS21455D-page 5
TC7106/A/TC7107/A
Temperature Coefficient of Analog
Common (with Respect to Positive
Supply)
VCTC ——25kΩ Between Common and
Positive Supply
7106/7/A
7106/7
20
80
50
ppm/°C
ppm/°C
0°C TA +70°C
(“C” Commercial Temperature
Range Devices)
Temperature Coefficient of Analog
Common (with Respect to Positive
Supply)
VCTC 75 ppm/°C 0°C TA +70°C
(“I” Industrial Temperature
Range Devices)
TC7106A ONLY Peak to Peak
Segment Drive Voltage
VSD 4 5 6 V V+ to V- = 9V
(Note 4)
TC7106A ONLY Peak to Peak
Backplane Drive Voltage
VBD 4 5 6 V V+ to V- = 9V
(Note 4)
TC7107A ONLY Segment Sinking
Current (Except Pin 19)
5 8.0 mA V+ = 5.0V
Segment Voltage = 3V
TC7107A ONLY Segment Sinking
Current (Pin 19)
10 16 mA V+ = 5.0V
Segment Voltage = 3V
TC7106/A AND TC7107/A ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrical Characteristics: Unless otherwise noted, specifications apply to both the TC7106/TC7106A and TC7107/TC7107A at
TA = +25°C, fCLOCK = 48 kHz. Parts are tested in the circuit of the Typical Operating Circuit.
Parameter Symbol Min Typ Max Unit Test Conditions
Note 1: Input voltages may exceed the supply voltages, provided the input current is limited to ±100 µA.
2: Dissipation rating assumes device is mounted with all leads soldered to printed circuit board.
3: Refer to “Differential Input” discussion.
4: Backplane drive is in phase with segment drive for “OFF” segment, 180° out of phase for “ON” segment. Frequency is 20
times the conversion rate. Average DC component is less than 50 mV.
TC7106/A/TC7107/A
DS21455D-page 6 © 2008 Microchip Technology Inc.
2.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1: PIN FUNCTION TABLE
Pin Number
(40-Pin PDIP)
Normal
Pin No.
(40-Pin PDIP)
(Reversed Symbol Description
1 (40) V+ Positive supply voltage.
2 (39) D1Activates the D section of the units display.
3 (38) C1Activates the C section of the units display.
4 (37) B1Activates the B section of the units display.
5 (36) A1Activates the A section of the units display.
6 (35) F1Activates the F section of the units display.
7 (34) G1Activates the G section of the units display.
8 (33) E1Activates the E section of the units display.
9 (32) D2Activates the D section of the tens display.
10 (31) C2Activates the C section of the tens display.
11 (30) B2Activates the B section of the tens display.
12 (29) A2Activates the A section of the tens display.
13 (28) F2Activates the F section of the tens display.
14 (27) E2Activates the E section of the tens display.
15 (26) D3Activates the D section of the hundreds display.
16 (25) B3Activates the B section of the hundreds display.
17 (24) F3Activates the F section of the hundreds display.
18 (23) E3Activates the E section of the hundreds display.
19 (22) AB4Activates both halves of the 1 in the thousands display.
20 (21) POL Activates the negative polarity display.
21 (20) BP/GND LCD Backplane drive output (TC7106A). Digital Ground (TC7107A).
22 (19) G3Activates the G section of the hundreds display.
23 (18) A3Activates the A section of the hundreds display.
24 (17) C3Activates the C section of the hundreds display.
25 (16) G2Activates the G section of the tens display.
26 (15) V- Negative power supply voltage.
27 (14) VINT Integrator output. Connection point for integration capacitor. See INTEGRATING
CAPACITOR section for more details.
28 (13) VBUFF Integration resistor connection. Use a 47 kΩ resistor for a 200 mV full scale range
and a 47 kΩ resistor for 2V full scale range.
29 (12) CAZ The size of the auto-zero capacitor influences system noise. Use a 0.47 µF capacitor
for 200 mV full scale, and a 0.047 µF capacitor for 2V full scale. See Section 7.1
“Auto-Zero Capacitor (CAZ)” on Auto-Zero Capacitor for more details.
30 (11) VIN- The analog LOW input is connected to this pin.
31 (10) VIN+ The analog HIGH input signal is connected to this pin.
32 (9) ANALOG
COMMON
This pin is primarily used to set the Analog Common mode voltage for battery
operation or in systems where the input signal is referenced to the power supply. It
also acts as a reference voltage source. See Section 8.3 “Analog Common (Pin
32)” on ANALOG COMMON for more details.
33 (8) CREF- See Pin 34.
34 (7) CREF+ A 0.1 µF capacitor is used in most applications. If a large Common mode voltage
exists (for example, the VIN- pin is not at analog common), and a 200 mV scale is
used, a 1 µF capacitor is recommended and will hold the rollover error to 0.5 count.
35 (6) VREF- See Pin 36.
© 2008 Microchip Technology Inc. DS21455D-page 7
TC7106/A/TC7107/A
36 (5) VREF+ The analog input required to generate a full scale output (1999 counts). Place
100 mV between Pins 35 and 36 for 199.9 mV full scale. Place 1V between Pins 35
and 36 for 2V full scale. See paragraph on Reference Voltage.
37 (4) TEST Lamp test. When pulled HIGH (to V+) all segments will be turned on and the display
should read -1888. It may also be used as a negative supply for externally generated
decimal points. See paragraph under TEST for additional information.
38 (3) OSC3 See Pin 40.
39 (2) OSC2 See Pin 40.
40 (1) OSC1 Pins 40, 39, 38 make up the oscillator section. For a 48 kHz clock (3 readings per
section), connect Pin 40 to the junction of a 100 kΩ resistor and a 100 pF capacitor.
The 100 kΩ resistor is tied to Pin 39 and the 100 pF capacitor is tied to Pin 38.
TABLE 2-1: PIN FUNCTION TABLE (CONTINUED)
Pin Number
(40-Pin PDIP)
Normal
Pin No.
(40-Pin PDIP)
(Reversed Symbol Description
TC7106/A/TC7107/A
DS21455D-page 8 © 2008 Microchip Technology Inc.
3.0 DETAILED DESCRIPTION
(All Pin designations refer to 40-Pin PDIP.)
3.1 Dual Slope Conversion Principles
The TC7106A and TC7107A are dual slope, integrating
Analog-to-Digital Converters. An understanding of the
dual slope conversion technique will aid in following the
detailed operation theory.
The conventional dual slope converter measurement
cycle has two distinct phases:
Input Signal Integration
Reference Voltage Integration (De-integration)
The input signal being converted is integrated for a
fixed time period (TSI). Time is measured by counting
clock pulses. An opposite polarity constant reference
voltage is then integrated until the integrator output
voltage returns to zero. The reference integration time
is directly proportional to the input signal (TRI). See
Figure 3-1.
FIGURE 3-1: Basic Dual Slope Converter.
In a simple dual slope converter, a complete
conversion requires the integrator output to “ramp-up”
and “ramp-down.” A simple mathematical equation
relates the input signal, reference voltage and
integration time.
EQUATION 3-1:
For a constant VIN:
EQUATION 3-2:
The dual slope converter accuracy is unrelated to the
integrating resistor and capacitor values as long as
they are stable during a measurement cycle. An
inherent benefit is noise immunity. Noise spikes are
integrated or averaged to zero during the integration
periods. Integrating ADCs are immune to the large
conversion errors that plague successive
approximation converters in high noise environments.
Interfering signals with frequency components at
multiples of the averaging period will be attenuated.
Integrating ADCs commonly operate with the signal
integration period set to a multiple of the 50/60Hz
power line period (see Figure 3-2).
FIGURE 3-2: Normal Mode Rejection of
Dual Slope Converter.
+
REF
Voltage
Analog
Input
Signal
+
DISPLAY
Switch
Driver
Control
Logic
Integrator
Output
Counter
Polarity Control
Phase
Control
VIN
µ
VREF
VIN
µ
1/2
VREF
Variable
Reference
Integrate
Time
Fixed
Signal
Integrate
Time
Integrator
C
Comparator
+/–
Where:
VR= Reference voltage
TSI = Signal integration time (fixed)
TRI = Reference voltage integration time
(variable).
1
RC
--------VIN
0
TSI
t()dt VRTRI
RC
---------------=
VIN = VRTRI
TSI
30
20
10
0
Normal Mode Rejection (dB)
0.1/T 1/T 10/T
Input Frequency
T = Measured Period
Where:
FOSC = Clock Frequency at Pin 38
VFS = Full Scale Input Voltage
RINT = Integrating Resistor
VINT = Desired Full Scale Integrator Output
Swing
CINT
4000()
1
FOSC
-------------
⎝⎠
⎛⎞
VFS
RINT
-----------
⎝⎠
⎛⎞
VINT
------------------------------------------------------=
© 2008 Microchip Technology Inc. DS21455D-page 9
TC7106/A/TC7107/A
4.0 ANALOG SECTION
In addition to the basic signal integrate and de-
integrate cycles discussed, the circuit incorporates an
auto-zero cycle. This cycle removes buffer amplifier,
integrator, and comparator offset voltage error terms
from the conversion. A true digital zero reading results
without adjusting external potentiometers. A complete
conversion consists of three cycles: an auto-zero,
signal integrate, and reference integrate cycle.
4.1 Auto-Zero Cycle
During the auto-zero cycle, the differential input signal
is disconnected from the circuit by opening internal
analog gates. The internal nodes are shorted to analog
common (ground) to establish a zero input condition.
Additional analog gates close a feedback loop around
the integrator and comparator. This loop permits
comparator offset voltage error compensation. The
voltage level established on CAZ compensates for
device offset voltages. The offset error referred to the
input is less than 10 µV.
The auto-zero cycle length is 1000 to 3000 counts.
4.2 Signal Integrate Cycle
The auto-zero loop is entered and the internal
differential inputs connect to VIN+ and VIN-. The
differential input signal is integrated for a fixed time
period. The TC7106/TC7106A signal integration period
is 1000 clock periods or counts. The externally set
clock frequency is divided by four before clocking the
internal counters.
The integration time period is:
EQUATION 4-1:
The differential input voltage must be within the device
Common mode range when the converter and
measured system share the same power supply
common (ground). If the converter and measured
system do not share the same power supply common,
VIN- should be tied to analog common.
Polarity is determined at the end of signal integrate
phase. The sign bit is a true polarity indication, in that
signals less than 1 LSB are correctly determined. This
allows precision null detection limited only by device
noise and auto-zero residual offsets.
4.3 Reference Integrate Phase
The third phase is reference integrate or de-integrate.
VIN- is internally connected to analog common and
VIN+ is connected across the previously charged
reference capacitor. Circuitry within the chip ensures
that the capacitor will be connected with the correct
polarity to cause the integrator output to return to zero.
The time required for the output to return to zero is
proportional to the input signal and is between 0 and
2000 counts.
The digital reading displayed is:
EQUATION 4-2:
Where:
FOSC = Externally set clock frequency
TSI 4
FOSC
-------------1000
×
=
1000 VIN
VREF
-------------=
TC7106/A/TC7107/A
DS21455D-page 10 © 2008 Microchip Technology Inc.
5.0 DIGITAL SECTION (TC7106A)
The TC7106A (Figure 5-2) contains all the segment
drivers necessary to directly drive a 3-1/2 digit liquid
crystal display (LCD). An LCD backplane driver is
included. The backplane frequency is the external
clock frequency divided by 800. For three
conversions per second, the backplane frequency is
60Hz with a 5V nominal amplitude. When a segment
driver is in phase with the backplane signal, the
segment is “OFF.” An out of phase segment drive
signal causes the segment to be “ON” or visible. This
AC drive configuration results in negligible DC voltage
across each LCD segment. This insures long LCD
display life. The polarity segment driver is “ON” for
negative analog inputs. If VIN+ and VIN- are reversed,
this indicator will reverse.
When the TEST pin on the TC7106A is pulled to V+, all
segments are turned “ON.” The display reads -1888.
During this mode, the LCD segments have a constant
DC voltage impressed. DO NOT LEAVE THE
DISPLAY IN THIS MODE FOR MORE THAN
SEVERAL MINUTES! LCD displays may be destroyed
if operated with DC levels for extended periods.
The display font and the segment drive assignment are
shown in Figure 5-1.
FIGURE 5-1: Display Font and Segment
Assignment
In the TC7106A, an internal digital ground is generated
from a 6-volt zener diode and a large P channel source
follower. This supply is designed to absorb the large
capacitive currents when the backplane voltage is
switched.
Display Font
1000s'100s' 10s' 1s
'
© 2008 Microchip Technology Inc. DS21455D-page 11
TC7106/A/TC7107/A
FIGURE 5-2: TC7106A Block Diagram.
TC7106A
Thousands Hundreds Tens Units
µ
4
39
OSC2
V+
TEST
1
To Switch Drivers
From Comparator Output
Clock
40 38
OSC3
OSC1
Control Logic
26
500
Ω
Data Latch
CREF -
RINT
V+
CAZ
VINT
28 29 27333634
10
mA
31
A/Z
INT
AZ & DE (±)
32
INT
26
Integrator To
Digital
Section
DE (+)
DE
(–) DE
(+)
DE (–)
ANALOG
COMMON
CREF
+
VIN +
VIN -
VBUFF
CINT
V
REF +V
REF
-
A/Z
CREF
+
35
+
LCD Segment Drivers
µ 200
Backplane
FOSC
V-
VTH
= 1V
V-
+
Internal Digital Ground
Low
Tempco
VREF
Comparator
A/Z
V+ – 3.0V
1
ROSC COSC
7 Segment
Decode 7 Segment
Decode 7 Segment
Decode
21
Typical Segment Output
Segment
Output
V+
0.5 mA
2mA
6.2V
LCD Display
+
37
A/Z
30
Internal Digital Ground
TC7106/A/TC7107/A
DS21455D-page 12 © 2008 Microchip Technology Inc.
6.0 DIGITAL SECTION (TC7107A)
Figure 6-2 shows a TC7106A block diagram. It is
designed to drive common anode LEDs. It is identical
to the TC7106A, except that the regulated supply and
backplane drive have been eliminated and the segment
drive is typically 8 mA. The 1000’s output (Pin 19) sinks
current from two LED segments, and has a 16 mA drive
capability.
In both devices, the polarity indication is “ON” for
negative analog inputs. If VIN- and VIN+ are reversed,
this indication can be reversed also, if desired.
The display font is the same as the TC7106A.
6.1 System Timing
The oscillator frequency is divided by 4 prior to clocking
the internal decade counters. The four-phase
measurement cycle takes a total of 4000 counts, or
16,000 clock pulses. The 4000-count cycle is indepen-
dent of input signal magnitude.
Each phase of the measurement cycle has the
following length:
1. Auto-zero phase: 1000 to 3000 counts (4000 to
12000 clock pulses).
For signals less than full scale, the auto-zero phase is
assigned the unused reference integrate time period:
2. Signal integrate: 1000 counts (4000 clock
pulses).
This time period is fixed. The integration period is:
EQUATION 6-1:
3. Reference Integrate: 0 to 2000 counts (0 to 8000
clock pulses).
The TC7106A/TC7107A are drop-in replacements for
the TC7106/TC7107 parts. External component value
changes are not required to benefit from the low drift
internal reference.
6.2 Clock Circuit
Three clocking methods may be used (see Figure 6-1):
1. An external oscillator connected to Pin 40.
2. A crystal between Pins 39 and 40.
3. An RC oscillator using all three pins.
FIGURE 6-1: Clock Circuits.
Where:
FOSC = Externally set clock frequency
TSI 4
FOSC
-------------1000
×
=
TC7106A
TC7107A
4
Crystal
RC Network
40 38
EXT
OSC
39
µ
To TEST Pin on TSC7106A
To GND Pin on TSC7107A
To
Counter
© 2008 Microchip Technology Inc. DS21455D-page 13
TC7106/A/TC7107/A
FIGURE 6-2: TC7107A Block Diagram.
TC7107A
Thousands Hundreds Tens Units
µ
4
39
OSC2
V+
1
To Switch Drivers
from Comparator Output
Clock
7 Segment
Decode
40 38
OSC3
OSC1
Logic Control
Data Latch
CREF
-
RINT
V+
CAZ
VINT
28 29 27333634
10
mA
31
A/Z
INT
AZ & DE (±)
32
INT 26
Integrator To
Digital
Section
DE (+)
DE
(–)
DE
(+)
DE (–)
ANALOG
COMMON
CREF+
VIN+
VIN-
VBUFF
CINT
VREF+
V
REF
-
CREF
+
35
+
LCD Segment Drivers
FOSC
V-
+
Digital Ground
Low
Tempco
VREF
Comparator
A/Z
V+ – 3.0V
1
ROSC COSC
7 Segment
Decode 7 Segment
Decode
Typical Segment Output
Internal Digital Ground
Segment
Output
V+
0.5 mA
8mA Led Display
+
A/Z
30
Digital
Ground
TEST
21
37
500
Ω
TC7106/A/TC7107/A
DS21455D-page 14 © 2008 Microchip Technology Inc.
7.0 COMPONENT VALUE
SELECTION
7.1 Auto-Zero Capacitor (CAZ)
The CAZ capacitor size has some influence on system
noise. A 0.47 µF capacitor is recommended for 200 mV
full scale applications where 1LSB is 100 µV. A
0.047 µF capacitor is adequate for 2.0V full scale
applications. A mylar type dielectric capacitor is
adequate.
7.2 Reference Voltage Capacitor
(CREF)
The reference voltage used to ramp the integrator out-
put voltage back to zero during the reference integrate
cycle is stored on CREF. A 0.1 µF capacitor is
acceptable when VIN- is tied to analog common. If a
large Common mode voltage exists (VREF- – analog
common) and the application requires 200 mV full
scale, increase CREF to 1.0 µF. Rollover error will be
held to less than 1/2 count. A mylar dielectric capacitor
is adequate.
7.3 Integrating Capacitor (CINT)
CINT should be selected to maximize the integrator
output voltage swing without causing output saturation.
Due to the TC7106A/TC7107A superior temperature
coefficient specification, analog common will normally
supply the differential voltage reference. For this case,
a ±2V full scale integrator output swing is satisfactory.
For 3 readings/second (FOSC = 48 kHz), a 0.22 µF
value is suggested. If a different oscillator frequency is
used, CINT must be changed in inverse proportion to
maintain the nominal ±2V integrator swing.
An exact expression for CINT is:
EQUATION 7-1:
CINT must have low dielectric absorption to minimize
rollover error. A polypropylene capacitor is
recommended.
7.4 Integrating Resistor (RINT)
The input buffer amplifier and integrator are designed
with class A output stages. The output stage idling
current is 100 µA. The integrator and buffer can supply
20 µA drive currents with negligible linearity errors.
RINT is chosen to remain in the output stage linear drive
region, but not so large that printed circuit board
leakage currents induce errors. For a 200 mV full scale,
RINT is 47 kΩ. 2.0V full scale requires 470 kΩ.
TABLE 7-1: COMPONENT VALUES AND
NOMINAL FULL SCALE
VOLTAGE
7.5 Oscillator Components
ROSC (Pin 40 to Pin 39) should be 100 kΩ. COSC is
selected using the equation:
EQUATION 7-2:
Note that FOSC is divided by four to generate the
TC7106A internal control clock. The backplane drive
signal is derived by dividing FOSC by 800.
To achieve maximum rejection of 60 Hz noise pickup,
the signal integrate period should be a multiple of
60 Hz. Oscillator frequencies of 240 kHz, 120 kHz,
80 kHz, 60 kHz, 48 kHz, 40 kHz, etc. should be
selected. For 50 Hz rejection, oscillator frequencies of
200 kHz, 100 kHz, 66-2/3 kHz, 50 kHz, 40 kHz, etc.
would be suitable. Note that 40 kHz (2.5 readings/
second) will reject both 50 Hz and 60 Hz.
7.6 Reference Voltage Selection
A full scale reading (2000 counts) requires the input
signal be twice the reference voltage.
Where:
FOSC = Clock Frequency at Pin 38
VFS = Full Scale Input Voltage
RINT = Integrating Resistor
VINT = Desired Full Scale Integrator Output
Swing
CINT
4000()
1
FOSC
-------------
⎝⎠
⎛⎞
VFS
RINT
-----------
⎝⎠
⎛⎞
VINT
------------------------------------------------------=
Component
Value
Nominal Full Scale Voltage
200.0 mV 2.000V
CAZ 0.47 µF 0.047 µF
RINT 47 kΩ470 kΩ
CINT 0.22 µF 0.22 µF
Note: FOSC = 48 kHz (3 readings per sec).
Required Full Scale Voltage* VREF
200.0 mV 100.0 mV
2.000V 1.000V
*V
FS = 2VREF
FOSC 0.45
RC
----------=
Where:
FOSC =48kHz
COSC = 100 pF
© 2008 Microchip Technology Inc. DS21455D-page 15
TC7106/A/TC7107/A
In some applications, a scale factor other than unity
may exist between a transducer output voltage and the
required digital reading. Assume, for example, a
pressure transducer output is 400 mV for 2000 lb/in2.
Rather than dividing the input voltage by two, the
reference voltage should be set to 200 mV. This
permits the transducer input to be used directly.
The differential reference can also be used when a
digital zero reading is required when VIN is not equal to
zero. This is common in temperature measuring
instrumentation. A compensating offset voltage can be
applied between analog common and VIN-. The
transducer output is connected between VIN+ and
analog common.
The internal voltage reference potential available at
analog common will normally be used to supply the
converter’s reference. This potential is stable
whenever the supply potential is greater than
approximately 7V. In applications where an externally
generated reference voltage is desired, refer to
Figure 7-1.
FIGURE 7-1: External Reference.
TC7106A
TC7107A
6.8V
Zener
IZ
V+
V+
V+
1.2V
Ref
Common
TC7106A
TC7107A
6.8 k
Ω
20 k
Ω
VREF+
VREF-
VREF+
VREF
-
(a) (b)
V+
TC7106/A/TC7107/A
DS21455D-page 16 © 2008 Microchip Technology Inc.
8.0 DEVICE PIN FUNCTIONAL
DESCRIPTION
8.1 Differential Signal Inputs
VIN+ (Pin 31), VIN- (Pin 30)
The TC7106A/TC7107A is designed with true
differential inputs and accepts input signals within the
input stage common mode voltage range (VCM). The
typical range is V+ – 1.0 to V+ + 1V. Common mode
voltages are removed from the system when the
TC7106A/TC7107A operates from a battery or floating
power source (isolated from measured system) and
VIN- is connected to analog common (VCOM) (see
Figure 8-2).
In systems where Common mode voltages exist, the
86 dB Common mode rejection ratio minimizes error.
Common mode voltages do, however, affect the
integrator output level. Integrator output saturation
must be prevented. A worst-case condition exists if a
large positive VCM exists in conjunction with a full scale
negative differential signal. The negative signal drives
the integrator output positive along with VCM (see
Figure 8-1). For such applications the integrator output
swing can be reduced below the recommended 2.0V
full scale swing. The integrator output will swing within
0.3V of V+ or V- without increasing linearity errors.
FIGURE 8-1: Common Mode Voltage
Reduces Available Integrator Swing (VCOM
VIN).
8.2 Differential Reference
VREF+ (Pin 36), VREF- (Pin 35)
The reference voltage can be generated anywhere
within the V+ to V- power supply range.
To prevent rollover type errors being induced by large
Common mode voltages, CREF should be large
compared to stray node capacitance.
The TC7106A/TC7107A circuits have a significantly
lower analog common temperature coefficient. This
gives a very stable voltage suitable for use as a
reference. The temperature coefficient of analog
common is 20 ppm/°C typically.
8.3 Analog Common (Pin 32)
The analog common pin is set at a voltage potential
approximately 3.0V below V+. The potential is between
2.7V and 3.35V below V+. Analog common is tied
internally to the N channel FET capable of sinking
20 mA. This FET will hold the common line at 3.0V
should an external load attempt to pull the common line
toward V+. Analog common source current is limited to
10 µA. Analog common is, therefore, easily pulled to a
more negative voltage (i.e., below V+ – 3.0V).
The TC7106A connects the internal VIN+ and VIN-
inputs to analog common during the auto-zero cycle.
During the reference integrate phase, VIN- is
connected to analog common. If VIN- is not externally
connected to analog common, a Common mode
voltage exists. This is rejected by the converter’s 86 dB
Common mode rejection ratio. In battery operation,
analog common and VIN- are usually connected,
removing Common mode voltage concerns. In systems
where V- is connected to the power supply ground, or
to a given voltage, analog common should be
connected to VIN-.
RI
+
VIN
VCM
CI
Integrator
VI
=[
[
VCM – VIN
Input Buffer
CI = Integration Capacitor
RI = Integration Resistor
4000
FOSC
TI = Integration Time =
Where:
VI
+
+
TI
RI
CI
© 2008 Microchip Technology Inc. DS21455D-page 17
TC7106/A/TC7107/A
FIGURE 8-2: Common Mode Voltage Removed in Battery Operation with VIN- = Analog Common.
The analog common pin serves to set the analog section
reference or common point. The TC7106A is specifically
designed to operate from a battery, or in any
measurement system where input signals are not
referenced (float), with respect to the TC7106A power
source. The analog common potential of V+ – 3.0V gives
a 6V end of battery life voltage. The common potential
has a 0.001% voltage coefficient and a 15Ω output
impedance.
With sufficiently high total supply voltage (V+ – V- >
7.0V), analog common is a very stable potential with
excellent temperature stability, typically 20 ppm/°C.
This potential can be used to generate the reference
voltage. An external voltage reference will be
unnecessary in most cases because of the 50 ppm/°C
maximum temperature coefficient. See Section 8.5
“Internal Voltage Reference”.
8.4 TEST (Pin 37)
The TEST pin potential is 5V less than V+. TEST may
be used as the negative power supply connection for
external CMOS logic. The TEST pin is tied to the
internally generated negative logic supply (Internal
Logic Ground) through a 500Ω resistor in the
TC7106A. The TEST pin load should be no more than
1mA.
If TEST is pulled to V+ all segments plus the minus sign
will be activated. Do not operate in this mode for more
than several minutes with the TC7106A. With
TEST = V+, the LCD segments are impressed with a
DC voltage which will destroy the LCD.
The TEST pin will sink about 10 mA when pulled to V+.
8.5 Internal Voltage Reference
The analog common voltage temperature stability has
been significantly improved (Figure 8-3). The “A”
version of the industry standard circuits allow users to
upgrade old systems and design new systems without
external voltage references. External R and C values
do not need to be changed. Figure 8-4 shows analog
common supplying the necessary voltage reference for
the TC7106A/TC7107A.
FIGURE 8-3: Analog Common
Temperature Coefficient.
FIGURE 8-4: Internal Voltage Reference
Connection.
VBUF CAZ VINT BPPOL
Segment
Drive
OSC1
OSC3
OSC2
V-
V+
VREF+
VREF -
Analog
Common
V-
V+
V-
V+
GND
GND
Measured
System
Power
Source 9V
LCD Display
TC7106A
+
VIN -
VIN +
Typical
No Maximum Specified No
Maximum
Specified
No
Maximum
Specified
Typical
Typical
200
180
160
140
120
100
80
60
40
20
0
Temperature Coefficient (ppm/°C)
ICL7136
TC
7106A ICL7106
Maximum
Limit
V-
Analog
Common
TC7106A
TC7107A
VREF+
32
35
36
24k
Ω
1k
Ω
VREF
-
VREF
1
Set VREF
= 1/2 VFULL SCALE
V+
TC7106/A/TC7107/A
DS21455D-page 18 © 2008 Microchip Technology Inc.
9.0 POWER SUPPLIES
The TC7107A is designed to work from ±5V supplies.
However, if a negative supply is not available, it can be
generated from the clock output with two diodes, two
capacitors, and an inexpensive IC (Figure 9-1).
FIGURE 9-1: Generating Negative Supply
From +5V.
In selected applications a negative supply is not
required. The conditions to use a single +5V supply
are:
The input signal can be referenced to the center
of the Common mode range of the converter.
The signal is less than ±1.5V.
An external reference is used.
The TSC7660 DC-to-DC converter may be used to
generate -5V from +5V (Figure 9-2).
FIGURE 9-2: Negative Power Supply
Generation with TC7660.
9.1 TC7107 Power Dissipation
Reduction
The TC7107A sinks the LED display current and this
causes heat to build up in the IC package. If the internal
voltage reference is used, the changing chip
temperature can cause the display to change reading.
By reducing the LED common anode voltage, the
TC7107A package power dissipation is reduced.
Figure 9-3 is a curve tracer display showing the
relationship between output current and output voltage
for a typical TC7107CPL. Since a typical LED has 1.8
volts across it at 7 mA, and its common anode is
connected to +5V, the TC7107A output is at 3.2V (point
A on Figure 9-3). Maximum power dissipation is
8.1 mA x 3.2V x 24 segments = 622 mW.
FIGURE 9-3: TC7107 Output Current vs.
Output Voltage.
Notice, however, that once the TC7107A output voltage
is above two volts, the LED current is essentially
constant as output voltage increases. Reducing the
output voltage by 0.7V (point B in Figure 9-3) results in
7.7 mA of LED current, only a 5 percent reduction.
Maximum power dissipation is only 7.7 mA x 2.5V x 24
= 462 mW, a reduction of 26%. An output voltage
reduction of 1 volt (point C) reduces LED current by
10% (7.3 mA) but power dissipation by 38% (7.3 mA x
2.2V x 24 = 385 mW).
Reduced power dissipation is very easy to obtain.
Figure 9-4 shows two ways: either a 5.1Ω, 1/4W
resistor, or a 1A diode placed in series with the display
(but not in series with the TC7107A). The resistor will
reduce the TC7107A output voltage, when all 24
segments are “ON,” to point “C” of Figure 9-4. When
segments turn off, the output voltage will increase. The
diode, on the other hand, will result in a relatively
steady output voltage, around point “B”.
TC7107A
V+
OSC1
OSC2
OSC3
GND
V-
V+
CD4009
0.047
µF 1N914
1N914
10
µF
+
V-
= -3.3V
GND
VIN-
VIN
VREF+
VREF-
COM
+5V
LED
DRIVE
36
1
35
32
31
30
26
V+
V- 21
TC7660
3
10 µF
+
10 µF
+28
5(-5V)
TC7107A
4
VIN+
C
B
A
6.000
7.000
8.000
9.000
10.000
2.00 2.50 3.00 3.50 4.00
Output Voltage (V)
Output Current (mA)
© 2008 Microchip Technology Inc. DS21455D-page 19
TC7106/A/TC7107/A
In addition to limiting maximum power dissipation, the
resistor reduces the change in power dissipation as the
display changes. This effect is caused by the fact that,
as fewer segments are “ON,” each “ON” output drops
more voltage and current. For the best case of six
segments (a “111” display) to worst-case (a “1888”
display), the resistor will change about 230 mW, while
a circuit without the resistor will change about 470 mW.
Therefore, the resistor will reduce the effect of display
dissipation on reference voltage drift by about 50%.
The change in LED brightness caused by the resistor is
almost unnoticeable as more segments turn off. If
display brightness remaining steady is very important
to the designer, a diode may be used instead of the
resistor.
FIGURE 9-4: Diode or Resistor Limits
Package Power Dissipation.
TP2
TP5
100
k
Ω
TP1
24 k
Ω
1k
Ω
0.1
µ
F
TP3
0.01
µ
F
+IN
0.22
µ
F
Display
Display
100 pF
+5V
1M
Ω
-5V
150
Ω
0.47
µ
F
TC7107A
40
TP
4
30
21
20
101
47
k
Ω
1N4001
5.1
Ω
1/4W
TC7106/A/TC7107/A
DS21455D-page 20 © 2008 Microchip Technology Inc.
10.0 TYPICAL APPLICATIONS
10.1 Decimal Point and Annunciator
Drive
The TEST pin is connected to the internally generated
digital logic supply ground through a 500Ω resistor. The
TEST pin may be used as the negative supply for
external CMOS gate segment drivers. LCD display
annunciators for decimal points, low battery indication,
or function indication may be added without adding an
additional supply. No more than 1 mA should be
supplied by the TEST pin; its potential is approximately
5V below V+ (see Figure 10-1).
FIGURE 10-1: Decimal Point Drive Using
Test as Logic Ground.
10.2 Ratiometric Resistance
Measurements
The true differential input and differential reference
make ratiometric reading possible. Typically in a
ratiometric operation, an unknown resistance is
measured, with respect to a known standard
resistance. No accurately defined reference voltage is
needed.
The unknown resistance is put in series with a known
standard and a current passed through the pair. The
voltage developed across the unknown is applied to the
input and the voltage across the known resistor is
applied to the reference input. If the unknown equals
the standard, the display will read 1000.
The displayed reading can be determined from the
following expression:
EQUATION 10-1:
The display will over range for:
RUNKNOWN
2 x RSTANDARD
FIGURE 10-2: Low Parts Count
Ratiometric Resistance Measurement.
FIGURE 10-3: Temperature Sensor.
TC7106A
BP
TEST 37
21
V+
V+
GND
To LCD
Decimal
Point
To LCD
Decimal
Point
To LCD
Backplane
4049
TC7106A Decimal
Point
Select
V+
V+
TEST
GND
4030
BP
Displayed (Reading) RUNKNOWN
RSTANDARD
----------------------------- 1000
×
=
VREF
+
V
REF
-
VIN +
VIN-
Analog
Common
TC7106A
LCD Display
RSTANDARD
RUNKNOWN
V+
V+
V-
VIN-
VIN+
VREF
+
VREF
-
Common
50 k
Ω
R2
160 k
Ω
300 k
Ω
300k
Ω
R1
50 k
Ω
1N4148
Sensor
9V
+
TC7106A
VFS = 2V
jjjkjjjjjjjjjjnjjj HEEEEEEEEEEEEEE E E _ fi :% r? E a; ‘_\
© 2008 Microchip Technology Inc. DS21455D-page 21
TC7106/A/TC7107/A
FIGURE 10-4: Positive Temperature
Coefficient Resistor Temperature Sensor.
FIGURE 10-5: TC7106A, Using the Internal
Reference: 200 mV Full Scale, 3 Readings-Per-
Second (RPS).
FIGURE 10-6: TC7107 Internal Reference:
200 mV Full Scale, 3RPS, VIN- Tied to GND for
Single Ended Inputs.
FIGURE 10-7: Circuit for Developing Under
Range and Over Range Signals from TC7106A
Outputs.
TC7106A
V+ V-
VIN-
VIN+
VREF+
VREF-
Common
5.6 k
Ω
160 k
Ω
R2
20 k
Ω
1N914
9V
R
1
20 k
Ω
+
R3
0.7%/×C
PTC
100 k
Ω
100 pF
0.47 µF 47 k
Ω
0.22 µF
To Display
To Backplane
0.1 µF
21
1k
Ω
22 k
Ω
9V
Set VREF = 100 mV
TC7106A
0.01
µF
+
IN
1M
Ω
To Pin 1
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
+
100 k
Ω
100 pF
0.47 µF 47 k
Ω
0.22µF
To Display
0.1 µF
21
1k
Ω
22 k
Ω
Set VREF = 100 mV
0.01
µF
+
IN
1M
Ω
To Pin 1
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
-5V
+5V
TC7107A
2120
40
To Logic
VCC
V-
To Logic
VCC
V+
CD4077
U/R
O/R
CD4023
OR 74C10
TC7106A
1
O/R = Over Range
U/R = Under Range
7! lT ,pzzcczz
TC7106/A/TC7107/A
DS21455D-page 22 © 2008 Microchip Technology Inc.
FIGURE 10-8: TC7106/TC7107:
Recommended Component Values for 2.00V Full
Scale.
FIGURE 10-9: TC7107 Operated from
Single +5V Supply.
FIGURE 10-10: 3-1/2 Digit True RMS AC DMM.
100 k
Ω
100 pF
0.047 µF 470 k
Ω
0.22 µF
To Display
0.1 µF
25 k
Ω
24 k
Ω
V+
Set VREF = 1V
0.01 µF
+
IN
1M
Ω
V-
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
To Pin 1
TC7106A
TC7107A
100pF
0.47µ
F
47k
Ω
To Display
0.1
µ
F
1k
Ω
V+
Set VREF = 100mV
10k
Ω
10k
Ω
1.2V
0.01µF
IN
1M
Ω
100k
Ω
0.22µF
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
TC7107A
To PIn 1
+
SEG
DRIVE
47 k
Ω
1W
10%
+
1
2
3
4
5
6
78
9
10
11
12
13
14
AD636
6.8µF
0.02
mF
20 k
Ω
10%
10 k
Ω
1M
Ω
1M
Ω
IN4148 1mF
+
9M
Ω
900 k
Ω
90 k
Ω
10 k
Ω
200 mV
2V
20V
200V
COM
VIN
TC7106A
LCD Display
24 k
Ω
1k
Ω
2.2µF 0.01
1M
Ω
10%
9V
+
1
36
35
32
31
30
26
V+
Analog Common
VIN
+
VIN-
26 27
29
28
40
38
39
BP
V-
C1 = 3 - 10 pF Variable
C2 = 132 pF Variable
VREF
+
VREF-
V-
µF
© 2008 Microchip Technology Inc. DS21455D-page 23
TC7106/A/TC7107/A
FIGURE 10-11: Integrated Circuit Temperature Sensor.
TC7106A
VREF-
Common
VIN+
V+
+
9V
V+
2 1
426
6
5
3
2
31
4
8
Temperature
Dependent
Output
NC
1.3k 50 k
Ω
Constant 5V
50 k
Ω
51 k
Ω
5.1 k
Ω
R4R5
R1
R2
VOUT=
1.86V @
25×C
VIN-
VFS= 2.00V
GND V-
VOUT
ADJ
TEMP
REF02 TC911
VREF+
nnnnnnnnnnnnnnnnnnnn nnnnnnnnnnnnnnnnnnnn Tc7106:PL O Q uuuuuuuuuuuuuuuuuuuu uuuuuuuuuuuuuuuuuuuu HHHHHHHHHHH HHHHUUUHUUH UHUUUUHHHHH C HUHUUHUHUUU NMN alor ( )
TC7106/A/TC7107/A
DS21455D-page 24 © 2008 Microchip Technology Inc.
11.0 PACKAGING INFORMATION
11.1 Package Marking Information
44-Pin PLCC
1
Example:
40-Pin PDIP
XXXXXXXXXXX
XXXXXXXXXXX
XXXXXXXXXXX
M
*h
XXXXXXXXXXXXXXXXXX
XXXXXXXXXXXXXXXXXX
XXXXXXXXXXXXXXXXXX
YYWWNNN
Example:
44-Pin MQFP
Example:
XXXXXXXXXX
XXXXXXXXXX
YYWWNNN
M
XXXXXXXXXX
TC106CKW
^^0743256
M
Legend: XX...X Customer-specific information
Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
*This package is Pb-free. The Pb-free JEDEC designator ( )
can be found on the outer packaging for this package.
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
3
e
3
e
YYWWNNN
TC7106CLW
M
^^0743256
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TC7106/A/TC7107/A
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TC7106/A/TC7107/A
DS21455D-page 28 © 2008 Microchip Technology Inc.
NOTES:
© 2008 Microchip Technology Inc. DS21455D-page 29
TC7106/A/TC7107/A
APPENDIX A: REVISION HISTORY
Revision D (February 2008)
The following is the list of modifications.
1. Updated Section 11.0 “Packaging Informa-
tion”.
2.
3. Added Appendix A.
4. Updated the Product Identification System
page.
Revision C (April 2006)
The following is the list of modifications:
Undocumented Changes.
Revision B (May 2002)
The following is the list of modifications:
Undocumented Changes.
Revision A (April 2002)
Original Release of this Document.
TC7106/A/TC7107/A
DS21455D-page 30 © 2008 Microchip Technology Inc.
NOTES:
PART NO. XX XXX
© 2008 Microchip Technology Inc. DS21455D-page 31
TC7106/A/TC7107/A
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
Device: TC7106: 3-3/4 Digit A/D, with Frequency Counter and Probe
TC7106A: 3-3/4 Digit A/D, with Frequency Counter and Probe
TC7106: 3-3/4 Digit A/D, with Frequency Counter and Probe
TC7107A: 3-3/4 Digit A/D, with Frequency Counter and Probe
Temperature Range: C = 0°C to +70°C
I= -25°C to +85°C
Package: LW = Plastic Leaded Chip Carrier (PLCC), 44-lead
PL = Plastic DIP, (600 mil Body), 40-lead
KW = Plastic Metric Quad Flatpack, (MQFP), 44-lead
Tape & Reel: 713 = Tape and Reel
PART NO. X XX
PackageTemperature
Range
Device
Examples:
a) TC7106CLW: 3-3/4 A/D Converter,
44LD PLCC package.
b) TC7106CPL: 3-3/4 A/D Converter,
40LD PDIP package.
c) TC7106CKW713: 3-3/4 A/D Converter,
44LD MQFP package,
Tape and Reel.
a) TC7106ACLW: 3-3/4 A/D Converter,
44LD PLCC package.
b) TC7106ACPL: 3-3/4 A/D Converter,
40LD PDIP package.
c) TC7106ACKW713: 3-3/4 A/D Converter,
44LD MQFP package,
Tape and Reel
a) TC7107CLW: 3-3/4 A/D Converter,
44LD PLCC package.
b) TC7107CLP: 3-3/4 A/D Converter,
40LD PDIP package.
c) TC7107CKW713: 3-3/4 A/D Converter,
44LD MQFP package
Tape and Reel.
a) TC7107ACLW: 3-3/4 A/D Converter,
44LD PLCC package.
b) TC7107ACLP: 3-3/4 A/D Converter,
40LD PDIP package.
c) TC7107ACKW: 3-3/4 A/D Converter,
44LD MQFP package.
XXX
Tape &
Reel
TC7106/A/TC7107/A
DS21455D-page 32 © 2008 Microchip Technology Inc.
NOTES:
QUALITY MANAGEMENT SYSTEM CERTIFIED BY DNV = ISO/TS 1694922002 =
© 2008 Microchip Technology Inc. DS21455D-page 33
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
PICSTART, PRO MATE, rfPIC and SmartShunt are registered
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
FilterLab, Linear Active Thermistor, MXDEV, MXLAB,
SEEVAL, SmartSensor and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, CodeGuard,
dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, In-Circuit Serial
Programming, ICSP, ICEPIC, Mindi, MiWi, MPASM, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, PICkit, PICDEM,
PICDEM.net, PICtail, PIC32 logo, PowerCal, PowerInfo,
PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Total
Endurance, UNI/O, WiperLock and ZENA are trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2008, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Note the following details of the code protection feature on Microchip devices:
Microchip products meet the specification contained in their particular Microchip Data Sheet.
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Microchip received ISO/TS-16949:2002 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
Q ‘MICROCHIP
DS21455D-page 34 © 2008 Microchip Technology Inc.
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Fax: 33-1-69-30-90-79
Germany - Munich
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
Spain - Madrid
Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
UK - Wokingham
Tel: 44-118-921-5869
Fax: 44-118-921-5820
WORLDWIDE SALES AND SERVICE
01/02/08

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