PIC16(L)F18856,76 Errata Datasheet by Microchip Technology

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2016-2018 Microchip Technology Inc. DS80000706C-page 1
PIC16(L)F18856/18876
The PIC16(L)F18856/18876 family devices that you
have received conform functionally to the current
Device Data Sheet (DS40001824C), except for the
anomalies described in this document.
The silicon issues discussed in the following pages are
for silicon revisions with the Device and Revision IDs
listed in Tabl e 1 . The silicon issues are summarized in
Table 2.
The errata described in this document will be addressed
in future revisions of the PIC16(L)F18856/18876 silicon.
Data Sheet clarifications and corrections start on page
5, following the discussion of silicon issues.
The silicon revision level can be identified using the
current version of MPLAB® IDE and Microchip’s
programmers, debuggers, and emulation tools, which
are available at the Microchip corporate website
(www.microchip.com).
For example, to identify the silicon revision level
using MPLAB IDE in conjunction with a hardware
debugger:
1. Using the appropriate interface, connect the
device to the hardware debugger.
2. Open an MPLAB IDE project.
3. Configure the MPLAB IDE project for the
appropriate device and hardware debugger.
4. For MPLAB X IDE, select Window > Dashboard
and click the Refresh Debug Tool Status icon
().
5. Depending on the development tool used, the
part number and Device Revision ID value
appear in the Output window.
The DEVREV values for the various PIC16(L)F18856/
18876 silicon revisions are shown in Table 1.
Note: This document summarizes all silicon
errata issues from all revisions of silicon,
previous as well as current. Only the
issues indicated in the last column of
Table 2 apply to the current silicon
revision (A2).
Note: If you are unable to extract the silicon
revision level, please contact your local
Microchip sales office for assistance.
TABLE 1: SILICON DEVREV VALUES
Part Number Device ID(1)
Revision ID (Silicon
Revision)(2)
A2 A3
PIC16F18856 3070h 2002h 2003h
PIC16LF18856 3072h 2002h 2003h
PIC16F18876 3071h 2002h 2003h
PIC16LF18876 3073h 2002h 2003h
Note 1: The Revision ID and Device ID are located in the Configuration memory at addresses 8005h and 8006h,
respectively.
2: Refer to the “PIC16(L)F188XX Memory Programming Specification” (DS40001753) for detailed
information on Device and Revision IDs for your specific device.
PIC16(L)F18856/18876 Family
Silicon Errata and Data Sheet Clarification
PIC16(L)F18856/18876
DS80000706C-page 2 2016-2018 Microchip Technology Inc.
TABLE 2: SILICON ISSUE SUMMARY
Module Feature Item
No. Issue Summary
Affected Revision(1)
A2 A3
Analog-to-Digital
Converter with
Computation
(ADC2)
ADC Conversion 1.1 When using ADCRC as the ADCC clock
source, there is a delay of one instruction
cycle to set the ADGO bit.
X
Analog-to-Digital
Converter with
Computation
(ADC2)
Positive Voltage
Reference
1.2 Using the FVR as the ADC positive voltage
reference can cause missing codes.
XX
Nonvolatile
Memory Control
NVMREG Access 2.1 Self-writes on LF devices below 2.2V at -40°C
may not work.
X
EEPROM Indirect Read 3.1 Indirect read of EEPROM with FSR returns
unexpected value.
X
ECCP Compare Mode 4.1 Toggle mode may output multiple pulses
when source clock has a prescaler other than
1:1.
X
MSSP I2C Communica-
tion
5.1 Acknowledge failure on LF devices only. X
Electrical
Specifications
Fixed Voltage
Reference (FVR)
Accuracy
6.1 Fixed Voltage Reference (FVR) output
tolerance may be higher than specified at
temperatures below -20°C.
X
Secondary
Oscillator (Sosc)
Low-Power mode 7.1 SOSC does not properly run in Low-Power
mode at low temperatures.
X
Note 1: Only those issues indicated in the last column apply to the current silicon revision.
Work around Affected S Work around Affected Silicon Revisions Work around Work around Affected ’ con Revisions Affected Silicon Revisions
2016-2018 Microchip Technology Inc. DS80000706C-page 3
PIC16(L)F18856/18876
Silicon Errata Issues
1. Module: Analog-to-Digital Converter with
Computation (ADC2)
1.1 ADC Conversion
When using ADCRC as the clock source for
ADCC, there is a delay of one instruction cycle
between the user setting the ADGO bit and being
able to read it set. This can lead to a false
conversion complete scenario (i.e., ADGO being
cleared), depending if the user code has a bit clear
test (BTFSC) instruction on the ADGO bit,
immediately after setting the ADGO bit. See code
example below.
e.g.
BSF ADCON0, ADGO ; Start conversion
BTFSC ADCON0, ADGO ; Is conversion done?
GOTO $-1 ; No, test again
The BTFSC will pass the very first time in this
situation.
Work around
Add a NOP instruction after setting the ADGO bit
and before testing the bit for completion of
conversion. See code example below.
e.g.
BSF ADCON0, ADGO ; Start conversion
NOP
BTFSC ADCON0, ADGO ; Is conversion done?
GOTO $-1 ; No, test again
Affected Silicon Revisions
1.2 Positive Voltage Reference
Using the FVR as the positive voltage reference
for the ADC can cause an increase in missing
codes.
Work around
Increase the bit conversion time (TAD) to 8 us or
higher.
Affected Silicon Revisions
2. Module: Nonvolatile Memory Control
2.1 NVMREG Access
When performing self-writes through NVMREG
access on PIC16LF18857/18877 devices with
VDD below 2.2V and temperature of -40°C, the
writes may not work. This applies to both PFM
and EEPROM writes.
Work around
None.
Affected Silicon Revisions
3. Module: EEPROM
3.1 Indirect Read
Performing FSR reads of Data EEPROM
addresses other than the lowest address
(FSR=7000h) will return unexpected values.
Work around
Set NVMADRH:L to the desired address (F000h
through F0FFh) and retrieve the EEPROM
value from the NVMDATL register by setting the
NVMREGS and RD bits in the NVMCON1
register.
Affected Silicon Revisions
Note: This document summarizes all silicon
errata issues from all revisions of silicon,
previous as well as current. Only the
issues indicated by the shaded column in
the following tables apply to the current
silicon revision (A2).
A2 A3
X
A2 A3
XX
A2 A3
X
A2 A3
X
Work around Work around Affected S Work around Affected S Work around
PIC16(L)F18856/18876
DS80000706C-page 4 2016-2018 Microchip Technology Inc.
4. Module: ECCP
4.1 Compare Mode
The ECCP Compare Toggle modes
(CCPxCON<3:0> bits = 0010 or 0001) output
multiple pulses instead of a single toggle pulse
when its source clock has a prescaler other than
1:1.
Work around
Use CCP Compare mode with pulse output
(CCPxCON<3:0> bits = 1011) to clock a CLC
configured as a J-K flip-flop in Toggle mode.
Affected Silicon Revisions
5. Module: MSSP
5.1 I2C Communication
When using the MSSP to perform I2C
communication on LF devices and the voltage
for VDD is above 3V, the Acknowledge signal
(ACK) does not always occur after the second
address byte is received, as expected. This
issue exhibits itself when the MSSP is
configured either for 7-bit or 10-bit addressing
and in either Master or Slave mode.
The issue occurs more frequently when using
10-bit addressing in Slave mode and the lower
address bits (A7-A0) are transmitted by the
Master on the SDA line.
Work around
Do not exceed 3V on VDD when using an LF
device in this manner.
Affected Silicon Revisions
6. Module: Electrical Specifications
6.1 Fixed Voltage Reference (FVR) Accuracy
At temperatures below -20°C, the output voltage
for the FVR may be greater than the levels
specified in the data sheet. This will apply to all
three gain amplifier settings (1X, 2X, 4X). The
affected parameter numbers found in the data
sheet are: FVR01, (1X gain setting), FVR02 (2X
gain setting), and FVR03 (4X gain setting).
Work around
At temperatures above -20°C, the stated
tolerances in the data sheet remain in effect.
Operate the FVR only at temperatures above
-20°C.
Affected Silicon Revisions
7. Module: Secondary Oscillator (SOSC)
7.1 Low-Power Mode
While operating the device at low temperatures
and using the SOSC in Low-Power mode
(OSCCON3<6> = 0), the SOSC might fail to
operate as expected.
Work around
If SOSC functionality is required at low
temperatures, configure the SOSC for high-power
operation (OSCCON3<6> = 1).
Affected Silicon Revisions
A2 A3
X
A2 A3
X
A2 A3
X
A2 A3
X
2016-2018 Microchip Technology Inc. DS80000706C-page 5
PIC16(L)F18856/18876
Data Sheet Clarifications
The following typographic corrections and clarifications
are to be noted for the latest version of the device data
sheet (DS40001824C):
None.
Note: Corrections are shown in bold. Where
possible, the original bold text formatting
has been removed for clarity.
PIC16(L)F18856/18876
DS80000706C-page 6 2016-2018 Microchip Technology Inc.
APPENDIX A: DOCUMENT
REVISION HISTORY
Rev A Document (8/2016)
Initial release of this document.
Rev B Document (4/2017)
Added Modules 1.2 (PVR), 5 (MSSP) and 6 (Electrical
Specifications).
Data Sheet Clarifications:
Removed all modules, data sheet updated.
Rev C Document (2/2018)
Added Module 7 (Secondary Oscillator) and a row in
Table 2.
YSTEM
2016-2018 Microchip Technology Inc. Advance Information DS80000706C-page 7
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logo, CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR,
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© 2016-2018, Microchip Technology Incorporated, All Rights
Reserved.
ISBN: 978-1-5224-2870-1
Note the following details of the code protection feature on Microchip devices:
Microchip products meet the specification contained in their particular Microchip Data Sheet.
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
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and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
QUALITY MANAGEMENT S
YSTEM
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