W2RG012RN Datasheet by Omron Electronics Inc-EMC Div

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LED Control IC W2RG012RN 1
LED Control IC
W2RG012RN
Optimal IC for LED Control
An exponential function-based PWM gradation control for up to
256 gradations, enabling beautiful fade-in and fade-out.
Dynamic drive of LEDs connected in a matrix form; individual
control of up to 128 LED Lines.
Serial bus connection permitting connection of up to 15 ICs on
the same communication line.
24 constant current outputs contained in a small package of
7x7mm.
• Built-in thermal shutdown.
• RoHS Compliant
Ordering Information
Specifications
Absolute Maximum Ratings
Note: 1. Take the power consumption and allowable power dissipation rating into consideration.
2. Values when the product is mounted on a standard substrate (70 mm x 70 mm x1.6 mmt, FR-4).
When using the product at Ta = 25°C or higher, the values must be decreased using the constant of temperature decrease Rtd [mW/°C].
Pd1: Rtd = 27.4 mW/°C for a double-sided substrate with a back layer copper foil area of 4,900 mm2
Pd2: Rtd = 14.4 mW/°C for a double-sided substrate with a back layer copper foil area of 225 mm2
Pd3: Rtd = 9.28 mW/°C for a single-sided substrate with a copper foil area of 36 mm2
Description Model
LED Control IC W2RG012RN
Item Symbol Rating Applicable Terminal
Supply Voltage VDD -0.3 to 7.0 V VDD
Input Voltage VIN -0.3 to VDD + 0.3 7.0 V SDA, SCL, RST, CE, ADR1, ADR0, DIV, COM
Signal Output Voltage VSOUT -0.3 to VDD + 0.3 7.0 V SDO, OUTDC
Drive Output Voltage VDOUT -0.3 to 20 V OUT0R~7R, OUT0G~7G, OUT0B~7B, OUTS0~S3
Drive Output Current/pin
(See note 1) IDOUT 80 mA OUT0R~7R, OUT0G~7G, OUT0B~7B
Switch Output Current/pin IDOUTS 20 mA OUTS0~S3
Allowable Power Dissipation
(See note 2)
Pd1 3.43 W - - -
Pd2 1.80 W - - -
Pd3 1.16 W - - -
Ambient Operating Temperature TOPR -20 to 85 °C ---
Ambient Storage Temperature TSTG -40 to 150 °C ---
Curve of Heat Reduction Ratio
Back copper foil: 4,900 mm
2
Back copper foil:
225 mm
2
3430
1800
1160
0
25 85
Ambient Temperature (°C)
Allowable dissipation (mW)
150
Copper foil:
36 mm
2
ooooo
2LED Control IC W2RG012RN
Recommended Operating Conditions
Note: 1. Take the timing characteristics into consideration.
DC Electrical Characteristics (Ta = 25°C, VDD = 5V)
Timing Characteristics (Ta = -20 to 85 °C, VDD = 3.0 to 5.5V)
Serial Communication with Address
Item Symbol Rating Applicable Terminal
Supply Voltage VDD 3.0 to 5.5 V VDD
Input Voltage VIN 0toV
DD VSDA, SCL, RST, CE, ADR1, ADR0, DIV, COM
Signal Output Current ISOUT -10 to 10 mA SDO, OUTDC
Communication Clock Frequency (See note 1) fSCL Max. 5 MHz SCL
Item Symbol Condition Spec. Unit Applicable
terminal
Min. Typ. Max.
High-level Input Voltage VIH --- V
DD x0.7 --- --- V SDA, SCL, RST, CE
Low-level Input Voltage VIL --- --- --- V
DD x 0.3 V
A/D Input Voltage
VAD1 “10” output VDD x0.9 --- V
DD + 0.3 V
ADR1, ADR0, DIV, COM
VAD2 “11” output VDD x0.6 --- V
DD x 0.7 V
VAD3 “01” output VDD x0.3 --- V
DD x 0.4 V
VAD4 “00” output -0.3 - - - VDD x 0.1 V
High-level Signal Output Voltage VSOH ISOUT =-5mA V
DD -0.5 --- --- V SDO, OUTDC
Low-level Signal Output Voltage VSOL ISOUT =5mA --- --- 0.5 V
ON Resistance1 RON1 --- --- 6.3 10 Ω
OUT0R~7R
OUT0G~7G
OUT0B~7B
Inter-pin Current Accuracy ΔIP IDOUT =20mA -3 --- 3 %
Inter-device Current Accuracy ΔID IDOUT =20mA -6 --- 6 %
Drive Output Leak Current IDL --- --- --- 1 μA
ON Resistance2 RON2 --- --- 9 20 ΩOUTS0~S3
Operating Current Consumption IDD Total Output: IDOUT =20mA --- 5 7 mA V
DD
Item Symbol Condition Spec. Unit Applicable
terminal
Min. Typ. Max.
Communication Clock
Pulse Width tSCL --- 100 - - - - - - ns SCL
Data Setup Time tSDA_SU --- 90 --- --- ns SCL,SDA
Data Hold Time tSDA_HD --- 90 --- --- ns
CE Setup Time tCE_SU --- 50 --- --- ns
SCL, SDA, CE
CE Hold Time tCE_HD --- 50 --- --- ns
Data Output Time tSDO Load capacity: 100 pF - - - - - - 80 ns SCL, SDO
t
SDA_SU
t
SDA_HD
t
SDO
t
SCL
t
SCL
t
CE_SU
t
CE_HD
SDA
SCL
SDO
CE
50 %
50 %
50 %
50 %
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LED Control IC W2RG012RN 3
I2C-based Serial Communication
Engineering Data
Block Diagram
Item Symbol Condition Spec. Unit Applicable
terminal
Min. Typ. Max.
Clock “L” Period tLOW --- 50 --- --- ns SCL
Clock “H” Period tHIGH --- 50 --- --- ns
Bus Freeing Time tBUF --- 80 - - - - - - ns SDA
Start Setup Time tSU;STA --- 50 --- --- ns
SCL,SDA
Start Hold Time tHD;STA --- 50 --- --- ns
Stop Setup Time tSU;STO --- 50 --- --- ns
Data Setup Time tSU;DAT --- 30 --- --- ns
Data Hold Time tHD;DAT --- 0 --- --- ns
CE Setup Time tSU;CE --- 50 --- --- ns
SCL, SDA, CE
CE Hold Time tHD;CE --- 50 --- --- ns
Data Output Time tSDO Load capacity: 100 pF - - - - - - 80 ns SCL, SDO
tSU;STA tSU;STO
tHD;CE
tHD;DAT tHIGH tSU;DAT
tSDO
tBUF
tHD;STA
tLOW
tSU;CE
Sr P SP
70 %
30 %
70 %
30 %
70 %
30 %
70 %
30 %
SDO
CE
SDA
SCL
Thermal
shutdown
circuit
Current setting
circuit
Internal
oscillation
circuit
Clock
division
circuit
Internal
power
supply
Filter
Filter
A/D
A/D
A/D
Filter
Filter
A/D
OUT0R
OUT0G
OUT0B
OUT1R
OUT1G
OUT1B
OUTS0
OUTS1
OUTS2
OUTS3
OUTDC
OUT7R
OUT7G
OUT7B
REXTR REXTG REXTB
CE
ADR1
ADR0
VDD
CAP
GND
SCL
SDO
COM
DIV
SDA
RST
System
clock
Gradation control0R
Gradation control0G
Gradation control0B
Gradation control1R
Gradation control1G
Gradation control1B
Gradation control7R
Gradation control7G
Gradation control7B
Data selector
Reset
Communication circuit
Register
Constant current output circuit Open drain
output circuit
Matrix
control
circuit
Output switch circuit
.
.
.
.
.
..
.
.
.
.
.
.
OI'I'IROFI
4LED Control IC W2RG012RN
Terminal Designation
Note: 1. When CE terminal is not used, keep it in L fixing condition. (This does not apply to CE-D8 mode.)
2. CAP terminal is connected to capacitor for power smoothing. Connect a 0.1 μF capacitor between the terminal and GND.
3. A 100 kΩpullup resistance is built in the RST terminal. It is recommended that when the terminal is not used, a 0.1
μF capacitor be connected
between the terminal and GND to ensure stable operation.
4. Leave unused output terminals open.
Terminal Number Terminal Name Description I/O Function
1SDA Serial data input I
CMOS, filter
2SCL Serial clock input I
3CE Chip enable input (See note 1) I
4VDD Power source P
5CAP Capacitor (See note 2) - - -
6GND Ground P
7ADR1 Device address 1 I
Resistance partial
pressure input
8ADR0 Device address 0 I
9DIV Division mode I
10 COM Communication mode I
11 REXTR Current setting resistance R - - -
12 REXTG Current setting resistance G - - -
13 REXTB Current setting resistance B - - -
14 OUT0R Output 0R O
Constant Current15 OUT0G Output 0G O
16 OUT0B Output 0B O
17 GND Ground P
18 OUT1R Output 1R O
Constant Current
19 OUT1G Output 1G O
20 OUT1B Output 1B O
21 OUT2R Output 2R O
22 OUT2G Output 2G O
23 GND Ground P
24 OUT2B Output 2B O
Constant Current
25 OUT3R Output 3R O
26 OUT3G Output 3G O
27 OUT3B Output 3B O
28 OUT4R Output 4R O
29 OUT4G Output 4G O
30 OUT4B Output 4B O
31 GND Ground P
32 OUT5R Output 5R O
Constant Current
33 OUT5G Output 5G O
34 OUT5B Output 5B O
35 OUT6R Output 6R O
36 OUT6G Output 6G O
37 GND Ground P
38 OUT6B Output 6B/Output switch 4 O
Constant Current
39 OUT7R Output 7R/Output switch 5 O
40 OUT7G Output 7G/Output switch 6 O
41 OUT7B Output 7B/Output switch 7 O
42 OUTS0 Output switch 0 O
N-ch open drain
43 OUTS1 Output switch 1 O
44 OUTS2 Output switch 2 O
45 OUTS3 Output switch 3 O
46 OUTDC Synchronous control output O CMOS
47 SDO Serial data output O
48 RST Reset (See note 3) I CMOS, filter, pull-up
OI'I'IROD
LED Control IC W2RG012RN 5
Operation
Functional Overview
LEDs in 24 systems are driven at a constant current or voltage. Also, LEDs connected in a matrix form can be lit dynamically (pulse lighting). For
dynamic lighting, LEDs in 48 systems (divided into 2 parts), 96 systems (divided into 4 parts), or 128 systems (divided into 8 parts) can be gradation
controlled individually.
Command Reception
An LED lighting command is received via serial communication. Regarding communication method, the product can adapt to three kinds of serial
communication with address, and I2C-based serial communication. LED lighting data for up to 128 units can be transmitted continuously. As only
a single operation is required for designation of a start signal or a device address, the overall volume of communication can be reduced.
Gradation Control
A 256-gradation can be used for lighting. Each gradation is allocated to a duty ratio based on the exponential function, to enable lighting design
suited to human visual sensation.
Matrix Control
The product is adapted to connection of 24x1, 24x2, 24x4 and 16x8 matrix. Also, lighting errors at switching can be controlled by controlling switch
timing for dynamic lighting.
Power-saving Control
For driving, power consumption for LED lighting is controlled to 75%/50%25% of the normal level. Collective switching via communication command
can be executed, permitting easy switching between normal and power-saving operations. Either current control or duty ratio control can be select-
ed as control method. For current control, the output current is changed to a 75%/50%/25% level, with the current set with current setting terminal
REXTR/REXTG/REXTB as reference. For duty ratio control, the output duty ratio is changed to a 75%/50%/25% level, with the duty ratio allocated
to a gradation as reference.
Number of Control Systems
Up to 15 devices can be connected through address designation. This permits the control of LEDs in up to 1,920 systems. Additional devices can
be connected by switching the CE terminal.
Description of Terminals
Setting By Inputting Resistance Partial Pressure
Device address setting terminal (ADR1/ADR0), division mode setting terminal (DIV), and communication mode setting terminal (COM) are level
input terminals with an A/D converter built in internal IC. One of 4 voltage levels (GND, VDD x 1/3, VDD x 2/3, and VDD) is set by inputting resistance
partial pressure.
Device Address Setting
The device address is set by inputting resistance partial pressure to
device address setting terminal (ADR1/ADR0). The address is cho-
sen from among 15 addresses from “0000” to “1110”. “1111” cannot
be designated to any device, as it is used for collective designation to
all devices in communication. The relationship between device
address and ADR terminal voltage is shown in the table below.
Selection of Division Mode
The matrix configuration for connected LEDs is set by inputting resis-
tance partial pressure to devision mode setting terminal (DIV). The
relationship between matrix configuration and DIV terminal voltage is
shown in the table below.
Device Address ADR1 ADR0
0000 GND GND
0001 GND VDD x 1/3
0010 GND VDD
0011 GND VDD x 2/3
0100 VDD x 1/3 GND
0101 VDD x 1/3 VDD x 1/3
0110 VDD x 1/3 VDD
0111 VDD x 1/3 VDD x 2/3
1000 VDD GND
1001 VDD VDD x 1/3
1010 VDD VDD
1011 VDD VDD x 2/3
1100 VDD x 2/3 GND
1101 VDD x 2/3 VDD x 1/3
1110 VDD x 2/3 VDD
1111 (reserved) VDD x 2/3 VDD x 2/3
Matrix configuration DIV
24x1 GND
24 x2 VDD x 1/3
24x4 VDD
16x8 VDD x 2/3
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6LED Control IC W2RG012RN
Selection of Division Mode (continued)
The function of output terminal varies according to matrix configura-
tion. The relationship between matrix configuration and terminal
function is shown in the table below.
Selection of Communication mode
The communication mode is set by inputting resistance partial pres-
sure to communication mode setting terminal (COM). The relation-
ship between communication mode and COM terminal voltage is
shown in the table below.
Setting of Drive Current
Constant Current Drive
Current can be set individually for 3 groups (R/G/B). Current is set by connecting current setting resistance terminal (REXTR/REXTG/REXTB) to
GND through external REXT resistance (See note 1). The relationship between current and REXT resistance is shown below.
Formula for Current Setting
IDOUT (mA) = 2,560/REXT resistance (kΩ)
Recommended Operating Conditions
IDOUT: 10 ~ 80 mA (momentary value).
Note: 1. The current that is set is a momentary value. When LEDs are composed into a matrix, the effective value is calculated by dividing the original value by the matrix’s
division number. For example, when current is set at 60 mA in a 24x4 configuration, the effective value is 15 mA (= 60 mA/4).
2. The effective value is: IDOUT/division number.
Output
terminal
Matrix Configuration
24x1 24x2 24x4 16x8
OUT0R OUT0R
OUT0G OUT0G
OUT0B OUT0B
OUT1R OUT1R
OUT1G OUT1G
OUT1B OUT1B
OUT2R OUT2R
OUT2G OUT2G
OUT2B OUT2B
OUT3R OUT3R
OUT3G OUT3G
OUT3B OUT3B
OUT4R OUT4R
OUT4G OUT4G
OUT4B OUT4B
OUT5R OUT5R
OUT5G OUT5G (Not used)
OUT5B OUT5B (Not used)
OUT6R OUT6R (Not used)
OUT6G OUT6G (Not used)
OUT6B OUT6B OUTS4
OUT7R OUT7R OUTS5
OUT7G OUT7G OUTS6
OUT7B OUT7B OUTS7
OUTS0 OUTS0
OUTS1 (Not used) OUTS1
OUTS2 (Not used) (Not used) OUTS2
OUTS3 (Not used) (Not used) OUTS3
Communication mode COM
Serial communication with address (SP-D8) GND
Serial communication with address (SP-D7) VDD x 1/3
I2C-based serial communication (I2C) VDD
Serial communication with address (CE-D8) VDD x 2/3
0 50 100 150 200 250 300
REXT resistance (kΩ)
Current vs. REXT resistance
0
10
20
30
40
50
60
70
80
Current (mA)
Current
(mA)
REXT
resistance
(kΩ)
10 256
15 171
20 128
25 102
30 85.3
40 64.0
50 51.2
60 42.7
70 36.6
80 32.0
OI'I'IROD
LED Control IC W2RG012RN 7
Constant Voltage Drive
Current can be set individually for output terminals in 24 systems (OUT0R ~ 7R,/ OUT0G ~ 7G/OUT0B ~ 7B). To set current individually, resistance
is put in series relative to the LED to be lit. Current setting resistance terminal (REXTR/REXTG/REXTB) is connected to REXT resistance with
which current becomes higher than the operating current. The relationship between current and series resistance/REXT resistance is shown below.
Formula for Current Setting
IDOUT (mA) = Supply voltage (V) / (Series resistance (Ω) + On resistance 6.3 Ω) < 2,560 / REXT resistance (kΩ)
Reset
When the input to reset terminal (RST) is L, all internal circuits are reset. Each buffer passes into the initial condition; the constant current output
terminal and the open drain output terminal into open output; and CMOS output terminal into L output. When the input is changed from L to H,
operation is resumed from the initial condition.
Communication Specifications
This IC can adapt to 4 communication modes. The communication mode is set with communication mode setting terminal (COM).
Serial Communication with Address (SP-D8 Mode)
Communication is started with a 9-bit start signal. Communication stability is enhanced by inserting a separator into data at intervals of 8 bits.
Serial Communication with Address (SP-D7 Mode)
Communication is started with an 8-bit start signal. Communication stability is enhanced by inserting a separator into data at intervals of 7 bits.
Serial Communication with Address (CE-D8 Mode)
The start and termination of communication is controlled with chip enabled signals. This communication mode is adapted to general-purpose serial
parallel interface.
I2C Mode Communication (I2C Mode)
This communication mode conforms to general-purpose I2C communication protocol.
The name and communication format of each communication mode are shown below.
Chip Enable
This IC has chip enable terminal (CE). If L is input as signal to the chip enable terminal, the chip becomes effective.
Serial Communication with Address (SP-D8, SP-D7), I2C-based Serial Communication
Communication data are received only when the chip is effective. If the chip becomes ineffective during communication, the IC interior passes into the wait condition,
and received communication data are ignored.
Serial Communication with Address (CE-D8)
The change of a chip enabled input signal means the start or termination of communication. If the chip passes from an effective condition (L input) into an ineffective
condition (H input), judgment is made that the communication has terminated, and the IC interior returns to the initial condition.
Name of communication mode Abbreviation Start Signal Stop Signal Separator Data Width Response
Serial communication with address (SP-D8 mode) SP-D8 “1 1111 1111 0” “1 1111 1111” 0: continuation
1: termination 8ACK
(NACK)
Serial communication with address (SP-D7 mode) SP-D7 “1111 1111 0” “1111 1111” 0: continuation
1: termination 7ACK
(NACK)
Serial communication with address (CE-D8 mode) CE-D8 CE fall CE rise (None) 8 SYN
I2C-based serial communication (I2C mode) I2CI
2C standard-based I2C standard-based I2C standard-based 8 ACK
(NACK)
Start Signal: Communication is initialized, whether in wait or communication, into the device selection data wait condition.
Stop Signal: Communication is terminated, and passes into the start signal wait condition. In SP-D8/SP-D7, procedures to terminate communication
(transmitting “1” to separator/transmitting a stop signal) can be omitted by transmitting a start signal after transmitting gradation data.
Separator: This bit is inserted into transmitted data. In SP-D8/SP-D7, communication is terminated by transmitting “1” to separator, and passes into the
stop/start signal wait condition. In I2C, separator is allotted to ACK response.
Data Width: Data width refers to the bit width of transmitted data. In SP-D7, data that can be designated are restricted (no word length designation, designation
of 128 gradations).
Response: Response refers to the type of response. This IC outputs data to SDO terminal at the fall of SCL signal. In SP-D8/SP-D7/I2C, received data are
checked, and a result is returned (ACK or NACK). In CE-D8, a synchronization signal indicating in-communication status is output (SYN).
Received data are not checked.
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8LED Control IC W2RG012RN
Communication Format
bit
SCL
SDA
SDO
Name
Name
123456789101112131415161718192021222324252627282930313233343536
Word length: 0; gradation data: 8-bit designation
1111111110010
Device
Address
START
Device
ID
Device selection data
dvc_dat[7:0]
00
20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 452 453 454 455 456 457 458 459 460 461 462 463 464
000
WS
P
Word
length
R
1
ACK
Word length: 1; gradation data: 4-bit designation
Register selection data
reg_dat[7:0]
Register address
0
1 0 0 11111
0 0 11111
111
0
ACK ACK ACK
S
P
Byte
Adjustment
Gradation data (95)
light_dat95[7:0] STOP
Gradation data (0)
light_dat0[7:0]
0
885 886 887 888 889 890 891 892 893 894 895 896
884
S
P
00
111
0
ACK ACK ACK
Byte adjustment: When transmitting data with 8 bits as unit, “1” is designated to remaining bits after STOP.
Gradation data (95)
light_dat95[3:0] STOP
0
S
P
Gradation data (0)
light_dat0[3:0]
Gradation data (1)
light_dat1[3:0]
Gradation data (94)
light_dat94[3:0]
0
Byte
Adjustment
S
P
Register selection data
reg_dat[7:0]
Register address
00
Word
length
bit 123456789101112131415
SCL
SDA 111111110010
SDO
Name
00
Name START
Device
ID
Device selection data
dvc_dat[6:0]
Device
Address
16 17 18 19 20 21 22 23 24 25
00
11
ACK ACK ACK
S
P
S
P
Register address
Register selection data
reg_dat[6:0]
0
26 27 28 29 30 31 32
0
1
ACK
0
S
P
Gradation data (0)
light_dat0[6:0]
786 787 788 789 790 791 792 793 794 795 796 797 798 799 800
11111111
1
0
Gradation data (95)
light_dat95[6:0]
0
STOP
bit 12345678
CE
SCL
SDA 010 0
SDO 1
Name SYN
0
1
Name
Device
ID
Device
Address
R
W
Device selection data
dvc_dat[7:0]
START
0
Word length: 0; gradation data: 8-bit designation
9 1011121314151617181920212223
0
1
SYN
Register selection data
reg_dat[7:0]
0
Gradation data (0)
light_dat0[7:0]
Word
length Register address
0
24 777 778 779 780 781 782 783 784
11
SYN SYN
STOP
1
Gradation data (95)
light_dat95[7:0]
00
9 101112131415161718192021222324393394395396397398399400
1
111
SYN SYN SYN
Register address Gradation data (0)
light_dat0[3:0]
00
Gradation data (95)
light_dat95[3:0]
Register selection data
reg_dat[7:0]
STOP
Gradation data (1)
light_dat1[3:0]
Gradation data (94)
light_dat94[3:0]
Word
length
00
1
Word length: 1; gradation data: 4-bit designation
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 442 443 444 445 446 447 448 449 450
bit 1 2 3 4 5 6 7 8 9 101112131415161718
SCL
SDA 0 1 0 0 1 0 1
SDO 11
Name
ACK ACK
(Open)
0
(Open)
Register address
Name
Device
ID
Device
Address
START Device selection data
dvc_dat[7:0]
R
W
(Open)
Register selection data
reg_dat[7:0]
00
(Open)
(Open)
Word
length
Word length: 0; gradation data: 8-bit designation
19 20 21 22 23 24 25 26
1
1
ACK
0
(Open)
Gradation data (0)
light_dat0[7:0]
874 875 876 877 878 879 880 881 882
1
ACK
STOP
0
(Open)
Gradation data (95)
light_dat95[7:0]
(Open)
(Open) (Open)
Word length: 1; gradation data: 4-bit designation
11 1 1
111
ACK ACK ACK
00
Gradation data (94)
light_dat94[3:0]
(Open)
00
Gradation data (95)
light_dat95[3:0]
(Open)
Word
length
Register address
Register selection data
reg_dat[7:0]
(Open)
Gradation data (0)
light_dat0[3:0]
Gradation data (1)
light_dat1[3:0]
(Open)
(Open) (Open) (Open)
1
I2C-based Serial Communication (I2C Mode)
Serial Communication with Address (CE-D8 Mode)
Serial Communication with Address (SP-D7 Mode)
Serial Communication with Address (SP-D8 Mode)
OI'I'IROD
LED Control IC W2RG012RN 9
Command System
Device Designation
If the device ID and device address match IC settings, received data are retrieved. Device ID is fixed as “010”. The same command can be trans-
mitted to all devices by designating “1111” as device address. The relationship between device address and device address terminal is shown in
the table below.
Register Designation
Word Length
The data unit of gradation data is designated.
Register Address (Designation of lighting position)
The address of gradation register is designated. The upper limit of address that can be designated, and the number of gradation that can be trans-
ferred continuously, vary according to division mode setting and word length designation.
Register address (Special address)
All gradation registers can be designated collectively by designating 0x7F (127).
The power saving register can be designated by designating 0x78 (120)
Gradation Data
Gradation Designation
Gradation data are designated using 8 bits (256 gradations), 7 bits (128 gradations), or 4 bits (16 gradations).
Power-saving Mode
When the power-saving data register is designated by register address-bits, the lowest 4 bits are treated as power-saving data.
Communication mode
Device selection data dvc_dat (7:0)
76543210
Device ID Device Address RW
Standard 0 1 0 ADR1(1:0) ADR0(1:0) 0
SP-D7 ---
Communication mode Register Selection data reg_dat (7:0)
76543210
Standard Word Length Register Address
SP-D7 - - -
Word length designation Word length
0 8bit
1 4bit
Communication mode Gradation data light_dat(7:0)
76543210
Standard (8-bit) Gradation Data
Standard (4-bit) Gradation Data N Gradation Data N+1
SP-D7 Gradation Data - - -
Communication
mode
Gradation data light_dat(7:0)
7654 3 2 1 0
Standard 0000
Power-savingdata
(current control)
Power-savingdata
(duty ratio control)
SP-D7 - - - 0 0 0
Power-saving
Data
Output current or
output duty ratio
00 100%
01 75%
10 50%
11 25%
OI'I'IROFI
10 LED Control IC W2RG012RN
Gradation Control
Designation of Gradation
Gradation is designated using a data length of 8 bits (256 gradations), 7 bits (128 gradations), or 4 bits (16 gradations). The 8-bit or 4-bit mode can
be selected using a word length bit in a communication command. In case of the 4-bit mode, the overall data length for communication can be
shortened, though only a small number of gradations can be designated. In case of SP-D7 mode in serial communication with address, the word
length is fixed at 7 bits, i.e., it is not designated.
The relationship between lighting gradation and output duty ratio is shown below;
Communication mode Word length Gradation number
Serial communication with address
(SP-D8)
8-bit mode 256
4-bit mode 16
Serial communication with address
(SP-D7) --- 128
Serial communication with address
(CE-D8)
8-bit mode 256
4-bit mode 16
I2C-based serial communication (I2C) 8-bit mode 256
4-bit mode 16
Lighting Gradation vs. Output Duty Ratio
0 %
10 %
20 %
30 %
40 %
50 %
60 %
70 %
80 %
90 %
100 %
Output duty ratio
0 32 64 96 128 160 192 224 255
Lighting gradation
24×1
24×2
24×4
16×8
Lighting
gradation
(8-bit)
Lighting
gradation
(7-bit)
Lighting
gradation
(4-bit)
Matrix configuration
24x1 24x2 24x4 16x8
0 0 0 (Light-out) (Light-out) (Light-out) (Light-out)
15 7 - - - 0.37% 0.18% 0.09% 0.05%
31 15 1 0.76% 0.38% 0.19% 0.09%
47 23 2 1.15% 0.57% 0.29% 0.14%
63 31 3 1.54% 0.77% 0.38% 0.19%
79 39 4 2.29% 1.15% 0.57% 0.29%
95 47 5 3.08% 1.54% 0.77% 0.38%
111 55 6 4.59% 2.29% 1.15% 0.57%
127 63 7 6.15% 3.08% 1.54% 0.77&
143 71 8 9.18% 4.59% 2.29% 1.15%
159 79 9 12.30% 6.15% 3.08% 1.54%
175 87 10 18.36% 9.18% 4.59% 2.29%
191 95 11 24.61% 12.30% 6.15% 3.08%
207 103 12 36.72% 18.36% 9.18% 4.59%
223 111 13 49.22% 24.61% 12.30% 6.15%
239 119 14 73.44% 36.72% 18.36% 9.18%
255 127 15 98.44% 49.22% 24.61% 12.30%
Lighting Gradation vs. Output Duty Ratio
(Representative Values Only)
OI'I'IROD
LED Control IC W2RG012RN 11
Lighting Gradation vs. Output Duty Ratio (All Gradations)
Gradation
(8-bit)
Gradation
(7-bit)
Gradation
(4-bit)
Matrix configuration
24x1 24x2 24x4 16x8
000
(Light-out) (Light-out) (Light-out) (Light-out)
1 - - - - - - 0.02 0.01 0.01 0.00
2 - - - - - - 0.05 0.02 0.01 0.01
3 1 - - - 0.07 0.04 0.02 0.01
4 - - - - - - 0.10 0.05 0.02 0.01
5 2 - - - 0.12 0.06 0.03 0.02
6 - - - - - - 0.15 0.07 0.04 0.02
7 3 - - - 0.17 0.09 0.04 0.02
8 - - - - - - 0.20 0.10 0.05 0.02
9 4 - - - 0.22 0.11 0.05 0.03
10 - - - - - - 0.24 0.12 0.06 0.03
11 5 - - - 0.27 0.13 0.07 0.03
12 - - - - - - 0.29 0.15 0.07 0.04
13 6 - - - 0.32 0.16 0.08 0.04
14 - - - - - - 0.34 0.17 0.09 0.04
15 7 - - - 0.37 0.18 0.09 0.05
16 - - - - - - 0.39 0.20 0.10 0.05
17 8 - - - 0.42 0.21 0.10 0.05
18 - - - - - - 0.44 0.22 0.11 0.05
19 9 - - - 0.46 0.23 0.12 0.06
20 - - - - - - 0.49 0.24 0.12 0.06
21 10 - - - 0.51 0.26 0.13 0.06
22 - - - - - - 0.54 0.27 0.13 0.07
23 11 - - - 0.56 0.28 0.14 0.07
24 - - - - - - 0.59 0.29 0.15 0.07
25 12 - - - 0.61 0.31 0.15 0.08
26 - - - - - - 0.63 0.32 0.16 0.08
27 13 - - - 0.66 0.33 0.16 0.08
28 - - - - - - 0.68 0.34 0.17 0.09
29 14 - - - 0.71 0.35 0.18 0.09
30 - - - - - - 0.73 0.37 0.18 0.09
31 15 1 0.76 0.38 0.19 0.09
32 - - - - - - 0.78 0.39 0.20 0.10
33 16 - - - 0.81 0.40 0.20 0.10
34 - - - - - - 0.83 0.42 0.21 0.10
35 17 - - - 0.85 0.43 0.21 0.11
36 - - - - - - 0.88 0.44 0.22 0.11
37 18 - - - 0.90 0.45 0.23 0.11
38 - - - - - - 0.93 0.46 0.23 0.12
39 19 - - - 0.95 0.48 0.24 0.12
40 - - - - - - 0.98 0.49 0.24 0.12
41 20 - - - 1.00 0.50 0.25 0.13
42 - - - - - - 1.03 0.51 0.26 0.13
43 21 - - - 1.05 0.52 0.26 0.13
44 - - - - - - 1.07 0.54 0.27 0.13
45 22 - - - 1.10 0.55 0.27 0.14
46 - - - - - - 1.12 0.56 0.28 0.14
47 23 2 1.15 0.57 0.29 0.14
48 - - - - - - 1.17 0.59 0.29 0.15
49 24 - - - 1.20 0.60 0.30 0.15
50 - - - - - - 1.22 0.61 0.31 0.15
51 25 - - - 1.25 0.62 0.31 0.16
52 - - - - - - 1.27 0.63 0.32 0.16
53 26 - - - 1.29 0.65 0.32 0.16
54 - - - - - - 1.32 0.66 0.33 0.16
55 27 - - - 1.34 0.67 0.34 0.17
56 - - - - - - 1.37 0.68 0.34 0.17
57 28 - - - 1.39 0.70 0.35 0.17
58 - - - - - - 1.42 0.71 0.35 0.18
59 29 - - - 1.44 0.72 0.36 0.18
60 - - - - - - 1.46 0.73 0.37 0.18
61 30 - - - 1.49 0.74 0.37 0.19
62 - - - - - - 1.51 0.76 0.38 0.19
63 31 3 1.54 0.77 0.38 0.19
Gradation
(8-bit)
Gradation
(7-bit)
Gradation
(4-bit)
Matrix configuration
24x1 24x2 24x4 16x8
64 - - - - - - 1.56 0.78 0.39 0.20
65 32 - - - 1.61 0.81 0.40 0.20
66 - - - - - - 1.66 0.83 0.42 0.21
67 33 - - - 1.71 0.85 0.43 0.21
68 - - - - - - 1.76 0.88 0.44 0.22
69 34 - - - 1.81 0.90 0.45 0.23
70 - - - - - - 1.86 0.93 0.46 0.23
71 35 - - - 1.90 0.95 0.48 0.24
72 - - - - - - 1.95 0.98 0.49 0.24
73 36 - - - 2.00 1.00 0.50 0.25
74 - - - - - - 2.05 1.03 0.51 0.26
75 37 - - - 2.10 1.05 0.52 0.26
76 - - - - - - 2.15 1.07 0.54 0.27
77 38 - - - 2.20 1.10 0.55 0.27
78 - - - - - - 2.25 1.12 0.56 0.28
79 39 4 2.29 1.15 0.57 0.29
80 - - - - - - 2.34 1.17 0.59 0.29
81 40 - - - 2.39 1.20 0.60 0.30
82 - - - - - - 2.44 1.22 0.61 0.31
83 41 - - - 2.49 1.25 0.62 0.31
84 - - - - - - 2.54 1.27 0.63 0.32
85 42 - - - 2.59 1.29 0.65 0.32
86 - - - - - - 2.64 1.32 0.66 0.33
87 43 - - - 2.69 1.34 0.67 0.34
88 - - - - - - 2.73 1.37 0.68 0.34
89 44 - - - 2.78 1.39 0.70 0.35
90 - - - - - - 2.83 1.42 0.71 0.35
91 45 - - - 2.88 1.44 0.72 0.36
92 - - - - - - 2.93 1.46 0.73 0.37
93 46 - - - 2.98 1.49 0.74 0.37
94 - - - - - - 3.03 1.51 0.76 0.38
95 47 5 3.08 1.54 0.77 0.38
96 - - - - - - 3.13 1.56 0.78 0.39
97 48 - - - 3.22 1.61 0.81 0.40
98 - - - - - - 3.32 1.66 0.83 0.42
99 49 - - - 3.42 1.71 0.85 0.43
100 - - - - - - 3.52 1.76 0.88 0.44
101 50 - - - 3.61 1.81 0.90 0.45
102 - - - - - - 3.71 1.86 0.93 0.46
103 51 - - - 3.81 1.90 0.95 0.48
104 - - - - - - 3.91 1.95 0.98 0.49
105 52 - - - 4.00 2.00 1.00 0.50
106 - - - - - - 4.10 2.05 1.03 0.51
107 53 - - - 4.20 2.10 1.05 0.52
108 - - - - - - 4.30 2.15 1.07 0.54
109 54 - - - 4.39 2.20 1.10 0.55
110 - - - - - - 4.49 2.25 1.12 0.56
111 55 6 4.59 2.29 1.15 0.57
112 - - - - - - 4.69 2.34 1.17 0.59
113 56 - - - 4.79 2.39 1.20 0.60
114 - - - - - - 4.88 2.44 1.22 0.61
115 57 - - - 4.98 2.49 1.25 0.62
116 - - - - - - 5.08 2.54 1.27 0.63
117 58 - - - 5.18 2.59 1.29 0.65
118 - - - - - - 5.27 2.64 1.32 0.66
119 59 - - - 5.37 2.69 1.34 0.67
120 - - - - - - 5.47 2.73 1.37 0.68
121 60 - - - 5.57 2.78 1.39 0.70
122 - - - - - - 5.66 2.83 1.42 0.71
123 61 - - - 5.76 2.88 1.44 0.72
124 - - - - - - 5.86 2.93 1.46 0.73
125 62 - - - 5.96 2.98 1.49 0.74
126 - - - - - - 6.05 3.03 1.51 0.76
127 63 7 6.15 3.08 1.54 0.77
OI'I'IROFI
12 LED Control IC W2RG012RN
Lighting Gradation vs. Output Duty Ratio (All Gradations - continued)
Gradation
(8-bit)
Gradation
(7-bit)
Gradation
(4-bit)
Matrix configuration
24x1 24x2 24x4 16x8
128 - - - - - - 6.25 3.13 1.56 0.78
129 64 - - - 6.45 3.22 1.61 0.81
130 - - - - - - 6.64 3.32 1.66 0.83
131 65 - - - 6.84 3.42 1.71 0.85
132 - - - - - - 7.03 3.52 1.76 0.88
133 66 - - - 7.23 3.61 1.81 0.90
134 - - - - - - 7.42 3.71 1.86 0.93
135 67 - - - 7.62 3.81 1.90 0.95
136 - - - - - - 7.81 3.91 1.95 0.98
137 68 - - - 8.01 4.00 2.00 1.00
138 - - - - - - 8.20 4.10 2.05 1.03
139 69 - - - 8.40 4.20 2.10 1.05
140 - - - - - - 8.59 4.30 2.15 1.07
141 70 - - - 8.79 4.39 2.20 1.10
142 - - - - - - 8.98 4.49 2.25 1.12
143 71 8 9.18 4.59 2.29 1.15
144 - - - - - - 9.38 4.69 2.34 1.17
145 72 - - - 9.57 4.79 2.39 1.20
146 - - - - - - 9.77 4.88 2.44 1.22
147 73 - - - 9.96 4.98 2.49 1.25
148 - - - - - - 10.16 5.08 2.54 1.27
149 74 - - - 10.35 5.18 2.59 1.29
150 - - - - - - 10.55 5.27 2.64 1.32
151 75 - - - 10.74 5.37 2.69 1.34
152 - - - - - - 10.94 5.47 2.73 1.37
153 76 - - - 11.13 5.57 2.78 1.39
154 - - - - - - 11.33 5.66 2.83 1.42
155 77 - - - 11.52 5.76 2.88 1.44
156 - - - - - - 11.72 5.86 2.93 1.46
157 78 - - - 11.91 5.96 2.98 1.49
158 - - - - - - 12.11 6.05 3.03 1.51
159 79 9 12.30 6.15 3.08 1.54
160 - - - - - - 12.50 6.25 3.13 1.56
161 80 - - - 12.89 6.45 3.22 1.61
162 - - - - - - 13.28 6.64 3.32 1.66
163 81 - - - 13.67 6.84 3.42 1.71
164 - - - - - - 14.06 7.03 3.52 1.76
165 82 - - - 14.45 7.23 3.61 1.81
166 - - - - - - 14.84 7.42 3.71 1.86
167 83 - - - 15.23 7.62 3.81 1.90
168 - - - - - - 15.63 7.81 3.91 1.95
169 84 - - - 16.02 8.01 4.00 2.00
170 - - - - - - 16.41 8.20 4.10 2.05
171 85 - - - 16.80 8.40 4.20 2.10
172 - - - - - - 17.19 8.59 4.30 2.15
173 86 - - - 17.58 8.79 4.39 2.20
174 - - - - - - 17.97 8.98 4.49 2.25
175 87 10 18.36 9.18 4.59 2.29
176 - - - - - - 18.75 9.38 4.69 2.34
177 88 - - - 19.14 9.57 4.79 2.39
178 - - - - - - 19.53 9.77 4.88 2.44
179 89 - - - 19.92 9.96 4.98 2.49
180 - - - - - - 20.31 10.16 5.08 2.54
181 90 - - - 20.70 10.35 5.18 2.59
182 - - - - - - 21.09 10.55 5.27 2.64
183 91 - - - 21.48 10.74 5.37 2.69
184 - - - - - - 21.88 10.94 5.47 2.73
185 92 - - - 22.27 11.13 5.57 2.78
186 - - - - - - 22.66 11.33 5.66 2.83
187 93 - - - 23.05 11.52 5.76 2.88
188 - - - - - - 23.44 11.72 5.86 2.93
189 94 - - - 23.83 11.91 5.96 2.98
190 - - - - - - 24.22 12.11 6.05 3.03
191 95 11 24.61 12.30 6.15 3.08
Gradation
(8-bit)
Gradation
(7-bit)
Gradation
(4-bit)
Matrix configuration
24x1 24x2 24x4 16x8
192 - - - - - - 25.00 12.50 6.25 3.13
193 96 - - - 25.78 12.89 6.45 3.22
194 - - - - - - 26.56 13.28 6.64 3.32
195 97 - - - 27.34 13.67 6.84 3.42
196 - - - - - - 28.13 14.06 7.03 3.52
197 98 - - - 28.91 14.45 7.23 3.61
198 - - - - - - 29.69 14.84 7.42 3.71
199 99 - - - 30.47 15.23 7.62 3.81
200 - - - - - - 31.25 15.63 7.81 3.91
201 100 - - - 32.03 16.02 8.01 4.00
202 - - - - - - 32.81 16.41 8.20 4.10
203 101 - - - 33.59 16.80 8.40 4.20
204 - - - - - - 34.38 17.19 8.59 4.30
205 102 - - - 35.16 17.58 8.79 4.39
206 - - - - - - 35.94 17.97 8.98 4.49
207 103 12 36.72 18.36 9.18 4.59
208 - - - - - - 37.50 18.75 9.38 4.69
209 104 - - - 38.28 19.14 9.57 4.79
210 - - - - - - 39.06 19.53 9.77 4.88
211 105 - - - 39.84 19.92 9.96 4.98
212 - - - - - - 40.63 20.31 10.16 5.08
213 106 - - - 41.41 20.70 10.35 5.18
214 - - - - - - 42.19 21.09 10.55 5.27
215 107 - - - 42.97 21.48 10.74 5.37
216 - - - - - - 43.75 21.88 10.94 5.47
217 108 - - - 44.53 22.27 11.13 5.57
218 - - - - - - 45.31 22.66 11.33 5.66
219 109 - - - 46.09 23.05 11.52 5.76
220 - - - - - - 46.88 23.44 11.72 5.86
221 110 - - - 47.66 23.83 11.91 5.96
222 - - - - - - 48.44 24.22 12.11 6.05
223 111 13 49.22 24.61 12.30 6.15
224 - - - - - - 50.00 25.00 12.50 6.25
225 112 - - - 51.56 25.78 12.89 6.45
226 - - - - - - 53.13 26.56 13.28 6.64
227 113 - - - 54.69 27.34 13.67 6.84
228 - - - - - - 56.25 28.13 14.06 7.03
229 114 - - - 57.81 28.91 14.45 7.23
230 - - - - - - 59.38 29.69 14.84 7.42
231 115 - - - 60.94 30.47 15.23 7.62
232 - - - - - - 62.50 31.25 15.63 7.81
233 116 - - - 64.06 32.03 16.02 8.01
234 - - - - - - 65.63 32.81 16.41 8.20
235 117 - - - 67.19 33.59 16.80 8.40
236 - - - - - - 68.75 34.38 17.19 8.59
237 118 - - - 70.31 35.16 17.58 8.79
238 - - - - - - 71.88 35.94 17.97 8.98
239 119 14 73.44 36.72 18.36 9.18
240 - - - - - - 75.00 37.50 18.75 9.38
241 120 - - - 76.56 38.28 19.14 9.57
242 - - - - - - 78.13 39.06 19.53 9.77
243 121 - - - 79.69 39.84 19.92 9.96
244 - - - - - - 81.25 40.63 20.31 10.16
245 122 - - - 82.81 41.41 20.70 10.35
246 - - - - - - 84.38 42.19 21.09 10.55
247 123 - - - 85.94 42.97 21.48 10.74
248 - - - - - - 87.50 43.75 21.88 10.94
249 124 - - - 89.06 44.53 22.27 11.13
250 - - - - - - 90.63 45.31 22.66 11.33
251 125 - - - 92.19 46.09 23.05 11.52
252 - - - - - - 93.75 46.88 23.44 11.72
253 126 - - - 95.31 47.66 23.83 11.91
254 - - - - - - 96.88 48.44 24.22 12.11
255 127 15 98.44 49.22 24.61 12.30
OI'I'IROD
LED Control IC W2RG012RN 13
Designation of Lighting Position
The lighting position is designated with a register address in a communication command. The relationship between register address and lighting
position in each matrix configuration is shown in the table below.
Gradation data can be transmitted continuously (continuous transfer). In this case, gradation data are stored sequentially, with the register address
designated at first at the top. Gradation data cannot be transmitted to a register address that is not found in matrix configurations (wrong address).
Communication is terminated if a wrong address is designated, or if a wrong address is reached in continuous transfer of gradation data.
Note: When a 16x8-mode matrix configuration is used, an LED shown in an odd-number row in the table above cannot be designated as the first
address. Gradation data can be transmitted only via continuous transfer to a register address in an odd-number row.
Register
Address
Matrix Configuration
24x1 24x2 24x4
16x8
Even-number
row
Odd-number
row
0x00 (0) (0, 0) (0, 0) (0, 0) (0, 0) (1, 0)
0x01 (1) (1 ,0) (1, 0) (1, 0) (2, 0) (3, 0)
0x02 (2) (2, 0) (2, 0) (2, 0) (4, 0) (5, 0)
0x03 (3) (3, 0) (3, 0) (3, 0) (6, 0) (7, 0)
0x04 (4) (4, 0) (4, 0) (4, 0) (8, 0) (9, 0)
0x05 (5) (5, 0) (5, 0) (5, 0) (10, 0) (11, 0)
0x06 (6) (6, 0) (6, 0) (6, 0) (12, 0) (13, 0)
0x07 (7) (7, 0) (7, 0) (7, 0) (14, 0) (15, 0)
0x08 (8) (8, 0) (8, 0) (8, 0) (0, 1) (1, 1)
0x09 (9) (9, 0) (9, 0) (9, 0) (2, 1) (3, 1)
0x0A (10) (10, 0) (10, 0) (10, 0) (4, 1) (5, 1)
0x0B (11) (11, 0) (11, 0) (11, 0) (6, 1) (7, 1)
0x0C (12) (12, 0) (12, 0) (12, 0) (8, 1) (9, 1)
0x0D (13) (13, 0) (13, 0) (13, 0) (10, 1) (11, 1)
0x0E (14) (14, 0) (14, 0) (14, 0) (12, 1) (13, 1)
0x0F (15) (15, 0) (15, 0) (15, 0) (14, 1) (15, 1)
0x10 (16) (16, 0) (16, 0) (16, 0) (0, 2) (1, 2)
0x11 (17) (17, 0) (17, 0) (17, 0) (2, 2) (3, 2)
0x12 (18) (18, 0) (18, 0) (18, 0) (4, 2) (5, 2)
0x13 (19) (19, 0) (19, 0) (19, 0) (6, 2) (7, 2)
0x14 (20) (20, 0) (20, 0) (20, 0) (8, 2) (9, 2)
0x15 (21) (21, 0) (21, 0) (21, 0) (10, 2) (11, 2)
0x16 (22) (22, 0) (22, 0) (22, 0) (12, 2) (13, 2)
0x17 (23) (23, 0) (23, 0) (23, 0) (14, 2) (15, 2)
0x18 (24) - - - (0, 1) (0, 1) (0, 3) (1, 3)
0x19 (25) - - - (1, 1) (1, 1) (2, 3) (3, 3)
0x1A (26) - - - (2, 1) (2, 1) (4, 3) (5, 3)
0x1B (27) - - - (3, 1) (3, 1) (6, 3) (7, 3)
0x1C (28) - - - (4, 1) (4, 1) (8, 3) (9, 3)
0x1D (29) - - - (5, 1) (5, 1) (10, 3) (11, 3)
0x1E (30) - - - (6, 1) (6, 1) (12, 3) (13, 3)
0x1F (31) - - - (7, 1) (7, 1) (14, 3) (15, 3)
0x20 (32) - - - (8, 1) (8, 1) (0, 4) (1, 4)
0x21 (33) - - - (9, 1) (9, 1) (2, 4) (3, 4)
0x22 (34) - - - (10, 1) (10, 1) (4, 4) (5, 4)
0x23 (35) - - - (11, 1) (11, 1) (6, 4) (7, 4)
0x24 (36) - - - (12, 1) (12, 1) (8, 4) (9, 4)
0x25 (37) - - - (13, 1) (13, 1) (10, 4) (11, 4)
0x26 (38) - - - (14, 1) (14, 1) (12, 4) (13, 4)
0x27 (39) - - - (15, 1) (15, 1) (14, 4) (15, 4)
0x28 (40) - - - (16, 1) (16, 1) (0, 5) (1, 5)
0x29 (41) - - - (17, 1) (17, 1) (2, 5) (3, 5)
0x2A (42) - - - (18, 1) (18, 1) (4, 5) (5, 5)
0x2B (43) - - - (19, 1) (19, 1) (6, 5) (7, 5)
0x2C (44) - - - (20, 1) (20, 1) (8, 5) (9, 5)
0x2D (45) - - - (21, 1) (21, 1) (10, 5) (11, 5)
0x2E (46) - - - (22, 1) (22, 1) (12, 5) (13, 5)
0x2F (47) - - - (23, 1) (23, 1) (14, 5) (15, 5)
Register
Address
Matrix Configuration
24x1 24x2 24x4
16x8
Even-number
row
Odd-number
row
0x30 (48) - - - - - - (0, 2) (0, 6) (1, 6)
0x31 (49) - - - - - - (1, 2) (2, 6) (3, 6)
0x32 (50) - - - - - - (2, 2) (4, 6) (5, 6)
0x33 (51) - - - - - - (3, 2) (6, 6) (7, 6)
0x34 (52) - - - - - - (4, 2) (8, 6) (9, 6)
0x35 (53) - - - - - - (5, 2) (10, 6) (11, 6)
0x36 (54) - - - - - - (6, 2) (12, 6) (13, 6)
0x37 (55) - - - - - - (7, 2) (14, 6) (15, 6)
0x38 (56) - - - - - - (8, 2) (0, 7) (1, 7)
0x39 (57) - - - - - - (9, 2) (2, 7) (3, 7)
0x3A (58) - - - - - - (10, 2) (4, 7) (5, 7)
0x3B (59) - - - - - - (11, 2) (6, 7) (7, 7)
0x3C (60) - - - - - - (12, 2) (8, 7) (9, 7)
0x3D (61) - - - - - - (13, 2) (10, 7) (11, 7)
0x3E (62) - - - - - - (14, 2) (12, 7) (13, 7)
0x3F (63) - - - - - - (15, 2) (14, 7) (15, 7)
0x40 (64) - - - - - - (16, 2) - - - - - -
0x41 (65) - - - - - - (17, 2) - - - - - -
0x42 (66) - - - - - - (18, 2) - - - - - -
0x43 (67) - - - - - - (19, 2) - - - - - -
0x44 (68) - - - - - - (20, 2) - - - - - -
0x45 (69) - - - - - - (21, 2) - - - - - -
0x46 (70) - - - - - - (22, 2) - - - - - -
0x47 (71) - - - - - - (23, 2) - - - - - -
0x48 (72) - - - - - - (0, 3) - - - - - -
0x49 (73) - - - - - - (1, 3) - - - - - -
0x4A (74) - - - - - - (2, 3) - - - - - -
0x4B (75) - - - - - - (3, 3) - - - - - -
0x4C (76) - - - - - - (4, 3) - - - - - -
0x4D (77) - - - - - - (5, 3) - - - - - -
0x4E (78) - - - - - - (6, 3) - - - - - -
0x4F (79) - - - - - - (7, 3) - - - - - -
0x50 (80) - - - - - - (8, 3) - - - - - -
0x51 (81) - - - - - - (9, 3) - - - - - -
0x52 (82) - - - - - - (10, 3) - - - - - -
0x53 (83) - - - - - - (11, 3) - - - - - -
0x54 (84) - - - - - - (12, 3) - - - - - -
0x55 (85) - - - - - - (13, 3) - - - - - -
0x56 (86) - - - - - - (14, 3) - - - - - -
0x57 (87) - - - - - - (15, 3) - - - - - -
0x58 (88) - - - - - - (16, 3) - - - - - -
0x59 (89) - - - - - - (17, 3) - - - - - -
0x5A (90) - - - - - - (18, 3) - - - - - -
0x5B (91) - - - - - - (19, 3) - - - - - -
0x5C (92) - - - - - - (20, 3) - - - - - -
0x5D (93) - - - - - - (21, 3) - - - - - -
0x5E (94) - - - - - - (22, 3) - - - - - -
0x5F (95) - - - - - - (23, 3) - - - - - -
OI'I'IROFI 14 LED Control IC W2RGO12RN
14 LED Control IC W2RG012RN
Matrix Configuration
An LED Matrix configuration can be chosen from among 24x1, 24x2, 24x4 and 16x8 configurations, using division mode setting terminal DIV.
Examples of circuits in different matrix configurations are shown in the following:
O
U
T
S
0
O
U
T
S
0
O
U
T
S
1
O
U
T
S
0
O
U
T
S
1
O
U
T
S
2
O
U
T
S
3
O
U
T
S
0
O
U
T
S
1
O
U
T
S
2
O
U
T
S
3
O
U
T
S
4
O
U
T
S
5
O
U
T
S
6
O
U
T
S
7
0 01 0123 01234567
OUT0R 0 0 0 0
OUT0G 1 1 1 1
OUT0B 2 2 2 2
OUT1R 3 3 *3*3*
OUT1G 4 4 4 4
OUT1B 5 5 5 5
OUT2R 6 6 6 6
OUT2G 7 7 7 7
OUT2B 8 8 8 8
OUT3R 9 9 9 9
OUT3G 10 10 10 10
OUT3B 11 11 11 11
OUT4R 12 12 12 12
OUT4G 13 13 13 13
OUT4B 14 14 14 14
OUT5R 15 15 15 15
OUT5G 16 16 16 16x8
OUT5B 17 17 17
OUT6R 18 18 18
OUT6G 19 19 19 Note: (3, 1) indicates the position of
the asterisk (*)
OUT6B 20 20 20
OUT7R 21 21 21
OUT7G 22 22 22
OUT7B 23 23 23
24x1 24x2 24x4
Indication of Lighting Position
……
……
• • • • • •
• • • • • •
• • • • • •
• •
……
R
G
B
R
G
B
R
G
B
R
……
……
R
G
B
R
G
B
R
G
B
R
G
B
R
G
B
R
G
B
VCC
OUTS0
OUTS1
OUTS7
OUT0R
OUT0G
OUT0B
OUT1R
OUT1G
OUT1B
OUT5R
OUT4R
OUT4G
OUT4B
RR
16 x 8 Configuration
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LED Control IC W2RG012RN 15
• • • • • •
• • • • • •
• • • • • •
• • • • • •
VCC
OUTS0
OUTS1
OUTS2
OUTS3
OUT0R
OUT0G
OUT0B
OUT1R
OUT1G
OUT1B
OUT7R
OUT7G
OUT7B
R
G
B
R
G
B
R
G
B
R
G
B
R
G
B
R
G
B
R
G
B
R
G
B
R
G
B
R
G
B
R
G
B
R
G
B
24 x 4 Configuration
• •
• •
VCC
OUTS0
OUTS1
OUT0R
OUT0G
OUT0B
OUT1R
OUT1G
OUT1B
OUT7R
OUT7G
OUT7B
R
G
B
R
G
B
R
G
B
R
G
B
R
G
B
R
G
B
• • • • • •
R
G
B
R
G
B
R
G
B
VCC
OUT0R
OUT0G
OUT0B
OUT1R
OUT1G
OUT1B
OUT7R
OUT7G
OUT7B
24 x 2 Configuration 24 x 1 Configuration
OI'I'IROFI )K R R R
16 LED Control IC W2RG012RN
Control Waveform
The matrix is controlled by switching between ON and OFF of drive output terminals (OUT0R - 7B) and switch output terminals (OUTS0 - 7).
Control Waveform (Overall)
Control Waveform (at Switching)
Note: XTI = 8.192 MHz = 122.07 ns. The indication of duration in these figures is for 16x8 configuration. The duration is twice the indicated value
for 24x4 configuration; 4 times for 24x2 configuration; and 8 times for 24x1 configuration.
OUTX-a
(PWM)
OUTS7
OUTS0
OUTDC
OUTX-b
(PWM)
OUTX-c
(PWM)
OUTX-d
(PWM)
OUTS1
OUTS2
. . .
PWM period: 1 ms 128XTI
(=15.625μs)
Open
GND
Open
GND
Open
GND
Open
GND
Open
GND
Open
GND
Open
GND
Open
GND
VDD
GND
OUTX-a
(PWM)
OUTS0
OUTS1
OUTDC
OUTX-b
(PWM)
OUTX-c
(PWM)
OUTX-d
(PWM)
. . .
32XTI40XTI
40XTI
8XTI8XTI
128XTI
(=15.625us)
2XTI
Open
GND
Open
GND
Open
GND
Open
GND
Open
GND
Open
GND
VDD
GND
OI'I'IROD
LED Control IC W2RG012RN 17
Drive Output Group
Adjoining drive output terminals (OUT0R - 7B) have different change timings. This difference is designed to reduce noise caused by the simulta-
neous change of drive output. There are 4 change timings, by which drive outputs are grouped as follows:
Note: *This does not apply when the division mode is set as 16x8 configuration, in which case the following operations are executed:
OUT5G - 6G: Not used.
OUT6B - OUT7B: Functions as OUTS4 - 7
Synchronous Control Output
Synchronous control output terminal (OUTDC) outputs control signals synchronized with lighting switch. These signals are used to drive external
circuits at lighting switch.
Power-saving Control
Power saving data is set, via communications as 100%, 75%, 50% or 25%. Current or duty ratio control is used as control method. Power saving
data can be set separately via either of these methods.
Current Control
Output currents are changed collectively according to a designated ratio to a current set with current setting terminal REXTR/REXTG/REXTB.
Note: The hue of a full-color LED in normal operation may be different from that in power-saving operation, due to differences in current charac-
teristics among R/G/B.
Duty Ratio Control
Output duty ratios are changed collectively according to a designated ratio to a duty ratio designated to a particular gradation.
Drive output
terminal
Drive output group
OUTX-a OUTX-b OUTX-c OUTX-d
OUT0R {
OUT0G {
OUT0B {
OUT1R {
OUT1G {
OUT1B {
OUT2R {
OUT2G {
OUT2B {
OUT3R {
OUT3G {
OUT3B {
OUT4R {
OUT4G {
OUT4B {
OUT5R {
OUT5G {(*)
OUT5B {(*)
OUT6R {(*)
OUT6G {(*)
OUT6B {(*)
OUT7R {(*)
OUT7G {(*)
OUT7B {(*)
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18 LED Control IC W2RG012RN
Application Example
Setting Example
Dimensions
W2RG012RN
7
8
48
5
4
ADR1
ADR0
VDD
CAP
GND
6
SCL
47
SDO
COM
10
9
DIV
1
SDA
3
2
RST
17
23
31
37
REXTR
REXTG
REXTB
11
12
13
5V
Transmission
circuit
Reception
circuit
C3
0.1 μF
C2
0.1 μF
C1
0.1 μF
GND
GND
GND
GND
33k
43k
62k
3.3k
3.3k
3.3k
CE
14
15
OUT0R
OUT0G
OUT0B
16
18
19
OUT1R
OUT1G
OUT1B
20
39
40
41
42
43
OUTS0
OUTS1
OUTS2
44
45
OUTS3
46
OUTDC
OUT7R
OUT7G
OUT7B
21
22
OUT2R
OUT2G
OUT2B
24
25
26
OUT3R
OUT3G
OUT3B
27
28
OUT4R
OUT4G
OUT4B
30
32
33
OUT5R
OUT5G
OUT5B
34
35
36
OUT6R
OUT6G
OUT6B
38
NC
Matrix circuit
x24
x4
x4
Matrix
connection
Matrix
connection
5V
29
. . .
. . .
. . .
DIV: 24x4 configuration
COM: I2C communication
ADR: device address
“1101”
Constant current setting
R: 59.5 mA (14.9 mA)
G: 77.6 mA (19.4 mA)
B: 41.3 mA (10.3 mA)
Note: Effective values are shown in parentheses.
7 ± 0.1 4.7 ± 0.1
0.75 ± 0.2
0.5 ± 0.1
4.7 ± 0.1
0.4 ± 0.1
7 ± 0.1
0.08
(0.22)
C0.2
1 Pin Mark
1(max.)
S
S
0.25+0.05
-0.04
37
48
1
12
13
36
25
24
0.8(min.)
5
0.5 1.2 0.27
Ø 0.3
6
5
1.2
6
0.8(min.)
Recommended
PCB Layout
[Unit : mm]
omRon
LED Control IC W2RG012RN 19
Tape Packaging
Packaging style: Embossed taping
Packaging quantity: 1,500 pcs/reel
Reel
Pin No.1
Drawing direction
Ø21±0.8
Ø1.5±1
330±2
4±0.1
12±0.1
7.2±0.05
(1.15) (0.65)
2±0.1 0.3±0.05
1.8±0.1
2±0.5
21.5±1
17.5±1
80±1
1234
1234
1234
1234
1234
1234
1.75±0.1
16±0.3
7.5±0.05
7.2±0.05
13±0.2
Ø1.5
±0.1
0
Direction of Insertion
Reel Dimensions
Embossed Tape Dimensions
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20 LED Control IC W2RG012RN
Precautions for Use
Correct Use
The absolute maximum rating is the limit value which should not be
exceeded even momentarily. Exceeding this value can cause dete-
rioration of the characteristics or complete failure of the IC.
Check the operation at the communication frequency to be used
before using the device.
Sufficiently take into consideration the static electricity, chattering
and voltage of the input to be connected when determining each
input circuit.
Although the device contains an ESD protection circuit, static elec-
tricity that exceeds the function may damage the device. When
handling the device, exercise due caution by, for example, ground-
ing the body of the handler.
Execute thermal design providing for a sufficient margin, by consid-
ering allowable dissipation in the actual operating condition. If a
high voltage is applied to IC (e.g. due to a small number of driven
series LEDs), heating of the IC can be controlled by inserting a
resistance to disperse power dissipation.
A thermal shutdown circuit is built in this IC. If chip temperature has
risen abnormally, this circuit works to open output terminals. The
original condition is restored when chip temperature has decreased
to a normal level. As this circuit is provided as protection in the
event of emergency, do not use it on a regular basis.
Due to potential damage, do not use product that has been
dropped or that has come into contact with water.
Cautions on Mounting
Mounting on a Flexible Substrate
When mounting the product on a flexible substrate, a reed may be
detached after mounting due to stress transmitted through the sub-
strate. Therefore, it is recommended to use, for mounting, a rein-
forced substrate or an underfill, etc.
Reworking with a Soldering Iron
The user is strictly admonished against the use of soldering iron for
rework. Such a use may cause mold cracking or open terminals.
Recommended Reflow
Conditions
Allowable Temperature Profile Conditions
Product mounting method should be by Reflow and we recommend
the following temperature profile. Reflow no more than twice.
Storage Conditions before Mounting
Moisture absorption by the plastic package will increase the possibil-
ity of faults, such as cracks; therefore, take enough care for storage.
Recommended Drying Conditions
If the allowable storage period after opening a moisture-proof package
has been exceeded, dry the products under the following conditions
before mounting them:
RoHS Directive Compliance
Models that are indicated as being RoHS compliant do not exceed
the threshold value for the following six substances.
Lead: 1,000 ppm max.
Mercury: 1,000 ppm max.
Cadmium: 100 ppm max.
Hexavalent chromium: 1,000 ppm max.
PBB: 1,000 ppm max.
PBDE: 1,000 ppm max.
Lot Code Indication
Flexible substrate
Underfill
Reinforcing plate
Storage Conditions Period
Before moisture-proof
package is opened 5 to 30°C, 40 to 70%RH 1 Year
After moisture-proof
package is opened 5 to 30°C, 40 to 70%RH 168 hours
Temperature Time Frequency
60°C 72 hours Once or twice
Time
Package surface temperature
10s (max)
250°C
260°C (max)
60~120s
140°C
200°C 220°C
60s (max)
Control Code: Three
alphanumeric characters
Production year: The last
digit of the calendar year
Production week: Serial numbers
(01~) from the week including
January1
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LED Control IC W2RG012RN 21
MEMO

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