PIC12(L)F1571/2 Errata Datasheet by Microchip Technology

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6‘ MICROCHIP Programmer > Reconnect Window > Dashboard
2013-2017 Microchip Technology Inc. DS80000587D-page 1
PIC12(L)F1571/2
The PIC12(L)F1571/2 family devices that you have
received conform functionally to the current Device
Data Sheet (DS40001723D), except for the anomalies
described in this document.
The silicon issues discussed in the following pages are
for silicon revisions with the Device and Revision IDs
listed in Table 1. The silicon issues are summarized in
Table 2.
The errata described in this document will be addressed
in future revisions of the PIC12(L)F1571/2 silicon.
Data Sheet clarifications and corrections start on page
4, following the discussion of silicon issues.
The silicon revision level can be identified using the
current version of MPLAB® IDE and Microchip’s
programmers, debuggers, and emulation tools, which
are available at the Microchip corporate web site
(www.microchip.com).
For example, to identify the silicon revision level
using MPLAB IDE in conjunction with a hardware
debugger:
1. Using the appropriate interface, connect the
device to the hardware debugger.
2. Open an MPLAB IDE project.
3. Configure the MPLAB IDE project for the
appropriate device and hardware debugger.
4. Based on the version of MPLAB IDE you are
using, do one of the following:
a) For MPLAB IDE 8, select Programmer >
Reconnect.
b) For MPLAB X IDE, select Window >
Dashboard and click the Refresh Debug
Tool Status icon ( ).
5. Depending on the development tool used, the
part number and Device Revision ID value
appear in the Output window.
The DEVREV values for the various PIC12(L)F1571/2
silicon revisions are shown in Table 1.
Note: This document summarizes all silicon
errata issues from all revisions of silicon,
previous as well as current. Only the
issues indicated in the last column of
Table 2 apply to the current silicon
revision (A0).
Note: If you are unable to extract the silicon
revision level, please contact your local
Microchip sales office for assistance.
TABLE 1: SILICON DEVREV VALUES
Part Number Device ID Revision ID (Silicon Revision)
A0
PIC12F1571 3051h 2000h
PIC12LF1571 3053h 2000h
PIC12F1572 3050h 2000h
PIC12LF1572 3052h 2000h
Note 1: The Revision ID and Device ID are located in the Configuration memory at addresses 8005h and 8006h,
respectively.
2: Refer to the “PIC12(L)F1571/2 Memory Programming Specification” (DS40001713) for detailed
information on Device and Revision IDs for your specific device.
PIC12(L)F1571/2 Family
Silicon Errata and Data Sheet Clarification
PIC12(L)F1571/2
DS80000587D-page 2 2013-2017 Microchip Technology Inc.
TABLE 2: SILICON ISSUE SUMMARY
Module Feature Item
Number Issue Summary
Affected
Revision(1)
A0
Enhanced Universal Synchro-
nous Receiver Transmitter
(EUSART)
Transmit mode 1.1 Possible duplicate byte transmitted. X
16-Bit Pulse-Width Modulation
(PWM) Continuous Run
Slave Offset 3.1 Anomalous behavior X
Note 1: Only those issues indicated in the last column apply to the current silicon revision.
Work around Affected Silicon Revisions Work around Affected Silicon Revisions
2013-2017 Microchip Technology Inc. DS80000587D-page 3
PIC12(L)F1571/2
Silicon Errata Issues
1. Module: Enhanced Universal
Synchronous Receiver
Transmitter (EUSART)
1.1 Transmit Mode
Under certain conditions, a byte written to the
TXREG register can be transmitted twice. This
happens when a byte is written to TXREG just as
the TSR register becomes empty. This new byte is
immediately transferred to the TSR register, but
also remains in the TXREG register until the
completion of the current instruction cycle. If the
new byte in the TSR register is transmitted before
this instruction cycle has completed, the duplicate
in the TXREG register will subsequently be
transferred to the TSR register on the following
instruction clock cycle and transmitted.
Work around
1. Monitor the Transmit Interrupt Flag bit (TXIF).
Writes to the TXREG register can be performed
once the TXIF bit is set, indicating that the
TXREG register is empty.
2. Monitor the TMRT bit of the TXxSTA register.
Writes to the TXREG register can be performed
once the TMRT bit is set, indicating that the
Transmit Shift Register (TSR) is empty.
Affected Silicon Revisions
2. Module: 16-Bit Pulse-Width Modulation
(PWM)
3.1 Continuous Run Slave Offset Mode Anomaly
The 16-bit PWM in Continuous Run Slave mode
(PWMxOFTCON<6:5>=11) may get stuck in
anomalous behavior. The behavior is that the
slave PWM output will toggle when the master
PWM matches the master PWM offset value, then
toggle again on the next master offset match
event. The slave PWM output will then remain
steady for the number of master periods equal to
the slave PWM period value, after which the
sequence repeats. The slave PWM may
occasionally start to operate as described by either
writing the slave PWMxOFTCON register or
enabling the slave PWM from an Idle state.
Work around
None.
Affected Silicon Revisions
Note: This document summarizes all silicon
errata issues from all revisions of silicon,
previous as well as current. Only the
issues indicated by the shaded column in
the following tables apply to the current
silicon revision (A0).
A0
X
A0
X
PIC12(L)F1571/2
DS80000587D-page 4 2013-2017 Microchip Technology Inc.
Data Sheet Clarifications
The following typographic corrections and clarifications
are to be noted for the latest version of the device data
sheet (DS40001723D).
None.
Note: Corrections are shown in bold. Where
possible, the original bold text formatting
has been removed for clarity.
Rev A Document (11/2013) Rev B Document (05/2015) Rev C Document (09/2015) Rev D Document (06/2017)
2013-2017 Microchip Technology Inc. DS80000587D-page 5
PIC12(L)F1571/2
APPENDIX A: DOCUMENT
REVISION HISTORY
Rev A Document (11/2013)
Initial release of this document.
Rev B Document (05/2015)
Data Sheet Clarifications: Added Module 1.
Rev C Document (09/2015)
Added Modules 1 and 2 (EUSART and 16-Bit PWM);
Other minor corrections.
Data Sheet Clarifications: Removed Module 1 (Data
Sheet updated).
Rev D Document (06/2017)
Changed the text in Module 1, Section 1.1, Work
around section. Other minor corrections.
YSTEM
DS80000587D-page 6 2013-2017 Microchip Technology Inc.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, AnyRate, AVR,
AVR logo, AVR Freaks, BeaconThings, BitCloud, chipKIT, chipKIT
logo, CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR,
Heldo, JukeBlox, KEELOQ, KEELOQ logo, Kleer, LANCheck, LINK
MD, maXStylus, maXTouch, MediaLB, megaAVR, MOST, MOST
logo, MPLAB, OptoLyzer, PIC, picoPower, PICSTART, PIC32
logo, Prochip Designer, QTouch, RightTouch, SAM-BA, SpyNIC,
SST, SST Logo, SuperFlash, tinyAVR, UNI/O, and XMEGA are
registered trademarks of Microchip Technology Incorporated in
the U.S.A. and other countries.
ClockWorks, The Embedded Control Solutions Company,
EtherSynch, Hyper Speed Control, HyperLight Load, IntelliMOS,
mTouch, Precision Edge, and Quiet-Wire are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any
Capacitor, AnyIn, AnyOut, BodyCom, CodeGuard,
CryptoAuthentication, CryptoCompanion, CryptoController,
dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM,
ECAN, EtherGREEN, In-Circuit Serial Programming, ICSP, Inter-
Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, Mindi,
MiWi, motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB,
MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation,
PICDEM, PICDEM.net, PICkit, PICtail, PureSilicon, QMatrix,
RightTouch logo, REAL ICE, Ripple Blocker, SAM-ICE, Serial
Quad I/O, SMART-I.S., SQI, SuperSwitcher, SuperSwitcher II,
Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan,
WiperLock, Wireless DNA, and ZENA are trademarks of Microchip
Technology Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated in
the U.S.A.
Silicon Storage Technology is a registered trademark of Microchip
Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology
Germany II GmbH & Co. KG, a subsidiary of Microchip
Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2013-2017, Microchip Technology Incorporated, All Rights
Reserved.
ISBN: 978-1-5224-1843-6
Note the following details of the code protection feature on Microchip devices:
Microchip products meet the specification contained in their particular Microchip Data Sheet.
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
QUALITY MANAGEMENT S
YSTEM
CERTIFIED BY DNV
== ISO/TS 16949 ==
6‘ ‘MICRDCHIP
2013-2017 Microchip Technology Inc. DS80000587D-page 7
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