MP6900 Datasheet by Monolithic Power Systems Inc.

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“MP5“ and "The Future m Ana‘og IC Techmbgy‘ are Reglsiered Trademarks m Palent
MP6900
Fast Turn-off Intelligent Controller
MP6900 Rev. 1.13 www.MonolithicPower.com 1
6/23/2014 MPS Proprietary Information. Patent Protected. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2014 MPS. All Rights Reserved.
The Future of Analog IC Technology
DESCRIPTION
The MP6900 is a low-drop, fast turn-off
intelligent controller that combined with an
external switch replaces Schottky diodes in
high-efficiency, Flyback converters. The chip
regulates the forward drop of an external switch
to about 70mV and switches it off as soon as
the voltage becomes negative. Package
choices are a space saving TSOT23-5, QFN6
(3x3mm) or SOIC-8.
FEATURES
Works with both Standard and Logic Level
FETS
Compatible with Energy Star, 1W Standby
Requirements
V
DD Range From 8V to 24V
70mV VDS Regulation Function (1)
Fast Turn-off Total Delay of 20ns
Max 400kHz Switching Frequency
<3mA Low Quiescent Current
Supports CCM, DCM and Quasi-Resonant
Topologies
Supports High-side and Low-side
Rectification
Power Savings of Up to 1.5W in a Typical
Notebook Adapter
APPLICATIONS
Industrial Power Systems
Distributed Power Systems
Battery Powered Systems
Flyback Converters
A
ll MPS parts are lead-free and adhere to the RoHS directive. For MPS green
status, please visit MPS website under Products, Quality Assurance page.
“MPS andThe Future of Analog IC Technology” are Registered Trademarks o
f
Monolithic Power Systems, Inc.
Notes:
1) Related issued patent: US Patent US8,067,973; CN Paten
t
ZL201010504140.4. Other patents pending.
TYPICAL APPLICATION
mp5 MP6900- FAST TURN-OFF INTELLIGENT CONTROLLER TOP VIEW I: :I PGND E) E VG I: EN 3 E VDD I: :I VD E E Vss
MP6900- FAST TURN-OFF INTELLIGENT CONTROLLER
MP6900 Rev. 1.13 www.MonolithicPower.com 2
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ORDERING INFORMATION
Part Number Package Top Marking
MP6900DJ* TSOT23-5 6D
MP6900DS** SOIC-8 MP6900DS
MP6900DQ*** QFN6 (3x3mm) 5D
* For Tape & Reel, add suffix –Z (e.g. MP6900DJ–Z).
For RoHS Compliant Packaging, add suffix –LF (e.g. MP6900DJ–LF–Z)
** For Tape & Reel, add suffix –Z (e.g. MP6900DS–Z).
For RoHS Compliant Packaging, add suffix –LF (e.g. MP6900DS–LF–Z)
*** For Tape & Reel, add suffix –Z (e.g. MP6900DQ–Z).
For RoHS Compliant Packaging, add suffix –LF (e.g. MP6900DQ–LF–Z)
PACKAGE REFERENCE
TOP VIEW
VG
VSS
VDD
1
2
3
5
4
PGND
VD
MARKING
PGND
EN
NC
VD
VG
NC
VDD
VSS
1
2
3
4
8
7
6
5
TOP VIEW
TSOT23-5 SOIC-8 QFN6 (3x3mm)
ABSOLUTE MAXIMUM RATINGS (2)
VDD to Vss ..................................... -0.3V to +27V
PGND to VSs ............................... -0.3V to +0.3V
VG to VSS ......................................... -0.3V to VCC
VD to VSS .................................... -0.7V to +180V
EN to VSS .................................... -0.3V to +6.5V
Maximum Operating Frequency ............. 400kHz
Continuous Power Dissipation (TA = +25°C) (3)
SOIC8 ...................................................... 1.39W
TSOT23-5 ................................................ 0.57W
QFN6 (3x3mm) .......................................... 2.5W
Junction Temperature .............................. 150°C
Lead Temperature (Solder) ...................... 260°C
Storage Temperature .............. -55°C to +150°C
Recommended Operation Conditions (4)
VDD to Vss ........................................... 8V to 24V
Operating Junction Temp. (TJ). ... -40°C to +125°C
Thermal Resistance (5) θJA θJC
SOIC8 .................................... 90 ...... 45 ... °C/W
TSOT23-5 ............................. 220 .... 110 .. °C/W
QFN6 (3x3mm) ...................... 50 ...... 12 ... °C/W
Notes:
2) Exceeding these ratings may damage the device.
3) The maximum allowable power dissipation is a function of the
maximum junction temperature. TJ(MAX) the junction-to-
ambient thermal resistance θJA and the ambient temperature
TA. The maximum allowable power dissipation at any ambien
t
temperature is calculated using: PD(MAX)=(TJ(MAX)-TA)/ θJA.
Exceeding the maximum allowable power dissipation will
cause excessive die temperature, and the regulator will go
into thermal shutdown. Internal thermal shutdown circuitry
protects the device from permanent damage.
4) The device is not guaranteed to function outside of its
operating conditions.
5) Measured on JESD51-7, 4-layer PCB.
"IFS MP6900— FAST TURN-OFF INTELLIGENT CONTROLLER Vu LOAD how Von Von VD Vss eArE=0S2 GATE 0!! GATE 0!!
MP6900- FAST TURN-OFF INTELLIGENT CONTROLLER
MP6900 Rev. 1.13 www.MonolithicPower.com 3
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ELECTRICAL CHARACTERISTICS
VDD = 12V, TA= +25°C, unless otherwise noted.
Paramete
r
Conditions Min Typ Max Units
VDD Voltage Range 8 24 V
VDD UVLO Rising 5.0 6.0 7.0 V
VDD UVLO Hysteresis 1.2 V
Operating Current CLOAD=5nF, SW=100kHz 8 12 mA
Quiescent Current No Switching 2 3 mA
Shutdown Current VDD =4 V 100 150 µA
VDD=20V EN=0V (50kΩ) 250 µA
Thermal Shutdown 170 oC
Thermal Shutdown hysteresis 50 oC
Enable (Low) SOIC-8 only 0.8 V
Enable (High) SOIC-8 only 2 V
Pull-up Current On Enable SOIC-8 only 5 10 µA
CONTROL CIRCUITRY SECTION
VSSVD Forward Voltage, Vfwd 55 70 85 mV
Turn-on Delay CLOAD = 5nF 150 ns
CLOAD = 10nF 200 ns
Pull-down Resistance of VG Pin 10 20
kΩ
Input Bias Current On VD Pin -0.3V > VD >180V 10 µA
Minimum On-time CLOAD = 5nF 200 ns
GATE DRIVER SECTION
VG (Low) ILOAD=1mA 0.05 0.5
V
VG (High) VDD >17V 12 13.5 15 V
VDD <17V VDD-2.2
Turn-off Threshold (VSS-VD) 20 30 40
mV
Turn-off Propagation Delay VD=VSS, RGATE=0Ω 15
ns
Turn-off Total Delay (6)
VD =VSS, CLOAD=5nF,
RGATE=0Ω 20 35 ns
VD =VSS, CLOAD=10nF,
RGATE=0Ω 30 45 ns
Pull-down Impedance 1 2
Ω
Pull-down Current 3V <VG <10V 2 A
Notes:
6) Guaranteed by Design and Characterization
"IFS MP6900- FAST TURN-OFF INTELLIGENT CONTROLLER
MP6900- FAST TURN-OFF INTELLIGENT CONTROLLER
MP6900 Rev. 1.13 www.MonolithicPower.com 4
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© 2014 MPS. All Rights Reserved.
PIN FUNCTIONS
TSOT23-5
Pin # SOIC8
Pin #
QFN6
(3x3mm)
Pin # Name Description
1 8 6 VG Gate drive output
2 5 4 VSS Ground, also used as reference for VD
3 6 5 VDD Supply Voltage
4 4 3 VD FET drain voltage sense
5 1 1 PGND Power Ground, return for driver switch
- 2 2 EN Enable pin, active high
- 3 NC No connection
- 7 NC No connection
I'I'II'E‘ SHUTDOWN CURRENT (am :\ MPGQOO- FAST TURN-OFF INTELLIGENT CONTROLLER TE MPERATURECC) TEMPE RATUREUC) TEMPERATURE("C) u " H m" ‘u- V“ :m "' mm W film .JM‘M _WM _\an m.., I.\. .. fin n ..\....\.._\_..\., TE MFERATUREUC) TE MPERATURE("C) 10us/dw MM WWW ~ r~ a..- qJL m; .. ELL W .. F..x.\__\_.,L ., L4 A L4 \ k \ mus/dw 1 Ous/dlv mus/aw
MP6900- FAST TURN-OFF INTELLIGENT CONTROLLER
MP6900 Rev. 1.13 www.MonolithicPower.com 5
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TYPICAL PERFORMANCE CHARACTERISTICS
VDD = 12V, unless otherwise noted.
V
FWD
vs. Temperature
-50 0 50 100 150
V
FWD
(mV)
Turn off threshold vs.
Temperature
-40
-35
-30
-25
-20
-50 0 50 100 150
TURN OFF THRESHOLD (V)
Quiescent Current vs.
Temperature
1
1.2
1.4
1.6
1.8
2
2.2
2.4
-50 0 50 100 150
QUIESCENT CURRENT (mA)
Shutdown Current vs.
Temperature
50
100
150
200
-50 0 50 100 150
5
5.5
6
6.5
7
-50 0 50 100 150
V
DD
UVLO RISING (V)
V
DD
UVLO Rising vs.
Temperature
V
DS
50V/div
V
GS
5V/div
I
SD
10A/div
Operation in 90W Flyback
Application
(5)
(V
IN
=90Vac, I
OUT
=1A)
Operation in 90W Flyback
Application
(V
IN
=90Vac, I
OUT
=4.7A)
V
DS
50V/div
V
GS
10V/div
I
SD
10A/div
Operation in 90W Flyback
Application
(V
IN
=250Vac, I
OUT
=1A)
V
DS
50V/div
V
GS
5V/div
I
SD
10A/div
Operation in 90W Flyback
Application
(V
IN
=250Vac, I
OUT
=4.7A)
V
DS
50V/div
V
GS
10V/div
I
SD
10A/div
60
65
70
75
80
Notes:
7) See Fig.7 for the test circuit..
mp5 MP6900- FAST TURN-OFF INTELLIGENT CONTROLLER Pro|ecmn —|_ 5 Logic EN lj—l— v ' Pro|echon camml D I: Swisher 0-cher N V PGND
MP6900- FAST TURN-OFF INTELLIGENT CONTROLLER
MP6900 Rev. 1.13 www.MonolithicPower.com 6
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© 2014 MPS. All Rights Reserved.
BLOCK DIAGRAM
Figure 1—Functional Block Diagram
OPERATION
The MP6900 supports operation in CCM, DCM
and Quasi-Resonant topologies. Operating in
either a DCM or Quasi-Resonant topology, the
control circuitry controls the gate in forward mode
and will turn the gate off when the MOSFET
current is fairly low. In CCM operation, the control
circuitry turns off the gate when very fast
transients occur.
Blanking
The control circuitry contains a blanking function.
When it pulls the MOSFET on/off, it makes sure
that the on/off state at least lasts for some time.
The turn on blanking time is ~1.6us, which
determines the minimum on-time. During the turn
on blanking period, the turn off threshold is not
totally blanked, but changes the threshold
voltage to ~+50mV (instead of -30mV). This
assures that the part can always be turned off
even during the turn on blanking period. (Albeit
slower, so it is not recommended to set the
synchronous period less than 1.6us at CCM
condition in flyback converter, otherwise shoot
through may occur)
VD Clamp
Because VD can go as high as 180V, a High-
Voltage JFET is used at the input. To avoid
excessive currents when Vg goes below -0.7V, a
small resistor is recommended between VD and
the drain of the external MOSFET.
Under-Voltage Lockout (UVLO)
When the VDD is below UVLO threshold, the part
is in sleep mode and the Vg pin is pulled low by a
10kΩ resistor.
Enable pin
The Enable function is only available on the
SOIC-8 package. If EN is pulled low, the part is in
sleep mode.
mp5 MP6900- FAST TURN-OFF INTELLIGENT CONTROLLER
MP6900- FAST TURN-OFF INTELLIGENT CONTROLLER
MP6900 Rev. 1.13 www.MonolithicPower.com 7
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Thermal shutdown
If the junction temperature of the chip exceeds
170oC, the Vg will be pulled low and the part
stops switching. The part will return to normal
function after the junction temperature has
dropped to 120oC.
Thermal Design
If the dissipation of the chip is higher than
100mW due to switching frequencies above
100kHz, VDD higher than 15V and/or Cload
larger than 5nF, it is recommended to use the
thermally-enhanced SOIC-8.
Turn-on Phase
When the synchronous MOSFET is conducting,
current will flow through its body diode which
generates a negative Vds across it. Because this
body diode voltage drop (<-500mV) is much
smaller than the turn on threshold of the control
circuitry (-70mV), which will then pull the gate
driver voltage high to turn on the synchronous
MOSFET after about 150ns turn on delay
(Defined in Fig.2).
As soon as the turn on threshold (-70mV) is
triggered, a blanking time (Minimum on-time:
~200ns) will be added during which the turn off
threshold will be changed from -30mV to +50mV.
This blanking time can help to avoid error trigger
on turn off threshold caused by the turn on
ringing of the synchronous MOSFET.
VDS
VGATE
tDon tDoff
-70mV
-30mV
2V
Total
t
5V
Figure 2—Turn on and Turn off delay
Conducting Phase
When the synchronous MOSFET is turned on,
Vds becomes to rise according to its on
resistance, as soon as Vds rises above the turn
on threshold (-70mV), the control circuitry stops
pulling up the gate driver which leads the gate
voltage is pulled down by the internal pull-down
resistance (10k) to larger the on resistance of
synchronous MOSFET to ease the rise of Vds.
By doing that, Vds is adjusted to be around -
70mV even when the current through the MOS is
fairly small, this function can make the driver
voltage fairly low when the synchronous
MOSFET is turned off to fast the turn off speed
(this function is still active during turn on blanking
time which means the gate driver could still be
turned off even with very small duty of the
synchronous MOSFET).
Turn-off Phase
When Vds rises to trigger the turn off threshold (-
30mV), the gate voltage is pulled to low after
about 20ns turn off delay (defined in Fig.2) by the
control circuitry. Similar with turn-on phase, a
200ns blanking time is added after the
synchronous MOSFET is turned off to avoid error
trigger.
Fig.3 shows synchronous rectification operation
at heavy load condition. Due to the high current,
the gate driver will be saturated at first. After Vds
goes to above -70mV, gate driver voltage
decreases to adjust the Vds to typical -70mV.
Fig 4 shows synchronous rectification operation
at light load condition. Due to the low current, the
gate driver voltage never saturates but begins to
decrease as soon as the synchronous MOSFET
is turned on and adjust the Vds.
-70mV
-30mV
Vds
Isd
Vgs t0 t1 t2
Figure 3—Synchronous Rectification
Operation at heavy load
MPGQOO- FAST TURN-OFF INTELLIGENT CONTROLLER I'I'IPS‘
MP6900- FAST TURN-OFF INTELLIGENT CONTROLLER
MP6900 Rev. 1.13 www.MonolithicPower.com 8
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-70mV
-30mV
Vds
Isd
Vgs t0 t1 t2
Figure 4—Synchronous Rectification
Operation at light load
SR Mosfet Selection and Driver ability
The Power Mosfet selection proved to be a trade
off between Ron and Qg. In order to achieve high
efficiency, the Mosfet with smaller Ron is always
preferred, while the Qg is usually larger with
smaller Ron, which makes the turn-on/off speed
lower and lead to larger power loss. For MP6900,
because Vds is regulated at ~-70mV during the
driving period, the Mosfet with too small Ron is
not recommend, because the gate driver may be
pulled down to a fairly low level with too small
Ron when the Mosfet current is still fairly high,
which make the advantage of the low Ron
inconspicuous.
Fig.5 shows the typical waveform of QR flyback.
Assume 50% duty cycle and the output current is
IOUT.
To achieve fairly high usage of the Mosfet’s Ron,
it is expected that the Mosfet be fully turned on at
least 50% of the SR conduction period:
VfwdRonIRonIcVds OUT ×=×= 2
Where Vds is Drain-Source voltage of the Mosfet
and Vfwd is the forward voltage threshold of
MP6902, which is ~70mV.
So the Mosfet’s Ron is recommended to be no
lower than ~35/IOUT (m). (For example, for 5A
application, the Ron of the Mosfet is
recommended to be no lower than 7m)
Fig.6 shows the corresponding total delay during
turn-on period (tTotal, see Fig.2) with driving
different Qg Mosfet by MP6902. From Fig.6, with
driving a 120nC Qg Mosfet, the driver ability of
MP6900 is able to pull up the gate driver voltage
of the Mosfet to ~5V in 300ns as soon as the
body diode of the Mosfet is conducting, which
greatly save the turn-on power loss in the
Mosfet’s body diode.
Id
Ipeak
Vg
SR Conduction Period
50% SR Conduction Period
Ic Ipeak˜ 4·IOUT
Ic˜ 2·IOUT
Figure 5—Synchronous Rectification typical
waveforms in QR Flyback
Turn-on Delay vs . Qg
0
50
100
150
200
250
300
350
0 20 40 60 80 100 120 140
Qg (nC)
Total Delay (ns)
Figure 6—Total Turn-on Delay vs. Q
mp5 MP6900- FAST TURN-OFF INTELLIGENT CONTROLLER
MP6900- FAST TURN-OFF INTELLIGENT CONTROLLER
MP6900 Rev. 1.13 www.MonolithicPower.com 9
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TYPICAL APPLICATION CIRCUIT
PGND
PGND
PGND
1K
R10
PGND
20K
R7
NC
RF1
390p
C15
51K
R16
22uF/25V
C11
TL431
U2
20K
R23
AGND
10K
R28
100nF
C16
2K
R26
66.5K
R27
AGND
NA
R29
1M
R2
1Ohms
R3
1Ohms
R410k
R12
15
0K
R114.7nF/1kV
C10
100uF/25V
C14
0.1uF/25V
C12
NC
R18
1K
R24
NC
C8
1uF/50V
C9
5Ohms
RT1
22pF
C13
10nF
C5
0.22uF/250VAC
CX1
US1K-F
D2
1M
R1
0
R25
50
R
19
NC
R21
1A
F1
1
1
CN1
1.5Ohms
R5
12
43
GBU4J
BD1
150K
R13
AP2761I
Q1
24
24mH
LX1
2.2nF/250VAC
CY3
NC
R20
4
3
1
2
PC817B
U3
4.7nF/250VAC
CY1
1
1
CN2
4.7nF/250VAC
CY2
COMP
4Fset5
GND
3VCC6
Source
2NC7
Drv
1HV8
HF0200
Vs
Vd
VSS5
VG8
VD4
NC7
NC
3
PGND
1
EN
2
VDD
6
MP6900DS
U1
NC
NC1
NC
R6
Vs
Vd
10k
R15
D4
1k
R17
10
R9
D5
20
R22
M1
D7
1000uF
C6
220uF
C7
D3
10
R14
D1
Q2
Vg
Vg
1uF
C4
100uF
C1
11
13
8
10
3
1
6
4
T1
45:9:7:7 EE28_L
PGND
AGND
AGNDVaux
Vaux
Figure 7—MP6900 for Secondary Synchronous Controller in 90W Flyback Application
mp5 MP6900- FAST TURN-OFF INTELLIGENT CONTROLLER 280 2.60
MP6900- FAST TURN-OFF INTELLIGENT CONTROLLER
MP6900 Rev. 1.13 www.MonolithicPower.com 10
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PACKAGE INFORMATION
TSOT23-5
0.30
0.50
SEATING PLANE
0.95 BSC
0.84
0.90 1.00 MAX
0.00
0.10
TOP VIEW
FRONT VIEW SIDE VIEW
RECOMMENDED LAND PATTERN
2.80
3.00
1.50
1.70 2.60
3.00
13
45
0.09
0.20
NOTE:
1) ALL DIMENSIONS ARE IN MILLIMETERS.
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH,
PROTRUSION OR GATE BURR.
3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH
OR PROTRUSION.
4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING)
SHALL BE 0.10 MILLIMETERS MAX.
5) DRAWING CONFORMS TO JEDEC MO-193, VARIATION AA.
6) DRAWING IS NOT TO SCALE.
0.30
0.50
0
o
-8
o
0.25 BSC
GAUGE PLANE
2.60
TYP
1.20
TYP
0.95
BSC
0.60
TYP
SEE DETAIL "A"
DETAIL A
I'I'IPS‘ MPGQOO- FAST TURN-OFF INTELLIGENT CONTROLLER EFE T,HEHE4” EEHE—— //—\\ / I ‘\ J-—L W X ,x T
MP6900- FAST TURN-OFF INTELLIGENT CONTROLLER
MP6900 Rev. 1.13 www.MonolithicPower.com 11
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SOIC8
0.016(0.41)
0.050(1.27)
0
o
-8
o
DETAIL "A"
0.010(0.25)
0.020(0.50) x 45
o
SEE DETAIL "A"
0.0075(0.19)
0.0098(0.25)
0.150(3.80)
0.157(4.00)
PIN 1 ID
0.050(1.27)
BSC
0.013(0.33)
0.020(0.51)
SEATING PLANE
0.004(0.10)
0.010(0.25)
0.189(4.80)
0.197(5.00)
0.053(1.35)
0.069(1.75)
TOP VIEW
FRONT VIEW
0.228(5.80)
0.244(6.20)
SIDE VIEW
14
85
RECOMMENDED LAND PATTERN
0.213(5.40)
0.063(1.60)
0.050(1.27)
0.024(0.61)
NOTE:
1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN
BRACKET IS IN MILLIMETERS.
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS.
3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH
OR PROTRUSIONS.
4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING)
SHALL BE 0.004" INCHES MAX.
5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION AA.
6) DRAWING IS NOT TO SCALE.
0.010(0.25) BSC
GAUGE PLANE
mp5 MPGBOO— FAST TURN-OFF INTELLIGENT CONTROLLER | | \/ wy/i . —./ “0/, j: I (L ”/9 //- - 114.41.?!_._._._._. 7 __:]__._.Ir._._E.. | i | ' i : 773 . F I I TOP VIEW BOTTOM VIEW SIDE VIEW DETAIL A <7 note:="" i="" i="" sh="" 1e?="" ._._1!.._._ee="" ,="" {e="" recommended="" land="" pattern="">
MP6900- FAST TURN-OFF INTELLIGENT CONTROLLER
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.
MP6900 Rev. 1.13 www.MonolithicPower.com 12
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QFN6 (3X3mm)
SIDE VIEW
TOP VIEW
1
6
43
BOTTOM VIEW
2.90
3.10 1.40
1.60
2.90
3.10 2.20
2.40
0.95
BSC
0.35
0.45
0.80
1.00
0.00
0.05
0.20 REF
PIN 1 ID
MARKING
1.50
0.95
0.40
RECOMMENDED LAND PATTERN
2.90 NOTE:
1) ALL DIMENSIONS ARE IN MILLIMETERS.
2) EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLAS
H
.
3) LEAD COPLANARITY SHALL BE 0.10 MILLIMETER MAX.
4) JEDEC REFERENCE IS MO-229, VARIATION VEEA-2.
5) DRAWING IS NOT TO SCALE.
PIN 1 ID
SEE DETAIL A
2.30
0.80
PIN 1 ID OPTION A
R0.20 TYP. PIN 1 ID OPTION B
R0.20 TYP.
DETAIL A
0.35
0.55
PIN 1 ID
INDEX AREA

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