MP2122 Datasheet by Monolithic Power Systems Inc.

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w—4 ‘H—i EFFIC‘ENCY (“/n) Efficient: Vw=5V y A) m
MP2122
6V, 2A, Low Quiescent Current
Dual, SYNC Buck Regulator
MP2122 Rev. 1.02 www.MonolithicPower.com 1
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© 2017 MPS. All Rights Reserved.
The Future of Analog IC Technology
DESCRIPTION
The MP2122 is an internally-compensated,
1MHz fixed-frequency, dual PWM, synchronous,
step-down regulator. The MP2122 operates
from a 2.7V-to-6V input, generates an output
voltage as low as 0.608V, and has a 45µA
quiescent current that makes it ideal for
powering portable equipment that runs on a
single cell lithium-ion (Li+) battery.
The MP2122 integrates dual 80m high-side
switches and 35m synchronous rectifiers for
high efficiency without an external Schottky
diode. Peak-current mode control and internal
compensation limits the minimum number of
readily-available external components.
Fault-condition protections include cycle-by-cycle
current limiting and thermal shutdown.
The MP2122 is available in an 8-pin TSOT23-8
package.
FEATURES
Dual 2A-Output Current
>93% Peak Efficiency
>80% Light-Load Efficiency
Wide 2.7V-to-6V Operating Input Range
80m and 35m Internal Power MOSFET
1MHz Fixed Switching Frequency
Adjustable Output from 0.608V to VIN
180° Phase-Shifted Operation
100% Duty-Cycle Operation
45µA Quiescent Current
Cycle-by-Cycle Over-Current Protection
Short-Circuit Protection with Hiccup Mode
Thermal Shutdown
Available in an 8-pin TSOT23-8 Package
APPLICATIONS
Small/Handhold Devices
DVD Drivers
Portable Instruments
Smartphones and Feature Phones
Battery-Powered Devices
A
ll MPS parts are lead-free and adhere to the RoHS directive. For MPS green
status, please visit MPS website under Quality Assurance.
“MPS” and “The Future of Analog IC Technology” are Registered Trademarks o
f
Monolithic Power Systems, Inc.
TYPICAL APPLICATION
COUT1
22µF R1
806kO
IN
EN1 EN2
SW1 SW2
GND
FB1 FB2
CIN
22µF
R2
412kO
R3
806kO
R4
825kO
COUT 2
22µF
VIN
5V
VOUT1
1.8V VOUT2
1.2V
MP2122
L1
1.5uH
L2
1.5uH
EN1 EN2
30
40
50
60
70
80
90
100
0.01 0.1 1 10
mP . MP2122 —6V, 2A, LOW QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR IAEDY TJ r
MP2122 –6V, 2A, LOW QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR
MP2122 Rev. 1.02 www.MonolithicPower.com 2
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ORDERING INFORMATION
Part Number* Package Top Marking
MP2122GJ TSOT23-8
See Below
* For Tape & Reel, add suffix –Z (e.g. MP2122GJ–Z);
TOP MARKING
AED: product code of MP2122GJ
Y: year code
PACKAGE REFERENCE
1
2
3
4
8
7
6
5
TOP VIEW
FB2
SW2
EN1
EN2
FB1
SW1
GND
IN
TSOT23-8
ABSOLUTE MAXIMUM RATINGS (1)
Supply Voltage VIN ..................................... 6.5V
VSW–0.3V (-3V for<10ns) to 6.5V (7.5V for<10ns)
All Other Pins ............................. –0.3V to +6.5 V
Junction Temperature ............................... 150°C
Lead Temperature .................................... 260°C
Continuous Power Dissipation (TA = +25°C) (2)
................................................................. 1.25W
Storage Temperature .............. –65C to +150C
Recommended Operating Conditions
Supply Voltage VIN ............................. 2.7V to 6V
Output Voltage VOUT .................... 0.608V to 5.5V
Operating Junction Temp. ....... -40°C to +125°C
Thermal Resistance (3) θJA θJC
TSOT23-8 ..................................... 100 ..... 55 °C/W
Notes:
1) Absolute maximum ratings are rated under room temperature
unless otherwise noted. Exceeding these ratings may
damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ (MAX), the junction-to-
ambient thermal resistance JA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD (MAX) = (TJ
(MAX)-TA)/JA. Exceeding the maximum allowable powe
r
dissipation will cause excessive die temperature, and the
regulator will go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
damage.
3) Measured on JESD51-7, 4-layer PCB.
mPs MP2122 —ev, 2A, Low QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR
MP2122 –6V, 2A, LOW QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR
MP2122 Rev. 1.02 www.MonolithicPower.com 3
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ELECTRICAL CHARACTERISTICS (4)
VIN = VEN = 3.6V, TA = +25°C, unless otherwise noted.
Parameters Symbol Condition Min Typ Max Units
Supply Current (Quiescent) IQ VIN=3.6V, VEN=2V,
VFB = 0.65V 35 45 55 A
Shutdown Current VEN = 0V 0 1 A
IN Under-Voltage Lockout
Threshold Rising edge 2.4 2.5 2.6 V
IN Under-Voltage Lockout
Hysteresis 300 mV
Regulated FB Voltage VFB T
A = +25°C 0.596 0.608 0.620 V
FB Input Current VFB = 0.608V ±10 50 nA
EN, HIGH Threshold –40°C TA +85°C 1.2 V
EN, LOW Threshold –40°C TA +85°C 0.4 V
Internal Soft-Start Time τSS 0.5 ms
High-Side Switch, ON-
Resistance RDSON_P VIN=5V 80 m
Low-Side Switch, ON-
Resistance RDSON_N VIN=5V 35 m
SW Leakage Current VEN = 0V; VIN = 6V
VSW = 0V and 6V –1 0 1 A
High-Side Switch, Current Limit Sourcing, D=40% 2.8 3.5 4.5 A
Oscillator Frequency Both channels work in
CCM 0.8 1 1.2 MHz
Phase Shift 180 degree
Minimum ON Time(5) τON_MIN 90 ns
Minimum OFF Time τOFF_MIN 100 ns
Maximum Duty Cycle 100 %
Thermal Shutdown Threshold(5) Hysteresis = 30°C 160 °C
Notes:
4) Production test at +25°C. Specifications over the temperature range are guaranteed by design and characterization.
5) Guarantee by design
mP . MP2122 —6V, 2A, LOW QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR Efficiency Efficiency Load Regulation VW:3 5v vm:5v vw:3 6V § § g g E E vownzv VouT1:‘ 8V J E E Voim:1 3V 3 9 9 m E u m m b 2 vom1=1 av O 4 ‘MW EMA) LOAD CURRENT (A) Load Regulation FB Votage vs. Temperature Quiescent Current vs. Vw=5V Temperature 5 5 vomfl 2v E R A 3 § g :> V a 5 9 z 9 g VOUTT" W E O 4 LOAD CURRENT (A) TEMPERATURE (“0) TEMPERATURE (“0) Fre uency vs. Temperature |_Limit vs. Temperature Case Temp Rise Em“ C 3""9‘ 0” Both channel on 7: 9‘ / I V E 2 fi > v n: o 5 n. E E E 2 4 | LINHT m S FREQUENCY A T :1 m m “' 5 // TEMPERATURE (Tc) TEMPERATURE cc) RAN
MP2122 –6V, 2A, LOW QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR
MP2122 Rev. 1.02 www.MonolithicPower.com 4
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TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 5V, VOUT1 = 1.8V, VOUT2 = 1.2V, L = 1.5µH, COUT1=COUT2=22µF, TA = 25°C, unless otherwise
noted.
30
40
50
60
70
80
90
100
0.01 0.1 1 10 30
40
50
60
70
80
90
100
0.01 0.1 1 10
-0.5
-0.4
-0.3
-0.2
-0.1
0
0.1
0.2
0.3
0.4
0.5
0 0.20.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 2.2
-0.5
-0.4
-0.3
-0.2
-0.1
0
0.1
0.2
0.3
0.4
0.5
0 0.20.40.60.8 1 1.21.4 1.61.8 2 2.2
20
30
40
50
60
70
80
-60 -40 -20 0 20 40 60 80 100
0.8
0.85
0.9
0.95
1
1.05
1.1
1.15
1.2
-60 -40 -20 0 20 40 60 80 100 1
1.5
2
2.5
3
3.5
4
4.5
5
-60 -40 -20 0 20 40 60 80 100 0
5
10
15
20
25
30
0 0.5 1 1.5 2 2.5
590
595
600
605
610
615
620
-60 -40 -20 0 20 40 60 80 100
mP . MP2122 —6V, 2A, LOW QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR Case Temp Rise vw=3.sv Bum channe‘ on CASE TEMP RISE (“0) ‘wrW
MP2122 –6V, 2A, LOW QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR
MP2122 Rev. 1.02 www.MonolithicPower.com 5
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 5V, VOUT1 = 1.8V, VOUT2 = 1.2V, L = 1.5µH, COUT1=COUT2=22µF, TA = 25°C, unless otherwise
noted.
0
5
10
15
20
25
30
35
40
0 0.5 1 1.5 2 2.5
mp ' MP2122 —6V, 2A, LOW QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR Output ripple Output ripple Output ripple lourl = lourz‘ 0“ lourl = lourz‘ 1A lour1=|our2= 2" ‘ fl ‘ ‘ VWH’ACWMWW ”gum/“WWW mmvldlv 1 m aw Vow/AC n. .. . - . . . . . . ,. - J r W F M l 7 swr sw1 W Jumwuwu L. 5mg; H-.. L-- \ \ vow/Ac EWM WWW vow/Ac mmNW 1-wa :‘gU’E/Q‘Cm 1umvldw . ‘ _ ~ ~ 1 . lOmV/dw . .. ~ . r \ swz _ _ ”J _ Jill. 5sz .UL - _ L. all. svmw swaw 1OUmS/dlv lpsldlv luS/dlv Vin power up without load Vin power up half cad Vi power up full load ‘ourl : lourz: 0" IOUTl : ‘ourz: 1“ 'oun : 'ourz: 2“ i i i VoUH Volm v My r“ mm m lS/YJJ W Vouw p___J Vouw P ‘ vow, ‘ wmlv lV/dw lV/dw ,P— ,——-————-— .———-—-—-——— v‘N Vw \4N 5V/uw sv/aw 5v/mv 2ms/dlv 2ms/dw st/dw Vin power down without load Vin power down half load Vin power down full load loun : ‘oqu M low :lourz:1A 'our1:'ourz: 2A ______\ vc7W \—_...._. vO H mm m wily '- Yggp '- Vouvg Vo r2 mm V” will my; r” VlN \~ Vw \ \. 5v/mv'l 5qu m Wm m mums/aw stldlv st/dw
MP2122 –6V, 2A, LOW QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR
MP2122 Rev. 1.02 www.MonolithicPower.com 6
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 5V, VOUT1 = 1.8V, VOUT2 = 1.2V, L = 1.5µH, COUT1=COUT2=22µF, TA = 25°C, unless otherwise
noted.
mp ' MP2122 —6V, 2A, LOW QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR i i i n.______.. H..— -____.__ m m m E____ n__[ n.— 400us/div. maps/aw. Aoous/dw i W M II II L_____ r P 5—...” P E Aoflus/dw. Aoous/dw ‘ / _7 g 400us/dw. 400usldw. Auuus/dw
MP2122 –6V, 2A, LOW QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR
MP2122 Rev. 1.02 www.MonolithicPower.com 7
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 5V, VOUT1 = 1.8V, VOUT2 = 1.2V, L = 1.5µH, COUT1=COUT2=22µF, TA = 25°C, unless otherwise
noted.
V
OUT1
1V/div.
V
OUT1
1V/div.
V
OUT2
1V/div.
V
OUT1
1V/div.
I
L1
500mA/div.
V
OUT2
5V/div.
SW
2V/div.
V
OUT1
1V/div.
I
L1
1A/div.
V
OUT2
5V/div.
SW
5V/div.
V
OUT1
1V/div.
I
L1
2A/div.
V
OUT2
5V/div.
SW
5V/div.
V
OUT1
1V/div.
V
OUT2
1V/div.
EN
5V/div.
V
OUT1
1V/div.
V
OUT2
1V/div.
EN
5V/div.
V
OUT2
1V/div.
EN
5V/div.
EN
5V/div.
V
OUT1
1V/div.
V
OUT2
1V/div.
EN
5V/div.
V
OUT1
1V/div.
V
OUT2
1V/div.
EN
5V/div.
EN on without load
I
OUT1
= I
OUT2
= 0A
EN on with half load
I
OUT1
= I
OUT2
= 1A
EN on with full load
I
OUT1
= I
OUT2
= 2A
1s/div.
EN down without load
I
OUT1
= I
OUT2
= 0A
EN down with half load
I
OUT1
= I
OUT2
= 1A
EN down with full load
I
OUT1
= I
OUT2
= 2A
Vin Power On without Ioad
I
OUT1
= I
OUT2
= 0A
Vin Power On
I
OUT1
=1A, I
OUT2
= 0A
Vin Power On
I
OUT1
= 2A, I
OUT2
= 0A
mp ' MP2122 —ev 2A, LOW QUIESCENT CURRENT DUAL, SYNC BUCK REGULATOR M L..— F V II F \_..~_~_ 3 r, i i i F‘ W lit “mi 5 E F‘ 7.4L m Amps/div. 400us/dw 400us/dw w P P “mus/aw mops/aw
MP2122 –6V, 2A, LOW QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR
MP2122 Rev. 1.02 www.MonolithicPower.com 8
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 5V, VOUT1 = 1.8V, VOUT2 = 1.2V, L = 1.5µH, COUT1=COUT2=22µF, TA = 25°C, unless otherwise
noted.
V
OUT1
1V/div.
I
L1
500mA/div.
V
IN
5V/div.
SW
2V/div.
V
OUT1
1V/div.
I
L1
500mA/div.
V
IN
5V/div.
SW
5V/div.
V
OUT1
1V/div.
I
L1
500mA/div.
V
IN
5V/div.
SW
5V/div.
V
OUT1
1V/div.
I
L1
1A/div.
V
IN
5V/div.
SW
5V/div.
V
OUT1
1V/div.
I
L1
2A/div.
V
IN
5V/div.
SW
5V/div.
V
OUT1
1V/div.
I
L1
1A/div.
V
IN
5V/div.
SW
5V/div.
V
OUT1
1V/div.
I
L1
2A/div.
V
IN
5V/div.
SW
5V/div.
V
OUT1
1V/div.
I
L1
1A/div.
V
IN
5V/div.
SW
5V/div.
V
OUT1
1V/div.
I
L1
2A/div.
V
IN
5V/div.
SW
5V/div.
40ms/div.
Vin Power down
IOUT1 = IOUT2= 0A
10ms/div.
Vin Power down
IOUT1 = 1A, IOUT2= 0A
10ms/div.
Vin Power down
IOUT1 = 2A, IOUT2= 0A
Enable on
IOUT1 = IOUT2= 0A
Enable on
IOUT1 = 1A, IOUT2= 0A
Enable on
IOUT1 = 2A, IOUT2= 0A
1s/div.
Enable down
IOUT1 = IOUT2= 0A
Enable down
IOUT1 =1A, IOUT2= 0A
Enable down
IOUT1 = 2A, IOUT2= 0A
mp ' MP2122 —ev 2A, LOW QUIESCENT CURRENT DUAL, SYNC BUCK REGULATOR Load Transient Load Transient 1ATran5|enHa 2A. 2 5A/uS speed 1ATransianI lo 2A. 2 5A/pS speed a n $ J 200us/div Zoous/div
MP2122 –6V, 2A, LOW QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR
MP2122 Rev. 1.02 www.MonolithicPower.com 9
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 5V, VOUT1 = 1.8V, VOUT2 = 1.2V, L = 1.5µH, COUT1=COUT2=22µF, TA = 25°C, unless otherwise
noted.
V
SW1
5V/div.
V
OUT1
AC Coupled
100mV/div.
I
OUT1
1A/div.
V
SW2
5V/div.
V
OUT2
AC Coupled
100mV/div.
I
OUT2
1A/div.
mP . MP2122 —6V, 2A, LOW QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR ge en en
MP2122 –6V, 2A, LOW QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR
MP2122 Rev. 1.02 www.MonolithicPower.com 10
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PIN FUNCTIONS
Package
Pin # Name Description
1 FB2
Feedback 2. Error amplifier input. Connect to the tap of an external resistor divider between
the output and GND. Sets the regulation voltage.
2 EN2 Channel 2 Enable. Buck.
3 SW2
Switch Node Connects to the channel 2 internal high-side and low-side power
MOSFETs..Connects to the inductor.
4 EN1 Channel 1 Enable. Buck.
5 GND Ground.
6 SW1
Switch Node Connects to the channel 1 internal high-side and low-side power
MOSFETs..Connects to the inductor.
7 IN Input Supply. Requires a decoupling capacitor to ground to reduce switching spikes.
8 FB1
Feedback 1. Error amplifier input. Connect to the tap of an external resistor divider between
the output and GND. Sets the regulation voltage.
MP2122 —6V, 2A, LOW QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR I'I'IP5' p: .LK , CH 0301 OPE1 4r —> H '_4 ++, +_
MP2122 –6V, 2A, LOW QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR
MP2122 Rev. 1.02 www.MonolithicPower.com 11
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Hi-Z
Slope
Comp
COMP1
ISLOPE1
OSC1
PH1
Hi-Z
Slope
Comp
COMP2
ISLOPE2
OSC2
SW1
SW2
PH2
FB1
FB2
EN1
EN2
UVLO &
Bandgap
0.608V
UVLO VIN
VIN
GND
GND
MAIN
SWITCH
PCH
SYNCHRONOUS
RECTIFIER
NCH
LOW SIDE
GATE DRIVER
LOW SIDE
GATE DRIVER
SYNCHRONOUS
RECTIFIER
NCH
MAIN
SWITCH
PCH
CONTROL
LOGIC
CONTROL
LOGIC
PWM
PWM
INTERNAL SS
INTERNAL SS
0.608V
0.608V
1MHz
OSCILLATOR
Figure 1: Functional Block Diagram
mP . MP2122 —6V, 2A, LOW QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR
MP2122 –6V, 2A, LOW QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR
MP2122 Rev. 1.02 www.MonolithicPower.com 12
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OPERATION
MP2122 is a fully-integrated, dual-channel,
synchronous, step-down converter. Both
channels have peak-current modes with internal
compensation for faster transient responses
and cycle-by-cycle current limits.
MP2122 is optimized for low-voltage, portable
applications where efficiency and small size are
critical.
180° Phase-Shift
By default, the MP2122’s two channels operate
at a 180° phase-shift to reduce input current
ripple: The smaller current ripple allows for a
smaller input bypass capacitor. In CCM, two
internal clocks control the switching: The high-
side MOSFET turns on at the corresponding
CLK’s rising edge.
CLK1
CLK2
SW1
SW2
t
CLk1, 2 has a 180
o phase shift
Figure 2: Clock/Switching Timing
However, the switching frequency for each
channel falls when operating at low dropout, so
the MP2122 operates at a default switching
frequency of 1MHz with a fixed OFF time. After
the input voltage recovers, switching for PWM
mode resumes normally and synchronizes with
the master oscillator for phase-shifted operation.
Light-Load Operation
In light loads, the MP2122 uses a proprietary
control scheme to save power and improve
efficiency. The MP2122 will turn off the low side
switch when inductor current starts to reverse.
Then MP2122 works in discontinuous
conduction mode (DCM) operation.
When either channel enters DCM or low-
dropout operation, this channel will not be
controlled by the internal 1MHz oscillator.
Condition Mode
CH1 CH2 CH1 CH2
1 Heavy Load 1MHz
CCM
1MHz
CCM,0°
Phase
2 Light Load DCM DCM
3 Low Dropout Fixed OFF
Time
Fixed OFF
Time
4Heavy
Load
Light
Load
0.95MHz
CCM DCM
5Light
Load
Heavy
Load DCM 0.95MHz
CCM
6Heavy
Load
Low
Dropout
0.95MHz
CCM
Fixed OFF
Time
7Low
Dropout
Heavy
Load
Fixed OFF
Time
0.95MHz
CCM
8Light
Load
Low
Dropout DCM Fixed OFF
Time
9Low
Dropout
Light
Load
Fixed OFF
Time DCM
Soft Start
MP2122 has a built-in soft start that ramps up the
output voltage at a controlled slew rate to start-up
overshoot. The soft-start time is ~0.5ms.
Current Limit and Short-Circuit Recovery
Each channel’s high-side switch has a 3.5A
(typ.) current limit. The MP2122 treats any
current-limit condition that remains for 400us as
a short and enter hiccup mode.
The MP2122 disables its output power stage in
hiccup mode, and then slowly discharges the
soft-start capacitor before initiating soft-start. If
the short-circuit condition remains, the MP2122
repeats this operation till the short circuit
disappears and output returns to the regulation
level.
mP . MP2122 —6V, 2A, LOW QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR
MP2122 –6V, 2A, LOW QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR
MP2122 Rev. 1.02 www.MonolithicPower.com 13
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APPLICATION INFORMATION
COMPONENT SELECTION
Output Voltage
External resistor dividers connected to the FB
pins set the output voltages. The feedback
resistor connected to FB1 (R1) also sets the
feedback loop bandwidth (fC).
fC does not exceed 0.1×fSW. When using a
ceramic output capacitor (CO), set the range to
50kHz and 100kHz for optimal transient
performance and good phase margin. When
using an electrolytic capacitor, set the loop
bandwidth no higher than 1/4 the ESR zero
frequency (fESR). fESR is:
ESR
ESR O
1
f2RC

We suggest using a 600k to 800k resistor for R1
when CO=22F. R2 is then:
OUT
R1
R2 V1
0.608V
Table 1: Resistor Values vs. Output Voltage
VOUT R1 R2 L COUT
(Ceramic)
1.2V 806k 825k 0.47H-2.2H 22F
1.5V 806k 549k 0.47H-2.2H 22F
1.8V 806k 412k 0.47H-2.2H 22F
2.5V 806k 261k 1H-4.7H 22F
3.3V 806k 182k 1H-4.7H 22F
Inductor Selection
Use a 1.5µH-to-2.2µH inductor with a DC current
rating of at least 1.25 times the maximum load
current for most applications. For best efficiency,
select an inductor with a DC resistance <20m.
See Table 2 for recommended inductors. For
most designs, estimate the inductance value
using the following equation:
OUT IN OUT
IN L OSC
V(V V)
LVIf

Where IL is the inductor ripple current. Select an
inductor ripple current equal to approximately
30% of the maximum load current, 2A.
The maximum inductor peak current is:
L
L(MAX) LOAD
I
I=I+
2
Table 2: Suggested Surface-Mount Inductors
V
endo
r
Part
Number
L
(μH)
DCR
(m)
SC
(A)
L x W x H
(mm3)
WURTH
744777002 2.2 13 6 7.3×7.3×4.5
744310200 2 14.2 6.5 7×6.9×3
TDK
RLF7030T-
1R5N6R1-T 1.5 8 6.5 7.8×6.8×3.2
Input Capacitor
The input capacitor reduces the surge current
drawn from the input and the switching noise
from the device. Select an input capacitor with a
switching-frequency impedance that is less than
the input source impedance to prevent high-
frequency-switching current from passing to the
input source. Use low-ESR ceramic capacitors
with X5R or X7R dielectrics with small
temperature coefficients. For most applications, a
22µF capacitor is sufficient.
Output Capacitor
The output capacitor limits the output voltage
ripple and ensures a stable regulation loop.
Select an output capacitor with low impedance at
the switching frequency. Use ceramic capacitors
with X5R or X7R dielectrics. Using an electrolytic
capacitor may result in additional output voltage
ripple, thermal issues, and requires additional
care in selecting the feedback resistor (R1) due
to the large ESR. The output ripple (VOUT) is
approximately:
OUT IN OUT
OUT
IN OSC OSC O
V(V V) 1
VESR
Vf L 8f C



 

Power Dissipation
IC power dissipation plays an important role in
circuit design—not only because of efficiency
concerns, but also because of the chip’s thermal
requirements. Several parameters influence
power dissipation, such as:
Conduction Loss (Cond)
Dead Time (DT)
mP . MP2122 —6V, 2A, LOW QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR C15 oooooooo [[ 0000000000000000 00000
MP2122 –6V, 2A, LOW QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR
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Switching Loss (SW)
MOSFET Driver Current (DR)
Supply Current (S)
Based on these parameters, we can estimate the
power loss as:
LOSS Cond DT SW DR S
PPPPPP
Thermal Regulation
As previously discussed, changes in IC
temperature change the electrical characteristics,
especially when the temperature exceeds the
IC’s recommended operating range. Managing
the IC’s temperature requires additional
considerations to ensure that the IC runs below
the maximum-allowable temperature. While
operating the IC within recommended electrical
limits is a major component to maintaining proper
thermal regulation, specific layout designs can
improve the thermal profile while limiting costs to
either efficiency or operating range.
For the MP2122, connect the ground pin on the
package to a GND plane on top of the PCB to
use this plane as a heat sink. Connect this GND
plane to GND planes beneath the IC using vias
to further improve heat dissipation. However,
given that these GND planes can introduce
unwanted EMI noise and occupy valuable PCB
space, design the size and shape of these planes
to match the thermal resistance requirement:
SA JA JC

However, connecting the GND pin to a heat sink
can not guarantee that the IC will not exceed its
recommended temperature limits; for instance, if
the ambient temperature exceeds the IC’s
temperature limits. If the ambient air temperature
approaches the IC’s temperature limit, options
such as derating the IC so it operates using less
power can help prevent thermal damage and
unwanted electrical characteristics.
PCB Layout
Proper layout of the switching power supplies is
very important, and sometimes critical for proper
function: poor layout design can result in poor
line or load regulation and stability issues.
Place the high-current paths (GND, IN and SW)
very close to the device with short, direct, and
wide traces. Place the input capacitor as close as
possible to the IN and GND pins. Place the
external feedback resistors next to the FB pin.
Keep the switching node SW short and away
from the feedback network. The circuit of below
PCB layout is shown in Figure 4.
18
7
6
5
OUT1
EN2
SW1
VIN
C1A C1B
R1
R2
AGND
SW2
OUT2
EN1
R3
R4
C3
C4
C6
C5
GND
2
3
4
Figure 3: Suggested PCB Layout
Design Example
Below is a design example following the
application guidelines for the specifications:
Table 3: Design Example
VIN 5V
VOUT1 1.8V
VOUT2 1.2V
The detailed application schematic is shown in
Figure 4. The typical performance and circuit
waveforms have been shown in the Typical
Performance Characteristics section. For more
device applications, please refer to the related
Evaluation Board Datasheets.
mP . MP2122 —6V, 2A, LOW QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR 806k
MP2122 –6V, 2A, LOW QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR
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TYPICAL APPLICATION CIRCUITS
C4
10µF
R1
806k
IN
EN1 EN2
SW1 SW2
GND
FB1 FB2
C1A
22µF
R2
412k
R3
806k
R4
825k
C6
10µF
VIN
5V
VOUT1
1.8V
VOUT2
1.2V
MP2122
L1
1.5uH
L2
1.5uH
EN1 EN2
C1B
22µF
C3
10µF
C5
10µF
Figure 4: Typical Application Circuit
"IE MP2122 —6V, 2A, Low QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR TOP VIEW I {mli ‘44 4 ,4» |_, FRONT VIEW "ffl * DETAIL "A" SIDE VIEW
MP2122 –6V, 2A, LOW QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.
MP2122 Rev. 1.02 www.MonolithicPower.com 16
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PACKAGE INFORMATION
TSOT23-8
FRONT VIEW
NOTE:
1) ALL DIMENSIONS ARE IN MILLIMETERS.
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD
FLASH, PROTRUSION OR GATE BURR.
3) PACKAGE WIDTH DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
4) LEAD COPLANARITY (BOTTOM OF LEADS
AFTER FORMING) SHALL BE 0.10 MILLIMETERS
MAX.
5) JEDEC REFERENCE IS MO-193, VARIATION BA.
6) DRAWING IS NOT TO SCALE.
7) PIN 1 IS LOWER LEFT PIN WHEN READING TOP
MARK FROM LEFT TO RIGHT, (SEE EXAMPLE TOP
MARK)
TOP VIEW RECOMMENDED LAND PATTERN
SEATING PLANE
SIDE VIEW
DETAIL ''A''
SEE DETAIL '' A''
IAAAA
PIN 1 ID
See note 7
EXAMPLE
TOP MARK

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