SAM D11 Summary Datasheet by Microchip Technology

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Atmel-42363GS-SAM-D11-Summary_05/2016
SMART
Description
The Atmel® | SMART SAM D11 is a series of low-power microcontrollers using the 32-bit
ARM®Cortex®-M0+ processor, and ranging from 14- to 24-pins with 16KB Flash and 4KB of
SRAM. The SAM D11 devices operate at a maximum frequency of 48MHz and reach
2.46 Coremark/MHz. They are designed for simple and intuitive migration with identical
peripheral modules, hex compatible code, identical linear address map and pin compatible
migration paths between all devices in the product series. All devices include intelligent and
flexible peripherals, Atmel Event System for inter-peripheral signaling, and support for capacitive
touch button, slider and wheel user interfaces. The SAM D11 series is compatible to the other
product series in the SAM D family, enabling easy migration to larger device with added features.
The Atmel SAM D11 devices provide the following features: In-system programmable Flash, six-
channel direct memory access (DMA) controller, 6 channel Event System, programmable
interrupt controller, up to 22 programmable I/O pins, 32-bit real-time clock and calendar, two 16-
bit Timer/Counters (TC) and one 24-bit Timer/Counter for Control (TCC), where each TC can be
configured to perform frequency and waveform generation, accurate program execution timing or
input capture with time and frequency measurement of digital signals. The TCs can operate in 8-
or 16-bit mode, selected TCs can be cascaded to form a 32-bit TC, and one timer/counter has
extended functions optimized for motor, lighting and other control applications. The series provide
one full-speed crystal-less USB 2.0 device interface; up to three Serial Communication Modules
(SERCOM) that each can be configured to act as an USART, UART, SPI, I2C up to 3.4MHz,
SMBus, PMBus and LIN slave; up to 10-channel 350ksps 12-bit ADC with programmable gain
and optional oversampling and decimation supporting up to 16-bit resolution, one 10-bit 350ksps
DAC, two analog comparators with window mode, Peripheral Touch Controller supporting up to
72 buttons, sliders, wheels and proximity sensing; programmable Watchdog Timer, brown-out
detector and power-on reset and two-pin Serial Wire Debug (SWD) program and debug interface.
All devices have accurate and low-power external and internal oscillators. All oscillators can be
used as a source for the system clock. Different clock domains can be independently configured
to run at different frequencies, enabling power saving by running each peripheral at its optimal
clock frequency, and thus maintaining a high CPU frequency while reducing power consumption.
The SAM D11 devices have two software-selectable sleep modes, idle and standby. In idle mode
the CPU is stopped while all other functions can be kept running. In standby all clocks and
functions are stopped expect those selected to continue running. The device supports
SleepWalking. This feature allows the peripheral to wake up from sleep based on predefined
conditions, and thus allows the CPU to wake up only when needed, e.g. when a threshold is
crossed or a result is ready. The Event System supports synchronous and asynchronous events,
allowing peripherals to receive, react to and send events even in standby mode.
The Flash program memory can be reprogrammed in-system through the SWD interface. The
same interface can be used for non-intrusive on-chip debug and trace of application code. A boot
loader running in the device can use any communication interface to download and upgrade the
application program in the Flash memory.
The Atmel SAM D11 devices are supported with a full suite of program and system development
tools, including C compilers, macro assemblers, program debugger/simulators, programmers and
evaluation kits.
Atmel SAM D11
SMART ARM-Based Microcontroller
DATASHEET SUMMARY
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Atmel-42363GS-SAM-D11-Summary_05/2016
Features
zProcessor
zARM Cortex-M0+ CPU running at up to 48MHz
zSingle-cycle hardware multiplier
zMicro Trace Buffer
zMemories
z16KB in-system self-programmable Flash
z4KB SRAM Memory
zSystem
zPower-on reset (POR) and brown-out detection (BOD)
zInternal and external clock options with 48MHz Digital Frequency Locked Loop (DFLL48M) and 48MHz to 96MHz Fractional
Digital Phase Locked Loop (FDPLL96M)
zExternal Interrupt Controller (EIC)
z8 external interrupts
zOne non-maskable interrupt
zTwo-pin Serial Wire Debug (SWD) programming, test and debugging interface
zLow Power
zIdle and standby sleep modes
zSleepWalking peripherals
zPeripherals
z6-channel Direct Memory Access Controller (DMAC)
z6-channel Event System
zTwo 16-bit Timer/Counters (TC), configurable as either:
zOne 16-bit TC with compare/capture channels
zOne 8-bit TC with compare/capture channels
zOne 32-bit TC with compare/capture channels, by using two TCs
zOne 24-bit Timer/Counters for Control (TCC), with extended functions:
zUp to four compare channels with optional complementary output
zGeneration of synchronized pulse width modulation (PWM) pattern across port pins
zDeterministic fault protection, fast decay and configurable dead-time between complementary output
zDithering that increase resolution with up to 5 bit and reduce quantization error
z32-bit Real Time Counter (RTC) with clock/calendar function
zWatchdog Timer (WDT)
zCRC-32 generator
zOne full-speed (12Mbps) Universal Serial Bus (USB) 2.0 interface
zEmbedded device function
zEight endpoints
zCan run from internal RC oscillator
zUp to three Serial Communication Interfaces (SERCOM), each configurable to operate as either:
zUSART with full-duplex and single-wire half-duplex configuration
zI2C Bus up to 3.4MHz
zSMBUS/PMBUS
zSPI
zLIN slave
z12-bit, 350ksps Analog-to-Digital Converter (ADC) with up to 10 channels
zDifferential and single-ended input
z1/2x to 16x programmable gain stage
zAutomatic offset and gain error compensation
zOversampling and decimation in hardware to support 13-, 14-, 15- or 16-bit resolution
z10-bit, 350ksps Digital-to-Analog Converter (DAC)
zTwo Analog Comparators (AC) with window compare function
zPeripheral Touch Controller (PTC)
zUp to 72-channel capacitive touch and proximity sensing
zI/O
zUp to 22 programmable I/O pins
zPackages
z24-pin QFN
z20-pin SOIC
z20-ball WLCSP
z14-pin SOIC
zOperating Voltage
z1.62V – 3.63V
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1. Configuration Summary
Table 1-1. Configuration Summary
SAM D11D – 24-pin QFN
SAM D11D – 20-pin SOIC /
WLCSP SAM D11C – 14-pin SOIC
Pins 24 20 14
General Purpose I/O-pins (GPIOs) 22 18 12
Flash 16KB 16KB 16KB
SRAM 4KB 4KB 4KB
Timer Counter (TC) 2 2 2(3)
Waveform output channels for TC 222
Timer Counter for Control (TCC) 111
Waveform output channels per TCC 888
DMA channels 666
USB interface 111
Serial Communication Interface
(SERCOM) 332
Analog-to-Digital Converter (ADC)
channels 10 8 5
Analog Comparators (AC) 222
Digital-to-Analog Converter (DAC)
channels 111
Real-Time Counter (RTC) Yes Yes Yes
RTC alarms 111
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Notes: 1. The number of X- and Y-lines depends on the configuration of the device, as some I/O lines can be configured as either X-lines or Y-lines. The
number in the “Configuration Summary” on page 3 is the maximum number of channels that can be obtained.
2. The number of Y-lines depends on the configuration of the device, as some I/O lines can be configured as either X-lines or Y-lines. The number
given here is the maximum number of Y-lines that can be obtained.
3. The signals for TC2 are not routed out on the 14-pin package.
RTC compare values 1 32-bit value or
2 16-bit values
1 32-bit value or
2 16-bit values
1 32-bit value or
2 16-bit values
External Interrupt lines 888
Peripheral Touch Controller (PTC)
channels (X- x Y-lines) for mutual
capacitance(1)
72 (9x8) 42 (7x6) 12 (4x3)
Peripheral Touch Controller (PTC)
channels for self capacitance (Y-
lines only)(2)
16 13 7
Maximum CPU frequency 48MHz 48MHz 48MHz
Packages QFN SOIC / WLCSP SOIC
Oscillators
32.768kHz crystal oscillator (XOSC32K)
0.4-32MHz crystal oscillator (XOSC)
32.768kHzinternal oscillator (OSC32K)
32kHz ultra-low-power internal oscillator (OSCULP32K)
8MHz high-accuracy internal oscillator (OSC8M)
48MHz Digital Frequency Locked Loop (DFLL48M)
96MHz Fractional Digital Phased Locked Loop (FDPLL96M)
Event System channels 666
SW Debug Interface Yes Yes Yes
Watchdog Timer (WDT) Yes Yes Yes
Table 1-1. Configuration Summary (Continued)
SAM D11D – 24-pin QFN
SAM D11D – 20-pin SOIC /
WLCSP SAM D11C – 14-pin SOIC
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2. Ordering Information
2.1 SAM D11C – 14-pin SOIC
2.2 SAM D11D – 20-pin SOIC
2.3 SAM D11D – 20-ball WLCSP
SAMD = General Purpose Microcontroller
11 = Cortex M0+ DMA, USB
C = 14 pins
D = 20/24 pins
No character = Tray (Default)
T = Tape and Reel
U = -40 - 85
O
C Matte Sn Plating
A = Default Variant
14 = 16KB
SAMD 11 C 14 A M UT
Product Family
Product Series
Pin Count
Flash Memory Density
Device Variant
Package Type
Package Grade
Package Carrier
M = QFN
SS = SOIC
U = WLCSP
-
N = -40 - 105
O
C Matte Sn Plating
Ordering Code FLASH (bytes) SRAM (bytes) Package Carrier Type
ATSAMD11C14A-SSUT 16K 4K SOIC14 Tape & Reel
ATSAMD11C14A-SSNT 16K 4K SOIC14 Tape & Reel
Ordering Code FLASH (bytes) SRAM (bytes) Package Carrier Type
ATSAMD11D14A-SSUT 16K 4K SOIC20 Tape & Reel
ATSAMD11D14A-SSNT 16K 4K SOIC20 Tape & Reel
Ordering Code FLASH (bytes) SRAM (bytes) Package Carrier Type
ATSAMD11D14A-UUT 16K 4K WLCSP20 Tape & Reel
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2.4 SAM D11D – 24-pin QFN
Ordering Code FLASH (bytes) SRAM (bytes) Package Carrier Type
ATSAMD11D14A-MUT 16K 4K QFN24 Tape & Reel
ATSAMD11D14A-MNT 16K 4K QFN24 Tape & Reel
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3. Block Diagram
Notes: 1. Some products have different number of SERCOM instances, PTC signals and ADC signals.
2. The number of PTC X- and Y-lines depend on the configuration of the device, as some I/O lines can be configured as either X-lines or Y-lines.
6 x SERCOM
8 x Timer Counter
REAL TIME
COUNTER
AHB-APB
BRIDGE C
M
M
HIGH SPEED
BUS MATRIX
PORT
PORT
WATCHDOG
TIMER
SERIAL
WIRE
SWDIO
S
CORTEX-M0+
PROCESSOR
Fmax 48 MHz
SWCLK
DEVICE
SERVICE
UNIT
AHB-APB
BRIDGE A
10-CHANNEL
12-bit ADC 350KSPS
AIN[9..0]
VREFA
AIN[3..0]
S
SRAM
CONTROLLER
4 KB
RAM
M
RESET
CONTROLLER
SLEEP
CONTROLLER
CLOCK
CONTROLLER
POWER MANAGER
RESETN
2 x TIMER / COUNTER
EVENT SYSTEM
S
3 x SERCOM
2 ANALOG
COMPARATORS
SYSTEM CONTROLLER
XOUT
XIN
XOUT32
XIN32
OSCULP32K
OSC32K
OSC8M
DFLL48M
BOD33
XOSC32K
XOSC
VREF
PERIPHERAL
TOUCH
CONTROLLER
PERIPHERAL
ACCESS CONTROLLER
AHB-APB
BRIDGE B
VREFA
VOUT
10-bit DAC
EXTERNAL INTERRUPT
CONTROLLER
PERIPHERAL
ACCESS CONTROLLER
PERIPHERAL
ACCESS CONTROLLER
EXTINT[7..0]
NMI
GCLK_IO[5..0]
S
PAD0
WO1
PAD1
PAD2
PAD3
WO0
VREFB
16 KB
NVM
NVM
CONTROLLER
Cache
M
DMA
USB FS
DEVICE
DP
DM
1 x TIMER / COUNTER
FOR CONTROL
WOn
IOBUS
FDPLL96M
DMA
DMA
DMA
DMA
DMA
MICRO
TRACE BUFFER
S
SOF 1KHZ
WO0
WO1
(2)
GENERIC CLOCK
CONTROLLER
X[10]
Y[5..0]
X[9..0] / Y[15..6](3)
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4. Pinout
4.1 SAM D11C 14-pin SOIC
4.2 SAM D11D 20-pin SOIC
1
2PA02
3
PA14 4
PA04
5
PA05
69
10
PA08
11
PA09 12
PA15
PA28/
14
13
PA30
PA24
RST
PA25
GND
VDD
IO/IN/ANA
PA31
8
7
DIGITAL PIN
ANALOG PIN
OSCILLATOR
GROUND
INPUT SUPPLY
RESET/GPIO PIN
1
2
PA02
3
PA14
4
PA04
5
PA05
6
9
10
PA08
11
PA09
12
PA15
PA28/
14
13
PA22
PA24
RST
PA25
GND
VDD
IO/IN/ANA
PA31
8
7
PA06
PA07
PA16
PA23
PA30
PA03
15
16
17
18
19
20
DIGITAL PIN
ANALOG PIN
OSCILLATOR
GROUND
INPUT SUPPLY
RESET/GPIO PIN
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4.3 SAM D11D 20-ball WLCSP
PA02
PA03
PA06
PA15
PA22
PA16
PA09
PA25
PA07
PA08
PA05
VDD
PA14
PA30
GND
1
2
3
4
ABCDE
PA24
PA31
PA04
PA23
IO/IN/ANA
PA28/
RST
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4.4 SAM D11D 24-pin QFN
1
2
PA02
3
PA03
4
PA04
5
PA05
6
PA06
PA07
9
10
PA08
11
PA09
12
PA10
PA11
PA14
PA15
PA27
24
PA28/
23
PA23
17
PA22
16
15
14 PA17
13 PA16
PA24
RST
20
PA25
22
GND
PA30
PA31
7
8
21
19
18
VDD
IO/IN/ANA
DIGITAL PIN
ANALOG PIN
OSCILLATOR
GROUND
INPUT SUPPLY
RESET/GPIO PIN
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5. Product Mapping
Figure 5-1. Atmel D11 Product Mapping
Code
SRAM
Undefined
Peripherals
Reserved
Undefined
Reserved
Global Memory Space
0x00000000
0x20000000
0x20001000
0x40000000
0x43000000
0x60000000
0x60000200
0xFFFFFFFF
Internal SRAM
SRAM
AHB-APB
Bridge A
AHB-APB
Bridge B
AHB-APB
Bridge C
AHB-APB
Internal Flash
Reserved
Code
0x00000000
0x00004000
0x1FFFFFFF
0x20000000
0x20001000
0x40000000
0x41000000
0x42000000
0x42FFFFFF
Reserved
PAC0
PM
SYSCTRL
GCLK
WDT
RTC
EIC
AHB-APB Bridge A
0x40000000
0x40000400
0x40000800
0x40000C00
0x40001000
0x40001400
0x40001800
0x40FFFFFF
0x40001C00
AHB-APB Bridge B
Reserved
PAC1
DSU
NVMCTRL
PORT
0x41000000
0x41002000
0x41004000
0x41004400
0x41FFFFFF
0x41004700
TC2
PAC2
EVSYS
SERCOM0
SERCOM1
SERCOM2
TCC0
TC1
AHB-APB Bridge C
ADC
AC
DAC
PTC
0x42000000
0x42000400
0x42000800
0x42000C00
0x42001000
0x42001400
0x42001800
0x42002000
0x42001C00
0x42003000
Reserved
0x40FFFFFF
0x42002400
0x42002800
0x42002C00
DMAC
USB
MTB
0x41004800
0x41005000
0x41006000
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6. Processor And Architecture
6.1 Cortex M0+ Processor
The Atmel SAM D11 implements the ARM® Cortex™-M0+ processor, which is based on the ARMv6 Architecture and
Thumb®-2 ISA. The Cortex M0+ is 100% instruction set compatible with its predecessor, the Cortex-M0 processor,
and upward compatible to Cortex-M3 and M4 processors.
For more information refer to www.arm.com.
6.1.1 Cortex M0+ Configuration
Note: 1. All software run in privileged mode only
The ARM Cortex-M0+ core has two bus interfaces:
zSingle 32-bit AMBA®-3 AHB-Lite™ system interface that provides connections to peripherals and all
system memory, including flash and RAM
zSingle 32-bit I/O port bus interfacing to the PORT with one-cycle loads and stores
Features Configuration option Atmel SAM D11 configuration
Interrupts External interrupts 0-32 32
Data endianness Little-endian or big-endian Little-endian
SysTick timer Present or absent Present
Number of watchpoint comparators 0, 1, 2 2
Number of breakpoint comparators 0, 1, 2, 3, 4 4
Halting debug support Present or absent Present
Multiplier Fast or small Fast (single cycle)
Single-cycle I/O port Present or absent Present
Wake-up interrupt controller Supported or not supported Not supported
Vector Table Offset Register Present or absent Present
Unprivileged/Privileged support Present or absent Absent(1)
Memory Protection Unit Not present or 8-region Not present
Reset all registers Present or absent Absent
Instruction fetch width 16-bit only or mostly 32-bit 32-bit
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7. Packaging Information
7.1 Thermal Considerations
7.1.1 Thermal Resistance Data
Table 6-1 on page 13 summarizes the thermal resistance data depending on the package.
Table 7-1. Thermal Resistance Data
7.1.2 Junction Temperature
The average chip-junction temperature, TJ, in °C can be obtained from the following:
Equation 1
Equation 2
where:
zθJA = package thermal resistance, Junction-to-ambient (°C/W), provided in Table 6-1 on page 13.
zθJC = package thermal resistance, Junction-to-case thermal resistance (°C/W), provided in Table 6-1 on page
13.
zθHEATSINK = cooling device thermal resistance (°C/W), provided in the device datasheet.
zPD = device power consumption (W).
zTA = ambient temperature (°C).
From the Equation 1, the user can derive the estimated lifetime of the chip and decide if a cooling device is necessary
or not. If a cooling device is to be fitted on the chip, the second equation should be used to compute the resulting
average chip-junction temperature TJ in °C.
Package Type θJA θJC Units
24-pin QFN 61.7 25.4 °C/W
20-pin SOIC 44.0 21.0 °C/W
20-ball WLCSP 37.4 6.6 °C/W
14-pin SOIC 58.5 26.3 °C/W
TJTAPDθJA
×()+=
TJTAPDθHEATSINK θJC
+()×()+=
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7.2 Package Drawings
7.2.1 24-pin QFN
Table 7-2. Device and Package Maximum Weight
Table 7-3. Package Characteristics
Table 7-4. Package Reference
44 mg
Moisture Sensitivity Level MSL3
JEDEC Drawing Reference MO-220
JESD97 Classification E3
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7.2.2 20-pin SOIC
Table 7-5. Device and Package Maximum Weight
Table 7-6. Package Characteristics
Table 7-7. Package Reference
530 mg
Moisture Sensitivity Level MSL3
JEDEC Drawing Reference MS-013
JESD97 Classification E3
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7.2.3 20-ball WLCSP
Table 7-8. Device and Package Maximum Weight
Table 7-9. Package Characteristics
Table 7-10. Package Reference
7mg
Moisture Sensitivity Level MSL3
JEDEC Drawing Reference MS-220
JESD97 Classification E8
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7.2.4 14-pin SOIC
Table 7-11. Device and Package Maximum Weight
Table 7-12. Package Characteristics
Table 7-13. Package Reference
230 mg
Moisture Sensitivity Level MSL3
JEDEC Drawing Reference MS-012
JESD97 Classification E3
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7.3 Soldering Profile
The following table gives the recommended soldering profile from J-STD-20.
A maximum of three reflow passes is allowed per component.
___REV___373878
Profile Feature Green Package
Average Ramp-up Rate (217°C to peak) 3°C/s max
Preheat Temperature 175°C +/-25°C 150-200°C
Time Maintained Above 217°C 60-150s
Time within 5°C of Actual Peak Temperature 30s
Peak Temperature Range 260°C
Ramp-down Rate 6°C/s max
Time 25°C to Peak Temperature 8 minutes max
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Table of Contents
Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1. Configuration Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1 SAM D11C – 14-pin SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.2 SAM D11D – 20-pin SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.3 SAM D11D – 20-ball WLCSP. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.4 SAM D11D – 24-pin QFN. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3. Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4. Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
4.1 SAM D11C 14-pin SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.2 SAM D11D 20-pin SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.3 SAM D11D 20-ball WLCSP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.4 SAM D11D 24-pin QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5. Product Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
6. Processor And Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
6.1 Cortex M0+ Processor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
7. Packaging Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
7.1 Thermal Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
7.2 Package Drawings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
7.3 Soldering Profile. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Atmel ‘ Enabling Unlimited Possibilities”
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