HV7800 Datasheet by Microchip Technology

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Supertex inc.
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Doc.# DSFP-HV7800
A062813
HV7800
Features
Supply voltages from 8V to 450V
Voltage output device
Typical gain 1±1%
Max VSENSE 500mV
Fast rise and fall time, 700ns to 2.0µs
Maximum quiescent current 50µA
5-Lead SOT-23 Package
Applications
SMPS current monitor
Battery current monitor
Motor controls
Telecom
General Description
The HV7800 high side current monitor IC transfers a high-
side current measurement voltage to its ground referenced
output with an accurate voltage gain of one. The measurement
voltage typically originates at a current sense resistor which
is located in a “high side” circuit, such as the positive supply
line.
This monitor IC features a very wide input voltage range, high
accuracy of transfer ratio, small size, low component count,
low power consumption, ease of use, and low cost. Offline,
battery and portable applications can be served equally well
due to the wide input voltage range and the low quiescent
current of the HV7800.
Typical Application Circuit
High Side Current Monitor
8.0 to 450V
Voltage Gain of 1
8V to 450V Input
I
SENSE
V
SENSE
VOUT
VOUT = VSENSE
V
R
RSENSE
RP (optional)
HV7800
IN LOAD
GND OUT
“F Absolute Maximum Ratings |_||i||_l n n 7AYW uuu Typical Thermal Resistance “
2
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Doc.# DSFP-HV7800
A062813
HV7800
Absolute Maximum Ratings
Parameter Value
VIN, VLOAD
1-0.5V to +460V
VOUT
1-0.5V to +10V
VSENSE
2-0.5V to +5.0V
ILOAD ±10mA
Operating ambient temperature -40°C to +85°C
Operating junction temperature -40°C to +125°C
Storage temperature -65°C to +150°C
Absolute maximum ratings are those values beyond which damage to the device
may occur. Functional operation under these conditions is not implied. Continuous
operation of the device at the absolute rating level may affect device reliability. All
voltages are referenced to device ground.
Sym Parameter Min Typ Max Units Conditions
Supply
VIN Supply voltage 8.0 - 450 V * ---
IQQuiescent supply current - - 50 µA - VIN = 8.0V to 450V, VSENSE = 0mV
Input and Output
ROUT OUT pin output resistance - 3.6 - kΩ- ---
VOUT
Output voltage
0 - 15
mV
- VSENSE = 0mV
79 - 121 - VSENSE = 100mV
177 - 223 - VSENSE = 200mV
470 - 530 - VSENSE = 500mV
Dynamic Characteristics
tRISE Output rise time, 10% to 90% - 0.7 - µs - VSENSE step 5.0mV to 500mV
- - 2.0 - VSENSE step 0mV to 500mV
tFALL Output fall time, 90% to 10% - 0.7 2.0 µs * VSENSE step 500mV to 0mV
Electrical Characteristics (TA = 25°C unless otherwise specified, VIN = 8V to 450V)
Notes:
1. Referenced to GND
2. VSENSE = VIN - VLOAD
IN
LOAD
OUTGND
1
54
2 3
NC
Pin Configuration
Product Marking
7AYW Y = Last Digit of Year Sealed
W = Code for Week Sealed
= “Green” Packaging
5-Lead SOT-23
* Values apply over the full temperature range
5-Lead SOT-23
(top view)
Package may or may not include the following marks: Si or
Ordering Information
Part Number Package Option Packing
HV7800K1-G 5-Lead SOT-23 2500/Reel
Typical Thermal Resistance
Package θja
5-Lead SOT-23 253OC/W
-G denotes a lead (Pb)-free / RoHS compliant package
Note:
Thermal testboard per JEDEC JESD51-7
3
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Doc.# DSFP-HV7800
A062813
HV7800
Typical Performance Characteristics
V
IN
V
OUT
1 10 100 1000
2000
1500
1000
500
0
mV T
AMB
= 25°C
V
SENSE
V
OUT
V
IN
= 3.0V
mV
mV
Temperature
∆V
OUT
-60 0 40 80 120 140
0.5
0.4
0.3
0.2
0.1
0
-1.0
-2.0
-3.0
-4.0
-5.0
V
SENSE
= 500mV
%
Temperature
Minimum V
IN
3.5
3.4
3.3
3.2
3.1
3.0
Curve represents level of V
IN
which causes a 1% drop in V
OUT
V
V
IN
Maximum V
OUT
1 10 100 1000
2500
2000
1500
1000
500
0
mV
T
AMB
= 25°C
T
AMB
= 25°C
V
SENSE
= 500mV
V
SENSE
= V
OUT
+250mV
O
C
O
C
V
SENSE
= 100mV
V
SENSE
= 200mV
V
SENSE
= 500mV
V
SENSE
= 800mV
V
SENSE
= 1000mV
V
SENSE
= 1500mV
V
IN
= 3.5V
V
IN
= 4.0V
V
IN
= 5.0V
V
IN
= 10V
V
0 1000 2000 3000 4000 5000
2000
1500
1000
500
0
-60 0 40 80 120 140
V
Step Response Urom pos 10mV) Step Response (lrom neg 10mV) IL Time
4
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Doc.# DSFP-HV7800
A062813
HV7800
Typical Performance Characteristics (cont.)
V
IN
IIN
1 10 100 1000
40
30
20
10
0
V
Temperature
-60 -40 -20 0 20 40 60 80 100 120 140
Top Curve: V
IN
= 400V
Bottom Curve: V
IN
= 10V
V
SENSE
= 0mV
O
C
Frequency
VOUT/VSENSE (Gain)
40
20
0
-20
-40
-60
-80
-100
dB
Frequency
120
100
80
60
40
20
0
-20
-40
dB
V
SENSE
= 500mV
Step Response (from pos 10mV)
DIV
µs
500mV
+
10mV
Time
Step Response (from neg 10mV)
0 2 4 6 8 10
8
6
4
2
0
DIV
V
SENSE
200mV/DIV
500mV
-10mV
V
IN
= 8V
T
AMB
= 25°C
T
AMB
= 25°C
T
AMB
= 25°C
µs
µA µA
IIN
V
SENSE
= 0mV
VIN/VOUT (PSRR)
Top Curve: V
IN
= 400V
Bottom Curve: V
IN
= 10V
V
SENSE
= 500mV
Top Curve: V
IN
= 400V
Bottom Curve: V
IN
= 10V
V
OUT
200mV/DIV
V
OUT
200mV/DIV
V
IN
= 8V
V
SENSE
200mV/DIV
10
3
10
4
10
5
10
6
10
7
Hz
Hz
40
30
20
10
0
10
3
10
4
10
5
10
6
10
7
8
6
4
2
0
Time
0 2 4 6 8 10
M w» W oi {w *7? \
5
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Doc.# DSFP-HV7800
A062813
HV7800
Block Diagram
Application Information
General
The HV7800 high side current monitor IC features accurate
current sensing, small size, low component count, low power
consumption, exceptional input voltage range, ease of use
and low cost.
The part typically performs the measurement of line or
load current for overcurrent protection, metering or current
regulation.
High side current sensing, as opposed to ground referenced
or low side current sensing, is desirable or required when:
The current to be measured does not flow in a circuit
associated with ground.
The measurement at ground level can lead to ambiguity
due to changes in the grounding arrangement during
field use.
Introduction of a sense resistor in the system ground
is undesirable due to issues with safety, EMI, or signal
degradation caused by common impedance coupling.
Principle of Operation
The operational amplifier and MOSFET force the voltage
across RA to track VSENSE within the limit of the offset voltage
of the opamp, i.e. VRA = VSENSE.
The current through RA returns to ground through RB. RA and
RB are integrated, exhibiting tight matching and excellent
tracking. By design, RA and RB have the same resistance.
Consequently, VRA is equal to VRB, resulting in a voltage gain
of 1.
OUT Pin Loading Effects
Note that the OUT pin has a typical output resistance of
3.6kΩ. Loading the output causes the voltage gain to drop
and rise/fall time to increase.
For example, assuming an output resistance of 3.6kΩ, the
load resistance should exceed 3.6MΩ in order to limit the
drop in gain to 1 part in 1000.
Again assuming an output resistance of 3.6kΩ, capacitive
loading of 30pF results in a response pole with a time
constant of 100ns, not yet high enough to materially affect
the output rise and fall time (about 700ns).
Sense Resistor Considerations
Choose a sense resistor that will not exceed 500mV during
normal operating conditions. Limit the power dissipation in
the sense resistor to whatever is practical; a high sense
voltage benefits accuracy, but increases power dissipation.
Consider the use of Kelvin connections for applications
where considerable voltage drops may occur in the PCB
traces that carry the current to be measured to the sense
resistor. A layout pattern that minimizes voltage across the
sense lines is shown below.
Choose a low inductance type sense resistor if preservation of
bandwidth is important. The use of Kelvin connections helps
by excluding the inductive voltage drop across the traces
leading to the sense resistor. The inductive voltage drop may
be substantial when operating at high frequencies.
ISENSE
VSENSE
RSENSE
Bias
Circuits
HV7800
IN LOAD
GND
OUT
VOUT
RA
RB
RP (optional)
+ V
SENSE
-
IN LOAD RSENSE
Pin Description
6
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Doc.# DSFP-HV7800
A062813
HV7800
A trace or component inductance of just 10nH contributes
an impedance of 6.2mΩ at 100kHz, which constitutes a 6%
error when using a 100mΩ sense resistor.
Transient Protection
Add a protection resistor (RP) in series with the LOAD pin
if VSENSE can exceed 5.0V in a positive sense or 600mV in
a negative sense, whether in a steady state or in transient
conditions.
A large VSENSE may occur during system startup or shutdown
due to the charging and discharging of bulk storage
capacitors. VSENSE may be large due to fault conditions, such
as a short circuit condition, or a broken or missing sense
resistor.
An internal 5.0V Zener diode with a current rating of 10mA
protects the sense amplifier inputs. The block diagram
shows the orientation of this diode. The Zener diode provides
clamping at 5.0V for a positive VSENSE and at 600mV for a
negative VSENSE.
Under worst case conditions, limit the Zener current to 10mA.
A 100kΩ resistor limits the Zener diode current to 4.5mA
when VSENSE is 450V, whether positive or negative. Note that
the protection resistor may affect the bandwidth. The resistor
forms a RC network with the trace and pin capacitance at the
LOAD pin. A capacitance of 5.0pF results in a time constant
of 500ns.
The protection resistor may cause an offset due to bias
current at the LOAD input. Under worst case bias current
(1.0nA), a 100kΩ protection resistor could cause an offset
of 100µV or 0.2% of full scale. Note that the bias current
is nominally zero as the LOAD is a high impedance CMOS
input.
Pin Description
Pin # Pin Name Description
1 LOAD Sense amplifier input. High impedance input with Zener diode protection. Add an external
protection resistor in series with LOAD if VSENSE exceeds the range of -600mV to +5V.
2 NC No connect. This pin must be left floating for proper operation.
3 IN Sense amplifier input and supply.
4 GND Supply return.
5 OUT Output with a nominal output resistance of 3.6kΩ. Preservation of accuracy may require
an external buffer amplifier to prevent excessive loading.
, + [J [J D L / H a A L F TOPView ViewB Side View
Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives
an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability
to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and
specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com)
©2013 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited. Supertex inc.
1235 Bordeaux Drive, Sunnyvale, CA 94089
Tel: 408-222-8888
www.supertex.com
7
HV7800
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline
information go to http://www.supertex.com/packaging.html.)
Doc.# DSFP-HV7800
A062813
5-Lead SOT-23 Package Outline (K1)
2.90x1.60mm body, 1.45mm height (max), 0.95mm pitch
Symbol A A1 A2 b D E E1 e e1 L L1 L2 θ θ1
Dimension
(mm)
MIN 0.90* 0.00 0.90 0.30 2.75* 2.60* 1.45* 0.95
BSC
1.90
BSC
0.30 0.60
REF
0.25
BSC
0O5O
NOM - - 1.15 - 2.90 2.80 1.60 0.45 4O10O
MAX 1.45 0.15 1.30 0.50 3.05* 3.00* 1.75* 0.60 8O15O
JEDEC Registration MO-178, Variation AA, Issue C, Feb. 2000.
* This dimension is not specified in the JEDEC drawing.
Drawings not to scale.
Supertex Doc. #: DSPD-5SOT23K1, Version A041309.
1
5
D
Seating
Plane
Gauge
Plane
L
L1
L2
Top View
Side View View A - A
View B
View B
θ1
θ
E1 E
AA2
A1
A
A
Seating
Plane
e
b
Note 1
(Index Area
D/2 x E/2)
e1
Note:
1. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or
a printed indicator.

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