HV6810 Datasheet by Microchip Technology

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6‘ MICRDCHIP 3333333333 U 33:31:33:
2016 Microchip Technology Inc. DS20005626A-page 1
HV6810
Features
High Output Voltage 80V
High-speed 5 MHz at 5 VDD
Low-power IBB 0.1 mA (All High)
Active Pull-down 100 µA Minimum at 25°C
Output Source Current 25 mA at 60V VBB
10-channel Display Driver
High-speed Serially-shifted Data Input
5V CMOS-compatible Inputs
Latches on all Driver Outputs
Pin-compatible Replacement for UCN5810A,
TL4810A and TL4810B
Applications
High-speed Dot Matrix Print Head Driver
Vacuum Fluorescent Display (VFD) Driver
General Description
The HV6810 is a monolithic integrated circuit designed
to drive a dot matrix or segmented VFD. These devices
feature a serial data output to cascade additional
devices for large displays.
A 10-bit data word is serially loaded into the shift
register on the positive-going transition of the clock.
Parallel data are transferred to the output buffers
through a 10-bit D-type latch while the latch enable
input is high. The data are latched when the latch
enable is low. When the blanking input is high, all of the
outputs are low.
Outputs are structures formed by double-diffused MOS
(DMOS) transistors with output voltage ratings of 80V
and 25 mA source-current capability. All inputs are
compatible with CMOS levels.
Package Type
See Table 2-1 for pin information.
20-lead SOW
(Top view)
1 20
10-Channel Serial-Input Latched Display Driver
13131...-313
Blanking
Latch Enable
Q1
Q9
Q2
Q10
1D
C1
Data Input
Clock LC1
LC2
LC9
LC10
Latches Shift Register
6 Stages
(Q3 thru Q8
not shown
Serial
Out
C2
2D
1D
C1
1D
C1
1D
C1
C2
2D
C2
2D
C2
2D
VBB
HV6810
DS20005626A-page 2 2016 Microchip Technology Inc.
Functional Block Diagram
2016 Microchip Technology Inc. DS20005626A-page 3
HV6810
1.0 ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings† (Note 1)
Logic Supply Voltage, VDD (Note 2)......................................................................................................................... 7.5V
Driver Supply Voltage, VBB (Note 2) ......................................................................................................................... 90V
Output Voltage (Note 2) ........................................................................................................................................... 90V
Input Voltage (Note 2) ......................................................................................................................–0.3V to VDD +0.3V
Operating Ambient Temperature, TA.......................................................................................................–45°C to +85°C
Continuous Total Power Dissipation at 25°C Free-air Temperature:
20-lead SOW (Note 3) .......................................................................................................................... 1500 mW
Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only, and functional operation of the device at those or any other conditions above those
indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for
extended periods may affect device reliability.
Note 1: Over operating free-air temperature
2: All voltages are referenced to VSS.
3: For operations above 25°C ambient, derate linearly to 85°C at 15 mW/°C.
RECOMMENDED OPERATING CONDITIONS
Parameter Sym. Min. Typ. Max. Unit Conditions
Logic Supply Voltage VDD 4.5 5.5 V
High Supply Voltage VBB 20 80 V
Supply Voltage VSS 0 — V
High-level Input Voltage
(for VDD = 5V) VIH 3.5 5.3 V
Low-level Input Voltage VIL –0.3 0.8 V
Continuous High-level Q Output
Current IOH 25 mA
Clock Frequency fCLK 5 MHz
Operating Ambient Temperature TA–40 +85 °C
DC ELECTRICAL CHARACTERISTICS
Electrical Specifications: VDD = 5V, VBB = 60V, VSS = 0V and TA = 25°C unless otherwise noted.
Parameter Sym. Min. Typ. Max Unit Conditions
High-level Output
Voltage
Q Outputs VOH
57.5 58 VIO = +25 mA
Serial Output 44.5 VDD = +4.5V, IOL = +100 µA
Low-level Output
Voltage
Q Outputs VOL
0.15 1V
IO = –100 µA,
blanking input at VDD
Serial Output 0.05 0.1 VDD = +4.5V, IO = –100 µA
Low-level Q Output Current
(Pull-down Current) IOL 60 80 µA TA = Max, VOL = +0.7V
(Note 1)
Off-state Output Current IO(OFF) –1 –15 µA VO = 0V, blanking input at VDD
(Note 1)
High-level Input Current IIH 1 µA VlN = VDD
Supply Current from VDD (Standby) IDD
10 50
µA
All inputs at 0V,
one Q output high
10 50 All inputs at 0V,
all Q outputs low
Note 1: All typical values are at TA = 25°C except for IOL and IO(OFF).
HV6810
DS20005626A-page 4 2016 Microchip Technology Inc.
Supply Current from VBB IBB
0.05 0.1
mA
All outputs low,
all Q outputs open
0.05 0.1 All outputs high,
all Q outputs open
AC ELECTRICAL CHARACTERISTICS
Electrical Specifications: Timing requirements are over the recommended operating conditions.
Parameter Sym. Min. Typ. Max Unit Conditions
Pulse Duration, Clock High tW(CKH) 100 ns
Pulse Duration, Latch Enable High tW(LEH) 100 ns
Setup Time, Data before Clock tSU(D) 50 ns
Hold Time, Data after Clock tH(D) 50 ns
Delay Time, Clock to Latch Enable
High tCKH-LEH 50 ns
Propagation Delay Time, Latch Enable
to Output tPD 300 ns Note 1
Note 1: Switching characteristics, VBB = 60V, TA = 25°C
TEMPERATURE SPECIFICATIONS
Parameter Sym. Min. Typ. Max. Unit Conditions
TEMPERATURE RANGE
Operating Ambient Temperature TA–40 +85 °C
PACKAGE THERMAL RESISTANCE
20-lead SOW JA 66 °C/W
DC ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Specifications: VDD = 5V, VBB = 60V, VSS = 0V and TA = 25°C unless otherwise noted.
Parameter Sym. Min. Typ. Max Unit Conditions
Note 1: All typical values are at TA = 25°C except for IOL and IO(OFF).
2016 Microchip Technology Inc. DS20005626A-page 5
HV6810
Switching Waveforms
tW(CKH)
50% 50%
VIH
VIL
VIH
VIL
Valid
50% 50%
Data
Clock
tH(D)
tSU(D)
50%
50% 50%
tCKH-LEH
Valid
Valid
90%
Clock
Input
Latch
Enable
Q Output
tPD
tW(LEH)
Input Timing
VIH
VIL
VIH
VIL
VOH
VOL
Output Switching Timing
Timing Diagram
VALID IRRELEVANT
INVALID VALID
PREVIOUSLY STORED DATA NEW DATA VALID
VALID
Clock
Data In
SR Contents
Latch
Enable
Latch
Contents
Blanking
Q Outputs
HV6810
DS20005626A-page 6 2016 Microchip Technology Inc.
2.0 PIN DESCRIPTION
The details on the pins of HV6810 are listed on
Table 2-1. Refer to Package Type for the location of
pins.
TABLE 2-1: PIN FUNCTION TABLE
Pin Number Pin Name Description
1Q8
High-voltage output2Q7
3Q6
4CLOCK Input data are shifted into the data shift register on the positive edge of the clock.
5VSS Usually VSS = 0V; ground connection
6 N/C No connection
7VDD Low-voltage power supply
8LE (STROBE) When LE is high, the shift register output is latched to Q output. When LE stays high,
the latches are in Transparent mode.
9Q5
High-voltage output
10 Q4
11 Q3
12 Q2
13 Q1
14 BLANKING When blanking is high, all Q's are forced to a Low state regardless of data in each
channel.
15 DATA IN Input data for the input shift register
16 VBB High-voltage power supply
17 SERIAL DATA
OUT Output data from the shift register
18 N/C No connection
19 Q10 High-voltage output
20 Q9
1 Connecl ground V55. 1 Remove VEB. DD C —— C C |—‘ 3 H '— Ir- F} ———~{|—- 2: I— |_ |_ >——— —— —o O |— I— : k} ——— k— 2: I— I— |_‘ C —— C C O
2016 Microchip Technology Inc. DS20005626A-page 7
HV6810
3.0 FUNCTIONAL DESCRIPTION
Follow the steps below to power up and power down
the HV6810.
POWER-UP AND POWER-DOWN SEQUENCE 1
Power-up Power-down
Step Description Step Description
1Connect ground VSS. 1 Remove VBB.
2Apply VDD. 2 Remove all inputs.
3Set all inputs (Data, CLK, Enable, etc.) to a
known state.
3Remove VDD.
4Apply VBB. 4 Disconnect ground VSS.
Note 1: The VBB should not drop below VDD or float during operation.
FUNCTION TABLE 1
Serial
Data
Input
Clock
Input
Shift Register Contents Serial
Data
Output
LE
Strobe
Input
Latch Contents Blanking
Input
Output Contents
I1I2I3... IN-1 INI1I2I3... IN-1 INI1I2I3... IN-1 IN
HL to H H R1R2...RN–2 RN–1 RN–1 — — — — —
LL to H L R1R2...RN–2 RN–1 RN–1 — — — —
XH to L R1R2R3...RN–1 RNRN — — — — —
X X X...X X X L R1R2R3...RN–1 RN — —
P1P2P3...PN–1 PNPNH P1P2P3...PN–1 PNL P1P2P3...PN–1 PN
— — X X X...X X H L L L...L L
Note 1: L = Low logic level
H = High logic level
X = Don’t care
P = Present state
R = Previous state
,
VDD
DATA
INPUT
VSS
Input Equivalent Circuit
VDD
GND
DATA
OUT
VSS
Q
Logic Data Output
VBB
High Voltage Output
FIGURE 3-1: Input and Output Equivalent Circuits.
HHHHHHHHHH BHHHHHHHHH Q o O c HHHHHHHHHH HHHHHHHHHH NNN alert )
HV6810
DS20005626A-page 8 2016 Microchip Technology Inc.
4.0 PACKAGE MARKING INFORMATION
4.1 Packaging Information
Legend: XX...X Product Code or Customer-specific information
Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
*This package is Pb-free. The Pb-free JEDEC designator ( )
can be found on the outer packaging for this package.
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for product code or customer-specific information. Package may or
not include the corporate logo.
3
e
3
e
20-lead SOW Example
HV6810WG
e3
1624965
XXXXXXX
e3
YYWWNNN
20-Lead SOW (Wide Body) Package Outline (WG)
12.80x7.50mm body, 2.65mm height (max), 1.27mm pitch
Symbol A A1 A2 b D E E1 e h L L1 L2 șș
Dimension
(mm)
MIN 2.15* 0.10 2.05 0.31 12.60* 9.97* 7.40*
1.27
BSC
0.25 0.40
1.40
REF
0.25
BSC
0O5O
NOM----12.80 10.30 7.50 - - - -
MAX 2.65 0.30 2.55* 0.51 13.00* 10.63* 7.60* 0.75 1.27 8O15O
JEDEC Registration MS-013, Variation AC, Issue E, Sep. 2005.
7KLVGLPHQVLRQLVQRWVSHFL¿HGLQWKH-('(&GUDZLQJ
Drawings are not to scale.
D
Seating
Plane
Gauge
Plane
L
L1
L2
Top View
Side View View A - A
View B
View
B
θ1
θ
E1 E
AA2
A1
A
A
Seating
Plane
eb
h
h
20
1
Note 1
Note 1
(Index Area
0.25D x 0.75E1)
Note:
1. $3LQLGHQWL¿HUPXVWEHORFDWHGLQWKHLQGH[DUHDLQGLFDWHG7KH3LQLGHQWL¿HUFDQEHDPROGHGPDUNLGHQWL¿HUDQHPEHGGHGPHWDOPDUNHURU
a printed indicator.
Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.
2016 Microchip Technology Inc. DS20005626A-page 9
HV6810
HV6810
DS20005626A-page 10 2016 Microchip Technology Inc.
NOTES:
2016 Microchip Technology Inc. DS20005626A-page 11
HV6810
APPENDIX A: REVISION HISTORY
Revision A (October 2016)
Converted Supertex Doc# DSFP-HV6810 to
Microchip DS20005626A
Removed the PJ package option
Changed the quantity of the WG package from
1000/Reel to 1600/Reel
Made minor text changes throughout the docu-
ment
PART NO. & v
HV6810
DS20005626A-page 12 2016 Microchip Technology Inc.
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office.
YSTEM
2016 Microchip Technology Inc. DS20005626A-page 13
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
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The Microchip name and logo, the Microchip logo, AnyRate,
dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KeeLoq,
KeeLoq logo, Kleer, LANCheck, LINK MD, MediaLB, MOST,
MOST logo, MPLAB, OptoLyzer, PIC, PICSTART, PIC32 logo,
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are registered trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
ClockWorks, The Embedded Control Solutions Company,
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IntelliMOS, mTouch, Precision Edge, and QUIET-WIRE are
registered trademarks of Microchip Technology Incorporated
in the U.S.A.
Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut,
BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM,
dsPICDEM.net, Dynamic Average Matching, DAM, ECAN,
EtherGREEN, In-Circuit Serial Programming, ICSP, Inter-Chip
Connectivity, JitterBlocker, KleerNet, KleerNet logo, MiWi,
motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB,
MPLINK, MultiTRAK, NetDetach, Omniscient Code
Generation, PICDEM, PICDEM.net, PICkit, PICtail,
PureSilicon, RightTouch logo, REAL ICE, Ripple Blocker,
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WiperLock, Wireless DNA, and ZENA are trademarks of
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SQTP is a service mark of Microchip Technology Incorporated
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Silicon Storage Technology is a registered trademark of
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GestIC is a registered trademarks of Microchip Technology
Germany II GmbH & Co. KG, a subsidiary of Microchip
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All other trademarks mentioned herein are property of their
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© 2016, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
ISBN: 978-1-5224-1003-4
Note the following details of the code protection feature on Microchip devices:
Microchip products meet the specification contained in their particular Microchip Data Sheet.
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
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Microchip is willing to work with the customer who is concerned about the integrity of their code.
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Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
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are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
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QUALITYMANAGEMENTS
YSTEM
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DS20005626A-page 14 2016 Microchip Technology Inc.
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