BR24Szzz-W Series Datasheet by Rohm Semiconductor

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ROHm ssmKuNuucToR ‘ fl 'FEZE Rigs mmmmwm Dircclivccumplimcc ‘(8K 16K 32K 64K 128K 256K) Completely conforming to the world standard IZC BUS. All controls available by 2 ports of serial clock (SOL) and serial data (SDA) Other devices than EEPROM can be connected to the same port, saving microcontroller port 1.7V to 5.5V single power source action most suitable for battery use FAST MODE AOOKHZ at 1.7V to 5.5V Page write mode useful for initial value write at factory shipment Highly reliable connection by Au pad and Au wire Auto erase and auto end function at data rewrite Low current consumption ‘r At write operation (5V) : 0.5mA (Typ.) ‘r At read operation (5V) : 0.2mA (Typ.) ‘r At standby operation (5V) : 0.1pA(Typ.) Write mistake prevention function iv Write (write protect) function added iv Write mistake prevention function at low voltage Data rewrite up to 1,000,000 times Data Kept for 40 years Noise filter built in SCL/ SDAterminal Shipment data all address FFh .Fage write Number of pages 1eByte SZByte BR24SOS-W BR24532»W ”0‘1““ "“mbe' BR24s1e-w BR24564»W . BH24Sxxx-W CapaCity “523‘ Type ”ting?“ sopa SOP BKblt iKXB BR24SUE'W 1.7V in 5 5V . . iEKbiI ZKXB BR243157W 1.7Vi0 55V . . 32Kbi| AKXB BR24332'W 1.7V in 5 5V . . 54Kbi| SKXB BR24SE4VW 1.7V in 5 5V . . iZBKDlt iSKxE BR245123'W 1.7Vi0 55V . . 256Kblt 32KXE BR24SZ5S'W 1.7V in 5 5V . . OProduct structure Silicon monolithic integrated circuit OThis product is www rohm.com ©2llt2 ROHM Co., Ltd, All rights reserved 1 TSZzziit-M-om /33
Product structureSilicon monolithic integrated circuit This product is not designed protection against radioactive rays
1/33 TSZ02201-0R2R0G100320-1-2
20.AUG.2012 Rev.001
©2012 ROHM Co., Ltd. All rights reserved.
TSZ2211114001
www.rohm.com
Datashee
t
Serial EEPROM series Standard EEPROM
I2C BUS EEPROM (2-Wire)
BR24Sxxx-W
(8K 16K 32K 64K 128K 256K)
General Description
BR24Sxxx-W is a serial EEPROM of I2C BUS interface method
Features
Completely conforming to the world standard I2C
BUS.
All controls available by 2 ports of serial clock
(SCL) and serial data (SDA)
Other devices than EEPROM can be connected to
the same port, saving microcontroller port
1.7V to 5.5V single power source action most suitable
for battery use
FAST MODE 400kHz at 1.7V to 5.5V
Page write mode useful for initial value write at
factory shipment
Highly reliable connection by Au pad and Au wire
Auto erase and auto end function at data rewrite
Low current consumption
¾ At write operation (5V) : 0.5mA (Typ.)
¾ At read operation (5V) : 0.2mA (Typ.)
¾ At standby operation (5V) : 0.1μA (Typ.)
Write mistake prevention function
¾ Write (write protect) function added
¾ Write mistake prevention function at low voltage
Data rewrite up to 1,000,000 times
Data kept for 40 years
Noise filter built in SCL / SDA terminal
Shipment data all address FFh
Packages W(Typ.) x D(Typ.) x H(Max.)
Page write
Number of pages 16Byte 32Byte 64Byte
Product number BR24S08-W
BR24S16-W BR24S32-W
BR24S64-W BR24S128-W
BR24S256-W
BR24Sxxx-W
Capacity Bit
format Type Power source
voltage SOP8 SOP-J8 SSOP-B8 TSSOP-B8 MSOP8 TSSOP-B8J VSON008
X2030
8Kbit 1K×8 BR24S08-W 1.7V to 5.5V
16Kbit 2K×8 BR24S16-W 1.7V to 5.5V
32Kbit 4K×8 BR24S32-W 1.7V to 5.5V
64Kbit 8K×8 BR24S64-W 1.7V to 5.5V
128Kbit 16K×8 BR24S128-W 1.7V to 5.5V
256Kbit 32K×8 BR24S256-W 1.7V to 5.5V
V
SON008X2030
2.00mm x 3.00mm x 0.60mm
TSSOP-B8
3.00mm x 6.40mm x 1.20mm
SOP8
5.00mm x 6.20mm x 1.71mm
SOP- J8
4.90mm x 6.00mm x 1.65mm TSSOP-B8J
3.00mm x 4.90mm x 1.10mm
MSOP8
2.90mm x 4.00mm x 0.90mm
SSOP-B8
3.00mm x 6.40mm x 1.35mm
Datasheet
2/33
BR24Sxxx-W (8K 16K 32K 64K 128K 256K)
TSZ02201-0R2R0G100320-1-2
20.AUG.2012 Rev.001
©2012 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Absolute Maximum Ratings (Ta=25)
Parameter Symbol Ratings Unit Remarks
Supply Voltage VCC -0.3 to +6.5 V
450 (SOP8) When using at Ta=25 or higher 4.5mW to be reduced per 1.
450 (SOP-J8) When using at Ta=25 or higher 4.5mW to be reduced per 1.
300 (SSOP-B8) When using at Ta=25 or higher 3.0mW to be reduced per 1.
330 (TSSOP-B8) When using at Ta=25 or higher 3.3mW to be reduced per 1.
310 (TSSOP-B8J) When using at Ta=25 or higher 3.1mW to be reduced per 1.
310 (MSOP8) When using at Ta=25 or higher 3.1mW to be reduced per 1.
Power Dissipation Pd
300 (VSON008X2030)
mW
When using at Ta=25 or higher 3.0mW to be reduced per 1.
Storage Temperature Tstg 65 to +125
Operating Temperature Topr 40 to +85
Terminal Voltage -0.3 to Vcc+1.0 V
Memory cell characteristics (Ta=25, Vcc=1.7V to 5.5V)
Limits
Parameter Min. Typ. Max. Unit
Number of data rewrite times *1 1,000,000 - - Times
Data hold years *1 40 - - Years
*1 Not 100% TESTED
Recommended Operating Ratings
Parameter Symbol Ratings Unit
Power source voltage Vcc 1.7 to 5.5
Input voltage VIN 0 to Vcc V
Electrical Characteristics
(Unless otherwise specified, Ta=-40 to +85, VCC=1.7V to 5.5V)
Limits
Parameter Symbol
Min Typ. Max. Unit Condition
"H" Input Voltage1 VIH1 0.7Vcc - Vcc+1.0 V
"L" Input Voltage1 VIL1 -0.3 - 0.3Vcc V
"L" Output Voltage1 VOL1 - - 0.4 V IOL=3.0mA , 2.5VVcc5.5V (SDA)
"L" Output Voltage2 VOL2 - - 0.2 V IOL=0.7mA , 1.7VVcc2.5V (SDA)
Input Leakage Current ILI -1 - 1 μA VIN=0 to Vcc
Output Leakage Current ILO -1 - 1 μA VOUT=0 to Vcc (SDA)
- - 2.0 Vcc=5.5V , fSCL =400kHz, tWR=5ms
Byte Write, Page Write BR24S08/16/32/64-W
ICC1
- - 2.5
mA Vcc=5.5V , fSCL =400kHz, tWR=5ms
Byte Write, Page Write BR24S128/256-W
Current consumption
at action
ICC2 - - 0.5 mA
Vcc=5.5V , fSCL =400kHz
Random read, Current read, Sequential read
Standby Current ISB - - 2.0 μA Vcc=5.5V , SDASCL=Vcc
A0, A1, A2=GND, WP=GND
www mhm.com Sync data inpul / oulpul 0mm read at me n52 edge a! ODa|a oulpm m sync wwth me la Fxgure 1-(a) Sync d SOL “L \ SDA ©2012 ROHM 00., Ltd, AH fights reserved TSZzzm-IS-om 3/33
Datasheet
3/33
BR24Sxxx-W (8K 16K 32K 64K 128K 256K)
TSZ02201-0R2R0G100320-1-2
20.AUG.2012 Rev.001
©2012 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Action timing characteristics
(Unless otherwise specified, Ta=-40 to +85, VCC=1.7V to 5.5V)
Limits
Parameter Symbol
Min. Typ. Max.
Unit
SCL Frequency fSCL - - 400 kHz
Data clock "High" time tHIGH 0.6 - - μs
Data clock "Low" time tLOW 1.2 - - μs
SDA, SCL rise time *1 tR - - 0.3 *2 μs
SDA, SCL fall time *1 tF - - 0.3 μs
Start condition hold time tHD:STA 0.6 - - μs
Start condition setup time tSU:STA 0.6 - - μs
Input data hold time tHD:DAT 0 - - ns
Input data setup time tSU:DAT 100 - - ns
Output data delay time tPD 0.1 - 0.9 μs
Output data hold time tDH 0.1 - - μs
Stop condition data setup time tSU:STO 0.6 - - μs
Bus release time before transfer start tBUF 1.2 - - μs
Internal write cycle time tWR - - 5 ms
Noise removal valid period (SDA,SCL terminal) tI - - 0.1 μs
WP hold time tHD:WP 0 - - ns
WP setup time tSU:WP 0.1 - - μs
WP valid time tHIGH:WP 1.0 - - μs
*1 : Not 100% TESTED
*2 : BR24S16/64-W : 1.0μs.
Sync data input / output timing
SDA
tSU:STA tSU:STOtHD:STA
START BIT STOP BIT
SCL
Input read at the rise edge of SCL
Data output in sync with the fall of SCL
Figure 1-(a) Sync data input / output timing Figure 1-(b) Start - stop bit timing
SDA
SC
L
D0 ACK
STOP
CONDITION
START
CONDITION
t
WR
WRITE DATA
(
n
)
Figure 1-(c) Write cycle timing Figure 1-(d) WP timing at write execution
At write execution, in the area from the D0 taken clock rise of the first
DATA(1), to tWR, set WP= 'LOW'.
By setting WP "HIGH" in the area, write can be cancelled.
When it is set WP = 'HIGH' during tWR, write is forcibly ended, and data
of address under access is not guaranteed, therefore write it once again.
Figure 1-(e) WP timing at write cancel
SD
A
(入力)
SDA
(出力)
tHD:STA tHD:DAT
tSU:DAT
tBUF tPD tDH
tLOW
tHIGHtR tF
SCL
(Input)
(Output)
SCL
SDA
WP
HDWP
ストップション
WR
D1 D0
CK
CK
DATA(1) DATA(n)
tSUWP
Stop condition
tHIGH:WP
WP
SDA D1 D0 ACK ACK
DATA(1) DATA(n)
tWR
SCL
tWR
BR24SXxx-W (8 .Block Diagram Aol: GND generating Circuit Adddress Slave , word decoder address register . . High voltage '1 .Fin Configuration 10bit, enz4soarw 11bit BR2451 67W 12bit, BR248327W 13bit, BR24SGAVW 14bit, BR2451257W 15bit, BR2452567W ’2 A0 A|=D0n't use BR24SOSVW A0, A1, A2=Don‘l use. BRZASISVW (TOP VIEW) enzasuarw BRZASI srw enzasszrw enzassmw BRZASI 237w BRZAszssrw GND A sum .Fin Descriptions Terminal Inpul/ FUNCfiO" name Output BR24soa-w BR24s1s-w A0 Input Don’t use Don't use A1 Input Don’t use Don't use A2 Input Slave address selling Don’t use GND - Reference voltage of all input / output, Slave and word address, SDA Mp“. / DMD“. Serial data input serial data output SOL Input Serial clock input WP Input Write protect terminal Vcc - Connect the power source. www rohm.com ©2012 ROHM 00., Lid, All righls reserved TSZzzm-IS-nm 4/33 TSZD
Datasheet
4/33
BR24Sxxx-W (8K 16K 32K 64K 128K 256K)
TSZ02201-0R2R0G100320-1-2
20.AUG.2012 Rev.001
©2012 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Block Diagram
Pin Configuration
Pin Descriptions
Function
Terminal
name Input/
Output BR24S08-W BR24S16-W BR24S32/64/128/256-W
A0 Input Don't use Don't use Slave address setting
A1 Input Don't use Don't use Slave address setting
A2 Input Slave address setting Don't use Slave address setting
GND - Reference voltage of all input / output, 0V.
SDA Input / Output Slave and word address,
Serial data input serial data output
SCL Input Serial clock input
WP Input Write protect terminal
Vcc - Connect the power source.
1 10bit: BR24S08-W
11bit: BR24S16-W
12bit: BR24S32-W
13bit: BR24S64-W
14bit: BR24S128-W
15bit: BR24S256-W
2 A0, A1=Don't use: BR24S08-W
A0, A1, A2=Don't use: BR24S16-W
Vcc
SCL
GND
BR24S08-W
BR24S16-W
BR24S32-W
BR24S64-W
BR24S128-W
BR24S256-W
1
2
3
4 5
6
7
8
WP
SDA
A2
A1
A0
(
TOP VIEW
)
8
7
6
5 4
3
2
1
SDA
SCL
WP
Vcc
GND
A2
A1
A0
Add dress
decoder
Slave - word
address register
Data
register
Control circuit
High voltage
generating circuit
Power source
voltage detection
10bit
11bit
12bit
13bit
14bit
15bit
8bit
ACK
START STOP
8
Kbit to 256Kbit EEPROM array
10bit
11bit
12bit
13bit
14bit
15bit
*1
*1
*2
*2
*2
L OUTPUT VOLTAGE vm[v] H ]N PUT V0 LTAGE V1,.[V] DB 06 04 DZ Ta:- 40°C —— 4 7 TaZZ 5°C Ta=85°C 1 Z 3 5! SUPP LY V0 LTAGE V CON] \ L \ Ta=T40°C —— iTaZZS‘C _ Ta:85°C _ _ . , ' I / x '/ / SPE '// .’ / /’/’ 1 2 3 4 5 6 L OUTPUT CURRENT IDLEmA] 7 L OUTPUT VOLTAGE VOLW] “ \ \ 5 rTa:-40°C E Ta:25°C ___ > 4 _Ta:85°c m <5>< 5="" 3="" o=""> 5 2 / a. . E i 4 1 ’ u ‘ SPEC 0 0 1 2 3 4 5 SUPPLYVOLTAGE VucM 1 DB 06 Ta=i40°C —— Ta=25°c _ __ Ta:35°C _ . _ SPEC 04 I . ‘P v r 02 ' ’Z ’ :4 r 'r ’ ’/ . 5/ D ‘F‘: D 1 Z 3 4 5 L OUTPUT CURRENT 1m[mA]
Datasheet
5/33
BR24Sxxx-W (8K 16K 32K 64K 128K 256K)
TSZ02201-0R2R0G100320-1-2
20.AUG.2012 Rev.001
©2012 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Figure 4. "L" Output Voltage
VOL-IOL1(Vcc=1.7V)
Figure 5. "L" Output Voltage VOL-IOL
(Vcc=2.5V)
Figure 2. "H" Input Voltage VIH
(A0, A1, A2, SCL, SDA, WP)
Figure 3. "L" Input Voltage VIL
(A0, A1, A2, SCL, SDA, WP)
Typical Performance Curves
(The following values are Typ. ones.)
Datasheet CU HRENT CONSUMPTION 12 SPEC g 1 ._._._.+._._ .2 5 as m E D 06 : Ta:*40°C —- 35 04 7TH“: 4 Ta=85°c _ _ E Z DZ 0 —-——_n.-_l— D 1 2 3 4 5 6 SJPPLWOLTAGE Voo[V] 25 SPEC fl 2 E f 2 E15 0 Ta=-40°C E 1 _Ta=25°C ___ g Ta=85°C _ L <05>
Datasheet
6/33
BR24Sxxx-W (8K 16K 32K 64K 128K 256K)
TSZ02201-0R2R0G100320-1-2
20.AUG.2012 Rev.001
©2012 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Figure 6. Input Leak Current ILI
(A0, A1, A2, SCL, WP)
Figure 7. Output Leak Current ILO (SDA)
Figure 9. Current consumption at WRITE operation
ICC1
(fscl=400kHz BR24S128/256-W)
Figure 8. Current consumption at WRITE operation
ICC1
(fscl=400kHz BR24S16/32/64-W)
Typical Performance CurvesContinued
ILO[uA]
CUR RENT CONSUMPTION SPEC -—-—-— 02 AT READING IchDnA] 01 10000 1000 100 10 5 CL FREQUENCY {SCUM-1U 01 2 3 4 5 SUPPLY VOLTAGE VDDWJ SPEC Ta; 40°C —- Ta=25°C _ _ T328 5°C 1 2 3 4 5 SUPPLY VOLTAGE VocD/J STANBY CURRENT ISEDJA] DATA CLK H TIME IEH‘QNELAS] 25 0.8 0.6 0.4 OZ S PEC I+H Ta:35°c — - — J-__._.__ U 1 2 3 4 5 S UPPLY VOLTAGE VmEV] TIP-40°C — 5"C __ —Ta=85°C _ _ SPE 0 I Z 3 4 SUPPLY VOLTAGE : Voc[V] 5
Datasheet
7/33
BR24Sxxx-W (8K 16K 32K 64K 128K 256K)
TSZ02201-0R2R0G100320-1-2
20.AUG.2012 Rev.001
©2012 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Figure 10. Current consumption at READ operation
ICC2
(fscl=400kHz)
Figure 12. SCL frequency fSCL
Figure 13. Data clock High Period tHIGH
Figure 11. Standby operation ISB
Typical Performance CurvesContinued
START CONDITION SET UP TIME (5U STALus] DATA C LK L TIME th[us] a a a a a N h 0) cu I a N 4: to N SPEC Ta? 40°C —— T Ta=85°0 _ . _ . D 1 2 3 4 5 6 SUPP LY VOLTAGE VooLV] SPE -—-+-— u I Z 3 ‘I 5 6 S UPPLY V0 LTAG E Vch:V:I INPUT DATA HOLD TIME gm wins] A N w b m START CONDITION HOLD TIME 1H0 SYA[“5] o —100 i150 *ZDO SPEC I —-+H 7 Ta=2 5°C Ta=i40° —— Ta=8 5°C a I Z 3 4 5 6 SUPPLY VO LTAGE VD!) [V] SPEC I W _.__—.-_ Ta=i40°0 _ Ta=25°C _ _ _ Ta=85°c _ . _ D 1 2 3 4 5 5 SUPPLY VOLTAGE Vch
Datasheet
8/33
BR24Sxxx-W (8K 16K 32K 64K 128K 256K)
TSZ02201-0R2R0G100320-1-2
20.AUG.2012 Rev.001
©2012 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Figure 14. Data clock LOW Period tLOW
Figure 15. Start Condition Hold Time tHD:STA
Figure 16. Start Condition Setup Time tSU:STA Figure 17. Input Data Hold Time tHD:DAT(HIGH)
Typical Performance CurvesContinued
H in E 1 2 a o J m 3—50 F D _. $400 4 k < 0-150="" 5="" %="" «200="" 7:="" 300="" 5="" e="" 3="" 200="" .3"="" “2‘="" ,:="" mu="" m="" d="" e="" o="" m="">< r="" e="" —tuo="" ,_="" d="" d.="" z="" —znu="" spe="" -="" #—="" ta="T40°C" ——="" i="" ta:25°0="" _="" _="" _="" ta="85°C" _="" ,="" _.="" \="" \="" d="" 1="" 2="" 3="" 4="" 5="" 6="" supply="" voltage="" vch]="" d="" 1="" 2="" 3="" 4="" 5="" 6="" supply="" voltage="" vco[v]="" w="" a="" a="" 200="" tdd="" a="" lnput="" data="" set="" up="" tjme="" t5“="" mks]="" l="" a="" a="" t="" n="" o="" o="" output="" data="" delay="" time="" mus]="" 1="" z="" 3="" 4="" 5="" s="" supply="" voltage="" vog[v]="" ta="T40°C" ——="" ta:25°c="" i="" ta="85°0" spec="" d="" 1="" 2="" 3="" 4="" 5="" s="" upply="" v0="" ltage="" vcgw]="">
Datasheet
9/33
BR24Sxxx-W (8K 16K 32K 64K 128K 256K)
TSZ02201-0R2R0G100320-1-2
20.AUG.2012 Rev.001
©2012 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Figure 18. Input Data Hold Time tHD:DAT(LOW)
Figure 19. Input Data Setup Time tSU:DAT(HIGH)
Figure 20. Input Data Setup Time tSU:DAT(LOW)
Figure 21. “L” Data output delay time tPD0
Typical Performance CurvesContinued
INTERNAL WRITING CYCLE TIME tWRLms] OUTPUT DATA DELAYTIME trams] Ta=i4 0°C Ta=25°C 7 Ta=85°c SPEC 0 I 2 3 4 5 SUPPLY VOLTAGE Vcc[V] SPEC -_-_-_-_ D 1 Z 3 4 5 SUPPLY VOLTAGE Vco[V:| NOISE REDUCTION EFECTIVE TIME . ”SOL H) [us] BUS OPEN TIME BEFORE TRANSMISSION Tgwhs] 08 [16 [14 0.2 7 Ta:—4o°c Ta:25°C Ta=85°C SPEC :F‘“ 2 3 4 5 SUPPLY VOLTAGE VecEV] 513% H T :r4o°c _ T :25°c _ _ _ Ta:55°c _ . _ D l 2 8 4 5 6 SUPPLV VOLTAGE . Vcc[V]
Datasheet
10/33
BR24Sxxx-W (8K 16K 32K 64K 128K 256K)
TSZ02201-0R2R0G100320-1-2
20.AUG.2012 Rev.001
©2012 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Figure 22. “H” Data output delay time tPD1
Figure 23. BUS open time before transmission tBUF
Figure 24. Internal writing cycle time tWR
Figure 25. Noise reduction affection time tl(SCL H)
Typical Performance CurvesContinued
NOISE REDUCTION 06 E as :7 4 5 0“ - " = —-_=.._. w 03 - E \_- E “2‘ oz 5 SPEC )i‘ m n W m ' I- ' o o z 3 4 5 a SUPPLYVOLTAGE Vco[V] or; E 05 a Zn Ea 04 §‘ 03 m 3%; E fig oz 0. E 20 “I: 01 E w I 2 3 4 5 6 SUPPLY VOLTAGE Vcc[V] NOISE REDUCTION EFECTIVE TIME QISDA HIDE] WP SET UP TIME Lsu WES] DZ 01 SUPPLY VOLATGE VooW] z 3 4 5 s SUPPLY VOLTAGE Voc[V]
Datasheet
11/33
BR24Sxxx-W (8K 16K 32K 64K 128K 256K)
TSZ02201-0R2R0G100320-1-2
20.AUG.2012 Rev.001
©2012 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Figure 28. Noise reduction effective time tI (SDA L)
Figure 29. WP setup time tSU:WP
Figure 26. Noise reduction effective time tl(SCL L)
Figure 27. Noise reduction effective time tl(SDA H)
Typical Performance CurvesContinued
Datasheet TIME 1W WP[us] N a m a o) a A o N 1 2 3 4 SUPP LWOLTAGE V0001]
Datasheet
12/33
BR24Sxxx-W (8K 16K 32K 64K 128K 256K)
TSZ02201-0R2R0G100320-1-2
20.AUG.2012 Rev.001
©2012 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Figure 30. WP effective time tHIGH:WP
Typical Performance CurvesContinued
WP EFECTIVE
MMDfimf 1/ W m \flfo anzasaa w ERzasm‘ w 5224512 w amasm w mama w 52245255 w UUUU h . 53$E°R8fifinmc°., M, An fights reserved 13/33 Tszozzm-oRzRoGwo T822211! '15'001 20.AUG.2012 R
Datasheet
13/33
BR24Sxxx-W (8K 16K 32K 64K 128K 256K)
TSZ02201-0R2R0G100320-1-2
20.AUG.2012 Rev.001
©2012 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Vcc
SCL
GND
BR24S08-W
BR24S16-W
BR24S32-W
BR24S64-W
BR24S128-W
BR24S256-W
1
2
3
4 5
6
7
8
WP
SDA
A2
A1
A0
I2C BUS Communication
I2C BUS data communication
I2C BUS data communication starts by start condition input, and ends by stop condition input. Data is always 8bit long,
and acknowledge is always required after each byte.
I2C BUS carries out data transmission with plural devices connected by 2 communication lines of serial data (SDA) and
serial clock (SCL).
Among devices, there are “master” that generates clock and control communication start and end, and “slave” that is
controlled by addresses peculiar to devices.
EEPROM becomes “slave”. And the device that outputs data to bus during data communication is called “transmitter”,
and the device that receives data is called “receiver”.
Start condition (start bit recognition)
Before executing each command, start condition (start bit) where SDA goes from 'HIGH' down to 'LOW' when SCL is 'HIGH'
is necessary.
This IC always detects whether SDA and SCL are in start condition (start bit) or not, therefore, unless this condition is
satisfied, any command is executed.
Stop condition (stop bit recognition)
Each command can be ended by SDA rising from 'LOW' to 'HIGH' when stop condition (stop bit), namely, SCL is 'HIGH'
Acknowledge (ACK) signal
This acknowledge (ACK) signal is a software rule to show whether data transfer has been made normally or not. In master
and slave, the device (μ-COM at slave address input of write command, read command, and this IC at data output of read
command) at the transmitter (sending) side releases the bus after output of 8bit data.
The device (this IC at slave address input of write command, read command, and μ-COM at data output of read command)
at the receiver (receiving) side sets SDA 'LOW' during 9 clock cycles, and outputs acknowledge signal (ACK signal)
showing that it has received the 8bit data.
This IC, after recognizing start condition and slave address (8bit), outputs acknowledge signal (ACK signal) 'LOW'.
Each write action outputs acknowledge signal) (ACK signal) 'LOW', at receiving 8bit data (word address and write data).
Each read action outputs 8bit data (read data), and detects acknowledge signal (ACK signal) 'LOW'.
When acknowledge signal (ACK signal) is detected, and stop condition is not sent from the master (μ-COM) side, this IC
continues data output. When acknowledge signal (ACK signal) is not detected, this IC stops data transfer, and recognizes
stop condition (stop bit), and ends read action. And this IC gets in standby status.
Device addressing
Output slave address after start condition from master.
The significant 4 bits of slave address are used for recognizing a device type. The device code of this IC is fixed to '1010'.
Next slave addresses (A2 A1 A0 --- device address) are for selecting devices, and plural ones can be used on a same bus
according to the number of device addresses.
The most insignificant bit (R/W --- READ/WRITE) of slave address is used for designating write or read action, and is as
shown below.
Setting R/W to 0 --- write (setting 0 to word address setting of random read)
Setting R/W to 1 --- read
P0 to P2 are page select bits.
Note) Up to 2 units of BR24S08-W, up to 1 units of BR24S16-W, and up to 8 units of BR24S32/64/128/256-W can be connected.
Device address is set by 'H' and 'L' of each pin of A0, A1, and A2.
Type Slave address
Maximum number of
connected buses
BR24S08-W 1 0 1 0 A2 P1 P0 R/W
2
BR24S16-W 1 0 1 0 P2 P1 P0 R/W
1
BR24S32-W, BR24S64-W
BR24S128-W, BR24S256-W 1 0 1 0 A2 A1 A0 R/W
8
Figure 31. Data transfer timing
89 89 89
S P
condition condition
ACK STOPACKDATA DATAADDRES
S
START R/W ACK
1-7
SDA
SCL 1-7 1-7
M1111111111 1111111 1111111 H [@1111 1111111 W/111111H /‘ WUmmmefl
Datasheet
14/33
BR24Sxxx-W (8K 16K 32K 64K 128K 256K)
TSZ02201-0R2R0G100320-1-2
20.AUG.2012 Rev.001
©2012 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Write Command
Write cycle
Arbitrary data is written to EEPROM. When to write only 1 byte, byte write normally used, and when to write continuous
data of 2 bytes or more, simultaneous write is possible by page write cycle. The maximum number of write bytes is
specified per device of each capacity.
Up to 64 arbitrary bytes can be written. (In the case of BR24S128/256-W)
Figure 32. Byte write cycle (BR24S08/16-W)
Figure 33. Byte write cycle (BR24S32/64/128/256-W)
Figure 34. Page write cycle (BR24S08/16-W)
Figure 35. Page write cycle (BR24S32/64/128/256-W)
Data is written to the address designated by word address (n-th address).
By issuing stop bit after 8bit data input, write to memory cell inside starts.
When internal write is started, command is not accepted for tWR (5ms at maximum).
By page write cycle, the following can be written in bulk: Up to 16 bytes (BR24S08-W, BR24S16-W)
: Up to 32 bytes (BR24S32-W, BR24S64-W)
: Up to 64 bytes (BR24S128-W, BR24S256-W)
And when data of the maximum bytes or higher is sent, data from the first byte is overwritten.
(Refer to "Internal address increment in Page 15.)
As for page write command of BR24S08-W and, BR24S16-W, after page select bit(PS) of slave address is designated
arbitrarily, by continuing data input of 2 bytes or more, the address of insignificant 4 bits is incremented internally, and data
up to 16 bytes can be written.
As for page write cycle of BR24S32-W and BR24S64-W , after the significant 7 bits (in the case of BR24S32-W) of word
address, or the significant 8 bits (in the case of BR24S64-W) of word address are designated arbitrarily, by continuing data
input of 2 bytes or more, the address of insignificant 5 bits is incremented internally, and data up to 32 bytes can be written.
As for page write cycle of BR24S128-W and BR24S256-W, after the significant 9 bit (in the case of BR24S128-W) of word
address, or the significant 10bit (in the case of BR24S256-W) of word address are designated arbitrarily, by continuing
data input of 64 bytes or more.
Note)
Figure 36. Difference of slave address each type
A1 A2 WA
7 D7
1 1 0 0
W
R
I
T
E
S
T
A
R
T
R
/
W
S
T
O
P
WORD
ADDRESS DATA
SLAVE
ADDRESS
A0 WA
0 D0
A
C
K
SDA
LINE
A
C
K
A
C
K
Note)
A1 A2 WA
14
1 1 0 0
W
R
I
T
E
S
T
A
R
T
R
/
W
S
T
O
P
1st WORD
ADDRESS DATA
SLAVE
ADDRESS
A0 D0
A
C
K
SDA
LINE
A
C
K
A
C
K
Note)
WA
13
WA
12
WA
11
WA
0
A
C
K
2nd WORD
ADDRESS
D7
*1
W
R
I
T
E
S
T
A
R
T
R
/
W
A
C
K
S
T
O
P
1st W ORD
ADDRESS(n)
SDA
LINE
A
C
K
A
C
K
DATA(n+31)
A
C
K
SLAVE
ADDRESS
10 0
1A0 A1 A2 WA
14 D0
Note) *1
DATA(n)
D0D7
A
C
K
2nd WORD
ADDRESS(n)
WA
0
WA
13
WA
12
WA
11
*2
*1 As for WA12, BR24S32-W becomes Don't care.
As for WA13, BR24S32/64-W becomes Don't care.
As for WA14, BR24S32/64/128-W becomes Don't care.
*1 As for WA12, BR24S32-W becomes Don't care.
As for WA13, BR24S32/64-W becomes Don't care.
As for WA14, BR24S32/64/128-W becomes Don't care.
*2 As for BR24S128/256-W becomes (n+63).
10 0
1A0
A1
A2
*1 *2 *3 *1 In BR24S16-W, A2 becomes P2
*2 In BR24S08/16-W, A1 becomes P1
*3 In BR24S08/16-W, A0 becomes P0
W
R
I
T
E
S
T
A
R
T
R
/
W
A
C
K
S
T
O
P
WORD
ADDRESS(n) DAT
A
(n)
SDA
LINE
A
C
K
A
C
K
DATA(n+15)
A
C
K
SLAVE
ADDRESS
10 0
1A0 A1 A2 WA
7 D0 D7 D0
WA
0
) *1
*2
Note)
Datasheet Po 0 m srow rsmp ml x0) x0» x0» W_ W / m , x x x x in c c c c w x x x K Figure 38. Page erte cycle(BR24SSZ/64/128/256-W) ONotes on page write cycle List at numbers at page erte Number of pages IsEtyte 32E!yte 64 BR24 BRZASOB-W BR24832-W Product number BR2ASls-W BR24Se4-W BR24 The above numbers are maximum bytes for respective types. Any bytes pelowt In the case of BR248256-W, 1 page : 64bytes, but the page write cycle erte tIme It does not stand 5ms at maximum x 64byte : 320ms(Maxt)t Olnternal address increment Page erte mode (in the case of BR24S16-W) WA7 , , WA4 WAS WA2 WAl WAG 0 O O 0 0 0 0 l] O O 0 I g 0 | I | I 0'0010 I . | I Signilicant bit is fixed No digit up For example, when it is started lrom address OEn, tnerelore, increment is made OEhflOFnfloohflm h- - -, which please note ‘ oEn- - ~16 In hexadecimallherelorer00001110 becomes a bInary number OWrite protect (WP) terminal - Write protect (WP) function When WP terminal is set Vcc (H level), data rewrite of all address is prohibited W all address Is enabled. Be sure to connect this terminal to Vcc or GND, or control At extremely low voltage at power ON/OFF, by setting the WP terminal 'H't mistake DurIng tWR, set the WP terminal always to it If it is set 'H't write is forcibly termin www rohm.com ©2012 ROHM co, le.All n his reserved Tszzzm-Is-nm 9 15/33
Datasheet
15/33
BR24Sxxx-W (8K 16K 32K 64K 128K 256K)
TSZ02201-0R2R0G100320-1-2
20.AUG.2012 Rev.001
©2012 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Notes on write cycle continuous input
Notes on page write cycle
List of numbers of page write
Number of pages 16Byte 32Byte 64Byte
Product number BR24S08-W
BR24S16-W BR24S32-W
BR24S64-W
BR24S128-W
BR24S256-W
The above numbers are maximum bytes for respective types. Any bytes below these can be written.
In the case of BR24S256-W, 1 page = 64bytes, but the page write cycle write time is 5ms at maximum for 64byte bulk write.
It does not stand 5ms at maximum × 64byte = 320ms(Max.).
Internal address increment
Page write mode (in the case of BR24S16-W)
For example, when it is started from address 0Eh, therefore, increment is made as below,
0Eh0Fh00h01h・・・, which please note.
* 0Eh・・・16 in hexadecimal, therefore, 00001110 becomes a binary number.
Write protect (WP) terminal
Write protect (WP) function
When WP terminal is set Vcc (H level), data rewrite of all address is prohibited. When it is set GND (L level), data rewrite of
all address is enabled. Be sure to connect this terminal to Vcc or GND, or control it to H level or L level. Do not use it open.
At extremely low voltage at power ON/OFF, by setting the WP terminal 'H', mistake write can be prevented.
During tWR, set the WP terminal always to 'L'. If it is set 'H', write is forcibly terminated.
0Eh
---------
---------
Significant bit is fixed.
No digit up
WA7 ----- WA4 WA3 WA2 WA1 WA0
0 ----- 0 0 0 0 0
0 ----- 0 0 0 0 1
0 ----- 0 0 0 1 0
0 ----- 0 1 1 1 0
0 ----- 0 1 1 1 1
0 ----- 0 0 0 0 0
W
R
I
T
E
S
T
A
R
T
R
/
W
A
C
K
S
T
O
P
WORD
ADDRESS(n) DATA(n)
SDA
LINE
A
C
K
DATA(n+15)
A
C
K
SLAVE
ADDRESS
10 0 1P0 P1 P2 WA
7 D0 D7 D0
A
C
K
WA
0 1 100
Next command
tWR(maximum5ms)
Command is not accepted for this
period.
At STOP (stop bit)
write starts.
S
T
A
R
T
note)
Figure 37. Page write cycle(BR24S08/16-W)
Figure 38. Page write cycle(BR24S32/64/128/256-W)
W
R
I
T
E
S
T
A
R
T
R
/
W
A
C
K
S
T
O
P
1st W ORD
ADDRESS(n)
SDA
LINE
A
C
K
A
C
K
DATA(n+31)
A
C
K
SLAVE
ADDRESS
10 0
1A0 A1 A2 WA
14 D0
*1
DATA(n)
D0 D7
A
C
K
2nd WORD
ADDRESS(n)
WA
0
WA
13
WA
12
WA
11
*2
1 0 1 0
Next command
tWR(maximum : 5ms)
Command is not accepted for
this period.
At STO P (stop bit)
write starts.
S
T
A
R
T
note)
*1 As for WA12, BR24S32-W becomes Don't care.
As for WA13, BR24S32/64-W becomes Don't care.
As for WA14, BR24S32/64/128-W becomes Don't care.
*2 As for BR24S128/256-W becomes (n+63).
Increment
Datasheet
16/33
BR24Sxxx-W (8K 16K 32K 64K 128K 256K)
TSZ02201-0R2R0G100320-1-2
20.AUG.2012 Rev.001
©2012 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Read Command
Read cycle
Data of EEPROM is read. In read cycle, there are random read cycle and current read cycle.
Random read cycle is a command to read data by designating address, and is used generally.
Current read cycle is a command to read data of internal address register without designating address, and is used when
to verify just after write cycle. In both the read cycles, sequential read cycle is available, and the next address data can
be read in succession.
In random read cycle, data of designated word address can be read.
When the command just before current read cycle is random read cycle, current read cycle (each including sequential read
cycle), data of incremented last read address (n)-th address, i.e., data of the (n+1)-th address is output.
When ACK signal 'LOW' after D0 is detected, and stop condition is not sent from master (μ-COM) side, the next address
data can be read in succession.
Read cycle is ended by stop condition where 'H' is input to ACK signal after D0 and SDA signal is started at SCL signal 'H'.
When 'H' is not input to ACK signal after D0, sequential read gets in, and the next data is output.
Therefore, read command cycle cannot be ended. When to end read command cycle, be sure input stop condition to input
'H' to ACK signal after D0, and to start SDA at SCL signal 'H'.
Sequential read is ended by stop condition where 'H' is input to ACK signal after arbitrary D0 and SDA is started at SCL
signal 'H'.
Note)
Figure 43. Difference of slave address of each type
W
R
I
T
E
S
T
A
R
T
R
/
W
A
C
K
S
T
O
P
WORD
ADDRESS(n)
SDA
LINE
A
C
K
A
C
K
DATA(n)
A
C
K
SLAVE
ADDRESS
10 0 1 A0 A1 A2 WA
7 A0 D0
SLAVE
ADDRESS
10 0
1A1 A2
S
T
A
R
T
D7
R
/
W
R
E
A
D
WA
0
Note)
Figure 39. Random read cycle (BR24S08/16-W)
W
R
I
T
E
S
T
A
R
T
R
/
W
A
C
K
S
T
O
P
1st WORD
ADDRESS(n)
SDA
LINE
A
C
K
A
C
K
DATA(n)
A
C
K
SLAVE
ADDRESS
10 0
1A0 A1
A2 WA
14 D7 D0
2nd WORD
ADDRESS(n)
A
C
K
S
T
A
R
T
SLAVE
ADDRESS
100
1A2A1
R
/
W
R
E
A
D
A0
WA
0
Note) *1
WA
13
WA
12
WA
11
Figure 40. Random read cycle (BR24S32/64/128/256-W)
Figure 41. Current read cycle
S
T
A
R
T
S
T
O
P
SDA
LINE
A
C
K
DATA(n)
A
C
K
SLAVE
ADDRESS
10 0 1 A0 A1 A2 D0 D7
R
/
W
R
E
A
D
Note)
R
E
A
D
S
T
A
R
T
R
/
W
A
C
K
S
T
O
P
DATA(n)
SDA
LINE
A
C
K
A
C
K
DATA(n+x)
A
C
K
SLAVE
ADDRESS
10 0
1A0
A1
A2 D0 D7 D0 D7
Note
Figure 42. Sequential read cycle (in the case of current read cycle)
It is necessary to input 'H'
to the last ACK.
*1 As for WA12, BR24S32-W become Don't care.
As for WA13, BR24S32/64-W become Don't care.
As for WA14, BR24S32/64/128-W become Don't care.
It is necessary to input 'H'
to the last ACK.
10 0
1A0
A1
A2
*1 *2 *3
*1 BR24S16-W A2 becomes P2.
*2 BR24S08/16-W A1 becomes P1.
*3 BR24S08/16-W A0 becomes P0.
Datasheet SCLMTLMHU—u—LJ—Lf H "C |_ |_ SCmelsz H C A Save A Word A A addvess address www mhm.com ©2012 ROHM 00., Ltd, AH n ms reserved T822211! - 15-001 9 17/33
Datasheet
17/33
BR24Sxxx-W (8K 16K 32K 64K 128K 256K)
TSZ02201-0R2R0G100320-1-2
20.AUG.2012 Rev.001
©2012 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Software reset
Software reset is executed when to avoid malfunction after power on, and to reset during command input. Software reset
has several kinds, and 3 kids of them are shown in the figure below. (Refer to Figure 44(a), Figure 44 (b), Figure 44 (c).) In
dummy clock input area, release the SDA bus ('H' by pull up). In dummy clock area, ACK output and read data '0' (both 'L'
level) may be output from EEPROM, therefore, if 'H' is input forcibly, output may conflict and over current may flow, leading
to instantaneous power failure of system power source or influence upon devices.
Acknowledge polling
During internal write, all input commands are ignored, therefore ACK is not sent back. During internal automatic write
execution after write cycle input, next command (slave address) is sent, and if the first ACK signal sends back 'L', then it
means end of write action, while if it sends back 'H', it means now in writing. By use of acknowledge polling, next command
can be executed without waiting for tWR = 5ms.
When to write continuously, R/W = 0, when to carry out current read cycle after write, slave address R/W = 1 is sent, and if
ACK signal sends back 'L', then execute word address input and data so forth.
Figure 44-(b) The case of START+9 Dummy clock + START + command
Normal command
1 2 13
14
SCL Normal command
Dummy clock×14 Start×2
* Start command from START input.
Figure 44-(c) START × 9 + command input
SDA
Figure 44-(a) The case of 14 Dummy clock + START + START+ command input
Slave
address
Word
address
S
T
A
R
T
First write command
A
C
K
A
C
K
L
Slave Slave
dd
Slave
address Data
Write command
During internal write,
ACK = HIGH is sent back.
After completion of internal
write, ACK=LOW is sent back,
so input next word address and
data in succession.
tWR
tWR
Second write command
S
T
A
R
T
S
T
A
R
T
S
T
A
R
T
S
T
A
R
T
S
T
O
P
S
T
O
P
A
C
K
A
C
K
H
A
C
K
L
A
C
K
L
Figure 45. Case to continuously write by acknowledge polling
Normal command
SCL 2
1 89
Dummy clock×9 Start
Start
Normal command
SDA
Start×9
SCL 1 2 3 8 9
7
SDA
Normal command
Normal command
Datasheet
Datasheet
18/33
BR24Sxxx-W (8K 16K 32K 64K 128K 256K)
TSZ02201-0R2R0G100320-1-2
20.AUG.2012 Rev.001
©2012 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
WP valid timing (write cancel)
WP is usually fixed to 'H' or 'L', but when WP is used to cancel write cycle and so forth, pay attention to the following WP
valid timing. During write cycle execution, in cancel valid area, by setting WP='H', write cycle can be cancelled. In both byte
write cycle and page write cycle, the area from the first start condition of command to the rise of clock to taken in D0 of
data(in page write cycle, the first byte data) is cancel invalid area.
WP input in this area becomes Don't care. Set the setup time to rise of D0 taken 100ns or more. The area from the rise of
SCL to take in D0 to the end of internal automatic write (tWR) is cancel valid area. And, when it is set WP='H' during tWR,
write is ended forcibly, data of address under access is not guaranteed, therefore, write it once again.(Refer to Figure 46.)
After execution of forced end by WP standby status gets in, so there is no need to wait for tWR (5ms at maximum).
Command cancel by start condition and stop condition
During command input, by continuously inputting start condition and stop condition, command can be cancelled.
(Refer to Figure 47.)
However, in ACK output area and during data read, SDA bus may output 'L', and in this case, start condition and stop
condition cannot be input, so reset is not available. Therefore, execute software reset. And when command is cancelled by
start, stop condition, during random read cycle, sequential read cycle, or current read cycle, internal setting address is not
determined, therefore, it is not possible to carry out current read cycle in succession. When to carry out read cycle in
succession, carry out random read cycle.
Figure 47. Case of cancel by start, stop condition during slave address input
Figure 46. WP valid timing
Rise of D0 taken clock
SCL
D0 ACK
Enlarged view
SCL
SDA
Enlarged view
ACK
D0
Rise of SDA
SDA
WP
WP cancel invalid area
WP cancel valid area Write forced end
Data is not written. Data not guaranteed
Slave
address D7 D6 D5 D4 D3 D2 D1 D0 Data tWR
SDA D1
S
T
A
R
T
A
C
K
L
A
C
K
L
A
C
K
L
A
C
K
L
S
T
O
P
Word
address
SCL
SDA 1 1
0 0
Start condition
50W
Datasheet
19/33
BR24Sxxx-W (8K 16K 32K 64K 128K 256K)
TSZ02201-0R2R0G100320-1-2
20.AUG.2012 Rev.001
©2012 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
I/O peripheral circuit
Pull up resistance of SDA terminal
SDA is NMOS open drain, so requires pull up resistance. As for this resistance value (RPU), select an appropriate value to
this resistance value from microcontroller VIL, IL, and VOL-IOL characteristics of this IC. If RPU is large, action frequency is
limited. The smaller the RPU, the larger the consumption current at action.
Maximum value of RPU
The maximum value of RPU is determined by the following factors.
(1)SDA rise time to be determined by the capacitance (CBUS) of bus line of RPU and SDA should be tR or below.
And AC timing should be satisfied even when SDA rise time is late.
(2)The bus electric potential
A to be determined by input leak total (IL) of device connected to bus output of 'H' to SDA
bus and RPU should sufficiently secure the input 'H' level (VIH) of microcontroller and EEPROM including recommended
noise margin 0.2Vcc.
Vcc - ILRPU - 0.2Vcc V
IH
0.8VCC - VIH
R
PU IL
Ex.) When Vcc = 3V, IL=10μA, VIH = 0.7Vcc
from(2) 0.8×3 - 0.7×3
RPU 10×10-6
30 k
Minimum value of RPU
The minimum value of RPU is determined by the following factors.
(1)When IC outputs LOW, it should be satisfied that VOLMAX=0.4V
and IOLMAX=3mA.
VCC - VOL
R
PU IOL
VCC - VOL
RPU IOL
(2)VOLMAX =0.4V should secure the input 'L' level (VIL) of microcontroller and EEPROM including recommended noise margin 0.1Vcc.
VOLMAX V
IL-0.1 Vcc
Ex.) When Vcc= 3V, VOL0.4V, IOL=3mA, microcontroller, EEPROM VIL=0.3Vcc
from(1), 30.4
RPU 3×10
867
And VOL=0.4V
V
IL=0.3×3
=0.9V
Therefore, the condition (2) is satisfied.
Pull up resistance of SCL terminal
When SCL control is made at CMOS output port, there is no need, but in the case there is timing where SCL becomes
'Hi-Z', add a pull up resistance. As for the pull up resistance, one of several k to several ten k is recommended in
consideration of drive performance of output port of microcontroller.
A0, A1, A2, WP process
Process of device address terminals (A0,A1,A2)
Check whether the set device address coincides with device address input sent from the master side or not, and select
one among plural devices connected to a same bus. Connect this terminal to pull up or pull down, or Vcc or GND. And,
pins (Don't use PIN) not used as device address may be set to any of ‘H’, 'L', and 'Hi-Z'.
Types with Don't use PIN BR24S08F/FJ/FV/FVT/FVM/FVJ/NUX-W A0, A1
BR24S16F/FJ/FV/FVT/FVM/FVJ/NUX-W A0, A1, A2
Process of WP terminal
WP terminal is the terminal that prohibits and permits write in hardware manner. In 'H' status, only READ is available and
WRITE of all address is prohibited. In the case of 'L', both are available. In the case of use it as an ROM, it is
recommended to connect it to pull up or Vcc. In the case to use both READ and WRITE, control WP terminal or connect
it to pull down or GND.
Figure 48. I/O circuit diagram
RPU
A
BR24SXX
SDA terminal
IL IL
Microcontroller
Bus line
capacity
CBUS
Datasheet
20/33
BR24Sxxx-W (8K 16K 32K 64K 128K 256K)
TSZ02201-0R2R0G100320-1-2
20.AUG.2012 Rev.001
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TSZ2211115001
www.rohm.com
Cautions on microcontroller connection
Rs
In I2C BUS, it is recommended that SDA port is of open drain input/output. However, when to use CMOS input / output of
tri state to SDA port, insert a series resistance Rs between the pull up resistance Rpu and the SDA terminal of EEPROM.
This is controls over current that occurs when PMOS of the microcontroller and NMOS of EEPROM are turned ON
simultaneously. Rs also plays the role of protection of SDA terminal against surge. Therefore, even when SDA port is
open drain input/output, Rs can be used.
Maximum value of Rs
The maximum value of Rs is determined by following relations.
(1)SDA rise time to be determined by the capacity (CBUS) of bus line of Rpu and SDA shoulder be tR or below.
And AC timing should be satisfied even when SDA rise time is late.
(2)The bus electric potential
A to be determined by Rpu and Rs the moment when EEPROM outputs 'L' to SDA bus should
sufficiently secure the input 'L' level (VIL) of microcontroller including recommended noise margin 0.1Vcc.
Maximum value of Rs
The minimum value of Rs is determined by over current at bus collision. When over current flows, noises in power source
line, and instantaneous power failure of power source may occur. When allowable over current is defined as I, the
following relation must be satisfied. Determine the allowable current in consideration of impedance of power source line
in set and so forth. Set the over current to EEPROM 10mA or below.
(VCCVOL)×RS
R
PU+RS+VOL+0.1VCCVIL
VILVOL0.1VCC
RS1.1VCCVIL × RPU
ExampleWhen VCC=3V, VIL=0.3VCC, VOL=0.4V, RPU=20k
0.3×30.40.1×3
from(2), RS1.1×30.3×3 × 20×103
1.67k
VCC
RS I
VCC
RS I
ExampleWhen VCC=3V, I=10mA
3
RS 10×10-3
RPU
Microcontre
RS
EEPROM
Figure 50. Input/output collision timing
RPU
Microcontroller
RS
EEPROM
IOL
A
Bus line
capacity CBUS
VOL
VCC
VIL
Figure 51. I/O circuit
Microcontroller EEPROM
'L' output
R
S
R
PU
'H' output
Over current
Figure 52. I/O circuit diagram
Fi
g
ure 49. I/O circuit
ACK
'L' output of EEPROM
'H' output of microcontroller
Over current flows to SDA line by 'H' output
of microcontroller and 'L' output of
EEPROM.
SCL
SDA
300[Ω]
OlnpuUOutput (SDA) Figure 54. Inpui louipui .Noles on power ON At power on, in IC internal circuit and set, Voo rises th and maiiunotion may occur. To prevent this, functions observe the following condiiion ai power on. 1. Sel SDA : 'H‘ and SCL:'L' or 'H' 2. Stan power source so es lo saiisiy Ihe recomm 3. Sei SDA and SCL so as noi Io become 'Hi-Z’. When the above conditions 1 and 2 cannot be a) In the case when Ihe above conditions 1 o ~>Control SCL and SDA as shown below
Datasheet
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BR24Sxxx-W (8K 16K 32K 64K 128K 256K)
TSZ02201-0R2R0G100320-1-2
20.AUG.2012 Rev.001
©2012 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
I2C BUS input / output circuit
Input (A0, A1, A2, SCL, WP)
Input/Output (SDA)
Notes on power ON
At power on, in IC internal circuit and set, Vcc rises through unstable low voltage area, and IC inside is not completely reset,
and malfunction may occur. To prevent this, functions of POR circuit and LVCC circuit are equipped. To assure the action,
observe the following condition at power on.
1. Set SDA = 'H' and SCL ='L' or 'H'
2. Start power source so as to satisfy the recommended conditions of tR, tOFF, and Vbot for operating POR circuit.
3. Set SDA and SCL so as not to become 'Hi-Z'.
When the above conditions 1 and 2 cannot be observed, take the following countermeasures.
a) In the case when the above conditions 1 cannot be observed. When SDA becomes 'L' at power on.
Control SCL and SDA as shown below, to make SCL and SDA, 'H' and 'H'.
b) In the case when the above condition 2 cannot be observed.
After power source becomes stable, execute software reset(Page 17).
c) In the case when the above conditions 1 and 2 cannot be observed.
Recommended conditions of tR,tOFF,Vbot
tR tOFF Vbot
10ms or below 10ms or longer 0.3V or below
100ms or below 10ms or longer 0.2V or below
Figure 53. Input pin circuit diagram
Figure 54. Input /output pin circuit diagram
tOFF
tR
Vbot
0
VCC
Figure 55. Rise waveform diagram
tLOW
tSU:DATtDH
After Vcc becomes stable
SCL
V
CC
SDA
Figure 56.
When SCL= ' H '
and SDA='L'
tSU:DAT
After Vcc becomes stable
Figure 57.
When SCL= ' H '
and SDA= ' L '
Datasheet
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BR24Sxxx-W (8K 16K 32K 64K 128K 256K)
TSZ02201-0R2R0G100320-1-2
20.AUG.2012 Rev.001
©2012 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Low voltage malfunction prevention function
LVCC circuit prevents data rewrite action at low power, and prevents wrong write.
At LVCC voltage (Typ. =1.2V) or below, it prevent data rewrite.
Vcc noise countermeasures
Bypass capacitor
When noise or surge gets in the power source line, malfunction may occur, therefore, for removing these, it is
recommended to attach a by pass capacitor (0.1μF) between IC Vcc and GND. At that moment, attach it as close to IC
as possible.
And, it is also recommended to attach a bypass capacitor between board Vcc and GND.
Notes for Use
(1) Described numeric values and data are design representative values, and the values are not guaranteed.
(2) We believe that application circuit examples are recommendable, however, in actual use, confirm characteristics further
sufficiently. In the case of use by changing the fixed number of external parts, make your decision with sufficient margin
in consideration of static characteristics and transition characteristics and fluctuations of external parts and our LSI.
(3) Absolute maximum ratings
If the absolute maximum ratings such as impressed voltage and action temperature range and so forth are exceeded,
LSI may be destructed. Do not impress voltage and temperature exceeding the absolute maximum ratings. In the case of
fear exceeding the absolute maximum ratings, take physical safety countermeasures such as fuses, and see to it that
conditions exceeding the absolute maximum ratings should not be impressed to LSI.
(4) GND electric potential
Set the voltage of GND terminal lowest at any action condition. Make sure that each terminal voltage is lower than that of
GND terminal.
(5) Terminal design
In consideration of permissible loss in actual use condition, carry out heat design with sufficient margin.
(6) Terminal to terminal shortcircuit and wrong packaging
When to package LSI onto a board, pay sufficient attention to LSI direction and displacement. Wrong packaging may
destruct LSI. And in the case of shortcircuit between LSI terminals and terminals and power source, terminal and GND
owing to foreign matter, LSI may be destructed.
(7) Use in a strong electromagnetic field may cause malfunction, therefore, evaluate design sufficiently.
Status of this document
The Japanese version of this document is formal specification. A customer may use this translation version only for a reference
to help reading the formal version.
If there are any differences in translation version of this document formal version takes priority.
Datasheet
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BR24Sxxx-W (8K 16K 32K 64K 128K 256K)
TSZ02201-0R2R0G100320-1-2
20.AUG.2012 Rev.001
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TSZ2211115001
www.rohm.com
Ordering Information
Product Code Description
B R 2 4 S x x x x x x - W x x
BUS type
24I2C
Operating temperature/
Power source Voltage
-40 to+85/
1.7V to 5.5V
Capacity
08=8K 64=64K
16=16K 128=128K
32=32K 256=256K
Package
F :SOP8
FJ :SOP-J8
FV : SSOP-B8
FVT : TSSOP-B8
FVJ : TSSOP-B8J
FVM : MSOP8
NUX : VSON008X2030
Double Cell
Packaging and forming specification
E2 : Embossed tape and reel (SOP8,SOP-J8, SSOP-B8,TSSOP-B8, TSSOP-B8J)
TR : Embossed tape and reel (MSOP8, VSON008X2030)
HHHH HHHH 0.1 3333 O EEEE 3333 O EEEE 3333 O EEEE 3333 \EE 3333 . CECE 3333 C CECE 3333 DEE: \ 3333 OOOOOOOOOOOOOOOO . EEEE
Datasheet
24/33
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TSZ02201-0R2R0G100320-1-2
20.AUG.2012 Rev.001
©2012 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Physical Dimension Tape and Reel Information
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
2500pcs
E2
()
Direction of feed
Reel 1pin
(Unit : mm)
SOP8
0.9±0.15
0.3MIN
4
°
+
6
°
4
°
0.17 +0.1
-
0.05
0.595
6
43
8
2
5
1
7
5.0±0.2
6.2±0.3
4.4±0.2
(MAX 5.35 include BURR)
1.27
0.11
0.42±0.1
1.5±0.1
S
0.1 S
HQQQ Hfifi H 3333 O EEEE 3333 O EEEE 3333 O EEEE 3333 IEE 3315 O EEEE 3333 C EEEE 3333 DEE: \ 3333 OOOOOOOOOOOOOOOO C EEEE
Datasheet
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BR24Sxxx-W (8K 16K 32K 64K 128K 256K)
TSZ02201-0R2R0G100320-1-2
20.AUG.2012 Rev.001
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TSZ2211115001
www.rohm.com
Physical Dimension Tape and Reel Information - continued
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
2500pcs
E2
()
Direction of feed
Reel 1pin
(Unit : mm)
SOP-J8
4°+6°
4°
0.2±0.1
0.45MIN
234
5678
1
4.9±0.2
0.545
3.9±0.2
6.0±0.3
(MAX 5.25 include BURR)
0.42±0.1
1.27
0.175
1.375±0.1
0.1 S
S
Datasheet H n O LUE [ II I H O3M|N \ 0‘15i0‘1 (0‘52) Tape Embossed carrier tape Quantity 2500pcs Direction E2 . . . - of feed The direction IS the 1pm of product IS at ‘he up ( reel on the lelt hand and you puH out the ‘ape o J O O O O O O O O O O O O O O O O E. :I E. :I E. :I E. :I ¥. :I E. :I E. :I E. :I E :I E :I E :I E :I :I E :I E :I E :I E :I E :I E :I E a E :I E :I E :I E :I E :I E :I E :I E E :I E :I E :I E :I \—l _ \ \ 1pm —> Reel *Order quantity needs to be mul www mhrmmm ©2012 ROHM co , Ltd, An n m; reserved Tszzzm-m-nm 9 26/33
Datasheet
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TSZ02201-0R2R0G100320-1-2
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TSZ2211115001
www.rohm.com
Physical Dimension Tape and Reel Information - continued
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
2500pcs
E2
()
Direction of feed
Reel 1pin
(Unit : mm)
SSOP-B8
0.08
M
0.3MIN
0.65
(0.52)
3.0±0.2
0.15±0.1
(MAX 3.35 include BURR)
S
S
0.1
1234
5678
0.22
6.4±0.3
4.4±0.2
+0.06
0.04
0.1
1.15±0.1
J *Order quantity needs to be muhip‘e oi O O O O O O O O O O :0 :I :0 :I E. :I |:. :I I: :I I: :I I: :I :I I: :I I: :I I: :I I: :I I: :I I: :I I: :I I: :I I: y I: :I I: :I I: :I ‘—l Dire www mhm.com ©2012 ROHM CO , Ltd, AH ngh's reselved T5222111-15-0m 27/33
Datasheet
27/33
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TSZ02201-0R2R0G100320-1-2
20.AUG.2012 Rev.001
©2012 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Physical Dimension Tape and Reel Information - continued
Direction of feed
Reel
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
3000pcs
E2
()
1pin
(Unit : mm)
TSSOP-B8
0.08 S
0.08 M
4 ± 4
234
8765
1
1.0±0.05
1PIN MARK
0.525
0.245+0.05
0.04
0.65
0.145 +0.05
0.03
0.1±0.05
1.2MAX
3.0±0.1
4.4±0.1
6.4±0.2
0.5±0.15
1.0±0.2
(MAX 3.35 include BURR)
S
85 FF #9 *l I, E ] O O O O O O O O O O I: . :I I: . :I E . :I I: . :I I: . :I I: :I I: :I :I I: :I I: :I I: :I I: :I I: :I I: :I I: :I I: :I I: a I: :I I: :I I: :I ‘—l\ Dire \ —, Ree' *Order quantity needs to be muhip‘e oi www rohmme T @2012 ROHM Co , Ltd, AH ngms resevved 28/33 T5222111-15-0m
Datasheet
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BR24Sxxx-W (8K 16K 32K 64K 128K 256K)
TSZ02201-0R2R0G100320-1-2
20.AUG.2012 Rev.001
©2012 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Physical Dimension Tape and Reel Information - continued
Direction of feed
Reel
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed
The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
2500pcs
E2
()
1pin
(Unit : mm)
TSSOP-B8J
0.08 M
0.08 S
S
4 ± 4
(MAX 3.35 include BURR)
578
1234
6
3.0±0.1
1PIN MARK
0.95±0.2
0.65
4.9±0.2
3.0±0.1
0.45±0.15
0.85±0.05
0.145
0.1±0.05
0.32
0.525
1.1MAX
+0.05
0.03
+0.05
0.04
Datasheet HHHH 0 OK HH L 12 4 EH I 'n = W O O O O O O O O O O mmmm rum-In rum-Ir!r mmmm mmmm o o o o o uuuu LILILILI LILILILI uuuu uuuu \—l\ Direction of fe \ —> Ree' *Order quantity needs to be muhip‘e oi the mimmum www mhm.com 29/33 T52022t‘1210-0 ©2012 ROHM CO , Ltd, AH ngh's reselved TSZzzm-is-nm
Datasheet
29/33
BR24Sxxx-W (8K 16K 32K 64K 128K 256K)
TSZ02201-0R2R0G100320-1-2
20.AUG.2012 Rev.001
©2012 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Physical Dimension Tape and Reel Information - continued
Direction of feed
Reel
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed
The direction is the 1pin of product is at the upper right when you hold
reel on the left hand and you pull out the tape on the right hand
3000pcs
TR
()
1pin
(Unit : mm)
MSOP8
0.08 S
S
4.0±0.2
8
3
2.8±0.1
1
6
2.9±0.1
0.475
4
57
(MAX 3.25 include BURR)
2
1PIN MARK
0.9MAX
0.75±0.05
0.65
0.08±0.05
0.22 +0.05
0.04
0.6±0.2
0.29±0.15
0.145 +0.05
0.03
4°
+6°
4°
1P|N MARK .5 O. 5-- 0.5 w 2 o. o o. O o. o/ o. o o. o o. .\ o \/
Datasheet
30/33
BR24Sxxx-W (8K 16K 32K 64K 128K 256K)
TSZ02201-0R2R0G100320-1-2
20.AUG.2012 Rev.001
©2012 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Physical Dimension Tape and Reel Information - continued
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed
The direction is the 1pin of product is at the upper right when you hold
reel on the left hand and you pull out the tape on the right hand
4000pcs
TR
()
Direction of feed
Reel
1pin
(Unit : mm)
VSON008X2030
5
1
8
4
1.4±0.1
0.25
1.5±0.1
0.5
0.3±0.1
0.25 +0.05
0.04
C0.25
0.6MAX
(0.12)
0.02+0.03
0.02 3.0±0.1
2.0±0.1
1PIN MARK
0.08 S
S
BR24Sxxx-W (8K 16K 32K 64K 128K 256K) Datasheet .Marking Diagrams SOP8(TOF VIEW) SOP-J8(TOP VIEW) Parl Number Markmg Pan Number MarKrng K 4/ LOT Number LOT Number k k O<\><\ 1p|n="" mark="" 1ptn="" mark="" tssop-beuop="" view)="" pan="" number="" markrng="" pan="" number="" marking="" |:|“="" lot="" number="" lot="" number="" ck="" 0\="" 1p|n="" mark="" tpin="" mark="" tssop-bbj(top="" view)="" qpbuop="" view)="" ‘part="" number="" markrn="" pan="" number="" markrnq="" :i/="" t="" lot="" number="" :i/="" lot="" number="" :="" \=""><\ 1prn="" mark="" 1="" pin="" mark="" vsonoobxzobo="" (top="" view)="" parl="" number="" markrn="" |:|‘/;="" lot="" number="" 1prn="" mark="" www="" rehmom="" ©2012="" rohm="" 00.,="" ud,="" an="" rrgms="" reserved="" 31/33="" t902201‘0r2r05100320‘1'2="" tszzzm="" -="" 15-001="" 20.aug.2012="" rev.001="">
Datasheet
31/33
BR24Sxxx-W (8K 16K 32K 64K 128K 256K)
TSZ02201-0R2R0G100320-1-2
20.AUG.2012 Rev.001
©2012 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Marking Diagrams
Part Number Marking
SOP8(TOP VIEW)
LOT Number
1PIN MARK
SOP-J8(TOP VIEW)
Part Number Marking
LOT Number
1PIN MARK
TSSOP-B8J(TOP VIEW)
Part Number Marking
LOT Number
1PIN MARK
VSON008X2030 (TOP VIEW)
Part Number Marking
LOT Number
1PIN MARK
TSSOP-B8(TOP VIEW)
Part Number Marking
LOT Number
1PIN MARK
SSOP-B8(TOP VIEW)
Part Number Marking
LOT Number
1PIN MARK
MSOP8(TOP VIEW)
Part Number Marking
LOT Number
1PIN MARK
Datasheet
32/33
BR24Sxxx-W (8K 16K 32K 64K 128K 256K)
TSZ02201-0R2R0G100320-1-2
20.AUG.2012 Rev.001
©2012 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Marking Information
Capacity Product Name
Marking Package Type
S08 SOP8
S08 SOP-J8
S08 SSOP-B8
S08 TSSOP-B8
S08 TSSOP-B8J
S08 MSOP8
8K
S08 VSON008X2030
S16 SOP8
S16 SOP-J8
S16 SSOP-B8
S16 TSSOP-B8
S16 TSSOP-B8J
S16 MSOP8
16K
S16 VSON008X2030
S32 SOP8
S32 SOP-J8
S32 SSOP-B8
S32 TSSOP-B8
S32 TSSOP-B8J
S32 MSOP8
32K
S32 VSON008X2030
S64 SOP8
S64 SOP-J8
S64 SSOP-B8
S64 TSSOP-B8
S64 TSSOP-B8J
64K
S64 MSOP8
4S128 SOP8
4S128 SOP-J8
S128 SSOP-B8
128K
4S128 TSSOP-B8
4S256 SOP8
256K 4S256 SOP-J8
Datasheet
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BR24Sxxx-W (8K 16K 32K 64K 128K 256K)
TSZ02201-0R2R0G100320-1-2
20.AUG.2012 Rev.001
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TSZ2211115001
www.rohm.com
Revision History
Date Revision Changes
20.Aug.2012 001 New Release
Datasheet
Datasheet
Datasheet
Notice - GE Rev.002
© 2014 ROHM Co., Ltd. All rights reserved.
Notice
Precaution on using ROHM Products
1. Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1), transport
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN USA EU CHINA
CLASS CLASS CLASSb CLASS
CLASS CLASS
2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3. Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4. The Products are not subject to radiation-proof design.
5. Please verify and confirm characteristics of the final or mounted products in using the Products.
6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7. De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual
ambient temperature.
8. Confirm that operation temperature is within the specified range described in the product specification.
9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2. In principle, the reflow soldering method must be used; if flow soldering method is preferred, please consult with the
ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Datasheet
Datasheet
Datasheet
Notice - GE Rev.002
© 2014 ROHM Co., Ltd. All rights reserved.
Precautions Regarding Application Examples and External Circuits
1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2. You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
QR code printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since our Products might fall under controlled goods prescribed by the applicable foreign exchange and foreign trade act,
please consult with ROHM representative in case of export.
Precaution Regarding Intellectual Property Rights
1. All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data. ROHM shall not be in any way responsible or liable
for infringement of any intellectual property rights or other damages arising from use of such information or data.:
2. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the information contained in this document.
Other Precaution
1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4. The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
DatasheetDatasheet
Notice – WE Rev.001
© 2014 ROHM Co., Ltd. All rights reserved.
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3. The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or
concerning such information.

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