BR24G16FJ-3 Datasheet by Rohm Semiconductor

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ROHm L ssmKuNuucTnR ‘ BR24G16-3 OProducI structure Silicon monolithic integraled circull Compleiely conforming lo ihe world siandard IQC BUS, All comrols available by 2 pons of serial clock (SCL) and serial daia (SDA) Oiher devices ihan EEPROM can be connec1ed 1o ihe same pon, saving microconiroller pon 1,6V lo 5,5V Single Power Source Operaiion mosi suiiable for bailery use 1,6V lo 5,5V wide limii of operaiing voliage, possible FAST MODE 400kHz operaiion Up lo 16 Byte in Page Wriie Mode Bil Formal 2K x Bhii Self-iimed Programming Cycle Low Currem Consumpiion Prevemion of Wriie Misiake iv WP(Wriie Proiem) Function added iv Preveniion of Write Misiake 31 Low Voliage More ihan 1 million wriie cycles More ihan 40 years daia reieniion Noise filler buili in SCL/ SDA ierminal Iniiial delivery siaie FFh V $ 7 9 7 9‘9 9? 9 ‘0 o OThis produci h Figure 1. www rohm.com ©2013 ROHM CD , Ltd, All rights reserved TSZ22111-14-Om 1/36
Product structureSilicon monolithic integrated circuit This product has no designed protection against radioactive rays
1/36 TSZ02201-0R2R0G100200-1-2
6.Sep.2016 Rev.008
©2013 ROHM Co., Ltd. All rights reserved.
TSZ2211114001
www.rohm.com
Serial EEPROM Series Standard EEPROM
I2C BUS EEPROM (2-Wire)
BR24G16-3
General Description
BR24G16-3 is a 16Kbit serial EEPROM of I2C BUS Interface.
Features
Completely conforming to the world standard I2C
BUS.
All controls available by 2 ports of serial clock
(SCL) and serial data (SDA)
Other devices than EEPROM can be connected to
the same port, saving microcontroller port
1.6V to 5.5V Single Power Source Operation most
suitable for battery use
1.6V to 5.5V wide limit of operating voltage, possible
FAST MODE 400kHz operation
Up to 16 Byte in Page Write Mode
Bit Format 2K x 8bit
Self-timed Programming Cycle
Low Current Consumption
Prevention of Write Mistake
WP(Write Protect) Function added
Prevention of Write Mistake at Low Voltage
More than 1 million write cycles
More than 40 years data retention
Noise filter built in SCL / SDA terminal
Initial delivery state FFh
Packages W(Typ) x D(Typ) x H(Max)
Figure 1.
V
SON008X2030
2.00mm x 3.00mm x 0.60mm
TSSOP-B8
3.00mm x 6.40mm x 1.20mm
SOP8
5.00mm x 6.20mm x 1.71mm
DIP-T8
9.30mm x 6.50mm x 7.10mm
SOP- J8M
4.90mm x 6.00mm x 1.80mm TSSOP-B8J
3.00mm x 4.90mm x 1.10mm
MSOP8
2.90mm x 4.00mm x 0.90mm
SSOP-B8
3.00mm x 6.40mm x 1.35mm
SOP- J8
4.90mm x 6.00mm x 1.65mm
TSSOP-B8M
3.00mm x 6.40mm x 1.10mm
V
MMP008Z1830
1.85mm x 3.00mm x 0.40mm
Datashee
t
Junc‘ion Elec‘ros‘alic discharge V :5 5V,f :AOOKHZ,‘ R:5m5, V :5 5V,f :400kHZ V :5 5V, SDA SCL:V
Datasheet
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BR24G16-3
TSZ02201-0R2R0G100200-1-2
6.Sep.2016 Rev.008
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Absolute Maximum Ratings (Ta=25°C)
Parameter Symbol Rating Unit Remark
Supply Voltage VCC -0.3 to +6.5 V
Power Dissipation Pd
0.45 (SOP8)
W
Derate by 4.5mW/°C when operating above Ta=25°C
0.45 (SOP-J8M) Derate by 4.5mW/°C when operating above Ta=25°C
0.45 (SOP-J8) Derate by 4.5mW/°C when operating above Ta=25°C
0.30 (SSOP-B8) Derate by 3.0mW/°C when operating above Ta=25°C
0.33 (TSSOP-B8) Derate by 3.3mW/°C when operating above Ta=25°C
0.33 (TSSOP-B8M) Derate by 3.3mW/°C when operating above Ta=25°C
0.31 (TSSOP-B8J) Derate by 3.1mW/°C when operating above Ta=25°C
0.31 (MSOP8) Derate by 3.1mW/°C when operating above Ta=25°C
0.30 (VSON008X2030) Derate by 3.0mW/°C when operating above Ta=25°C
0.80 (DIP-T8) Derate by 8.0mW/°C when operating above Ta=25°C
0.21 (VMMP008Z1830) Derate by 2.1mW/°C when operating above Ta=25°C
Storage Temperature Tstg -65 to +150 °C
Operating Temperature Topr -40 to +85 °C
Input Voltage /
Output Voltage -0.3 to Vcc+1.0 V
The Max value of Input Voltage/Output Voltage is not over 6.5V.
When the pulse width is 50ns or less, the Min value of Input
Voltage/Output Voltage is not lower than -1.0V.
Junction
Temperature Tjmax 150 °C
Junction temperature at the storage condition
Electrostatic discharge
voltage
(human body model)
VESD -4000 to +4000 V
Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over the
absolute maximum ratings.
Memory Cell Characteristics (Ta=25°C, Vcc=1.6V to 5.5V)
Parameter Limit Unit
Min Typ Max
Write Cycles (Note1) 1,000,000 - - Times
Data Retention
(
Note1
)
40 - - Years
(Note1) Not 100% TESTED
Recommended Operating Ratings
Parameter Symbol Rating Unit
Power Source Voltage VCC 1.6 to 5.5 V
Input Voltage VIN 0 to Vcc
DC Characteristics
(
Unless otherwise specified, Ta=-40°C to +85°C
,
Vcc=1.6V to 5.5V
)
Parameter Symbol Limit Unit Conditions
Min Typ Max
Input High Voltage1 VIH1 0.7Vcc - Vcc+1.0 V 1.7VVcc5.5V
Input Low Voltage1 VIL1 -0.3(Note1) - +0.3Vcc V 1.7VVcc5.5V
Input High Voltage2 VIH2 0.8Vcc - Vcc+1.0 V 1.6VVcc1.7V
Input Low Voltage2 VIL2 -0.3(Note1) - +0.2Vcc V 1.6VVcc1.7V
Output Low Voltage1 VOL1 - - 0.4 V IOL=3.0mA, 2.5VVcc5.5V (SDA)
Output Low Voltage2 VOL2 - - 0.2 V IOL=0.7mA, 1.6VVcc2.5V (SDA)
Input Leakage Current ILI -1 - +1 µA VIN=0 to Vcc
Output Leakage Current ILO -1 - +1 µA VOUT=0 to Vcc (SDA)
Supply Current (Write) ICC1 - - 2.0 mA
Vcc=5.5V, fSCL=400kHz,
t
WR=5ms,
Byte write, Page write
Supply Current (Read) ICC2 - - 0.5 mA
Vcc=5.5V, fSCL=400kHz
Random read, current read, sequential read
Standby Current ISB - - 2.0 µA
Vcc=5.5V, SDASCL=Vcc
A0,A1,A2=GND,WP=GND
(Note1) When the pulse width is 50ns or less, it is -1.0V.
vifl) EXVM ievel o awe/u 7me e ievei u axvm/u 7W:c SCL Output timing r ,,J~ Figure 27(b). Sianrsmp Bii Timing Figure 2(a). Wriie Cycle Timing www mhm.com ©2013 ROHM Co , Lid, Ali rights reserved TSZ22111-15-001 “C, Vac isu we MGM WP DAIAm DATA v ‘ ‘ ‘ -su we 0N Figure 2(a). WP Timing a Execution m _J'\_/'\_/_\f\_f’\_/'\_/'\_/_\_f’\_/'\_/ mum 5m in )( on \AC _fl—
Datasheet
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BR24G16-3
TSZ02201-0R2R0G100200-1-2
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AC Characteristics
(Unless otherwise specified, Ta=-40°C to +85°C, Vcc=1.6V to 5.5V)
Parameter Symbol
Limit Unit
Min Typ Max
Clock Frequency fSCL - - 400 kHz
Data Clock High Period tHIGH 0.6 - - µs
Data Clock Low Period tLOW 1.2 - - µs
SDA, SCL (INPUT) Rise Time (Note1) t
R - - 1.0 µs
SDA, SCL (INPUT) Fall Time (Note1) t
F1 - - 1.0 µs
SDA (OUTPUT) Fall Time (Note1) t
F2 - - 0.3 µs
Start Condition Hold Time tHD:STA 0.6 - - µs
Start Condition Setup Time tSU:STA 0.6 - - µs
Input Data Hold Time tHD:DAT 0 - - ns
Input Data Setup Time tSU:DAT 100 - - ns
Output Data Delay Time tPD 0.1 - 0.9 µs
Output Data Hold Time tDH 0.1 - - µs
Stop Condition Setup Time tSU:STO 0.6 - - µs
Bus Free Time tBUF 1.2 - - µs
Write Cycle Time tWR - - 5 ms
Noise Spike Width (SDA and SCL) tI - - 0.1 µs
WP Hold Time tHD:WP 1.0 - - µs
WP Setup Time tSU:WP 0.1 - - µs
WP High Period tHIGH:WP 1.0 - - µs
(Note1) Not 100% TESTED.
Condition Input data level:VIL=0.2×Vcc VIH=0.8×Vcc
Input data timing reference level: 0.Vcc/0.7×Vcc
Output data timing reference level: 0.3×Vcc/0.7×Vcc
Rise/Fall time : 20ns
Serial Input / Output Timing
Input read at the rise edge of SCL
Data output in sync with the fall of SCL
Figure 2-(a). Serial Input / Output timing
Figure 2-(b). Start-Stop Bit Timing
Figure 2-(c). Write Cycle Timing
Figure 2-(d). WP Timing at Write Execution
Figure 2-(e). WP Timing at Write Cancel
SCL
SDA
(入力)
SDA
(出力)
tR tF1 tHIGH
tSU:DAT
tLOW tHD:DAT
tDH
tPD
tBUF
tHD:STA
70%
30%
70%
70%
30%
70% 70%
30% 30%
70% 70%
30%
70% 70%
70%
70%
30%
30%
30% 30%
tF2
(INPUT)
(OUTPUT)
DATA(1)
D0 ACK
D1
DATA(n)
ACK
tWR
30%
70%
STOP CONDITION
tHD:WP
tSU:WP
30%
70%
SCL
SDA
WP
DATA(1)
D0
D1 ACK
DATA(n)
ACK
tHIGH:WP
70% 70%
tWR
70%
SCL
SDA
WP
70% 70%
tSU:STA tHD:STA
START CONDITION
tSU:STO
STOP CONDI TION
30%
30%
70%
70%
SCL
SDA
D0 ACK
tWRwrite data
(n-th address) START CONDITIONSTOP CON DITION
70%
70%
SCL
SDA
Datasheet A Word Address Data A Register Register A Control CiI’CU i1 GND Figure 3 Block Diagram Pin Configuration (TOP ViEW) Au E0 a vet: BRQAGTBVS Pin Descriptions Ta??? (312%. Descriptions A0 , Don't usewme" A1 , Don't usewme" A2 , Don't usewme" GND , Reference voltage of all input / output, 0V SDA (mm Serial data input seriai data output SCL Input Serial clock input WP Input Write protect terminal VCC , Connect the power source (Natal) Pins not used as device address may be setto any ol‘H L" and 'HIVZ' h . gfiékgfiinmct, , m, Ali ”gm: reserved 4,36 T5202201-0R2Roe1oozoo-1-2 TSZZZ“"‘5'““‘ 6.Sep.2016 Rev.008
Datasheet
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BR24G16-3
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Block Diagram
Figure 3. Block Diagram
Pin Configuration
(TOP VIEW)
Pin Descriptions
Terminal
Name
Input/
Output Descriptions
A0 -
Don’t use(Note1)
A1 -
Don’t use(Note1)
A2 -
Don’t use(Note1)
GND -
Reference voltage of all input / output, 0V
SDA Input/
Output Serial data input serial data output
SCL Input
Serial clock input
WP Input
Write protect terminal
VCC -
Connect the power source
(Note1) Pins not used as device address may be set to any of ‘H’, 'L', and 'Hi-Z'.
16Kbit EEPROM array
11bit
2
5
6
VCC
SCL
GND
BR24G16-3
1
3
4
7
8
WP
SDA
A
2
A
1
A
0
8
7
6
5 4
3
2
1
SDA
SCL
WP
V CC
GND
A
2
A
1
A
0 16Kbit EEPROM arra
y
A
ddress
Decoder
Word
A
ddress
Register
Data
Register
Control Circuit
High Voltage
Generating Circuit
Power Source
Voltage Detection
8bit
A
CK
START
STOP
Datasheet
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Figure 6. Output Low Voltage1 vs Output Low Current
(Vcc=2.5V)
Figure 7. Output Low Voltage2 vs Output Low Current
(Vcc=1.6V)
Figure 4. Input High Voltage1,2 vs Supply Voltage
(SCL, SDA, WP)
Figure 5. Input Low Voltage1,2 vs Supply Voltage
(SCL, SDA, WP)
Typical Performance Curves
1PIN MARK
0
0.2
0.4
0.6
0.8
1
0123456
Output Low Current: I
OL
(mA)
Output Low Voltage1: V
OL1
(V)
SPEC
Ta=-40
Ta= 25
Ta= 85
0
0.2
0.4
0.6
0.8
1
0123456
Output Low Current: I
OL
(mA)
Output Low Voltage2: V
OL2
(V)
Ta=-40
Ta= 25
Ta= 85
SPEC
0
1
2
3
4
5
6
0123456
Supply Voltage: Vcc(V)
Input High Voltage: V
IH1
(V)
Ta=-40
Ta= 25
Ta= 85
SPEC
Input High Voltage1,2: VIH1,2(V)
0
1
2
3
4
5
6
0123456
Supply Voltage: Vcc(V)
Input Low Voltage: V
IL1
(V)
Ta=-40
Ta= 25
Ta= 85
SPEC
Input Low Voltage1,2: VIL1,2(V)
\\
Datasheet
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Figure 11. Suppl
y
Current (Read) vs Supply Voltage
(fSCL=400kHz)
Figure 8. Input Leakage Current vs Input Voltage
(SCL, WP)
Figure 9. Output Leakage Current vs Output Voltage
(SDA)
Figure 10. Suppl
y
Current (Write) vs Supply Voltage
(fSCL=400kHz)
Typical Performance Curvescontinued
0
0.2
0.4
0.6
0.8
1
1.2
0123456
Input Voltage: V
IN
(V)
Input Leakage Current: I
LI
(µA)
Ta=-40
Ta= 25
Ta= 85
SPEC
0
0.2
0.4
0.6
0.8
1
1.2
0123456
Output Voltage: V
OUT
(V)
Output Leakage Current: I
LO
(µA)
Ta=-40
Ta= 25
Ta= 85
SPEC
0
0.5
1
1.5
2
2.5
3
0123456
Su p p ly Volta g e: Vcc(V)
Supply Current (Write) : Icc1(mA)
Ta=-40
Ta= 25
Ta= 85
SPEC
0
0.1
0.2
0.3
0.4
0.5
0.6
0123456
Supply Voltage: Vcc(V)
Supply Current (Read) : I
CC2
(mA)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
S‘
Datasheet
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Figure 13. Clock Frequency vs Supply Voltage
Figure 14. Data Clock High Period vs Supply Voltage
Figure 12. S
t
andby Current vs Supply Voltage
Figure 15. Data Clock Low Period vs Supply Voltage
Typical Performance Curvescontinued
0.1
1
10
100
1000
10000
0123456
Supply Voltage: Vcc(V)
Clock Frequency: fscl(kHz)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
0
0.5
1
1.5
2
2.5
0123456
Supply Voltage: Vcc(V)
Standby Current: I
SB
(µA)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
0
0.2
0.4
0.6
0.8
1
0123456
Supply Voltage: Vcc(V)
Data Clock High Period : t
HIGH
(µs)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
0
0.3
0.6
0.9
1.2
1.5
0123456
Supply Voltage: Vcc(V)
Data Clock Low Period : t LOWs)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
Ip
Datasheet
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Figure 17. Start Condition Setup Time vs Supply Voltage
Figure 18. Input Data Hold Time vs Supply Voltage
(
HIGH
)
Figure 16. Start Condition Hold Time vs Supply Voltage
Figure 19. Input Data Hold Time vs Supply Voltage
(LOW)
Typical Performance Curvescontinued
0
0.2
0.4
0.6
0.8
1
0123456
Supply Voltage: Vcc(V)
Start Condition Hold Time: t
HD:STA
s)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
-0.2
0
0.2
0.4
0.6
0.8
1
0123456
Supply Voltage: Vcc(V)
Start Condition Setup Time: t
SU:STA
s)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
-200
-150
-100
-50
0
50
0123456
Supply Voltage Vcc(V)
Input Data Hold Time : t
HD:DAT
(ns)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
-200
-150
-100
-50
0
50
0123456
Supply Voltage: Vcc(V)
Input Data Hold Time : t
HD:DAT
(ns)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
‘3: ///
Datasheet
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Figure 23. Output Data Delay Time vs Supply Voltage
(HIGH)
Figure 21. Input Data Setup Time vs Supply Voltage
(LOW)
Figure 22. Output Data Delay Time vs Supply Voltage
(LOW)
Figure 20. Input Data Setup Time vs Supply Voltage
(HIGH)
Typical Performance Curvescontinued
-200
-100
0
100
200
300
0123456
Supply Voltage: Vcc(V)
Input Data Setup Time : t
SU:DAT
(ns)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
-200
-100
0
100
200
300
0123456
Supply Voltage: Vcc(V)
Input Data Setup Time : t
SU:DAT
(ns)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
0
0.5
1
1.5
2
0123456
Supply Voltage: Vcc(V)
Output Data Delay Time : t PD(µs)
SPEC
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
0
0.5
1
1.5
2
0123456
Su pp l y Vo l ta g e : Vcc(V)
Output Data Delay Time : t
PD
(µs)
SPEC
SPEC
Ta=-40
Ta= 25
Ta= 85
Datasheet
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TSZ02201-0R2R0G100200-1-2
6.Sep.2016 Rev.008
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TSZ2211115001
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Figure 24. Stop Condition Setup Time vs Supply Voltage
Figure 27. Noise Spike Width vs Supply Voltage
(SCL HIGH)
Figure 25. Bus Free Time vs Supply Voltage
Figure 26. Write Cycle Time vs Supply Voltage
Typical Performance Curvescontinued
-0.5
0
0.5
1
1.5
2
0123456
Supply Voltage: Vcc(V)
Stop Condition Setup Time: t
SU:STO
(µs)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
0
0.5
1
1.5
2
0123456
Su pp l y Vol ta g e : Vcc(V)
Bus Free Time : t
BUF
(µs)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
0
0.1
0.2
0.3
0.4
0.5
0.6
0123456
Supply Voltage: Vcc(V)
Noise Spike Width(SCL HIGH) : tI(µs)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
0
1
2
3
4
5
6
0123456
Supply Voltage : Vcc(V)
Write Cycle Time : t
WR
(ms)
Ta=-40
Ta= 25
Ta= 85
SPEC
Datasheet
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Figure 29. Noise Spike Width vs Supply Voltage
(SDA HIGH)
Figure 30. Noise Spike Width vs Supply Voltage
(SDA LOW)
Figure 31. WP Hold Time vs Supply Voltage
Figure 28. Noise Spike Width vs Supply Voltage
(SCL LOW)
Typical Performance Curvescontinued
0
0.1
0.2
0.3
0.4
0.5
0.6
0123456
Supply Voltage: Vcc(V)
Noise Spike Width(SCL LOW: tI(µs)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
0
0.1
0.2
0.3
0.4
0.5
0.6
0123456
Supply Voltage: Vcc(V)
Noise Spike Width(SDA LOW) : tIs)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
0
0.2
0.4
0.6
0.8
1
1.2
0123456
Supply Voltage: Vcc(V)
WP Hold Time : t HD:WPs)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
0
0.1
0.2
0.3
0.4
0.5
0.6
0123456
Supply Voltage: Vcc(V)
Noise Spike Width(SDA HIGH) : tIs)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
Datasheet
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Figure 32. WP Setup Time vs Supply Voltage Figure 33. WP High Period vs Supply Voltage
Typical Performance Curvescontinued
-0.6
-0.5
-0.4
-0.3
-0.2
-0.1
0
0.1
0.2
0123456
Supply Voltage: Vcc(V)
WP Setup Time : t
SU:WP
s)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
0
0.2
0.4
0.6
0.8
1
1.2
0123456
Supply Voltage: Vcc(V)
WP High Period : t
HIGH:WP
(µs)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
Datasheet
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Timing Chart
1. I2C BUS Data Communication
I2C BUS data communication starts by start condition input, and ends by stop condition input. Data is always 8bit long,
and acknowledge is always required after each byte. I2C BUS data communication with several devices is possible by
connecting with 2 communication lines: serial data (SDA) and serial clock (SCL).
Among the devices, there should be a “master” that generates clock and control communication start and end. The
rest become “slave” which are controlled by an address peculiar to each device, like this EEPROM. The device that
outputs data to the bus during data communication is called “transmitter”, and the device that receives data is called
“receiver”.
2. Start Condition (Start Bit Recognition)
(1) Before executing each command, start condition (start bit) where SDA goes from 'HIGH' down to 'LOW' when
SCL is 'HIGH' is necessary.
(2) This IC always detects whether SDA and SCL are in start condition (start bit) or not, therefore, unless this
condition is satisfied, any command cannot be executed.
3. Stop Condition (Stop Bit Recognition)
(1) Each command can be ended by a stop condition (stop bit) where SDA goes from 'LOW' to 'HIGH' while SCL is
'HIGH'.
4. Acknowledge (ACK) Signal
(1) This acknowledge (ACK) signal is a software rule to show whether data transfer has been made normally or not.
In master-slave communication, the device (Ex. µ-COM sends slave address input for write or read command to
this IC) at the transmitter (sending) side releases the bus after output of 8bit data.
(2) The device (Ex. This IC receives the slave address input for write or read command from the µ-COM) at the
receiver (receiving) side sets SDA 'LOW' during 9th clock cycle, and outputs acknowledge signal (ACK signal)
showing that it has received the 8bit data.
(3) This IC, after recognizing start condition and slave address (8bit), outputs acknowledge signal (ACK signal)
'LOW'.
(4) After receiving 8bit data (word address and write data) during each write operation, this IC outputs acknowledge
signal (ACK signal) ‘LOW’.
(5) During read operation, this IC outputs 8bit data (read data) and detects acknowledge signal (ACK signal) 'LOW'.
When acknowledge signal (ACK signal) is detected, and stop condition is not sent from the master (µ-COM)
side, this IC continues to output data. When acknowledge signal (ACK signal) is not detected, this IC stops data
transfer, recognizes stop condition (stop bit), and ends read operation. Then this IC becomes ready for another
transmission.
5. Device Addressing
(1) Slave address comes after start condition from master.
(2) The significant 4 bits of slave address are used for recognizing a device type.
The device code of this IC is fixed to '1010'.
(3) The most insignificant bit ( W/R --- READ/ WRITE ) of slave address is used for designating write or read
operation, and is as shown below.
Setting W/R to 0 ------- write (setting 0 to word address setting of random read)
Setting W/R to 1 ------- read
Slave address Maximum number of
Connected buses
1 0 1 0 P2 P1 P0 R/W
――
1
P0 to P2 are page select bits.
89 89 89
S P
condition condition
ACK STOPACKDATA DATAADDRES
S
START R/W ACK
1-7
SDA
SCL 1-7 1-7
Figure 34. Data Transfer Timing
SLAVE wean ADDRESS Auoasss i i iiiiiii iiiiiii 0 WA WA 3. Write Protect (WP) Terminal Write Protect (WP) Function When WP terminal is set at Vcc (H le data rewrite of all address is enabled. level. Do not leave it open in case of using it as ROM, it is reco ONIOFF‘ by setting the WP termmai ‘H w mhm.com ©2013 ROHM Co , Ltd, Ali rights reserved Tszzzm - 15-001
Datasheet
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BR24G16-3
TSZ02201-0R2R0G100200-1-2
6.Sep.2016 Rev.008
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TSZ2211115001
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Write Command
1. Write Cycle
(1) Arbitrary data can be written to this EEPROM. When writing only 1 byte, Byte Write is normally used, and when
writing continuous data of 2 bytes or more, simultaneous write is possible by Page Write cycle. Up to 16 arbitrary
bytes can be written.
(2) During internal write execution, all input commands are ignored, therefore ACK is not returned.
(3) Data is written to the address designated by word address (n-th address)
(4) By issuing stop bit after 8bit data input, internal write to memory cell starts.
(5) When internal write is started, command is not accepted for tWR (5ms at maximum).
(6) Using page write cycle, writing in bulk is done as follows: When data of more than 16 Bytes is sent, the bytes in
excess overwrite the data already sent first.
(Refer to "Internal Address Increment".)
(7) As for page write cycle of BR24G16-3, where 2 or more bytes of data is intended to be written, after the page
select bits ‘P0’, ‘P1’, and ‘P2’ of slave address are designated arbitrarily, only the value of 4 least significant bits
in the address is incremented internally, so that data up to 16 bytes of memory only can be written.
1 page=16 Bytes, but the page write cycle time is 5ms at maximum for 16 Byte bulk write.
It does not stand 5ms at maximum x 16 Byte=80ms (max).
2. Internal Address Increment
Page write mode (in the case of BR24G16-3)
3. Write Protect (WP) Terminal
Write Protect (WP) Function
When WP terminal is set at Vcc (H level), data rewrite of all addresses is prohibited. When it is set GND (L level),
data rewrite of all address is enabled. Be sure to connect this terminal to Vcc or GND, or control it to H level or L
level. Do not leave it open.
In case of using it as ROM, it is recommended to connect it to pull up or Vcc. At extremely low voltage at power
ON/OFF, by setting the WP terminal ‘H’, write error can be prevented.
P1 P2 W
A
7 D7 1 1 0 0
W
R
I
T
E
S
T
A
R
T
R
/
W
S
T
O
P
WORD
ADDRESS DATA
SLAVE
ADDRESS
P0 W
A
0 D0
A
C
K
SDA
LINE
A
C
K
A
C
K
Figure 35. Byte Write Cycle
Figure 36. Page Write Cycle
For example, when it is started from address 0Eh,
then, increment is made as below,
0Eh0Fh00h01h・・・ please take note.
0Eh・・・0E in hexadecimal, therefore,
00001110 becomes a binary number.
WA7 WA4 WA3 WA2 WA1 WA0
0 00000
0 00001
0 00010
0 01110
0 01111
0 00000
Increment
0Eh
Significant bit is fixed.
No digit up
W
R
I
T
E
S
T
A
R
T
R
/
W
A
C
K
S
T
O
P
WORD
ADDRESS(n)
DATA(n)
SDA
LINE
A
C
K
A
C
K
DATA(n+15)
A
C
K
SLAVE
ADDRESS
1
0
0
1
P0
P1
P2 W
A
7
D0
D7 D0
W
A
0
«mpam Ambam R ‘ “““‘ ‘ \\\\\H R R L L w w R RA JC w H ‘1 \ \xxxwx \ xxx \xx\ \wxxwx A A A Sm
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Read Command
1. Read Cycle
Read cycle is when data of EEPROM is read. Read cycle could be random read cycle or current read cycle. Random
read cycle is a command to read data by designating a specific address, and is used generally. Current read cycle is a
command to read data of internal address register without designating an address, and is used when to verify just after
write cycle. In both the read cycles, sequential read cycle is available where the next address data can be read in
succession.
(1) In random read cycle, data of designated word address can be read.
(2) When the command just before current read cycle is random read cycle, current read cycle (each including
sequential read cycle), data of incremented last read address (n)-th, i.e., data of the (n+1)-th address is output.
(3) When ACK signal 'LOW' after D0 is detected, and stop condition is not sent from master (µ-COM) side, the next
address data can be read in succession.
(4) Read cycle is ended by stop condition where 'H' is input to ACK signal after D0 and SDA signal goes from ‘L’ to
‘H’ while SCL signal is 'H'.
(5) When 'H' is not input to ACK signal after D0, sequential read gets in, and the next data is output.
Therefore, read command cycle cannot be ended. To end read command cycle, be sure to input 'H' to ACK
signal after D0, and the stop condition where SDA goes from ‘L’ to ‘H’ while SCL signal is 'H'.
(6) Sequential read is ended by stop condition where 'H' is input to ACK signal after arbitrary D0 and SDA is
asserted from ‘L to ‘H’ while SCL signal is 'H'.
Figure 37. Random Read Cycle
Figure 38. Current Read Cycle
Figure 39. Sequential Read Cycle (in the case of Current Read Cycle)
W
R
I
T
E
S
T
A
R
T
R
/
W
A
C
K
S
T
O
P
WORD
ADDRESS(n)
SDA
LINE
A
C
K
A
C
K
DATA(n)
A
C
K
SLAVE
ADDRESS
10 0 1 P0 P1 P2 WA
7 A0 D0
SLAVE
ADDRESS
10 0 1A1 A2
S
T
A
R
T
D7
R
/
W
R
E
A
D
WA
0
S
T
A
R
T
S
T
O
P
SDA
LINE
A
C
K
DATA(n)
A
C
K
SLAVE
ADDRESS
10 0 1 P0 P1 P2 D0 D7
R
/
W
R
E
A
D
R
E
A
D
S
T
A
R
T
R
/
W
A
C
K
S
T
O
P
DATA
(
n
)
SDA
LINE
A
C
K
A
C
K
DATA
(
n+x
)
A
C
K
SLAVE
ADDRESS
10 0
1P0 P1 P2 D0 D7 D0 D7
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Software Reset
Software reset is executed to avoid malfunction after power ON, and during command input. Software reset has several
kinds, and 3 kinds of them are shown in the figure below. (Refer to Figure 40-(a), Figure 40-(b), Figure 40-(c).) Within the
dummy clock input area, the SDA bus is released ('H' by pull up) and ACK output and read data '0' (both 'L' level) may be
output from EEPROM. Therefore, if 'H' is input forcibly, output may conflict and over current may flow, leading to
instantaneous power failure of system power source or influence upon devices.
Acknowledge Polling
During internal write execution, all input commands are ignored, therefore ACK is not returned. During internal automatic
write execution after write cycle input, next command (slave address) is sent. If the first ACK signal sends back 'L', then it
means end of write operation, else 'H' is returned, which means writing is still in progress. By the use of acknowledge
polling, next command can be executed without waiting for tWR = 5ms.
To write continuously, W/R = 0, then to carry out current read cycle after write, slave address with W/R = 1 is sent, and
if ACK signal sends back 'L', then execute word address input and data output and so forth.
1 2 13 14
SCL
Dummy clock×14 Start×2
SCL
Figure 40-(a). The case of dummy clock×14 + START+START+ command input
Start normal command from START input.
2 1 8 9
Dummy clock×9 Start
Figure 40-(b). The case of START + dummy clock×9 + START + command input
Start
Normal command
Normal command
Normal command
Normal command
Start×9
SDA
SDA
SCL 1 2 3 8 9 7
Figure 40-(c). START×9 + command input
Normal command
Normal command
SDA
Slave
address
Word
address
S
T
A
R
T
First write command
A
C
K
H
A
C
K
L
Slave
address
Slave
address
Slave
address Data
Write command
During internal write,
ACK = HIGH is returned.
After completion of internal write,
ACK=LOW is returned, so input next
word address and data in succession.
tWR
tWR
Second write command
S
T
A
R
T
S
T
A
R
T
S
T
A
R
T
S
T
A
R
T
S
T
O
P
S
T
O
P
A
C
K
H
A
C
K
H
A
C
K
L
A
C
K
L
Figure 41. Case of Continuous Write by Acknowledge Polling
‘E
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WP Valid Timing (Write Cancel)
WP is usually fixed to 'H' or 'L', but when WP is used to cancel write cycle and so on, pay attention to the following WP valid
timing. During write cycle execution, inside cancel valid area, by setting WP='H', write cycle can be cancelled. In both byte
write cycle and page write cycle, the area from the first start condition of command to the rise of clock to take in D0 of
data(in page write cycle, the first byte data) is the cancel invalid area.
WP input in this area becomes ‘Don't care’. The area from the rise of SCL to take in D0 to the stop condition input is the
cancel valid area. Furthermore, after the execution of forced end by WP, the IC enters standby status.
Command Cancel by Start Condition and Stop Condition
During command input, by continuously inputting start condition and stop condition, command can be cancelled. (Figure
43.) However, within ACK output area and during data read, SDA bus may output 'L'. In this case, start condition and stop
condition cannot be input, so reset is not available. Therefore, execute software reset. When command is cancelled by
start-stop condition during random read cycle, sequential read cycle, or current read cycle, internal setting address is not
determined. Therefore, it is not possible to carry out current read cycle in succession. To carry out read cycle in succession,
carry out random read cycle.
Rise of D0 taken clock
SCL
D0 ACK
Enlarged view
SCL
SDA ACK D0
Rise of SDA
SDA
WP
WP cancel invalid area WP cancel valid area
Data is not written.
Figure 42. WP Valid Timing
Slave
Address
D7 D6 D5 D4 D3 D2 D1 D0 Data
tWR
SDA D1
S
T
A
R
T
A
C
K
L
A
C
K
L
A
C
K
L
A
C
K
L
S
T
O
P
Word
Address
Figure 43. Case of cancel by start, stop condition during slave address input
SCL
SDA 1 1 0 0
Start condition Stop condition
Enlarged view
WP cancel invalid area
5%”
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I/O Peripheral Circuit
1. Pull-Up Resistance of SDA Terminal
SDA is NMOS open drain, so it requires a pull up resistor. As for this resistor value (RPU), select an appropriate value
from microcontroller VIL, IL, and VOL-IOL characteristics of this IC. If RPU is large, operating frequency is limited. The
smaller the RPU, the larger is the supply current (Read).
2. Maximum Value of RPU
The maximum value of RPU is determined by the following factors:
(1)SDA rise time to be determined by the capacitance (CBUS) of bus line and RPU of SDA should be tR or lower.
Furthermore, AC timing should be satisfied even when SDA rise time is slow.
(2)The bus’ electric potential
A to be determined by the input current leak total (IL) of the device connected to the bus
with output of 'H' to the SDA line and RPU should sufficiently secure the input 'H' level (VIH) of microcontroller and
EEPROM including recommended noise margin of 0.2Vcc.
VCCILRPU0.2 VCC V
IH
Ex.) Vcc =3V IL=10µA VIH=0.7 Vcc
From(2)
30 [k]
3. Minimum Value of RPU
The minimum value of RPU is determined by the following factors.
(1) When IC outputs LOW, it should be satisfied that VOLMAX=0.4V and IOLMAX=3mA.
(2) VOLMAX=0.4V should secure the input 'L' level (VIL) of microcontroller and EEPROM including recommended noise
margin 0.1Vcc.
VOLMAX V
IL0.1 VCC
Ex.) VCC =3V, VOL=0.4V, IOL=3mA, microcontroller, EEPROM VIL=0.3Vcc
from (1)
867 []
And V
OL=0.4 [V]
V
IL=0.3×3
=0.9 [V]
Therefore, the condition (2) is satisfied.
4. Pull-Up Resistance of SCL Terminal
When SCL control is made at the CMOS output port, there is no need for a pull up resistor. But when there is a time
where SCL becomes 'Hi-Z', add a pull up resistor. As for the pull up resistor value, one of several k to several ten k is
recommended in consideration of drive performance of output port of microcontroller.
Figure 44. I/O Circuit Diagram
Microcontroller
RPU
A SDA terminal
IL IL
Bus line
capacitance
CBUS
BR24GXX
R
PU 0.8VccVIH
IL
RPU 0.8×30.7×3
10×10-6
R
PU
VccVOL
RP
U
IOL
VccVOL
IOL
RPU 30.4
3×103
EEF’ROM K Van Vcl: Vm
Datasheet
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Cautions on Microcontroller Connection
1. RS
In I2C BUS, it is recommended that SDA port is of open drain input/output. However, when using CMOS input / output of
tri state to SDA port, insert a series resistance RS between the pull up resistor RPU and the SDA terminal of EEPROM.
This is to control over current that may occur when PMOS of the microcontroller and NMOS of EEPROM are turned ON
simultaneously. RS also plays the role of protecting the SDA terminal against surge. Therefore, even when SDA port is
open drain input/output, RS can be used.
2. Maximum Value of Rs
The maximum value of RS is determined by the following relations:
(1) SDA rise time to be determined by the capacitance (CBUS) of bus line and RPU of SDA should be tR or lower.
Furthermore, AC timing should be satisfied even when SDA rise time is slow.
(2) The bus’ electric potential
A to be determined by RPU and RS the moment when EEPROM outputs 'L' to SDA bus
should sufficiently secure the input 'L' level (VIL) of microcontroller including recommended noise margin of 0.1Vcc.
Ex)VCC=3V VIL=0.3VCC VOL=0.4V RPU=20k
3. Minimum Value of Rs
The minimum value of Rs is determined by over current at bus collision. When over current flows, noises in power source
line and instantaneous power failure of power source may occur. When allowable over current is defined as I, the
following relation must be satisfied. Determine the allowable current in consideration of the impedance of power source
line in set and so forth. Set the over current to EEPROM at 10mA or lower.
EX) VCC=3V I=10mA
(VccVOL)×RS
RPU+RS
RPU
Microcontroller
RS
EEPROM
Figure 45. I/O Circuit Diagram Figure 46. Input / Output Collision Timing
A
CK
'L' output of EEPROM
'H' output of microcontroller
Over current flows to SDA line by 'H'
output of microcontroller and 'L'
output of EEPROM.
SCL
SDA
Microcontroller EEPROM
'L'output
R
S
R
PU
'H' output
Over current I
Figure 48. I/O Circuit Diagram
Figure 47. I/O Circuit Diagram
R
PU
Micro controller
RS
EEP RO
M
IOL
A
Bus lin e
capacitance
CBU
S
VOL
VCC
VIL
+VOL+0.1VccVIL
R
S ×RPU
VILVOL0.1Vcc
1.1VccVIL
1.67 [k]
RS 0.3×30.40.1×3
1.1×30.3×3 ×20×103
RS 3
10×103
300 []
Vcc
RS I
R
S Vcc
I
BR24G1B-3 l/O Equivalence Circuit 1. Input (SOL, WP) 2. Input / Output (SDA) www mhm.com ©2013 ROHM CO , Lid, Ali rights rese TSZZZHi-iS-Dm
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I/O Equivalence Circuit
1. Input (SCL, WP)
2. Input / Output (SDA)
Figure 49. Input Pin Circuit Diagram
Figure 50. Input / Output Pin Circuit Diagram
Datasheet
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Power-Up/Down Conditions
At power on, the IC’s internal circuits may go through unstable low voltage area as the Vcc rises, making the IC’s internal
logic circuit not completely reset, hence, malfunction may occur. To prevent this, the IC is equipped with POR circuit and
LVCC circuit. To assure the operation, observe the following conditions at power ON.
1. Set SDA = 'H' and SCL ='L' or 'H’
2. Start power source so as to satisfy the recommended conditions of tR, tOFF, and Vbot for operating POR circuit.
tOFF
tR
Vbot
0
VCC
3. Set SDA and SCL so as not to become 'Hi-Z'.
When the above conditions 1 and 2 cannot be observed, take the following countermeasures.
(1) In the case when the above condition 1 cannot be observed such that SDA becomes 'L' at power ON .
Control SCL and SDA as shown below, to make SCL and SDA, 'H' and 'H'.
(2) In the case when the above condition 2 cannot be observed.
After power source becomes stable, execute software reset(Page 16).
(3) In the case when the above conditions 1 and 2 cannot be observed.
Carry out (1), and then carry out (2).
Low Voltage Malfunction Prevention Function
LVCC circuit prevents data rewrite operation at low power, and prevents write error. At LVCC voltage (Typ=1.2V) or below,
data rewrite is prevented.
Noise Countermeasures
1. Bypass Capacitor
When noise or surge gets in the power source line, malfunction may occur, therefore, it is recommended to connect a
bypass capacitor (0.1µF) between the IC’s VCC and GND pins. Connect the capacitor as close to the IC as possible. In
addition, it is also recommended to connect a bypass capacitor between board’s VCC and GND.
Recommended conditions of tR, tOFF,Vbot
tR t
OFF V
bot
10ms or below 10ms or larger 0.3V or below
100ms or below 10ms or larger 0.2V or below
Figure 51. Rise Waveform Diagram
Figure 52. When SCL= 'H' and SDA= 'L' Figure 53. When SCL='L' and SDA='L'
tLOW
tSU:DAT
tDH
A
fter Vcc becomes stable
SCL
VCC
SDA
tSU:DAT
A
fter Vcc becomes stable
Vcc
SCL
SDA
Datasheet
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Operational Notes
1. Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power
supply pins.
2. Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at
all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic
capacitors.
3. Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4. Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5. Thermal Consideration
Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may
result in deterioration of the properties of the chip. In case of exceeding this absolute maximum rating, increase the
board size and copper area to prevent exceeding the maximum junction temperature rating.
6. Recommended Operating Conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately
obtained. The electrical characteristics are guaranteed under the conditions of each parameter.
7. Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may
flow instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power
supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring,
and routing of connections.
8. Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
9. Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may
subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply
should always be turned off completely before connecting or removing it from the test setup during the inspection
process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during
transport and storage.
10. Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment)
and unintentional solder bridge deposited in between pins during assembly to name a few.
11. Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and
cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the
power supply or ground line.
12. Regarding the Input Pin of the IC
In the construction of this IC, P-N junctions are inevitably formed creating parasitic diodes or transistors. The
operation of these parasitic elements can result in mutual interference among circuits, operational faults, or physical
damage. Therefore, conditions which cause these parasitic elements to operate, such as applying a voltage to an
input pin lower than the ground voltage should be avoided. Furthermore, do not apply a voltage to the input pins
when no power supply voltage is applied to the IC. Even if the power supply voltage is applied, make sure that the
input pins have voltages within the values specified in the electrical characteristics of this IC.
Datasheet
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©2013 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Part Numbering
B R 2 4 G 1 6 x x x - 3 x x x x x
Lineup
Capacity Package Orderable Part Number Remark
Type Quantity
16Kbit
DIP-T8 Tube of 2000 BR24G16 -3 Not Halogen free 100% Sn
SOP8 Reel of 2500 BR24G16F -3GTE2 Halogen free 100% Sn
SOP-J8M Reel of 2500 BR24G16FJ -3NE2 Halogen free 100% Sn
SOP-J8 Reel of 2500 BR24G16FJ -3GTE2 Halogen free 100% Sn
SSOP-B8 Reel of 2500 BR24G16FV -3GTE2 Halogen free 100% Sn
TSSOP-B8 Reel of 3000 BR24G16FVT -3GE2 Halogen free 100% Sn
TSSOP-B8M Reel of 3000 BR24G16FVT -3NE2 Halogen free 100% Sn
TSSOP-B8J Reel of 2500 BR24G16FVJ -3GTE2 Halogen free 100% Sn
MSOP8 Reel of 3000 BR24G16FVM -3GTTR Halogen free 100% Sn
VSON008X2030 Reel of 4000 BR24G16NUX -3TTR Halogen free 100% Sn
VMMP008Z1830 Reel of 4000 BR24G16QUZ -3TR Halogen free Ni/Pd/Au
BUS type
24I2C
Operating temperature/
Operating Voltage
-40°C to +85°C / 1.6V to 5.5V
Process Code
Packaging and Forming Specification
E2 : Embossed tape and reel
(SOP8, SOP-J8M, SOP-J8, SSOP-B8, TSSOP-B8, TSSOP-B8M, TSSOP-B8J)
TR : Embossed tape and reel
(MSOP8, VSON008X2030, VMMP008Z1830)
None : Tube
(DIP-T8)
16=16Kbit
Capacity
As an exception, SOP-J8M, TSSOP-B8M, VSON008X2030, VMMP008Z1830
package will be Halogen free with “Blank”
G : Halogen free
Blank : Not Halogen free
T : 100% Sn
Blank : 100% Sn
As an exception, VMMP008Z1830 will be coated by Ni/Pd/Au
N : SOP-J8M, TSSOP-B8M
Blank : DIP-T8, SOP8, SOP-J8, SSOP-B8, TSSOP-B8,
TSSOP-B8J, MSOP8, VSON008X2030, VMMP008Z1830
Package
Blank
F
FV
FVJ
NUX
: DIP-T8
: SOP8
: SSOP-B8
: TSSOP-B8J
: VSON008X2030
FJ
FVT
FVM
QUZ
: SOP-J8M/SOP-J8
: TSSOP-B8/TSSOP-B8M
: MSOP8
: VMMP008Z1830
‘3 2:0‘ 2 3'410 3 0' ~15‘ (UNIT‘mm) PGK‘DIPrTB Dxawxng Nu Exsnzrsonx on ta ne Qny D\ 2: on a! tee
Datasheet
24/36
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TSZ02201-0R2R0G100200-1-2
6.Sep.2016 Rev.008
©2013 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Physical Dimension, Tape and Reel Information
Package Name DIP-T8
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
TubeContainer
Quantity
Direction of feed
2000pcs
Direction of products is fixed in a container tube
.cLo ma oflm .o t m2» 2:3. .2 1 27 :.o ? fififlfiflfififi OOOOOOOOOOOOOOOO 2/
Datasheet
25/36
BR24G16-3
TSZ02201-0R2R0G100200-1-2
6.Sep.2016 Rev.008
©2013 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Physical Dimension, Tape and Reel Information
Package Name SOP8
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed
The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
2500pcs
E2
()
Direction of feed
Reel 1pin
(UNIT : mm)
PKG : SOP8
Drawing No. : EX112-5001-1
(Max 5.35 (include.BURR))
Maxi 151lnclude,llL'Rk) 4 n ”:0, i E i i VI \L‘Nlln'nml PM; NIP JHM Drawnnl .\H. L_\un| mum
Datasheet
26/36
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TSZ02201-0R2R0G100200-1-2
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©2013 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Physical Dimension, Tape and Reel Information
Package Name SOP-J8M
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed
The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
2500pcs
E2
()
Direction of feed
Reel 1pin
0:0 1 1. 37510. 4. 9:0 2 Maxi 25 (include. 8 7 6 BURR) “w 4 ,AV 0. 545 0 AEMIN E *I 0. 210. 1 S 175 lUNszmm) PKG:SOP*JE Drawing NoA EXll'l-SOOZ
Datasheet
27/36
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TSZ02201-0R2R0G100200-1-2
6.Sep.2016 Rev.008
©2013 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Physical Dimension, Tape and Reel Information
Package Name SOP-J8
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed
The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
2500pcs
E2
()
Direction of feed
Reel 1pin
a 0:0 2 Maxa Sfxincludn EURR] 2 7 a 5 i n O z E 1 2 a 4 fl +0 us (a 527 o 55 0 Ztamy§n mm mm mm] PKG 550F753 Duwmg Nu EX35176002
Datasheet
28/36
BR24G16-3
TSZ02201-0R2R0G100200-1-2
6.Sep.2016 Rev.008
©2013 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Physical Dimension, Tape and Reel Information
Package Name SSOP-B8
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed
The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
2500pcs
E2
()
Direction of feed
Reel 1pin
3 mm u I M. u m 11m) MM w». mum“. 0 2mm 1 ‘ ‘ n - ' H‘H\ MARK , 3 I15 ‘1', l: 7 J :- 7 . — 0 DE: [L5H mmJ . H H m, 1mm,” 9 n 63 0' 2'“) ’ “‘ U (”M Ilruwnls \‘v I‘xla.’ 3002 O o o o o o o o o o :- 3 :- 3 E. j :- 3 :- j c j E j j E j E j c j E j E j E j E j E j E 9 E j E j E j \ —.
Datasheet
29/36
BR24G16-3
TSZ02201-0R2R0G100200-1-2
6.Sep.2016 Rev.008
©2013 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Physical Dimension, Tape and Reel Information
Package Name TSSOP-B8
Direction of feed
Reel
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed
The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
3000pcs
E2
()
1pin
mu 1 W hm unmxn a s mi 77“} g ‘ *w 3c / w \ :L | w I ,4 ‘ m T _ _ 1\_ a \ u w; - ye?!“ 4mg D“, uau Ni? 011:, .g; (U\ | x mm mm» MM M 1: Nu, mum uuuz o o o o o o o o o o E. j :u j E' j E j E j E j E j j E j E j E j E j E j E j E j E j E 9 E j E j E j \—l \ —.
Datasheet
30/36
BR24G16-3
TSZ02201-0R2R0G100200-1-2
6.Sep.2016 Rev.008
©2013 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Physical Dimension, Tape and Reel Information
Package Name TSSOP-B8M
Direction of feed
Reel
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed
The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
3000pcs
E2
()
1pin
a, 0:0 l mm 4:: (”Hindu ummn " :4 MM a c w H r... : 1 4 _u wm M’\I
Datasheet
31/36
BR24G16-3
TSZ02201-0R2R0G100200-1-2
6.Sep.2016 Rev.008
©2013 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Physical Dimension, Tape and Reel Information
Package Name TSSOP-B8J
Direction of feed
Reel
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed
The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
2500pcs
E2
()
1pin
29:01 Maxs, 25(1ncludc. BURN) fl MW H c: c fl ., — c . fl 9 m 1 u 4 o 415 nun MARK - - u 54 c' a c (a _j( a. 55 o 22 U 0; mm: mm} H 5 ~ » > "‘ PM; Msovx D a ‘n M : Drawxnz m. EXIEI 5002 o O O O O O o O O O rmrm rmrm nnnr’r rmrm rmrm . u o o . uuuu uuuu uuuu uuuu uuuu
Datasheet
32/36
BR24G16-3
TSZ02201-0R2R0G100200-1-2
6.Sep.2016 Rev.008
©2013 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Physical Dimension, Tape and Reel Information
Package Name MSOP8
Direction of feed
Reel
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed
The direction is the 1pin of product is at the upper right when you hold
reel on the left hand and you pull out the tape on the right hand
3000pcs
TR
()
1pin
20:01 1pm MARK f g. s o E , :' fiz 1A 0 085 c i5‘0.| an 25 0 5 ‘ 4 UUUU c H ( mnnn 8‘ 5 n 2; n 25 g g: Aer I me7 mm vsonzsxzu‘Ju Drawing \‘u, xlsranm
Datasheet
33/36
BR24G16-3
TSZ02201-0R2R0G100200-1-2
6.Sep.2016 Rev.008
©2013 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Physical Dimension, Tape and Reel Information
Package Name VSON008X2030
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed
The direction is the 1pin of product is at the upper right when you hold
reel on the left hand and you pull out the tape on the right hand
4000pcs
TR
()
Direction of feed
Reel
1pin
oto. 1P1N MARK 00.04 1 5:0 1 3 o u) H m m o :5 d +\ m d 5 o 175 0 25:23:23 (UNITzn-nu) PKG-VMMPooSZlSac
Datasheet
34/36
BR24G16-3
TSZ02201-0R2R0G100200-1-2
6.Sep.2016 Rev.008
©2013 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Physical Dimension, Tape and Reel Information
Package Name VMMP008Z1830
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed
The direction is the 1pin of product is at the upper right when you hold
reel on the left hand and you pull out the tape on the right hand
4000pcs
TR
()
Direction of feed
Reel
1pin
BR24G1B-3 Datasheet Marking Diagrams (TOP VIEW) DIPrTB (TOP VIEW) D Pan Number Marking B R24 G16 LOT Number SOPVJSM (TOP VIEW) Pan Number Marking K 4 G 1 6 LOT Number / O\ 1P|N MARK Part Number Marking 4 G E 4/ LOT Number O \ IPIN MARK TSSOPVBBMUOP VIEW) Pan Number Markin m / 0 ‘1' e\ LOT Number 0\ 1P|N MARK 0\ SOPVJZS (TOP VIEW 4G16 Pan Number Marking 4/ LOT Number / 1F’IN MARK I Part Number Marking 4/ LOT Number / IPIN MARK Part Number Marking \LOT Number 1F’IN MARK Pan Number Marking LOT Number 1PIN MARK www mhm.com ©2013 ROHM CO , Lid, AII rights reserved T5222111-15-0m 35/36 TSZO2201-0R2ROG100200-1-2 6.5ep.2016 Rev.008
Datasheet
35/36
BR24G16-3
TSZ02201-0R2R0G100200-1-2
6.Sep.2016 Rev.008
©2013 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Marking Diagrams (TOP VIEW)
SOP-J8M (TOP VIEW)
Part Number Marking
LOT Number
1PIN MARK
4G16
SOP-J8 (TOP VIEW)
Part Number Marking
LOT Number
1PIN MARK
4G16
DIP-T8 (TOP VIEW)
BR24G16
Part Number Marking
LOT Number
SOP8(TOP VIEW)
4G16
Part Number Marking
LOT Number
1PIN MARK
TSSOP-B8(TOP VIEW)
4G16
Part Number Marking
LOT Number
1PIN MARK
TSSOP-B8M(TOP VIEW)
4G16
Part Number Marking
LOT Number
1PIN MARK
SSOP-B8(TOP VIEW)
Part Number Marking
LOT Number
1PIN MARK
4GE
TSSOP-B8J(TOP VIEW)
6 3
Part Number Marking
LOT Number
1PIN MARK
4G1
'\ VMMPOO8Z1830 (TOP VIEW) Part Number Markin Part Number Markin K7—E LOT Number / LOT Number 1PlN MARK iPlN MARK Part Number Marking LOT Number 4 G 1 4/ 6 3 / 1PlN MARK Revision History Date ReVision Changes 15 Jun 2012 001 New Release Update some English words, sentences' descriptions. grammar and formatting. 25.Feb 2013 002 Add tF2 in AC Characteristic and Serial Input I Output Timing P.1 Change format of package line-up table. 31.May.2013 003 P2 Add VESD in Absolute Maximum Ratings 04.Jul.2013 004 P.23 Update Part Numbering. Add Lineup table. Add SOP»J8M,TSSOP»BBM Package P1 Add 16Kbit to a General Description P1 Add “Up to 16 Byte in Page Write Mode" P1 Add “Bit Format 2K x B" 27'0‘12014 005 P1 List of models deletion P2 Change the unit of Power Dissipation to “W" P22 Change the Operational Notes Change notice to RevOOS 10.Mar.2016 006 P.10 Change data of Figure 26 Add VMMPOOBZi 830 package P.2 Add caution in absolute maximum ratings 21'JUI 2016 007 P21 Add terminal names on Figure53 P.24 Change Physical Dimension of DIP-TB 06.Sep.2016 008 P.36 Change Marking Diagrams of MSOPB www rohm.com ©2013 ROHM Co , Ltd, All rights reserved T52022°1‘0R2R05100200‘1'2 TSZZZtt1-15-Om 36/36 E.Sep.2016 Rev.008
Datasheet
36/36
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TSZ02201-0R2R0G100200-1-2
6.Sep.2016 Rev.008
©2013 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Marking Diagrams (TOP VIEW)
Revision History
Date Revision Changes
15.Jun.2012 001 New Release
25.Feb.2013 002
Update some English words, sentences’ descriptions, grammar and formatting.
Add tF2 in AC Characteristic and Serial Input / Output Timing
31.May.2013 003
P.1 Change format of package line-up table.
P.2 Add VESD in Absolute Maximum Ratings
04.Jul.2013 004 P.23 Update Part Numbering. Add Lineup table.
27.Oct.2014 005
Add SOP-J8M,TSSOP-B8M Package
P1.Add 16Kbit to a General Description
P1.Add “Up to 16 Byte in Page Write Mode”
P1.Add “Bit Format 2K x 8”
P1. List of models deletion
P2. Change the unit of Power Dissipation to “W
P22. Change the Operational Notes
Change notice to Rev003
10.Mar.2016 006
P.10 Change data of Figure 26
21.Jul.2016 007
Add VMMP008Z1830 package
P.2 Add caution in absolute maximum ratings
P.21 Add terminal names on Figure53
P.24 Change Physical Dimension of DIP-T8
06.Sep.2016 008
P.36 Change Marking Diagrams of MSOP8
VMMP008Z1830 (TOP VIEW)
6 3
Part Number Marking
LOT Number
1PIN MARK
4G1
MSOP8(TOP VIEW)
4GE
Part Number Marking
LOT Number
1PIN MARK
3
VSON008X2030 (TOP VIEW)
63
Part Number Marking
LOT Number
1PIN MARK
4G1
Damsheet 03
Notice-PGA-E Rev.003
© 2015 ROHM Co., Ltd. All rights reserved.
Notice
Precaution on using ROHM Products
1. Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1), transport
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (Specific Applications), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHMs Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASS
CLASS
CLASSb
CLASS
CLASS
CLASS
2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3. Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHMs Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4. The Products are not subject to radiation-proof design.
5. Please verify and confirm characteristics of the final or mounted products in using the Products.
6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8. Confirm that operation temperature is within the specified range described in the product specification.
9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Damsheet 03
Notice-PGA-E Rev.003
© 2015 ROHM Co., Ltd. All rights reserved.
Precautions Regarding Application Examples and External Circuits
1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2. You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
A two-dimensional barcode printed on ROHM Products label is for ROHMs internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1. All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4. The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
DatasheetDatasheet
Notice – WE Rev.001
© 2015 ROHM Co., Ltd. All rights reserved.
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3. The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for any damages, expenses or losses incurred by you or third parties resulting from inaccuracy or errors of or
concerning such information.

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IC EEPROM 16K I2C 400KHZ 8SOP
IC EEPROM 16K I2C 400KHZ 8SSOPB
IC EEPROM 16K I2C 400KHZ 8TSSOP
IC EEPROM 16K I2C 400KHZ 8MSOP
IC EEPROM 16K I2C 400KHZ 8TSSOP
IC EEPROM 16K I2C 400KHZ 8SOP
IC EEPROM 16K I2C 400KHZ 8SSOPB
IC EEPROM 16K I2C 400KHZ 8TSSOP
IC EEPROM 16K I2C 400KHZ 8MSOP
IC EEPROM 16K I2C 400KHZ 8TSSOP
IC EEPROM 16K I2C 400KHZ 8SOPJ
IC EEPROM 16K I2C VSON008X2030