CPL-WBF-00D3 Datasheet by STMicroelectronics

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February 2018
DocID023414 Rev 3
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This is information on a product in full production.
www.st.com
CPL-WBF-00D3
Wide band directional coupler with ISO port
Datasheet - production data
Features
50 Ω nominal input / output impedance
Wide operating frequency range (698 MHz
to 2700 MHz)
Low insertion loss
30 dB coupling factor with high flatness
High directivity
High ESD robustness (IEC 61000-4-2 level
4)
Flip Chip package
Small footprint
Benefits
Very low profile (less than 560 μm thickness
after reflow)
Lead-free package
High RF performance
RF module size reduction
50 Ω nominal input / output impedance
Fully symmetrical design
Applications
Quad-band power amplifier module
Quad-band front end module
GSM / WCDMA / LTE mobile phone
Description
The CPL-WBF-00D3 is a low band coupler
designed to measure RF antenna output power in
GSM / WCDMA / TD-SCDMA / LTE applications.
This coupler has been customized for wide band
operating frequencies (EGSM, CELL, PCS, DCS,
TD-SCDMA, WCDMA and LTE) with less than
0.30 dB insertion losses in the bandwidth (698
MHz to 2700 MHz).
The CPL-WBF-00D3 has been designed using
STMicroelectronics IPD (integrated passive
device) technology on non-conductive glass
substrate to optimize RF performance. The
device is delivered 100% tested, in tape and reel.
Figure 1: Pin configuration (top view)
Flip Chip (6 bumps)
Characteristics
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1 Characteristics
Table 1: Absolute maximum ratings (limiting values)
Symbol
Parameter
Frequency
band
Test condition
Value
Unit
Min.
Typ.
Max.
PIN
Input power RFIN
CW
698-880
-
30
dBm
DC 50% CW
880-915
-
35
30
CW
1428-1661
-
30
DC 50% CW
1710-1910
-
33
30
CW
1920-2170
-
27
CW
1920-2025
-
30
CW
2500-2700
-
30
VESD
ESD ratings IEC61000-4-2 (C = 150 pF, R = 330 Ω, 10
shots with both polarities and each condition, cumulative
method)
RFIN, RFOUT, air discharge
RFIN, RFOUT, contact discharge
±15
±8
-
kV
VESD(HBM)
Human body model, JESD22-A114-B, all I/O
500
-
V
VESD(MM)
Machine model, JESD22-A115-A, all I/O
50
-
V
VESD(CDM)
Charge device model, JESD22-C101-C, all I/O
500
-
TOP
Operating temperature
-40
-
+85
°C
Table 2: Electrical characteristics (Tamb = 25 °C) impedances
Symbol
Parameter
Value
Unit
Min.
Typ.
Max.
ZOUT
Nominal output impedance
-
50
-
ZIN
Nominal input impedance
-
50
-
ZCPLD
Nominal coupling impedance
-
50
-
ZISO
Nominal isolated port impedance
-
50
-
Table 3: Electrical characteristics (Tamb = 25 °C) RF performance
Symbol
Parameter
Value
Unit
Min.
Typ.
Max.
f
Frequency range (bandwidth)
698
2700
MHz
IL
Insertion loss in bandwidth
From 698 MHz to
2700 MHz
0.15
0.3
dB
RL
Return loss in bandwidth
15
CPLD
Coupling factor
29
33
DIR
Coupler directivity
20
CPL-WBF-00D3
Characteristics
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1.1 RF measurements
Warning: This device is tailored for custom SiP module and has been optimized in terms of
performance for SiP module custom layout. In order to guarantee the integrity of the
device, below measurements have been done on ST internal board, which may be different
from customer application SiP layout.
Figure 2: Insertion loss
Figure 3: Coupling factor
Figure 4: Directivity
Figure 5: Return loss on IN port
-0.02
-0.04
-0.06
-0.14
-0.08
-0.16
-0.18
-0.10
-0.12
-0.20
0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8
F (G z)H
Insertion loss (dB)
-29.0
-29.5
-30.0
-31.5
-30.5
-32.0
-32.5
-31.0
-33.0
0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8
Coupling factor (dB)
F (G z)H
28
27
26
23
25
22
21
24
20
0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8
Directivity (dB)
F (GHz)
-10
-12.5
-15.0
-25.0
-17.5
-27.5
-30.0
-20.0
-22.5
0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8
RL IN (dB)
F (G z)H
Characteristics
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Figure 6: Return loss on OUT port
Figure 7: Return loss CPL port
Figure 8: RL ISO
-10
-12.5
-15.0
-25.0
-17.5
-27.5
-30.0
-20.0
-22.5
0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8
RL OUT (dB)
F (G z)H
-10
-12.5
-15.0
-25.0
-17.5
-27.5
-30.0
-20.0
-22.5
0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8
RL CPL (dB )
F (GHz)
-10
-12.5
-15.0
-25.0
-17.5
-27.5
-30.0
-20.0
-22.5
0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8
RL ISO (dB)
F (GHz)
CPL-WBF-00D3
Package information
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2 Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
2.1 Flip-Chip 6 bumps package information
Figure 9: Flip-Chip 6 bumps package outline
Package information
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Table 4: Flip-Chip 6 bumps package mechanical data
Parameter
Description
Min.
Typ.
Max.
Unit
X
X dimension of the die
1060
1110
1160
µm
Y
Y dimension of the die
1850
1900
1950
a1
Distance from edge of die to IN/OUT bumps and
CPL/ISO bumps on X axis
218
a2
Distance from IN/OUT bumps to GND bumps on X axis
274
a3
Distance from GND bumps to CPL/ISO bumps on X axis
400
b1
Distance from edge of die to IN/OUT bumps on Y axis
218
b2
Distance from IN/OUT bumps to CPL/ISO bumps on Y
axis
432
b3
Distance from CPL/ISO bumps to GND bumps on Y axis
100
b4
Distance between GND bumps on Y axis
400
d
Bump diameter
240
255
270
T
Substrate thickness
380
400
420
H
Bump height
190
205
220
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CPL-WBF-00D3
Package information
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2.2 Flip-chip 6 bumps packing information
More packing information is available in the technical note: TN1200: “IPAD™,
micro-bump Flip chip: package description and recommendations for use”
Figure 10: Footprint - non solder mask defined
Figure 11: Footprint - solder mask defined
Figure 12: Marking
x
yx
w
z
w
Dot, ST logo
ECOPACK grade
xx = marking
z = manufacturing location
yww = datecode
(y = year
ww = week)
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Package information
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Figure 13: Top View land pattern recommendations
Figure 14: Flip-chip tape and reel outline
CPL-WBF-00D3
Ordering information
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3 Ordering information
Table 5: Ordering information
Order code
Marking
Package
Weight
Base qty.
Delivery mode
CPL-WBF-00D3
SD
Flip-Chip
2.35 mg
5000
Tape and reel (7”)
4 Revision history
Table 6: Document revision history
Date
Revision
Changes
09-Jan-2013
1
Initial release.
09-Aug-2013
2
Updated footprint graphics.
05-Feb-2018
3
Updated Figure 1: "Pin configuration (top view)", Figure 9:
"Flip-Chip 6 bumps package outline", Figure 13: "Top View
land pattern recommendations". Added Table 4: "Flip-Chip 6
bumps package mechanical data".
CPL-WBF-00D3
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