1 eeeeeeeeeeeee
This is information on a product in full production.
July 2013 Doc ID 022226 Rev 3 1/13
STY105NM50N
N-channel 500 V, 0.019 Ω typ., 110 A, MDmesh™ II
Power MOSFET in a Max247 package
Datasheet
-
production data
Figure 1. Internal schematic diagram
Features
Max247 worldwide best R
DS(on)
100% avalanche tested
Low input capacitance and gate charge
Low gate input resistance
Applications
Switching applications
Description
This device is an N-channel Power MOSFET
developed using the second generation of
MDmesh™ technology. This revolutionary Power
MOSFET associates a vertical structure to the
company’s strip layout to yield one of the world’s
lowest on-resistance and gate charge. It is
therefore suitable for the most demanding high
efficiency converters.
$0Y
'
*
6
1
2
3
Max247
Order code V
DSS
@T
jMAX
R
DS(on)
max I
D
STY105NM50N 550 V < 0.022 Ω110 A
Table 1. Device summary
Order code Marking Package Packaging
STY105NM50N 105NM50N Max247 Tube
www.st.com
Contents STY105NM50N
2/13 Doc ID 022226 Rev 3
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Doc ID 022226 Rev 3 3/13
STY105NM50N Electrical ratings
13
1 Electrical ratings
Table 2. Absolute maximum ratings
Symbol Parameter Value Unit
V
GS
Gate- source voltage ± 25 V
I
D
Drain current (continuous) at T
C
= 25 °C 110 A
I
D
Drain current (continuous) at T
C
= 100 °C 88 A
I
DM (1)
1. Pulse width limited by safe operating area.
Drain current (pulsed) 440 A
P
TOT
Total dissipation at T
C
= 25 °C 625 W
dv/dt
(2)
2. I
SD
110 A, di/dt 400 A/µs, V
DS
peak V
(BR)DSS
, V
DD
= 80% V
(BR)DSS
.
Peak diode recovery voltage slope 15 V/ns
T
stg
Storage temperature - 55 to 150 °C
T
j
Max. operating junction temperature °C
Table 3. Thermal data
Symbol Parameter Value Unit
R
thj-case
Thermal resistance junction-case max 0.2 °C/W
R
thj-amb
Thermal resistance junction-ambient max 30 °C/W
Table 4. Avalanche characteriscics
Symbol Parameter Value Unit
I
AR
Avalanche current, repetetive or not repetetive (pulse
width limited by T
jmax
)17 A
E
AS
Single pulse avalanche energy (starting T
j
=25 °C,
I
D
=I
ar
, V
DD
=50) 809 mJ
Electrical characteristics STY105NM50N
4/13 Doc ID 022226 Rev 3
2 Electrical characteristics
(T
C
= 25 °C unless otherwise specified)
Table 5. On /off states
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
(BR)DSS
Drain-source
breakdown voltage
(V
GS
= 0) I
D
= 1 mA 500 V
I
DSS
Zero gate voltage
drain current (V
GS
= 0)
V
DS
= 500 V
V
DS
= 500 V, T
C
=125 °C
10
150
µA
µA
I
GSS
Gate-body leakage
current (V
DS
= 0) V
GS
= ± 25 V ±100 nA
V
GS(th)
Gate threshold voltage V
DS
= V
GS
, I
D
= 250 µA 2 3 4 V
R
DS(on)
Static drain-source on-
resistance V
GS
= 10 V, I
D
= 52 A 0.019 0.022 Ω
Table 6. Dynamic
Symbol Parameter Test conditions Min. Typ. Max. Unit
C
iss
Input capacitance
V
DS
= 100 V, f = 1 MHz,
V
GS
= 0
- 9600 - pF
C
oss
Output capacitance - 500 - pF
C
rss
Reverse transfer
capacitance -22-pF
C
oss(eq)(1)
1. C
oss eq.
is defined as a constant equivalent capacitance giving the same charging time as Coss when V
DS
increases from 0 to 80% V
DS
Equivalent output
capacitance V
DS
= 0 to 400 V V
GS
= 0 - 1675 - pF
R
G
Intrinsic gate
resistance f = 1 MHz open drain - 1.3 - Ω
Q
g
Total gate charge V
DD
= 400 V, I
D
= 110 A,
V
GS
= 10 V
(see Figure 15)
- 326 - nC
Q
gs
Gate-source charge - 40 - nC
Q
gd
Gate-drain charge - 180 - nC
Doc ID 022226 Rev 3 5/13
STY105NM50N Electrical characteristics
13
Table 7. Switching times
Symbol Parameter Test conditions Min. Typ. Max. Unit
t
d(on)
Turn-on delay time V
DD
= 250 V, I
D
= 55 A,
R
G
= 4.7 Ω, V
GS
= 10 V
(see Figure 16)
(see Figure 19)
-47-ns
t
r
Rise time - 88 - ns
t
d(off)
Turn-off delay time - 353 - ns
t
f
Fall time - 70 - ns
Table 8. Source drain diode
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
SD
I
SDM
(1)
1. Pulse width limited by safe operating area.
Source-drain current
Source-drain current (pulsed) -110
440
A
A
V
SD
(2)
2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%
Forward on voltage I
SD
= 110 A, V
GS
= 0 - 1.6 V
t
rr
Reverse recovery time I
SD
= 55 A, di/dt = 100 A/µs
V
DD
= 100 V
(see Figure 16)
-552 ns
Q
rr
Reverse recovery charge - 13.2 µC
I
RRM
Reverse recovery current - 48 A
t
rr
Reverse recovery time I
SD
= 55 A, di/dt = 100 A/µs
V
DD
= 100 V, T
j
= 150 °C
(see Figure 16)
-672 ns
Q
rr
Reverse recovery charge - 19.5 µC
I
RRM
Reverse recovery current - 58 A
DSS
Electrical characteristics STY105NM50N
6/13 Doc ID 022226 Rev 3
2.1 Electrical characteristics (curves)
Figure 2. Safe operating area Figure 3. Thermal impedance
Figure 4. Output characteristics Figure 5. Transfer characteristics
Figure 6. Normalized BV
DSS
vs temperature Figure 7. Static drain-source on-resistance
I
D
100
10
1
0.1
0.1 1100 V
DS
(V)
10
(A)
Operation in this area is
Limited by max RDS(on)
10µs
100µs
1ms
10ms
Tj=150°C
Tc=25°C
Sinlge
pulse
AM14793v1
10
-4
10
-3
10
-2
10
-1
t
p
(s)
10
-2
10
-1
K
0.2
0.05
0.02
0.01
0.1
Single pulse
δ=0.5
AM09125v1
4V
5V
6V
VGS=10V
ID
120
80
40
008VDS(V)
16
(A)
41220
160
200
240 7V
AM14794v1
ID
120
80
40
0
04VGS(V)
8
(A)
26
160
200
240 VDS = 10 V
AM14795v1
V
DS
-50 0T
J
(°C)
(norm)
-25 75
25 50 100
0.92
0.94
0.96
0.98
1.00
1.02
1.04
1.06
I
D
=1mA
1.08
1.10
AM09028v1
RDS(on)
0.0190
0.0185
0.0180
0.0175
040 ID(A)
(Ω)
20 60
0.0195
0.0200 VGS=10V
80 100
AM14797v1
Doc ID 022226 Rev 3 7/13
STY105NM50N Electrical characteristics
13
Figure 8. Gate charge vs gate-source voltage Figure 9. Capacitance variations
Figure 10. Normalized gate threshold voltage vs
temperature Figure 11. Normalized on-resistance vs
temperature
Figure 12. Source-drain diode forward vs
temperature Figure 13. Output capacitance stored energy
VGS
6
4
2
0050 Qg(nC)
(V)
200
8
100 150
10
VDD=400V
ID=110A
250
12
150
100
50
0
300
350
VDS
(V)
300
200
250
VDS
AM14798v1
C
1000
100
10040 VDS(V)
(pF)
20 60
Ciss
Coss
Crss
10000
AM14799v1
VGS(th)
1.00
0.90
0.80
0.70
-50 0TJ(°C)
(norm)
-25
1.10
75
25 50 100
ID = 250 µA
AM16400v1
R
DS(on)
2.0
1.5
1.0
0.5
-50 0T
J
(°C)
(norm)
-25 75
25 50 100
I
D
= 55 A
V
GS
= 10 V
AM16401v1
040
20 100
60 80
0.4
0.6
0.8
1.0
1.2
V
SD
(V)
I
SD
(A)
T
J
=-50°C
T
J
=150°C
T
J
= 25°C
AM16402v1
E
oss
30
20
10
0
0
100
V
DS
(V)
(µJ)
400
40
200 300
50
500
AM16403v1
Test circuits STY105NM50N
8/13 Doc ID 022226 Rev 3
3 Test circuits
Figure 14. Switching times test circuit for
resistive load Figure 15. Gate charge test circuit
Figure 16. Test circuit for inductive load
switching and diode recovery times Figure 17. Unclamped inductive load test circuit
Figure 18. Unclamped inductive waveform Figure 19. Switching time waveform
AM01468v1
VGS
PW
VD
RG
RL
D.U.T.
2200
μF
3.3
μFVDD
AM01469v1
VDD
47kΩ1kΩ
47kΩ
2.7kΩ
1kΩ
12V
Vi=20V=VGMAX
2200
μF
PW
IG=CONST
100Ω
100nF
D.U.T.
VG
AM01470v1
A
D
D.U.T.
S
B
G
25 Ω
AA
B
B
RG
G
FAST
DIODE
D
S
L=100μH
μF
3.3 1000
μFVDD
AM01471v1
Vi
Pw
VD
ID
D.U.T.
L
2200
μF
3.3
μFVDD
AM01472v1
V(BR)DSS
VDD
VDD
VD
IDM
ID
AM01473v1
VDS
ton
tdon tdoff
toff
tf
tr
90%
10%
10%
0
0
90%
90%
10%
VGS
Doc ID 022226 Rev 3 9/13
STY105NM50N Package mechanical data
13
4 Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK
®
is an ST trademark.
Package mechanical data STY105NM50N
10/13 Doc ID 022226 Rev 3
Table 9. Max247 mechanical data
Dim. mm
Min. Typ. Max.
A 4.70 5.30
A1 2.20 2.60
b 1.00 1.40
b1 2.00 2.40
b2 3.00 3.40
c 0.40 0.80
D 19.70 20.30
e 5.35 5.55
E 15.30 15.90
L 14.20 15.20
L1 3.70 4.30
DIMENSIONS W mm l | HEATiS/NK PLANE ~A Gate 5 \\ imi 71— , ,_WF , JJ EL | D | 4%— | 4 I LLV, I _| A1 L H ‘. b, ' - b2 I U l 1 2 “’3 J 2 r | +|«b c L. BACK VIEW 9
Doc ID 022226 Rev 3 11/13
STY105NM50N Package mechanical data
13
Figure 20. Max247 drawing
Revision history STY105NM50N
12/13 Doc ID 022226 Rev 3
5 Revision history
Table 10. Document revision history
Date Revision Changes
14-Sep-2011 1 First release.
15-Nov-2012 2
Document status promoted from preliminary to production data.
Added Section 2.1: Electrical characteristics (curves).
Minor text changes.
29-Jul-2013 3 Updated V
(BR)DSS
in Table 5: On /off states.
Updated figures in Section 3: Test circuits.
ny
Doc ID 022226 Rev 3 13/13
STY105NM50N
13
Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the
right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any
time, without notice.
All ST products are sold pursuant to ST’s terms and conditions of sale.
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no
liability whatsoever relating to the choice, selection or use of the ST products and services described herein.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this
document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products
or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such
third party products or services or any intellectual property contained therein.
UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS
OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
ST PRODUCTS ARE NOT AUTHORIZED FOR USE IN WEAPONS. NOR ARE ST PRODUCTS DESIGNED OR AUTHORIZED FOR USE
IN: (A) SAFETY CRITICAL APPLICATIONS SUCH AS LIFE SUPPORTING, ACTIVE IMPLANTED DEVICES OR SYSTEMS WITH
PRODUCT FUNCTIONAL SAFETY REQUIREMENTS; (B) AERONAUTIC APPLICATIONS; (C) AUTOMOTIVE APPLICATIONS OR
ENVIRONMENTS, AND/OR (D) AEROSPACE APPLICATIONS OR ENVIRONMENTS. WHERE ST PRODUCTS ARE NOT DESIGNED
FOR SUCH USE, THE PURCHASER SHALL USE PRODUCTS AT PURCHASER’S SOLE RISK, EVEN IF ST HAS BEEN INFORMED IN
WRITING OF SUCH USAGE, UNLESS A PRODUCT IS EXPRESSLY DESIGNATED BY ST AS BEING INTENDED FOR “AUTOMOTIVE,
AUTOMOTIVE SAFETY OR MEDICAL” INDUSTRY DOMAINS ACCORDING TO ST PRODUCT DESIGN SPECIFICATIONS.
PRODUCTS FORMALLY ESCC, QML OR JAN QUALIFIED ARE DEEMED SUITABLE FOR USE IN AEROSPACE BY THE
CORRESPONDING GOVERNMENTAL AGENCY.
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void
any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any
liability of ST.
ST and the ST logo are trademarks or registered trademarks of ST in various countries.
Information in this document supersedes and replaces all information previously supplied.
The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.
© 2013 STMicroelectronics - All rights reserved
STMicroelectronics group of companies
Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan -
Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America
www.st.com