LT3796(-1) Datasheet by Analog Devices Inc.

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LTLII‘IENM TECHNOLOGY L7HEWEAR 1
LT3796/LT3796-1
1
3796fb
For more information www.linear.com/3796
Typical applicaTion
FeaTures DescripTion
100V Constant-Current and
Constant-Voltage Controller
with Dual Current Sense
The LT
®
3796/LT3796-1 are DC/DC controllers designed to
regulate a constant-current or constant-voltage and are
ideal for driving LEDs. The fixed frequency and current
mode architecture result in stable operation over a wide
range of supply and output voltages. Two ground referred
voltage FB pins serve as the input for several LED protec-
tion features, and also allow the converter to operate as a
constant-voltage source. The LT3796/LT3796-1 feature a
programmable threshold output current sense amplifier
with rail-to-rail common mode range. A separate high
side amplifier is gain configurable with two resistors and
can be used to regulate a second current or a voltage
in combination with one of the FB pins. The PWM input
provides LED dimming ratios of up to 3000:1.
The LT3796-1 is optimized for a second output current
regulation loop that can be enabled/disabled with a PMOS
switch, either to drive a second LED string or to extend
analog dimming range.
Boost LED Driver with Input Current Monitor
applicaTions
n 3000:1 True Color PWM™ Dimming
n Wide Input Voltage Range: 6V to 100V
n Current Monitoring Up to 100V
n High Side PMOS Disconnect and PWM Switch Driver
n Constant-Current and Constant-Voltage Regulation
n Dual Current Sense Amplifiers with Reporting
n C/10 Detection for Battery and SuperCap Charging
n Linear Current Sense Threshold Programming
n Short-Circuit Protection
n Adjustable Frequency: 100kHz to 1MHz
n Frequency Synchronization (LT3796)
n Independent Top Gate Enable Pin (LT3796-1)
n Programmable Open LED Protection with VMODE Flag
n Programmable Undervoltage Lockout with Hysteresis
n Soft-Start with Programmable Fault Restart Timer
n Available in 28-Lead TSSOP Package
n High Power LED, High Voltage LED, Dual String
n Battery and SuperCap Chargers
n Accurate Current Limited Voltage Regulators
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and True
Color PWM is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners. Protected by U.S. Patents, including 7199560, 7321203,
7746300.
Efficiency vs VIN
VIN (V)
0
90
100
30 50
37961 TA01b
85
80
10 20 40 60
75
70
95
EFFICIENCY (%)
118k
CSPVSCSN
RT
VC
VMODE
FAULT
VMODE
FAULT
2k
85V LED
400mA
LT3796
37961 TA01a
CTRL
CSOUT
PWM
ISMON
PWM
SYNC
SS
FB2
EN/UVLO
VREF
GND
FB1
ISP
ISN
TG
INTVCC
GATE
SENSE
10nF
22µH
50mΩ
VIN
9V TO 60V
100V (TRANSIENT)
4.7µF
31.6k
250kHz
10k
VIN
INTVCC
499k
97.6k
1M
2.2µF
×4
13.7k
15mΩ
620mΩ
40.2k
10nF
100k 100k
CSOUT
INTVCC
2.2µF
×3 1M
0.1µF
0.1µF
LT3796/LT3796—1 33333333333333 wwwwwwwwwwwwwwwwwwwwwwwwwww wwwwwwwwwwwwwwwwwwwwwwwwwwww EEEEEEEEEEEEEE L7LJCUEN2
LT3796/LT3796-1
2
3796fb
For more information www.linear.com/3796
pin conFiguraTionabsoluTe MaxiMuM raTings
VIN, VS ....................................................................100V
EN/UVLO .................................................................100V
ISP, ISN ................................................................... 100V
TG, GATE...............................................................Note 2
CSP, CSN ................................................................100V
VS - CSP, VS - CSN ....................................... 0.3V to 4V
INTVCC (Note 3) .....................................8.6V, VIN + 0.3V
PWM, VMODE, FAULT ...............................................12V
FB1, FB2, SYNC (LT3796), TGEN (LT3796-1) ..............8V
CTRL .........................................................................15V
SENSE ...................................................................... 0.5V
ISMON, CSOUT ...........................................................5V
VC, VREF, SS ................................................................3V
RT ...............................................................................2V
Operating Junction Temperature Range (Note 4)
LT3796E/LT3796I ..................................40 to 125°C
LT3796H ................................................ 40 to 150°C
Storage Temperature Range ......................65 to 150°C
(Note 1)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
TOP VIEW
FE PACKAGE
28-LEAD PLASTIC TSSOP
28
27
26
25
24
23
22
21
20
19
18
17
16
15
ISP
ISN
TG
GND
ISMON
FB2
FB1
VC
CTRL
VREF
SS
RT
TGEN/SYNC*
PWM
CSOUT
CSP
CSN
VS
EN/UVLO
VIN
GND
GND
INTVCC
GATE
SENSE
GND
VMODE
FAULT
29
GND
TJMAX = 150°C, θJA = 30°C/W, θJC = 10°C/W
EXPOSED PAD (PIN 29) IS GND, MUST BE SOLDERED TO PCB
*SYNC FOR LT3796, TGEN FOR LT3796-1
orDer inForMaTion
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LT3796EFE#PBF LT3796EFE#TRPBF LT3796FE 28-Lead Plastic TSSOP –40°C to 125°C
LT3796IFE#PBF LT3796IFE#TRPBF LT3796FE 28-Lead Plastic TSSOP –40°C to 125°C
LT3796HFE#PBF LT3796HFE#TRPBF LT3796FE 28-Lead Plastic TSSOP –40°C to 150°C
LT3796EFE-1#PBF LT3796EFE-1#TRPBF LT3796FE-1 28-Lead Plastic TSSOP –40°C to 125°C
LT3796IFE-1#PBF LT3796IFE-1#TRPBF LT3796FE-1 28-Lead Plastic TSSOP –40°C to 125°C
LT3796HFE-1#PBF LT3796HFE-1#TRPBF LT3796FE-1 28-Lead Plastic TSSOP –40°C to 150°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
LT3796/LT3796—1 L7 LJUW 3
LT3796/LT3796-1
3
3796fb
For more information www.linear.com/3796
elecTrical characTerisTics
PARAMETER CONDITIONS MIN TYP MAX UNITS
VIN Minimum Operating Voltage VIN Tied to INTVCC 6 V
VIN Shutdown IQEN/UVLO = 0V, PWM = 0V
EN/UVLO = 1.15V, PWM = 0V 1
12 µA
µA
VIN Operating IQ (Not Switching) RT = 82.5k to GND, FB1 = 1.5V 2.5 3 mA
VREF Voltage –100µA ≤ IREF ≤ 10µA l1.97 2.015 2.06 V
VREF Pin Line Regulation 6V < VIN < 100V 1.5 m%/V
VREF Pin Load Regulation –100µA < IREF < 0µA 10 m%/µA
SENSE Current Limit Threshold l100 113 125 mV
SENSE Input Bias Current Current Out of Pin 60 µA
SS Sourcing Current SS = 0V 28 µA
SS Sinking Current ISP – ISN = 1V, SS = 2V 2.8 µA
Error Amplifier
Full Scale LED Current Sense Threshold
(V(ISP-ISN))ISP = 48V, CTRL ≥ 1.2V
ISP = 0V, CTRL ≥ 1.2V
l
l
243
243 250
250 257
257 mV
mV
9/10th LED Current Sense Threshold
(V(ISP-ISN))CTRL = 1V, ISP = 48V
CTRL = 1V, ISP = 0V
l
l
220
220 225
225 230
230 mV
mV
1/2 LED Current Sense Threshold
(V(ISP-ISN))CTRL = 0.6V, ISP = 48V
CTRL = 0.6V, ISP = 0V
l
l
119
119 125
125 131
131 mV
mV
1/10th LED Current Sense Threshold
(V(ISP-ISN)) CTRL = 0.2V, ISP = 48V
CTRL = 0.2V, ISP = 0V
l
l
16
16 25
25 32
32 mV
mV
ISP/ISN Current Monitor Voltage (VISMON) V(ISP-ISN) = 250mV, ISP = 48V, –50µA < IISMON < 0 µA
V(ISP-ISN) = 250mV, ISP = 0V, –50µA < IISMON < 0 µA
l
l
0.96
0.96 1
11.04
1.04 V
V
ISP/ISN Over Current Protection Threshold
(V(ISP-ISN))ISN = 48V
ISN = 0V
l
l
360
360 375
375 390
390 mV
mV
CTRL Input Bias Current Current Out of Pin, CTRL = 1.2V 50 200 nA
ISP/ISN Current Sense Amplifier Input
Common Mode Range 0 100 V
ISP/ISN Input Current Bias Current
(Combined) PWM = 5V (Active), ISP = 48V
PWM = 0V (Standby), ISP = 48V 700
0
0.1 µA
µA
ISP/ISN Current Sense Amplifier gmV(ISP-ISN) = 250mV 400 µs
VC Output Impedance 2000
VC Standby Input Bias Current PWM = 0V –20 20 nA
FB1, FB2 Regulation Voltage (VFB) ISP = ISN = 48V
ISP = ISN = 48V
l1.230
1.238 1.250
1.250 1.270
1.264 V
V
FB1 Amplifier gm450 600 750 µS
FB2 Amplifier gm130 170 210 µS
FB1, FB2 Pin Input Bias Current FB = VFB 100 200 nA
FB1 Open LED Threshold VMODE Falling, ISP = ISN = 48V VFB – 70mV VFB – 60mV VFB – 50mV V
C/10 Comparator Threshold (V(ISP-ISN))VMODE Falling, FB1 = 1.25V, ISP = 48V
VMODE Falling, FB1 = 1.25V, ISN = 0V 25
25 mV
mV
FB1 Overvoltage Threshold FAULT Falling VFB + 35mV VFB + 50mV VFB + 60mV V
FB2 Overvoltage Threshold TG Rising VFB + 35mV VFB + 50mV VFB + 60mV V
VC Current Mode Gain (∆VVC/∆VSENSE) 4.2 V/V
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C, VIN = 24V, EN/UVLO = 24V, CTRL = 2V, PWM = 5V, unless otherwise noted.
LT3796/LT3796—1 4 L7LJ1W
LT3796/LT3796-1
4
3796fb
For more information www.linear.com/3796
PARAMETER CONDITIONS MIN TYP MAX UNITS
Current Sense Amplifier (CSA)
Power Supply Voltage Range (VS)l3 100 V
CSA Input Voltage Common Mode Range
(VCSP and VCSN)
l2.5 100 V
CSOUT Maximum Output Current l200 µA
Input Voltage Offset (V(CSP-CSN)) VSNS = 100mV, VS = 48V (Note 5) l–3 0 3 mV
CSP, CSN Input Bias Current RIN1 = RIN2 = 1k (Note 5) 100 nA
CSP, CSN Input Current Offset RIN1 = RIN2 = 1k (Note 5) 0 nA
VS Supply Current VS = 48V 80 µA
Input Step Response ( to 50% of Output Step) ∆VSENSE = 100mV Step, RIN1 = RIN2 = 1k, ROUT = 5k 1 µs
Linear Regulator
INTVCC Regulation Voltage l7.4 7.7 8 V
Dropout (VIN INTVCC) IINTVCC = –10mA, VIN = 6V 400 mV
INTVCC Current Limit VIN = 100V, INTVCC = 6V
VIN = 12V, INTVCC = 6V 20
85 mA
mA
INTVCC Shutdown Bias Current if Externally
Driven to 7V EN/UVLO = 0V, INTVCC = 7V 10 µA
INTVCC Undervoltage Lockout 3.8 4 4.1 V
INTVCC Undervoltage Lockout Hysteresis 150 mV
Oscillator
Switching Frequency RT = 82.5k
RT = 19.6k
RT = 6.65k
l
l
l
85
340
900
105
400
1000
125
480
1150
kHz
kHz
kHz
Minimum Off-Time (Note 6) 190 ns
Minimum On-Time (Note 6) 210 ns
LOGIC Input/Outputs
PWM Input Threshold Rising l0.96 1 1.04 V
PWM Pin Bias Current 10 µA
EN/UVLO Threshold Voltage Falling l1.185 1.220 1.250 V
EN/UVLO Rising Hysteresis 20 mV
EN/UVLO Input Low Voltage IVIN Drops Below 1µA 0.4 V
EN/UVLO Pin Bias Current Low EN/UVLO = 1.15V 2.5 3 3.8 µA
EN/UVLO Pin Bias Current High EN/UVLO = 1.30V 40 200 nA
VMODE OUTPUT Low IVMODE = 0.5mA 300 mV
FAULT OUTPUT Low IFAULT = 0.5mA 300 mV
SYNC Pin Resistance to GND LT3796 Only 40
SYNC Input Low Threshold LT3796 Only 0.4 V
SYNC Input High Threshold LT3796 Only 1.5 V
TGEN Pin Resistance to GND LT3796-1 Only 40
TGEN Input Low Threshold LT3796-1 Only 0.4 V
TGEN Input High Threshold LT3796-1 Only 1.5 V
elecTrical characTerisTics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C, VIN = 24V, EN/UVLO = 24V, CTRL = 2V, PWM = 5V, unless otherwise noted.
LT3796/LT3796—1 L7 LJUW 5
LT3796/LT3796-1
5
3796fb
For more information www.linear.com/3796
PARAMETER CONDITIONS MIN TYP MAX UNITS
Gate Driver
tr NMOS GATE Driver Output Rise Time CL = 3300pF, 10% to 90% 20 ns
tf NMOS GATE Driver Output Fall Time CL = 3300pF, 10% to 90% 18 ns
NMOS GATE Output Low (VOL) 0.05 V
NMOS GATE Output High (VOH)INTVCC
0.05 V
tr Top GATE Driver Output Rise Time CL = 300pF 50 ns
tf Top GATE Driver Output Fall Time CL = 300pF 100 ns
Top Gate On Voltage (VISP-VTG) ISP = 48V 7 8 V
Top Gate Off Voltage (VISP-VTG) PWM = 0V, ISP = 48V 0 0.3 V
elecTrical characTerisTics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C, VIN = 24V, EN/UVLO = 24V, CTRL = 2V, PWM = 5V, unless otherwise noted.
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Do not apply a positive or negative voltage source to TG and GATE
pins, otherwise permanent damage may occur.
Note 3: Operating maximum for INTVCC is 8V.
Note 4: The LT3796E and LT3796E-1 are guaranteed to meet specified
performance from 0°C to 125°C. Specifications over the –40°C to 125°C
operating temperature range are assured by design, characterization and
correlation with statistical process controls. The LT3796I and LT3796I-1
are guaranteed to meet performance specifications over the –40°C to
125°C operating temperature range. The LT3796H and LT3796H-1 are
guaranteed over the full –40°C to 150° C operating junction temperature
range. High junction temperatures degrade operating lifetimes. Operating
lifetime is derated at junction temperatures greater than 125°C.
Note 5: Measured in servo. See Figure 9 for details.
Note 6: See Duty Cycle Considerations in the Applications Information
section.
LT3796/LT3796—1 6 L7LJ1‘JW
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6
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ISP/ISN Input Bias Current vs
VISP ,V
ISN VREF Voltage vs Temperature
ISP/ISN Overcurrent Protection
Threshold vs Temperature
Typical perForMance characTerisTics
V(ISP-ISN) Threshold vs FB Voltage VFB vs Temperature
V(ISP-ISN) Threshold vs VCTRL V(ISP-ISN) Threshold vs VISP
V(ISP-ISN) Full-Scale Threshold vs
Temperature
TA = 25°C, unless otherwise noted.
V(ISP-ISN) Threshold at CTRL = 0.6V
vs Temperature
VCTRL (V)
0
200
300
0.6 1.0
37961 G01
150
100
0.2 0.4 0.8 1.2 1.4
50
0
250
V(ISP-ISN) THRESHOLD (mV)
VISP (V)
0
251
253
40 80
37961 G02
250
249
20 60 100
248
247
252
V(ISP-ISN) THRESHOLD (mV)
TEMPERATURE (°C)
–50
250
254
25 75
37961 G03
249
248
–25 0 50 100 150125
247
246
253
252
251
V(ISP-ISN) THRESHOLD (mV)
ISP = 48V
CTRL = 2V
TEMPERATURE (°C)
–50
128
37961 G03a
–25 0 25 50 75 100 150125
127
125
124
126
122
123
V(ISP-ISN) (mV)
VFB (V)
1.1
150
300
FB1
37961 G04
100
1.15 1.2 1.25 1.3
50
0
250
200
V(ISP-ISN) THRESHOLD (mV)
FB2
TEMPERATURE (°C)
–50
1.24
1.27
37961 G05
–25 0 25 50 10075 150125
1.23
1.26
1.25
VFB (V)
TEMPERATURE (°C)
–50
374
372
380
37961 G06
–25 0 25 50 10075 150125
370
378
376
ISP/ISN OVERCURRENT THRESHOLD (mV)
VISP, VISN (V)
0
500
37961 G07
20 40 60 10080
400
300
200
100
0
800
900
700
600
ISP, ISN BIAS CURRENT (µA)
ISP
ISN
PWM = 5V
TEMPERATURE (°C)
–50
2.01
2.00
2.05
37961 G08
–25 0 25 50 10075 125 150
1.99
1.98
1.97
1.96
2.04
2.03
2.02
VREF (V)
IREF = 0µA
IREF = –100µA
LT3796/LT3796—1 L7 LJUW 7
LT3796/LT3796-1
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Typical perForMance characTerisTics
RT vs Switching Frequency
Switching Frequency vs
Temperature
Quiescent Current vs VIN VISMON vs V(ISP-ISN)
EN/UVLO Hysteresis Current vs
Temperature
VREF vs VIN
TA = 25°C, unless otherwise noted.
EN/UVLO Falling/Rising
Threshold vs Temperature
SENSE Current Limit Threshold vs
Temperature
Switching Frequency vs
SS Voltage
VIN (V)
0
2.01
2.00
2.02
2.05
37961 G09
4020 60 80 100
1.99
1.98
1.97
2.03
2.04
VREF (V)
IREF = 0µA
SWITCHING FREQUENCY (kHz)
0
37961 G10
400300200100 500 600 700 800 900 1000
100
10
1
RT (kΩ)
TEMPERATURE (°C)
–50
400
390
410
440
37961 G11
0–25 25 50 75 100 150125
380
370
360
420
430
SWITCHING FREQUENCY (kHz)
RT = 19.6k
SS VOLTAGE (mV)
0
450
37961 G11a
200 400 600 800 1000 1200
350
400
250
200
300
150
0
50
100
SW FREQUENCY (kHz)
VIN (V)
0
1.0
1.5
2.5
37961 G12
4020 60 80 100
0.5
0
2.0
VIN CURRENT (mA)
PWM = 0V
V(ISP-ISN) (mV)
0
1200
1000
1400
2000
37961 G13
100 200 300 400 500
800
600
400
200
0
1600
1800
VISMON (mV)
TEMPERATURE (°C)
–50
2.0
1.5
3.5
37961 G14
–25 0 25 50 75 100 150125
1.0
0.5
0
2.5
3.0
EN/UVLO HYSTERESIS CURRENT (µA)
TEMPERATURE (°C)
–50
1.25
1.24
1.28
37961 G15
–25 0 25 50 75 100 150125
1.23
1.22
1.21
1.20
1.19
1.26
1.27
EN/UVLO (V)
EN/UVLO RISING THRESHOLD
EN/UVLO FALLING THRESHOLD
TEMPERATURE (°C)
–50
115
114
118
37961 G16
–25 0 25 50 75 100 125 150
113
112
111
110
109
108
116
117
SENSE THRESHOLD (mV)
LT3796/LT3796—1 7 +3? ’ 2/ /i 8 L7LJ1‘JW
LT3796/LT3796-1
8
3796fb
For more information www.linear.com/3796
INTVCC Current Limit
vs Temperature
INTVCC vs VIN
INTVCC Dropout Voltage vs
Current, Temperature INTVCC vs Temperature
V(CSP-CSN) Offset Voltage with
Different ICSOUT vs VS
INTVCC Current Limit vs VIN
Typical perForMance characTerisTics
TA = 25°C, unless otherwise noted.
Current Sense Amplifier Gain
Error vs Temperature
V(CSP-CSN) Offset Voltage vs
Temperature
SENSE Current Limit Threshold vs
Duty Cycle
DUTY CYCLE (%)
0
120
115
37961 G17
20 40 60 80 100
110
105
100
SENSE THRESHOLD (mV)
VIN (V)
0
40
60
120
37961 G18
4020 60 80 100
20
0
80
100
INTVCC CURRENT LIMIT (mA)
TEMPERATURE (°C)
–50
70
80
100
37961 G19
0–25 25 50 75 150100 125
60
50
90
INTVCC CURRENT LIMIT (mA)
VIN = 24V
VIN = 48V
VIN (V)
0
9
37961 G20
20 40 60 80 100
7
8
6
5
4
3
2
1
0
INTVCC (V)
INTVCC LOAD (mA)
0
1800 VIN = 6V
37961 G21
5 10 15 20
125°C
25°C
–55°C
1600
1400
1200
1000
800
600
400
200
0
INTVCC DROPOUT (mV)
150°C
75°C
0°C
–40°C
TEMPERATURE (°C)
–50
37961 G22
–25 0 5025 75 125100 150
7.9
8.0
7.8
7.7
7.6
7.5
7.4
7.3
INTVCC (V)
VS (V)
0
2
37961 G23
20 40 60 80 100
1
0
–1
–2
V(CSP-CSN) (mV)
ICSOUT = 100µA
ICSOUT = 10µA
SEE NOTE 5 FOR TEST SETUP
ICSOUT = 50µA
TEMPERATURE (°C)
–50
0.6
37961 G24
–25 0 25 50 75 100 125 150
0.4
0.2
0
–0.2
V(CSP-CSN) (mV)
ICSOUT = 10µA
ICSOUT = 100µA
ICSOUT = 50µA
TEMPERATURE (°C)
–50
2.0
37961 G25
–25 0 25 50 75 100 125 150
1.0
1.5
0
–0.5
0.5
–1.0
–2
–1.5
GAIN ERROR (%)
ICSOUT = 10µA
ICSOUT = 100µA
ICSOUT = 50µA
LT3796/LT3796—1 / / R‘SE'HME / l / FALL 'HM L7 LJUW 9
LT3796/LT3796-1
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Top Gate (PMOS) Rise/Fall Time
vs Capacitance
Current Sense Amplifier Gain vs
Frequency
NMOS Gate Rise/Fall Time vs
Capacitance
Typical perForMance characTerisTics
Top Gate Driver Rising Edge Top Gate Driver Falling Edge
TA = 25°C, unless otherwise noted.
FREQUENCY (kHz)
0.01
30
37961 G26
0.1 1 10 100 1000 10000
20
25
10
5
0
15
–5
–20
–10
–15
GAIN (dB)
VS = 48V, RIN = 1k
ROUT = 10k, VSENSE = 100mV
(NOTE 5)
CAPACITANCE (nF)
0
160
37961 G27
10 20 30 40 50
120
140
80
60
100
40
0
20
TIME (ns)
RISE TIME
FALL TIME
CAPACITANCE (nF)
0
800
37961 G28
1 2 3 4 5 6 7 8 9 10
600
700
400
300
500
200
0
100
TIME (ns)
FALL TIME
RISE TIME
PMOS VISHAY SILICONIX Si7113DN
3796 G29
100ns/DIV
5V
PWM
TG
0V
85V
75V
PMOS VISHAY SILICONIX Si7113DN
37961 G30
100ns/DIV
5V
PWM
TG
0V
85V
75V
LT3796/LT3796-1
LT3796/LT3796-1
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pin FuncTions
ISP (Pin 1): Connection Point for the Positive Terminal
of the Current Feedback Resistor (RLED). Also serves as
positive rail for TG pin driver.
ISN (Pin 2): Connection Point for the Negative Terminal
of the Current Feedback Resistor (RLED).
TG (Pin 3): Top Gate Driver Output. An inverted PWM signal
drives series PMOS device between VISP and (VISP – 7V)
if VISP > 7V. An internal 7V clamp protects the PMOS gate
by limiting VGS. Leave TG unconnected if not used.
GND (Pins 4, 17, 21, 22, Exposed Pad Pin 29): Ground.
These pins also serve as current sense input for control
loop, sensing negative terminal of current sense resistor in
the source of the N-channel MOSFET. Solder the exposed
pad directly to ground plane.
ISMON (Pin 5): ISP/ISN Current Report Pin. The LED
current sensed by ISP/ISN inputs is reported as VISMON =
ILED RLED 4. Leave ISMON pin unconnected if not used.
When PWM is low, ISMON is driven to ground. Bypass
with a 47nF capacitor or higher if needed.
FB2 (Pin 6): Voltage Loop Feedback 2 Pin. This pin is
connected to the internal transconductance amplifier posi-
tive input node. The internal transconductance amplifier
with output VC regulates FB2 to 1.25V through the DC/
DC converter. On LT3796 only, the FB2 has an additional
feature. If FB2 is driven above 1.3V, the TG pin is pulled
high to turn off the external PMOS and GATE pin is driven
to GND to turn off the external N-channel MOSFET. Connect
to GND if not used.
FB1 (Pin 7): Voltage Loop Feedback 1 Pin. FB1 is intended
for constant-voltage regulation or for LED protection/open
LED detection. The internal transconductance amplifier
with output VC regulates FB1 to 1.25V (nominal) through
the DC/DC converter. If the FB1 input is regulating the loop
and V(ISP-ISN) is less than 25mV (normal), the VMODE
pull-down is asserted. This action may signal an open
LED fault. If FB1 is driven above the 1.3V (by an external
power supply spike, for example), the FAULT pull-down is
asserted, the GATE pin is pulled low to turn off the external
N-channel MOSFET and the TG pin is driven high to protect
the LEDs from an overcurrent event. Do not leave the FB1
pin open. If not used, connect FB1 to GND.
VC (Pin 8): Transconductance Error Amplifier Output Pin.
Used to stabilize the control loop with an RC network.
This pin is high impedance when PWM is low, a feature
that stores the demand current state variable for the next
PWM high transition. Connect a capacitor between this
pin and GND; a resistor in series with the capacitor is
recommended for fast transient response. Do not leave
this pin open.
CTRL (Pin 9): Current Sense Threshold Adjustment Pin.
Regulating threshold V(ISP-ISN) is 0.25 VCTRL plus an offset
for 0.1V < VCTRL < 1V. For VCTRL > 1.2V the current sense
threshold is constant at the full-scale value of 250mV. For
1V < VCTRL < 1.2V, the dependence of the current sense
threshold upon VCTRL transitions from a linear function
to a constant value, reaching 98% of full-scale value by
VCTRL = 1.1V. Connect CTRL to VREF for the 250mV default
current threshold. Do not leave this pin open. Pull CTRL
pin to GND for zero LED current.
VREF (Pin 10): Voltage Reference Output Pin. Typically
2.015V. This pin drives a resistor divider for the CTRL
pin, either for analog dimming or for temperature limit/
compensation of LED load. It can supply up to 100μA.
SS (Pin 11): Soft-Start Pin. This pin modulates oscillator
frequency and compensation pin voltage (VC) clamp. The
soft-start interval is set with an external capacitor. The pin
has a 28μA (typical) pull-up current source to an internal
2.5V rail. This pin can be used as fault timer. Provided the
SS pin has exceeded 1.7V, the pull-up current source is
disabled and a 2.8µA pull-down current enabled when any
one of the following fault conditions happen:
1. LED overcurrent
2. INTVCC undervoltage
3. Thermal limit
The SS pin must be discharged below 0.2V to reinitiate a
soft-start cycle. Switching is disabled until SS is recharged.
RT (Pin 12): Switching Frequency Adjustment Pin. Set the
frequency using a resistor to GND (for resistor values, see
the Typical Performance curve or Table 2). Do not leave
the RT pin open.
LT3796/LT3796—1 L7 LJUW 1 1
LT3796/LT3796-1
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pin FuncTions
SYNC (Pin 13) LT3796: The SYNC pin is used to syn-
chronize the internal oscillator to an external logic level
signal. If SYNC is used, the RT resistor should be chosen
to program an internal switching frequency 20% slower
than the SYNC pulse frequency. Gate turn-on occurs a fixed
delay after the rising edge of SYNC. Use a 50% duty cycle
waveform to drive this pin. If not used, tie this pin to GND.
TGEN (Pin 13) LT3796-1: Top Gate Driver Enable Pin. TGEN
signal low causes the TG pin to transition high and turn
off a PMOS switch, independent of the PWM input. Unlike
PWM, TGEN low does not put the switching regulator in an
idle state. TGEN can be used in combination with TG and
a PMOS switch to deactivate one of two output current
regulation loops. Tie the TGEN pin to 1.5V or higher if its
function is not used. There is an equivalent 90k resistor
from TGEN to ground internally.
PWM (Pin 14): PWM Input Signal Pin. A signal low turns
off switching, idles the oscillator, disconnects the VC pin
from all internal loads, and makes the TG pin high. There
is an equivalent 500k resistor from PWM pin to GND
internally. If not used, tie this pin to VREF.
FAULT (Pin 15): An open-collector pull-down on FAULT
asserts when any of the following conditions happen: 1.
FB1 overvoltage (VFB1 > 1.3V), 2. INTVCC undervoltage,
3. LED overcurrent (V(ISP-ISN) > 375mV), or 4. Thermal
shutdown. If all faults are removed, FAULT flag returns
high. Fault status is only updated during PWM high
state and latched during PWM low state. FAULT remains
asserted until the SS pin is discharged below 0.2V for
cases 2, 3 and 4 above.
VMODE (Pin 16): An open-collector pull-down on VMODE
asserts if the FB1 input is above 1.19V (typical), and
V(ISP-ISN) is less than 25mV (typical). To function, the
pin requires an external pull-up resistor. VMODE status is
updated only during PWM high state and latched during
PWM low state.
SENSE (Pin 18): The current sense input for the control
loop. Kelvin connect this pin to the positive terminal of
the switch current sense resistor, RSENSE, in the source
of the N-channel MOSFET. The negative terminal of the
current sense resistor should be Kelvin connected to the
GND plane of the IC.
GATE (Pin 19): N-Channel MOSFET Gate Driver Output.
Switches between INTVCC and GND. It is driven to GND
during shutdown, fault or idle states.
INTVCC (Pin 20): Regulated Supply for Internal Loads, GATE
Driver and Top Gate (PMOS) Driver. Supplied from VIN and
regulates to 7.7V (typical). INTVCC must be bypassed with
a 4.7μF capacitor placed close to the pin. Connect INTVCC
directly to VIN if VIN is always less than or equal to 7V.
VIN (Pin 23): Input Supply Pin. Must be locally bypassed
with a 0.22μF (or larger) capacitor placed close to the IC.
EN/UVLO (Pin 24): Enable and Undervoltage Lockout
Pin. An accurate 1.22V falling threshold with externally
programmable hysteresis detects when power is OK to
enable switching. Rising hysteresis is generated by the
external resistor divider and an accurate internal 3μA
pull-down current. Above the threshold (but below 6V),
EN/UVLO input bias current is sub-μA. Below the falling
threshold, a 3μA pull-down current is enabled so the
user can define the hysteresis with the external resistor
selection. An undervoltage condition resets soft-start.
Tie to 0.4V, or less, to disable the device and reduce VIN
quiescent current below 1μA.
VS (Pin 25): Current Sense Amplifier Power Supply Pin.
This pin supply current to the current sense amplifier and
can operate from 3V to 100V.
CSN (Pin 26): Negative Current Sense Input Terminal.
CSN remains functional for voltages up to 100V. Typically
connected to VS and CSP as shown in Figure 9.
CSP (Pin 27): Positive Current Sense Input Terminal. The
internal sense amplifier sinks current from CSP to regulate
it to the same potential as CSN. A resistor (RIN1) tied from
VIN to CSP sets the output current ICSOUT = VSNS/RIN1.
VSNS is the voltage developed across RSNS. See Figure 9.
CSOUT (Pin 28): Current Sense Amplifier Output. CSOUT
pin sources the current that is drawn from CSP. Typically
is output to an external resistor to GND.
LT3796/LT3796-1
LT3796/LT3796-1
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block DiagraM
LT3796/LT3796-1 Block Diagram
EN/UVLO
SHORT-CIRCUIT
DETECT
FB1
FB1
FB2
VC
ISMON
A1
A2
1.22V
1.5V
SCILMB
2.5V
VLED
gm
EAMP
3µA
PWM
COMPARATOR
TGOFFB
1.25V
ISP ISP-7V
SHDN
1.25V
ISN 1.1V
100mV
VS
+
+
+
+
+
+
1.25V
CTRL
FB2
ISP
SS AND FAULT
LOGIC
SCILMB
TGOFFB
FAULTB
INTVCC
SS
THERMAL
SHDN
PWM
10µA AT
FB1 = 1.25V
gm
TGEN
(LT3796-1 ONLY)
LT3796-1 ONLY
A3
1.3V
0VFB
COMPARATOR
OVFB1
+
X4
+
A5
A6
gm
A8
X1
+
10µA
1V
2.8µA1mA
28µA
CSP
5.5V 5.5V
CSN +
A11
CSOUT
5.5V
FAULT
SS RT SYNC (LT3796 ONLY)
37961 BD
+
A7
A9
+
FREQ
PROG
+
+
RAMP
GENERATOR
100kHz TO 1MHz
OSCILLATOR
PWMTG VIN
INTVCC
FAULTB
DRIVER
I
SENSE
A9
+
I
LIM
7.7V
SENSE
GND
GATE
LDO
+
A4
Q
RS
100µA
INTV
CC
V
REF
+
1.19V
FB1
2.015V
A7
+
100mV
V
LED
C/10 COMPARATOR
WITH 200mV
HYSTERESIS
A7
+
A13
A15
A12
A10
A9
A14
VMODE
2.5V
113mV
A16
1.3V
0VFB2
+
10µA AT
A6+ = A6
10µA AT
FB2 = 1.25V
LT3796 ONLY
L7 LJUW LT3796/LT3796—1 13
LT3796/LT3796-1
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operaTion
The LT3796/LT3796-1 are constant-frequency, current
mode controllers with a low side NMOS gate driver. The
operation of the LT3796/LT3796-1 is best understood by
referring to the Block Diagram. In normal operation, with
the PWM pin low, the GATE pin is driven to GND, the TG
pin is pulled high to ISP to turn off the PMOS discon-
nect switch, the VC pin goes high impedance to store the
previous switching state on the external compensation
capacitor, and the ISP and ISN pin bias currents are re-
duced to leakage levels. When the PWM pin transitions
high, the TG pin transitions low after a short delay. At the
same time, the internal oscillator wakes up and generates
a pulse to set the PWM latch, turning on the external power
N-channel MOSFET switch (GATE goes high). A voltage
input proportional to the switch current, sensed by an ex-
ternal current sense resistor between the SENSE and GND
input pins, is added to a stabilizing slope compensation
ramp and the resulting switch current sense signal is fed
into the negative terminal of the PWM comparator. The
current in the external inductor increases steadily during
the time the switch is on. When the switch current sense
voltage exceeds the output of the error amplifier, labeled
VC, the latch is reset and the switch is turned off. During
the switch off phase, the inductor current decreases. At the
completion of each oscillator cycle, internal signals such
as slope compensation return to their starting points and
a new cycle begins with the set pulse from the oscillator.
Through this repetitive action, the PWM control algorithm
establishes a switch duty cycle to regulate a current or
voltage in the load. The VC signal is integrated over many
switching cycles and is an amplified version of the differ-
ence between the LED current sense voltage, measured
between ISP and ISN, and the target difference voltage
set by the CTRL pin. In this manner, the error amplifier
sets the correct peak switch current level to keep the
LED current in regulation. If the error amplifier output
increases, more current is demanded in the switch; if it
decreases, less current is demanded. The switch current
is monitored during the on phase and the voltage across
the SENSE pin is not allowed to exceed the current limit
threshold of 113mV (typical). If the SENSE pin exceeds
the current limit threshold, the SR latch is reset regardless
of the output state of the PWM comparator. Likewise, any
fault condition, i.e. FB1 overvoltage (VFB1 > 1.3V), LED
over current, or INTVCC undervoltage (INTVCC < 4V), the
GATE pin is pulled down to GND immediately.
In voltage feedback mode, the operation is similar to that
described above, except the voltage at the VC pin is set
by the amplified difference of the internal reference of
1.25V (nominal) and the FB1 and FB2 pins. If FB1 and
FB2 are both lower than the reference voltage, the switch
current increases; if FB1 or FB2 is higher than the refer-
ence voltage, the switch demand current decreases. The
LED current sense feedback interacts with the voltage
feedback so that neither FB1 or FB2 exceeds the internal
reference and the voltage between ISP and ISN does not
exceed the threshold set by the CTRL pin. For accurate
current or voltage regulation, it is necessary to be sure
that under normal operating conditions, the appropriate
loop is dominant. To deactivate the voltage loop entirely,
FB1 and FB2 can be connected to GND. To deactivate the
LED current loop entirely, the ISP and ISN should be tied
together and the CTRL input tied to VREF.
Two LED specific functions featured on the LT3796/LT3796-
1 are controlled by the voltage feedback FB1 pin. First,
when the FB1 pin exceeds a voltage 60mV lower (–5%)
than the FB1 regulation voltage and V(ISP-ISN) is less than
25mV (typical), the pull-down driver on the VMODE pin
is activated. This function provides a status indicator that
the load may be disconnected and the constant-voltage
feedback loop is taking control of the switching regulator.
When the FB1 pin exceeds the FB1 regulation voltage by
50mV (4% typical), the FAULT pin is activated.
LT3796/LT3796-1 feature a PMOS disconnect switch driver.
The PMOS disconnect switch can be used to improve
the PWM dimming ratio, and operate as fault protection
as well. Once a fault condition is detected, the TG pin is
pulled high to turnoff the PMOS switch. The action isolates
the LED array from the power path, preventing excessive
current from damaging the LEDs.
A standalone current sense amplifier is integrated in the
LT3796/LT3796-1. It can work as input current limit or open
LED protection. The detailed information can be found in
the Application Information section.
LT3796/LT3796-1 R1 VCTRL
LT3796/LT3796-1
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INTVCC Regulator Bypassing and Operation
The INTVCC pin requires a capacitor for stable operation
and to store the charge for the large GATE switching cur-
rents. Choose a 10V rated low ESR, X7R or X5R ceramic
capacitor for best performance. A 4.7μF ceramic capacitor
is adequate for many applications. Place the capacitor
close to the IC to minimize the trace length to the INTVCC
pin and also to the IC ground.
An internal current limit on the INTVCC output protects
the LT3796/LT3796-1 from excessive on-chip power dis-
sipation. The minimum value of this current limit should
be considered when choosing the switching N-channel
MOSFET and the operating frequency. IINTVCC can be
calculated from the following equation:
IINTVCC = QG • fOSC
Careful choice of a lower QG MOSFET allows higher
switching frequencies, leading to smaller magnetics. The
INTVCC pin has its own undervoltage disable (UVLO) set
to 4V (typical) to protect the external FETs from excessive
power dissipation caused by not being fully enhanced.
If the INTVCC pin drops below the UVLO threshold, the
GATE pin is forced to 0V, TG pin is pulled high and the
soft-start pin will be reset. If the input voltage, VIN, will
not exceed 7V, then the INTVCC pin should be connected
to the input supply. Be aware that a small current (typically
10μA) loads the INTVCC in shutdown. If VIN is normally
above, but occasionally drops below the INTVCC regula-
tion voltage, then the minimum operating VIN is close to
6V. This value is determined by the dropout voltage of the
linear regulator and the 4V INTVCC undervoltage lockout
threshold mentioned above.
Programming the Turn-On and Turn-Off Thresholds
with the EN/UVLO Pin
The falling UVLO value can be accurately set by the resistor
divider. A small 3μA pull-down current is active when EN/
UVLO is below the threshold. The purpose of this current
applicaTions inForMaTion
Figure 1.
LT3796/LT3796-1
37961 F01
EN/UVLO
R1
R2
VIN
is to allow the user to program the rising hysteresis. The
following equations should be used to determine the
values of the resistors:
VIN(FALLING) =1.22 R1+R2
R2
VIN(RISING) =VIN(FALLING) +3µA R
1
LED Current Programming
The LED current is programmed by placing an appropriate
value current sense resistor RLED between the ISP and ISN
pins. Typically, sensing of the current should be done at
the top of the LED string. If this option is not available,
then the current may be sensed at the bottom of the string.
The CTRL pin should be tied to a voltage higher than 1.2V
to get the full-scale 250mV (typical) threshold across the
sense resistor. The CTRL pin can also be used to dim the
LED current to zero, although relative accuracy decreases
with the decreasing voltage sense threshold. When the
CTRL pin voltage is less than 1V, the LED current is:
ILED =VCTRL – 100mV
RLED 4
, 0.1V < VCTRL ≤ 1V
ILED = 0, VCTRL = 0V
When the CTRL pin voltage is between 1V and 1.2V, the
LED current varies with CTRL, but departs from the previ-
ous equation by an increasing amount as the CTRL volt-
age increases. Ultimately above 1.2V, the LED current no
LT3796/LT3796—1 R4 E R6+R7 L7HEJWEGR 1 5
LT3796/LT3796-1
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longer varies with CTRL. The typical V(ISP-ISN) threshold
vs CTRL is listed in the Table 1.
Table 1. V(ISP-ISN) Threshold vs CTRL
VCTRL (V) V(ISP-ISN) (mV)
1 225
1.05 236
1.1 244.5
1.15 248.5
1.2 250
When CTRL is higher than 1.2V, the LED current is regu-
lated to:
ILED =250mV
RLED
The CTRL pin should not be left open (tie to VREF if not
used). The CTRL pin can also be used in conjunction with
a thermistor to provide overtemperature protection for the
LED load, or with a resistor divider to VIN to reduce output
power and switching current when VIN is low. The presence
of a time varying differential voltage signal (ripple) across
ISP and ISN at the switching frequency is expected. The
amplitude of this signal is increased by high LED load
current, low switching frequency and/or a smaller value
output filter capacitor.
Programming Output Voltage (Constant-Voltage
Regulation) or Open LED/Overvoltage Threshold
The LT3796/LT3796-1 have two voltage feedback pins,
FB1 and FB2. Either one can be used for a boost or SEPIC
application. The difference between these two pins is
FB1 has a comparator that senses when FB1 exceeds
VFB – 60mV (VMODE threshold) and asserts the VMODE
output if V(ISP-ISN) is less than 25mV. This indicates that
the output is in voltage regulation mode and not current
Figure 2. Feedback Resistor Connections for Boost and SEPIC
Applications
Figure 3a. Feedback Resistor Connection for Buck Mode or
Buck-Boost Mode LED Driver
applicaTions inForMaTion
LT3796/
LT3796-1
37961 F03a R8
R5 LED
STRING
CSP
VOUT
CSN
VS
CSOUT
FB1
RLED
R6
R7
+
regulation. FB2 does not have this extra comparator. The
output voltage can be set by selecting the values of R3
and R4 (see Figure 2) according to the following equation:
VOUT =1.25 R3+R4
R4
For a boost type LED driver, set the resistor from the output
to the FB1 pin such that the expected VFB1 during normal
operation does not exceed 1.15V. For an LED driver of buck
mode or a buck-boost mode configuration, the FB voltage
is typically level shifted to a signal with respect to GND as
illustrated in Figure 3. The output can be expressed as:
VOUT =1.25
R8
R6 for Figure 3a
or VOUT =1.25 R9
+VBE(Q1) for Figure 3b
LT3796/LT3796-1
37961 F02
FB1
R3
R4
VOUT
LT3796/LT3796-1
LT3796/LT3796-1
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Open LED Detection
The LT3796/LT3796-1 provide an open-collector status pin,
VMODE, that pulls low when the FB1 pin is above 1.19V and
V(ISP-ISN) is less than 25mV. If the open LED clamp volt-
age is programmed correctly using the resistor divider,
then the FB1 pin should never exceed 1.15V when LEDs
are connected, therefore, the only way for the FB1 pin to
be within 60mV of the 1.25V regulation voltage is for an
open LED event to have occurred.
LED Over Current Protection Feature
The ISP and ISN pins have a short-circuit protection feature
independent of the LED current sense feature. This feature
prevents the development of excessive switching currents
and protects the power components. The short-circuit
protection threshold (375mV, typ) is designed to be 50%
higher than the default LED current sense threshold. Once
the LED over current is detected, the GATE pin is driven
to GND to stop switching, and TG pin is pulled high to
disconnect the LED array from the power path.
A typical LED short-circuit protection scheme for boost
or buck-boost mode converter is shown in Figure 4. The
Schottky diode D2 should be put close to the drain of
M2 on the board. It protects the LED+ node from swing-
ing well below ground when being shorted to ground
through a long cable. Usually, the internal protection loop
takes about 1µs to respond. Including PNP helper Q1 is
recommended to limit the transient short-circuit current.
With the PNP helper, the short-circuit current can be
limited to 2A, whereas the short-circuit current can reach
to 20A without the PNP helper as shown in Figure 5 and
Figure 6 respectively. Refer to boost LED driver with output
short-circuit protection and LED current monitor for the
test schematic. Note that the impedance of the short-circuit
cable affects the peak current.
applicaTions inForMaTion
Figure 4. The Simplified LED Short-Circuit Protection
Schematic for Boost/Buck-Boost Mode LED Driver
Figure 5. Short-circuit Current without PNP Helper
LT3796/
LT3796-1
37961 F04
Q1
RSNS
RLED
LED+
GND (BOOST) OR
VIN (BUCK-BOOST MODE)
LED
STRING D2
ISP
GATE
SENSE
VIN
VIN
C1 M1
M2
ISN
TG
C2
L1 D1
IM2
10A/DIV
FAULT
10V/DIV
37961 F05
1µs/DIV
LED+
50V/DIV
Figure 3b. Feedback Resistor Connection for Buck Mode or
Buck-Boost Mode LED Driver Using External PNP
LT3796/
LT3796-1
37961 F03b R10
Q1
LED
ARRAY
VOUT
FB1
R9 RSENSE
+
L7 LJUW LT3796/LT3796—1 17
LT3796/LT3796-1
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Figure 6. Short-circuit Current with PNP Helper
Figure 7. The Simplified LED Short-Circuit Protection Schematic
for Buck Mode Converter
Similar to boost, Schottky diodes D2, D3 and PNP transis-
tor Q1 are recommended to protect short-circuit event in
the buck mode.
PWM Dimming Control for Brightness
There are two methods to control the LED current for
dimming using the LT3796/LT3796-1. One method uses
the CTRL pin to adjust the current regulated in the LEDs.
A second method uses the PWM pin to modulate the LED
current between zero and full current to achieve a precisely
programmed average current, without the possibility of
color shift that occurs at low current in LEDs. To make
PWM dimming more accurate, the switch demand cur-
rent is stored on the VC node during the quiescent phase
when PWM is low. This feature minimizes recovery time
when the PWM signal goes high. To further improve
the recovery time, a disconnect switch should be used
in the LED current path to prevent the output capacitor
from discharging during the PWM signal low phase. The
minimum PWM on or off time depends on the choice of
operating frequency through the RT input. For best current
accuracy, the minimum PWM high time should be at least
three switching cycles (3μs for fSW = 1MHz).
A low duty cycle PWM signal can cause excessive start-up
times if it were allowed to interrupt the soft-start sequence.
Therefore, once start-up is initiated by PWM > 1V, it will
ignore a logical disable by the external PWM input signal.
The device will continue to soft-start with switching and
TG enabled until either the voltage at SS reaches the 1.0V
level, or the output current reaches one-fourth of the full-
scale current. At this point the device will begin following
the dimming control as designated by PWM. If at any time
an output overcurrent is detected, GATE and TG will be
disabled even as SS continues to charge.
Programming the Switching Frequency
The RT frequency adjust pin allows the user to program
the switching frequency from 100kHz to 1MHz to optimize
efficiency/performance or external component size. Higher
frequency operation yields smaller component size but
increases switching losses and gate driving current, and
may not allow sufficiently high or low duty cycle operation.
Lower frequency operation gives better performance at the
cost of larger external component size. For an appropriate
applicaTions inForMaTion
IM2
1A/DIV
FAULT
10V/DIV
37961 F06
1µs/DIV
LED+
50V/DIV
LT3796/LT3796-1
37961 F07
LED
STRING
TGISP ISNVIN
VIN RLED
RSNS
Q1 D3
GATE
SENSE
D1
D2
LED+
LED
L1
M1
M2
C2
C1
LT3796/LT3796-1 A
LT3796/LT3796-1
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RT resistor value see Table 2. An external resistor from the
RT pin to GND is required—do not leave this pin open.
Table 2. Typical Switching Frequency vs RT Value (1% Resistor)
fosc(kHz) RT(kΩ)
1000 6.65
900 7.50
800 8.87
700 10.2
600 12.4
500 15.4
400 19.6
300 26.1
200 39.2
100 82.5
Frequency Synchronization
The LT3796 switching frequency can be synchronized to an
external clock using the SYNC pin. For proper operation,
the RT resistor should be chosen for a switching frequency
20% lower than the external clock frequency. The SYNC
pin is disabled during the soft-start period. Observation
of the following guidelines about the SYNC waveform will
ensure proper operation of this feature. Driving SYNC
with a 50% duty cycle waveform is always a good choice,
otherwise, maintain the duty cycle between 20% and 60%.
When using both PWM and SYNC features, the PWM signal
rising edge must have the aligned rising edges to achieve
the optimized high PWM dimming ratio. If the SYNC pin
is not used, it should be connected to GND.
Duty Cycle Considerations
Switching duty cycle is a key variable defining converter
operation, therefore, its limits must be considered when
programming the switching frequency for a particular
application. The fixed minimum on-time and minimum
off-time (see Figure 8) and the switching frequency define
the minimum and maximum duty cycle of the switch,
applicaTions inForMaTion
Figure 8. Typical Minimum On- and Off-Time
vs Temperature
TEMPERATURE (°C)
–50
200
150
50
350
37961 F08
0–25 25 50 75 125100 150
100
0
250
300
TIME (ns)
MIN ON-TIME
MIN OFF-TIME
respectively. The following equations express the mini-
mum/ maximum duty cycle:
Min Duty Cycle = minimum on-time • switching
frequency
Max Duty Cycle = 1 minimum off-time switching
frequency
When calculating the operating limits, the typical values
for on/off-time in the data sheet should be increased by
at least 100ns to allow margin for PWM control latitude,
GATE rise/fall times and SW node rise/fall times.
Setting Input Current Limit
The LT3796/LT3796-1 have a standalone current sense
amplifier. It can be used to limit the input current. As
shown in Figure 9, the input current signal is converted
to voltage output at CSOUT pin. When the CSOUT voltage
exceeds FB2 regulation voltage, the GATE is pulled low,
and the converter stops switching. The input current limit
is calculated as follows:
IIN =1.25 RIN1
ROUT RSNS
f— T up E l_+ J___| "-4-" L7 LJUW LT3796/LT3796—1 19
LT3796/LT3796-1
19
3796fb
For more information www.linear.com/3796
Figure 9. Setting Input Current Limit
For buck applications, filter components, RIN2(OPT) and
COPT, are recommended to be placed close to LT3796/
LT3796-1 to suppress the substantial transient signal or
noise at across CSN and CSP pins. For boost and buck-
boost applications, RIN2(OPT) and COPT are not required.
A low QG power MOSFET should always be used when
operating at high input voltages, and the switching fre-
quency should also be chosen carefully to ensure that the
IC does not exceed a safe junction temperature. The internal
junction temperature, TJ of the IC can be estimated by:
TJ = TA + [VIN • (IQ + fSW • QG) •θJA]
where TA is the ambient temperature, IQ is the VIN operating
current of the part (2.5mA typical) and θJA is the package
thermal impedance (30°C/W for the TSSOP package). For
example, an application with TA(MAX) = 85°C, VIN(MAX) =
60V, fSW = 400kHz, and having a N-channel MOSFET with
QG = 20nC, the maximum IC junction temperature will be
approximately:
TJ = 85°C + [60V • (2.5mA + 400kHz • 20nC) • 30°C/W]
≈ 104°C
The exposed pad on the bottom of the package must be
soldered to a ground plane. This ground should then be
connected to an internal copper ground plane with thermal
vias placed directly under the package to spread out the
heat dissipated by the IC.
It is best if the copper plane is extended on either the top
or bottom layer of the PCB to have the maximum exposure
to air. Internal ground layers do not dissipate thermals as
much as top and bottom layer copper does. See recom-
mended layout as an example.
Input Capacitor Selection
The input capacitor supplies the transient input current for
the power inductor of the converter and must be placed
and sized according to the transient current requirements.
The switching frequency, output current and tolerable input
voltage ripple are key inputs to estimating the capacitor
value. An X7R type ceramic capacitor is usually the best
choice since it has the least variation with temperature
and DC bias. Typically, boost and SEPIC converters
applicaTions inForMaTion
LT3796/LT3796-1
37961 F03
RIN2(OPT)
RSNS
RIN1
CSP
FB2
CSN
TO LOAD VIN
IIN
VS
CSOUT
VS
COPT
+
ROUT
CFILT
+VSNS
Thermal Considerations
The LT3796/LT3796-1 are rated to a maximum input volt-
age of 100V. Careful attention must be paid to the internal
power dissipation of the IC at higher input voltages to
ensure that a junction temperature of 150°C is not ex-
ceeded. This junction limit is especially important when
operating at high ambient temperatures. The majority of
the power dissipation in the IC comes from the supply
current needed to drive the gate capacitance of the external
power N-channel MOSFET. This gate drive current can be
calculated as:
IGATE = fSW • QG
LT3796/LT3796—1 VLED VLED V‘N LED 2 20 L7ELUEN2
LT3796/LT3796-1
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require a lower value capacitor than a buck mode converter.
Assuming that a 100mV input voltage ripple is acceptable,
the required capacitor value for a boost converter can be
estimated as follows (TSW = 1/fOSC):
CIN(µF) =ILED(A) VLED
VIN
TSW(µs) 1µF
Aµs 2.8
Therefore, a 2.2µF capacitor is an appropriate selection
for a 400kHz boost regulator with 12V input, 48V output
and 500mA load.
With the same VIN voltage ripple of less than 100mV, the
input capacitor for a buck converter can be estimated as
follows:
CIN(µF)=ILED(A)VLED(VIN – VLED)
VIN2TSW(µs)10µF
Aµs
A 10µF input capacitor is an appropriate selection for a
400kHz buck mode converter with 24V input, 12V output
and 1A load.
In the buck mode configuration, the input capacitor has
large pulsed currents due to the current returned through
the Schottky diode when the switch is off. It is important
to place the capacitor as close as possible to the Schottky
diode and to the GND return of the switch (i.e., the sense
resistor). It is also important to consider the ripple current
rating of the capacitor. For best reliability, this capacitor
should have low ESR and ESL and have an adequate ripple
current rating. The RMS input current for a buck mode
LED driver is:
IIN(RMS) = ILED • √(1–D)D
D=VLED
VIN
where D is the switch duty cycle.
Table 3. Recommended Ceramic Capacitor Manufacturers
MANUFACTURER WEB
TDK www.tdk.com
Kemet www.kemet.com
Murata www.murata.com
Taiyo Yuden www.t-yuden.com
AVX www.avx.com
Output Capacitor Selection
The selection of the output capacitor depends on the load
and converter configuration, i.e., step-up or step-down
and the operating frequency. For LED applications, the
equivalent resistance of the LED is typically low and the
output filter capacitor should be sized to attenuate the
current ripple. Use of an X7R type ceramic capacitor is
recommended.
To achieve the same LED ripple current, the required filter
capacitor is larger in the boost and buck-boost mode ap-
plications than that in the buck mode applications. Lower
operating frequencies will require proportionately higher
capacitor values.
Power MOSFET Selection
For applications operating at high input or output volt-
ages, the power N-channel MOSFET switch is typically
chosen for drain voltage VDS rating and low gate charge
QG. Consideration of switch on-resistance, RDS(ON), is
usually secondary because switching losses dominate
power loss. The INTVCC regulator on the LT3796/LT3796-1
has a fixed current limit to protect the IC from excessive
power dissipation at high VIN, so the MOSFET should be
chosen so that the product of QG at 7.7V and switching
frequency does not exceed the INTVCC current limit. For
driving LEDs be careful to choose a switch with a VDS
rating that exceeds the threshold set by the FB pin in case
of an open load fault. Several MOSFET vendors are listed
applicaTions inForMaTion
LT3796/LT3796—1 L7 LJUW 2 1
LT3796/LT3796-1
21
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applicaTions inForMaTion
in Table 4. The MOSFETs used in the application circuits
in this data sheet have been found to work well with the
LT3796/LT3796-1. Consult factory applications for other
recommended MOSFETs.
Table 4. MOSFET Manufacturers
VENDOR WEB
Vishay Siliconix www.vishay.com
Fairchild www.fairchildsemi.com
International Rectifier www.irf.com
Infineon www.infineon.com
High Side PMOS Disconnect Switch Selection
A high side PMOS disconnect switch with a minimum VTH
of –1V to –2V is recommended in most LT3796/LT3796-1
applications to optimize or maximize the PWM dimming
ratio and protect the LED string from excessive heating
during fault conditions as well. The PMOS disconnect
switch is typically selected for drain-source voltage VDS,
and continuous drain current ID. For proper operations,
VDS rating must exceed the open LED regulation voltage
set by the FB1 pin, and ID rating should be above ILED.
Schottky Rectifier Selection
The power Schottky diode conducts current during the
interval when the switch is turned off. Select a diode rated
for the maximum SW voltage. If using the PWM feature for
dimming, it is important to consider diode leakage, which
increases with the temperature, from the output during the
PWM low interval. Therefore, choose the Schottky diode
with sufficiently low leakage current. Table 5 has some
recommended component vendors.
Table 5. Schottky Rectifier Manufacturers
VENDOR WEB
On Semiconductor www.onsemi.com
Diodes, Inc www.diodes.com
Central Semiconductor www.centralsemi.com
Rohm Semiconductor www.rohm.com
Sense Resistor Selection
The resistor, RSENSE, between the source of the external
N-channel MOSFET and GND should be selected to provide
adequate switch current to drive the application without
exceeding the 113mV (typical) current limit threshold on
the SENSE pin of LT3796/LT3796-1. For buck mode ap-
plications, select a resistor that gives a switch current at
least 30% greater than the required LED current. For buck
mode, select a resistor according to:
RSENSE(BUCK) 0.07V
ILED
For buck-boost mode, select a resistor according to:
RSENSE(BUCK BOOST) VIN 0.07V
(VIN +VLED)ILED
For boost, select a resistor according to:
RSENSE(BOOST) VIN 0.07V
VLED ILED
The placement of RSENSE should be close to the source
of the NMOS FET and GND of the LT3796/LT3796-1. The
SENSE input to LT3796/LT3796-1 should be a Kelvin con-
nection to the positive terminal of RSENSE.
70mV is used in the equations above to give some margin
below the 113mV (typical) sense current limit threshold.
Inductor Selection
The inductor used with the LT3796/LT3796-1 should have
a saturation current rating appropriate to the maximum
switch current selected with the RSENSE resistor. Choose
an inductor value based on operating frequency, input and
output voltage to provide a current mode signal on SENSE
LT3796/LT3796—1 Tsw 'RSENSE‘VLEDWW’VLED) TSW'RSENSE'VLED 'Vw Tsw'RSENSE‘VIN (VLED ’Vw) 22 L7ELUEN2
LT3796/LT3796-1
22
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of approximately 20mV magnitude. The following equations
are useful to estimate the inductor value (TSW = 1/fOSC):
LBUCK =
T
SW
R
SENSE
V
LED
(V
IN
V
LED
)
VIN 0.02V
LBUCK, BOOST =
T
SW
R
SENSE
V
LED
V
IN
(VLED +VIN)0.02V
LBOOST =
T
SW
R
SENSE
V
IN
(V
LED
V
IN
)
VLED 0.02V
Table 6 provides some recommended inductor vendors.
Table 6. Inductor Manufacturers
VENDOR WEB
Sumida www.sumida.com
Würth Elektronik www.we-online.com
Coiltronics www.cooperet.com
Vishay www.vishay.com
Coilcraft www.coilcraft.com
Loop Compensation
The LT3796/LT3796-1 use an internal transconductance
error amplifier whose VC output compensates the con-
trol loop. The external inductor, output capacitor and the
compensation resistor and capacitor determine the loop
stability. The inductor and output capacitor are chosen
based on performance, size and cost. The compensation
resistor and capacitor at VC are selected to optimize control
loop response and stability. For typical LED applications,
a 22nF compensation capacitor at VC is adequate, and
a series resistor should always be used to increase the
slew rate on the VC pin to maintain tighter regulation of
LED current during fast transients on the input supply to
the converter.
Soft-Start Capacitor Selection
For many applications, it is important to minimize the
inrush current at start-up. The built-in soft-start circuit
significantly reduces the start-up current spike and output
voltage overshoot. The soft-start interval is set by the
soft-start capacitor selection according to the equation:
TSS =CSS 2V
28
µ
A
A typical value for the soft-start capacitor is 0.1µF. The
soft-start pin reduces the oscillator frequency and the
maximum current in the switch. Soft-start also operates
as fault protection, which forces the converter into hiccup
or latchoff mode. Detailed information is provided in the
Fault Protection: Hiccup Mode and Latchoff Mode section.
Fault Protection: Hiccup Mode and Latchoff Mode
If an LED overcurrent condition, INTVCC undervoltage, or
thermal limit happens, an open-drain pull-down on FAULT
asserts. The TG pin is pulled high to disconnect the LED
array from the power path, and the GATE pin is driven low.
If the soft-start pin is charging and still below 1.7V, then
it will continue to do so with a 28µA source. Once above
1.7V, the pull-up source is disabled and a 2.8µA pull-down
is activated. While the SS pin is discharging, the GATE is
forced low. When SS pin is discharged below 0.2V, a new
cycle is initiated. This is referred as hiccup mode operation.
If the fault still exists when SS crosses below 0.2V, then
a full SS charge/discharge cycle has to complete before
switching is enabled and the FAULT flag is deasserted.
If a resistor is placed between VREF pin and SS pin to hold
SS pin higher than 0.2V during a fault, then the LT3796/
LT3796-1 will enter latchoff mode with GATE pin low, TG
pin high and FAULT pin low. To exit latchoff mode, the EN/
UVLO pin must be toggled low to high.
applicaTions inForMaTion
L7 LJUW LT3796/LT3796—1 23
LT3796/LT3796-1
23
3796fb
For more information www.linear.com/3796
Board Layout
The high speed operation of the LT3796/LT3796-1 demands
careful attention to board layout and component placement.
The exposed pad of the package is the GND terminal of
the IC and is also important for thermal management of
the IC. It is crucial to achieve a good electrical and thermal
contact between the exposed pad and the ground plane
of the board. To reduce electromagnetic interference
(EMI), it is important to minimize the area of the high
dV/dt switching node between the inductor, switch drain
and anode of the Schottky rectifier. Use a ground plane
under the switching node to eliminate interplane coupling
to sensitive signals. The lengths of the high dI/dt traces:
1) from the switch node through the switch and sense
resistor to GND, and 2) from the switch node through
the Schottky rectifier and filter capacitor to GND should
be minimized. The ground points of these two switch-
ing current traces should come to a common point then
connect to the ground plane under the LT3796/LT3796-1.
Likewise, the ground terminal of the bypass capacitor for
the INTVCC regulator should be placed near the GND of
the switching path. Typically, this requirement results in
the external switch being closest to the IC, along with the
INTVCC bypass capacitor. The ground for the compensa-
tion network and other DC control signals should be star
connected to the underside of the IC. Do not extensively
route high impedance signals such as FB1, FB2, RT and
VC, as they may pick up switching noise. Since there is a
small variable DC input bias current to the ISN and ISP
inputs, resistance in series with these pins should be
minimized to avoid creating an offset in the current sense
threshold. Likewise, minimize resistance in series with the
SENSE input to avoid changes (most likely reduction) to
the switch current limit threshold.
Figure 10 is a suggested two sided layout for a boost
converter. Note that the 4-layer layout is recommended
for best performance. Please contact the factory for the
reference layout design.
applicaTions inForMaTion
LT3796/LT3796—1 o x—x x 0000 El] vm FROM ISP x a... C """" 3 El] vwnomlsm 1 V‘AFROMTG :E3 3% El] —X EC} 33 ’E El,,;j EDI] .D:|] E} :3 E1' '13 .D:|]D:IJ E}..lj ofl:|] E1 33 X X 77% El°“j U_U E3 :3 % E} 13 El] C} i:| % E 7777777 ESE ID. ID. .0. I.- II. E jj :D E :I 'fi' E 3 n:n C. I: :I L7LJCUEN2
LT3796/LT3796-1
24
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For more information www.linear.com/3796
applicaTions inForMaTion
Figure 10. Boost Converter Suggested Layout
37961 F10
LT3796
2
3
1
4
5
6
7
8
9
10
11
12
13
14
21
20
22
19
18
17
16
15
26
27
28
23
24
25
M2
LED+
X OUT VIA
VIA FROM ISP
VIA FROM VIN
VIA FROM VIN
VIA FROM ISN
ISMON
VIA FROM INTVCC
VIA FROM
GATE
SYNC
PWM
VIA FROM TG
X
X
X
X
29
X
X
X
X
X X ISP VIAISN VIA
TG VIA
COMPONENT DESIGNATIONS REFER TO BOOST LED DRIVER WITH OUTPUT SHORT CIRCUIT PROTECTION AND LED CURRENT MONITOR
Q1
M1
VIN VIA
X
C3
RSNS1
RSNS
R4
R3
R9 R10
R6 R5
R8
R7
CCRC
R2
C6
RT
VIA FROM
OUT
VIA FROM VIN
C2
C2
C2
C2
C5
L1
D1
2
3
1
4
6
7
8
5
6
7
5
8
2
3
4
1
RLED
D2
R1
VIN
VREF
VIAS TO GROUND PLANE
X X ROUTING ON THE 2nd LAYER C1 C1 C1
X
X
X
X
INTVCC VIA
GATE VIA
C4
LT3796/LT3796—1 v 4, R “5‘ 5am U 22w L7HEJWEGR 25
LT3796/LT3796-1
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Typical applicaTions
Boost LED Driver with Output Short Circuit Protection and LED Current Monitor
Fault (Short LED) Protection without R11: Hiccup Mode Fault (Short LED) Protection with R11: Latchoff Mode
IM2
1A/DIV
FAULT
10V/DIV
37961 TA02b
50ms/DIV
SS
2V/DIV
LED+
50V/DIV
IM2
1A/DIV
FAULT
10V/DIV
37961 TA02c
50ms/DIV
LED+
50V/DIV
SS
2V/DIV
R2
118k
CSPVS
VIN CSN
SS
VREF
R5
2k
85V LED
LT3796
37961 TA02a
CTRL
CSOUT
PWM
SYNC
PWM
SYNC
M1: INFINEON BCS160N10NS3-G
M2: VISHAY SILICONIX Si7113DN
L1: COILTRONICS DR127-220
D1: DIODES INC PDS5100
D2: VISHAY ES1C
Q1: ZETEX FMMT589
LED: CREE XLAMP XR-E
ISMON
EN/UVLO
GND
FB1
ISP
ISN
TG
GATE
SENSE
L1 22µH
R
SNS1
50mΩ
IIN
9V TO 60V
100V (TRANSIENT)
D1
RC
10k
RT
31.6k
250kHz
CC
10nF
R3
499k
R4
97.6k
R1
1M
C1
2.2µF
×3
V
IN
C2
2.2µF
×4
100V
R8
13.7k
RSNS
15mΩ
RLED
620mΩ
M2
Q1
M1
D2
UP TO
400mA
R6
40.2k
C3
10nF
CSOUT
OPTIONAL INPUT
CURRENT REPORTING
R7
1M
VMODE
FAULT
VMODE
FAULT
LED CURRENT REPORTING
R11 OPTIONAL
FOR FAULT LATCHOFF
R11 402k (OPT)
VCRT
FB2
INTVCC
C5
4.7µF
C6
0.1µF
INTVCC
R10
100k R9
100k
INTVCC
C4
0.1µF
LT3796/LT3796—1 H \l N 26 L7ELUEN2
LT3796/LT3796-1
26
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Typical applicaTions
Buck Mode LED Driver with Open LED Flag and LED Current Reporting
Efficiency vs VIN
VIN (V)
20
75
100
37961 TA03b
30 40 50 7060 80
80
70
85
95
90
EFFICIENCY (%)
R2
61.9k
ISPVS
VIN TGISN
RT SS
VCSYNC
M1
LT3796
37961 TA03a
CTRL
PWM
FB2
ISMON
PWM
LED CURRENT REPORTING
EN/UVLO
VREF
CSOUT
FB1
GATE
SENSE
GND
INTVCC
CSP
CSN
CC
4.7nF
R1
1M
L1
33µH
RLED 100mΩ M2 LED+
24V TO 80V
D1
2.5A
RT
19.6k
400kHz
RC
10k
C3
4.7µF
INTVCC
C4
0.1µF
C5
0.1µF
V
IN
C2
4.7µF
×2
25V
R6
59k
R3
49.9k R4
49.9k
R5 1M
RSNS
15mΩ
18V
LED
C1
2.2µF
×3
100V
M1: VISHAY SILICONIX Si7454DP
M2: VISHAY SILICONIX Si7113DN
D1: DIODES INC PDS3100
L1: COILTRONICS HC9-330
LED: CREE XLAMP XM-L
VMODE
FAULT
VMODE
FAULT
R8
100k R9
100k
INTVCC
LT3796/LT3796—1 L7 LJUW 27
LT3796/LT3796-1
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SEPIC LED Driver Using FB2 for Input Overvoltage Protection
Typical applicaTions
Efficiency vs VIN
VIN (V)
0
75
100
37961 TA04b
10 20 30 5040 60
80
70
85
95
90
EFFICIENCY (%)
CSPVSCSN
RT SYNC SS
VC
VMODE
FAULT
R6
2k
22V
LED
LT3796
37961 TA04a
CTRL
FB2
CSOUT
PWM
PWM
OPTIONAL INPUT
CURRENT REPORTING
M1: VISHAY SILICONIX Si7456DP
M2: VISHAY Si7415DN
L1: COILTRONICS DRQ127-220
D1: DIODES INC PDS5100
LED: CREE XLAMP XR-E
ISMON
LED CURRENT REPORTING
EN/UVLO
VREF
GND
FB1
ISP
ISN
TG
INTVCC INTVCC
GATE
SENSE
CC
10nF
L1A 22µH
RSNS1 50mΩIIN D1
RT
19.6k
400kHz
RC
4.99k
VIN
C5
4.7µF
C4
0.1µF
C7
0.1µF
R4
511k
R5
100k
8V TO 60V
VIN
C2
10µF
×3
35V
C1
2.2µF
×3
100V
R11
40.2k
RSNS
15mΩ
RLED
250mΩ
UP TO
1A
M2
M1
L1B
R7
40.2k
C3
0.1µF
CSOUT
R10
909k
C6
2.2µF
100V
R3
20k
R2
75k
R1
953k
VMODE
FAULT
R8
100k R9
100k
INTVCC
LT3796/LT3796—1
LT3796/LT3796-1
28
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SEPIC Sealed Lead Acid (SLA) Battery Charger
Typical applicaTions
VCHARGE, VFLOAT vs Temperature
TEMPERATURE (°C)
17.5
37961 TA05b
–40–30–20 0 10 20 30 40–10 8050 60 70
13.0
14.0
14.5
15.0
15.5
16.0
16.5
17.0
12.5
13.5
VCHARGE, VFLOAT (V)
VCHARGE
VFLOAT
R3
20k
CSPVS
VIN CSN
RT
VCFAULT
R6
2k
LT3796
37961 TA05a
CTRL
FB2
CSOUT
PWM
TG
SYNC
VREF
OUTPUT CURRENT
REPORTING
OPTIONAL INPUT
CURRENT REPORTING
M1: VISHAY SILICONIX Si7456DP
M2: VISHAY SUD19P06-60-E3
M3: ZETEX ZXM61N03F
L1: COILCRAFT MSD1260-333
D1: ON SEMI MBRS260T3G
D2: CENTRAL SEMI CMDZ15L
R11: MURATA NCP18XH103F03RB
ISMON
SS
EN/UVLO
VREF
FB1
ISP
ISN
VMODE VMODE
FAULT
OUT
BAT
INTVCC INTVCC
GATE
SENSE
GND
CC
10nF
L1A 33µH
RSNS1 50mΩM2 IIN
8V TO 40V
100V (TRANSIENT)
D1 RSNS2
250mΩ
RT
19.6k
400kHz
RC
499Ω
C4
0.1µF
R4
357k
R5
100k
R2
806k
R1
10k
D2
15V
C1
4.7µF
50V
VIN
BAT
R13
93.1k
RSNS
15mΩ
M3
M1
R7
40.2k
C3
10nF
CSOUT
R12
30.1k
R11
10k
NTC
R10
10.2k
C5
4.7µF
R8
49.9k
R14
49.9k
L1B
C6
2.2µF
100V OUT VCHARGE = 14.6V
VFLOAT = 13.5V
AT 25°C
BAT
C2
10µF
+
R9
113k
C7
0.1µF
L7 LJUW LT3796/LT3796—1 29
LT3796/LT3796-1
29
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For more information www.linear.com/3796
28VIN to 28V SuperCap Charger with Input Current Limit and Charge Done Flag
Typical applicaTions
Input and Output Current vs Output Voltage
VOUT (V)
0
800
600
200
1800
37961 TA06b
510 15 25
IOUT
20 30
400
0
1000
1600
1400
1200
INPUT/OUTPUT CURRENT (mA)
IIN
CSPVS
VIN CSN
CTRL RT VC
VREF
R1
20k
LT3796
37961 TA06a
PWM
SYNC
CSOUT
FB2
VREF
OUTPUT CURRENT REPORTING
L1: COILCRAFT MSD1260-333
D1: ON SEMI MBRS260T3G
M1: VISHAY SILICONIX Si7850
Q1: ZETEX FMMT591A
SS
EN/UVLO
ISMON
GND
FB1
ISP
ISN
TG
INTVCC
GATE
SENSE
L1A 33µH
L1B
RSNS1 150mΩ
1.33A MAX VOUT = 0V TO 28V
28V
D1
CC
22nF
RC
499Ω
RT
19.6k
400kHz
C6
4.7µF
C4
0.1µF
C1
10µF
VIN
C2
4.7µF
×2
50V
C6
2.2µF ×2
R9
24.9k
RSNS
33mΩ
RSNS2
150mΩ
SUPERCAP
M1
1.67A
MAX
R2
124k
R5
1M
R3
499k R10
499k
VOUT
R4
30.1k
Q1
C3
0.1µF
CSOUT
C7
0.1µF
R8
536k
C5
0.1µF
INPUT CURRENT
REPORTING AND LIMIT
CHGDONE
FAULT
VMODE
FAULT
R7
100k R6
100k
INTVCC
LT3796/LT3796—1 me «HF our
LT3796/LT3796-1
30
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Typical applicaTions
SEPIC Converter with RWIRE Compensation and Output Current Limit
Line Impedance Compensation Load Step Response
ILOAD (mA)
13.0
37961 TA08b
0 400 600 800 1000 1200200
11.0
10.5
10.0
11.5
12.5
12.0
VOUT/VLOAD (V)
VOUT
VLOAD
RWIRE = 0.5Ω
VOUT
500mV/DIV
(AC)
37961 TA08c
500µs/DIV
IOUT
500mA/DIV
200mA
800mA
GATE GNDVIN SENSE
RT VC
LT3796
37961 TA08a
PWM
SYNC
FB2
VREF
L1: WÜRTH 744871220
D1: ZETEX ZLLS2000TA
M1: VISHAY SILICONIX Si4840DY
SS
CTRL
VREF
EN/UVLO
ISMON
CSN
OUT
VS
CSP
CSOUT
FB1
TG
INTVCC
INTVCC
ISP
ISN
L1A 22µH
L1B
M1
C2
10µF OUT
RWIRE VLOAD
12V, 1A CURRENT LIMIT
RSNS1
250mΩ
12V
D1
1:1
CC
10nF
RT
19.6k
400kHz
RC
24.9k
C6
4.7µF
C5
0.1µF
C8
0.1µF
C1
10µF
VIN
C3
10µF
C4
100µF
25V
RSNS
33mΩ
C7
F
R1
38.3k R2
38.3k
R3
154k
R4
287k
R5
12.4k
+
VMODE
FAULT
VMODE
FAULT
R7
100k R6
100k
INTVCC
LT3796/LT3796—1 WW Wiw " L7 LJUW 31
LT3796/LT3796-1
31
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For more information www.linear.com/3796
Typical applicaTions
Solar Panel Driven SLA Battery Charger with Maximum Power Point Tracking
ICHARGE vs VIN
VIN (V)
1.2
37961 TA09b
20 30 35 4025
0.4
0.2
0
0.6
0.8
1.0
ICHARGE (A)
CSNVIN VSCSP
RT
VCFAULT
LT3796
37961 TA09a
CTRL
CSOUT
FB2
PWM
TG
M1: VISHAY SILICONIX Si7456DP
M2: VISHAY SUD19P06-60-E3
M3: ZETEX ZXM61N03F
L1: COILCRAFT MSD1260-333
D1: ON SEMI MBRS260T3G
D2: CENTRAL SEMI CMDZ15L
R9: MURATA NCP18XH103F03RB
VREF
ISMON
SYNC
SS
EN/UVLO
FB1
OUT
ISP
ISN
INTVCC INTVCC
FAULT
GATE
SENSE
GND
L1A 33µH
OUT RSNS1
250mΩ
R10
30.1k
L1B
WÜRTH SOLAR PANEL
VOC = 37.5V
VMPP = 28V
D1
1:1
RT
19.6k
400kHz
RC
499Ω
CC
22nF
C4
0.1µF
C3
0.1µF
CSOUT
C1
4.7µF
50V
VIN
BAT
C2
10µF
BAT VCHARGE = 14.6V
VFLOAT = 13.5V
AT 25°C
BAT
R9
10k
NTC
R5
137k
INTVCC
R4
301k
+
R11
93.1k
RSNS
15mΩ
M1
M3
R12
10.2k
R8
113k
R3
20k
R2
475k
M2
D2
15V
R6
100k
R1
10k
C6
2.2µF 100V
C6
0.1µF
VMODE VMODE
R7
49.9k
R12
49.9k
C5
4.7µF
LT3796/LT3796—1 «H I— HH % L w I—T_I_| m “L § -| ' Yin .Ing—EII” w»- W «H We |—w~.— IH IliH Hi \ ; M 32 L7ELUEN2
LT3796/LT3796-1
32
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For more information www.linear.com/3796
Typical applicaTions
Boost LED Driver for Twin LEDs with Detection and Protection for Faulty LED
Short One LED from String 1 Short One LED from String 2
CSOUT
1V/DIV
ISMON
1V/DIV
37961 TA10b
20ms/DIV
ILED2
500mA/DIV
ILED1
500mA/DIV
500mA
500mA 500mA
CSOUT
1V/DIV
1V
ISMON
1V/DIV
37961 TA10c
1ms/DIV
ILED1
500mA/DIV
ILED2
500mA/DIV 500mA
1.25V
625mA
M1: VISHAY SILICONIX Si7460DP
M2: VISHAY SILICONIX Si7415DN
D1: DIODES INC PDS3100
D2, D3, D4: NXP PMEG6010CEJ
Q1, Q2: ZETEX FMMT589
L1: WÜRTH 744 355 122 1
LED: CREE XLAMP XR-L
SENSEGATE GND
VMODE
FAULT
VMODE
FAULT
LT3796-1
37961 TA10a
ISMON
CSOUT
PWM
VREF
CTRL
TGEN
FB2
SS VCRT
SS
EN/UVLO
CSP R8 10k
CSN
ISP
ISN
TG
INTVCC
FB1
VS
L1
22µH D1
VIN
8V TO 20V
C5
4.7µF
RC
1k
VIN
INTVCC
R1
499k
R2
97.6k
C6
2.2µF
×4
100V
R7
22.6k
RSNS
15mΩ
M1
M2 M3
Q1
RLED1
500mΩ
RLED2
500mΩ
R3
40.2k
R4
100k R5
100k
LED STRING 1
CURRENT REPORTING
LED STRING 2
CURRENT REPORTING
INTVCC
C1
2.2µF
×3 R6
1M
CC
22nF
C3
0.1µF
RT
31.6k
250kHz
D2
9 LEDs
STRING 1 9 LEDs
STRING 2
C2
0.1µF
D3
D4
R9
20k
R11
10k
SS
INTVCC
R10
10k
Q2
LT3796/LT3796—1 L7 LJUW 33
LT3796/LT3796-1
33
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SEPIC LED Driver with 100:1 Analog Dimming
ILED vs VCTRL_IN
Typical applicaTions
VCTRL_IN (V)
1200
37961 TA11b
0 4 6 82
400
200
0
600
800
1000
ILED (mA)
M1: INFINEON BSC16ON1ONS3-G
M2: VISHAY SILICONIX Si7461DP
M3: ZETEX ZXM6IN02F
L1: COILTRONICS DR Q 127-220
D1: DIODES INC PDS5100
D2: NXP PMEG6010CEJ
LED: CREE XLAMP XR-E
SENSEGATE GND
LT3796-1
37961 TA11a
ISMON
CSOUT
PWM
VREF
VREF
CTRL
TGEN
FAULT
VMODE
FAULT
VMODE
FB2
SS VCRT
EN/UVLO
CSP
CSN
ISP
ISN
TG
INTVCC
FB1
VS
L1A
22µH
L1B
C3
2.2µF ×2 50V INTVCC
D1
R17 10k
VIN
8V TO 20V
C8
4.7µF
RC
1k
R11
200k
R7
100k
M3
R10
7.87k
VIN
INTVCC
R1
499k
R2
97.6k
D2
C7
2.2µF
×4
50V
R13
23.7k
R14 6.65k
RSNS
15mΩ
RLED1
270mΩ
M2
RLED2
3.32Ω
C1
2.2µF
×3 R12
1M
M1
CC
22nF
RT
19.6k
400kHz
22V LED
R6 10k
LED CURRENT
REPORTING C2
0.1µF
C3
0.1µF
C6
0.1µF
R15
100k R16
100k
+
R8 100k
R5 1k
INTVCC
8
3
2
4
1
R4
113k
LTC1541
OP AMP
R3
200k
VREF
+
5
6
7
LTC1541
COMP
1.2V INTERNAL
REFERENCE
C4
0.1µF
R9 30.1k
C5
0.1µF
CTRL_IN
LT3796/LT3796—1 475 asursfin‘ nan ’ 13757 335) |]|]|][|]|]|]|]|]|][|]|]|] Hffia 1 mm T iiiiiiiii l \ l L 1 7 H 9%; ‘ + ‘ film ’nnnnnnnnnqunHi QLWWJ77¢ i 4304er (an; ‘ (‘69, m) ‘ % ‘ ‘ 7 ' x ‘6 0097020 4 ‘7 (U255) ousiu‘i (00357 0079) “957030 ‘ (0027 005) (00777 mm) e
LT3796/LT3796-1
34
3796fb
For more information www.linear.com/3796
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
FE28 (EB) TSSOP REV J 1012
0.09 – 0.20
(.0035 – .0079)
0° 8°
0.25
REF
0.50 – 0.75
(.020 – .030)
4.30 – 4.50*
(.169 – .177)
1 3 4 5678 9 10 11 12 13 14
192022 21 151618 17
9.60 – 9.80*
(.378 – .386)
4.75
(.187)
2.74
(.108)
28 27 26 2524 23
1.20
(.047)
MAX
0.05 – 0.15
(.002 – .006)
0.65
(.0256)
BSC 0.195 – 0.30
(.0077 – .0118)
TYP
2
RECOMMENDED SOLDER PAD LAYOUT
EXPOSED
PAD HEAT SINK
ON BOTTOM OF
PACKAGE
0.45 ±0.05
0.65 BSC
4.50 ±0.10
6.60 ±0.10
1.05 ±0.10
4.75
(.187)
2.74
(.108)
MILLIMETERS
(INCHES) *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.150mm (.006") PER SIDE
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS
2. DIMENSIONS ARE IN
3. DRAWING NOT TO SCALE
SEE NOTE 4
4. RECOMMENDED MINIMUM PCB METAL SIZE
FOR EXPOSED PAD ATTACHMENT
6.40
(.252)
BSC
FE Package
28-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663 Rev J)
Exposed Pad Variation EB
LT3796/LT3796—1 L7 LJUW 35
LT3796/LT3796-1
35
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For more information www.linear.com/3796
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
revision hisTory
REV DATE DESCRIPTION PAGE NUMBER
A 1/13 Added LT3796-1 option 1 to 36
B 3/14 Clarified Schematic 33
LT3796/LT3796—1 ”H I~ Mm Lb: // 36 L7ELUEN2
LT3796/LT3796-1
36
3796fb
For more information www.linear.com/3796
LINEAR TECHNOLOGY CORPORATION 2012
LT 0314 REV B • PRINTED IN USA
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 FAX: (408) 434-0507 www.linear.com/3796
relaTeD parTs
Typical applicaTion
PART NUMBER DESCRIPTION COMMENTS
LT3755/LT3755-1
LT3755-2 High Side 60V, 1MHz LED Controller with
True Color 3,000:1 PWM Dimming VIN: 4.5V to 40V, VOUT Range: 5V to 60V, True Color PWM, Analog = 3000:1, ISD < 1µA,
3mm × 3mm QFN-16, MSOP-16E Packages
LT3756/LT3756-1
LT3756-2 High Side 100V, 1MHz LED Controller with
True Color 3,000:1 PWM Dimming VIN: 6V to 100V, VOUT Range: 5V to 100V, True Color PWM, Analog = 3000:1, ISD < 1µA,
3mm × 3mm QFN-16, MSOP-16E Packages
LT3743 Synchronous Step-Down 20A LED Driver
with Three-State LED Current Control VIN: 5.5V to 36V, VOUT Range: 5.5V to 35V, True Color PWM, Analog = 3000:1, ISD < 1µA,
4mm × 5mm QFN-28, TSSOP-28E Packages
LT3791 60V, Synchronous Buck-Boost LED Driver
Controller VIN: 4.7V to 60V, VOUT Range: 1.2V to 60V, True Color PWM, Analog, ISD < 1µA,
TSSOP-38E Package
LT3791-1 60V, Synchronous Buck-Boost Controller VIN: 4.7V to 60V, VOUT Range: 1.2V to 60V, ISD < 1µA, TSSOP-38E Package
LT3517 1.3A, 2.5MHz High Current LED Driver
with 3,000:1 Dimming VIN: 3V to 30V, True Color PWM, Analog = 3000:1, ISD < 1µA, 4mm × 4mm QFN-16
Package
LT3518 2.3A, 2.5MHz High Current LED Driver
with 3,000:1 Dimming VIN: 3V to 30V, True Color PWM, Analog = 3000:1, ISD < 1µA, 4mm × 4mm QFN-16
Package
LT3474/LT3474-1 36V, 1A (ILED), 2MHz, Step-Down LED
Driver VIN: 4V to 36V, VOUT Range = 13.5V, True Color PWM = 400:1, ISD < 1µA, TSSOP-16E
Package
LT3475/LT3475-1 Dual 1.5A(ILED), 36V, 2MHz, Step-Down
LED Driver VIN: 4V to 36V, VOUT Range = 13.5V, True Color PWM, Analog = 3000:1, ISD < 1µA,
TSSOP-20E Package
VIN (V)
100
37961 TA07b
0 20 30 40 50 6010
80
75
70
85
90
95
EFFICIENCY (%)
PWM = VREF
Buck-Boost Mode LED Driver with Open LED Clamp and Output Voltage Limit
Efficiency vs VIN
CSP VS
VIN CSN
RT
VCSS
SYNC 25V LED
250mA
LT3796
37961 TA07a
VREF
CSOUT
FB1
PWM
PWM
LED CURRENT REPORTING ISMON
EN/UVLO
CTRL
GND
FB2
ISP
ISN
TG
INTVCC INTVCC
GATE
SENSE
CC
10nF
L1 68µH D1
RT
19.6k
400kHz
RC
4.99k
C5
4.7µF
C6
0.1µF
C4
0.1µF
R1
1M
R2
187k
R6
200k
R5
20k
R4
715k
C1
2.2µF
×2
9V TO 55V
75V (TRANSIENT)
V
IN
C3
4.7µF
×2
VIN
R8
13.3k
RSNS
33mΩ
RLED
M2
VIN
M1
R3
249k
R7
1M
C2
F
VMODE
FAULT
M1: FAIRCHILD SEMICONDUCTOR
FDM3622
M2: ZETEX ZXMP6A13F
L1: WÜRTH 744066680
D1: IRF 10BQ100
LED: CREE XLAMP XR-E
VMODE
FAULT
R10
100k R9
100k
INTVCC

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