Hoja de datos de ASYNC SRAM With On-Chip ECC de Infineon Technologies

:- CYPRESS“
TRUETOUCH TOUCHSCREEN SOLUTIONS
ASYNCHRONOUS SRAMS WITH
ERROR-CORRECTING CODE (ECC)
COMPLETE FREEDOM
FROM SOFT ERRORS
ASYNC SRAM WITH ON-CHIP ECC
Cosmtc roys & Tnermot neutrons, thn todoy's advanced process nodes, memortes ore ntgnty ttkety to tott due to sott errors coused by tnts extroterrestnot rodtotton, Sott errors not onty corrupt doto, but con otso teod to toss 0t tunctton ond system crtttcot tottures Worktng systems, medtcot deytces, outomottve etectrontcs, and consumer etectrontcs ore espectotty vutnerobte to tne odverse ettects ot sott errors. An Uncorrected sott error can teod to system tottures tn mtsston cnttcot tndustnot outomotton, outomottye engtne controt, ond ntgnrend secunty systems
With every new process technology node there is significant improvement in performance and power consumption
along with reduction in the size of the chip. Each new process technology reduces voltage and shrinks the
capacitance of the node. This reduced node capacitance make these devices more susceptible to bit failures
caused by energetic particles. These bit failures are called soft errors.
Electronic devices are frequently exposed to extraterrestrial energetic particles like Alpha particles,
Cosmic rays & Thermal neutrons. With todays advanced process nodes, memories are highly likely to
fail due to soft errors caused by this extraterrestrial radiation.
Soft errors not only corrupt data, but can also lead to loss of function and system critical failures.
Industrial controllers, military equipment, networking systems, medical devices, automotive
electronics, and consumer electronics are especially vulnerable to the adverse effects of soft
errors. An uncorrected soft error can lead to system failures in mission critical industrial
automation, automotive engine control, and high-end security systems.
SOFT ERROR: HOW BAD IS IT?
async.cypress.com 2
WHAT'S THE SOLU Soft wars are USJCJH‘/ doc" W'h through rcdu SON/arc €cdundancy mvo‘vcs stcmng the so muhwp‘c ch p5 to msuwc Ogamst dab ‘css Ms and 'ckcs up c ‘0? of boowd space W/MC 5 take Jp cx'ra bccrc spccc‘ H ‘5 fed ous‘ exp consummg Both these so‘mcns crc \rrpracw: gonoraton dcvccs due '0 been: spccc and tmc rcstr chons
Soft errors are usually dealt with through redundancy &
software. Redundancy involves storing the same data on
multiple chips to insure against data loss. Its quite expensive
and takes up a lot of board space. While software doesnt
take up extra board space, it is tedious, expensive and time
consuming. Both these solutions are impractical in latest
generation devices due to board space and product cycle
time restrictions.
WHAT’S THE SOLUTION?
3
ASYNC SRAM WITH ON-CHIP ECC
g§ BEBE
async.cypress.com 4
COMPLETE FREEDOM FROM SOFT ERRORS
Cypress’ Asynchronous SRAM with On-Chip Error Correcting Code (ECC) provides a faster, simpler and
more cost effective solution than software or redundancy based ECC schemes. It is the industry’s highest
reliability chip, built to service a wide variety of applications.
Together, these features provide significant improvement in Soft Error Rate (SER) performance, resulting
in industry leading FIT rates less than 0.1 FIT/Mbit.
ERROR CORRECTING CODE (ECC)
Cypresss latest generation Asynchronous SRAM
devices use (38,32) Hamming Code for single-bit
error detection and correction using ECC. The
hardware ECC block in Cypress’ ultra-reliable
Asynchronous SRAMs performs all ECC related
functions in line, without user intervention.
Embedded ECC to
detect and correct
all single-bit errors
Bit-interleaving to
avoid multi-bit upsets
Optional ERR pin to
indicate the occurrence
of single-bit error
Industry leading access
time: 10 ns (FAST)
BIT-INTERLEAVING
Higher energy extraterrestrial radiation can flip
multiple adjacent bits, leading to multi-bit errors.
The single-bit error detection and correction
capability of Error Correcting Code is
supplemented by a bit-interleaving scheme to
prevent the occurrence of multi-bit errors.
5
Ultra-low standby
current: 8.7 µA
(4-Mbit MoBL)
Multiple configurations
(x8, x16, and x32) and
operating voltages
(1.8V, 3V, 5V)
Available in industrial
and automotive
temperature grades
Form-fit-function
compatible with current
generation ASYNC
SRAM devices
ERR
Address
Decoder
I/O MUX
Memory Array
512K x 19 bit
(16 data bits and 3
parity bits)
Input
Buffer
Data Bus
(x8/x16/x32)
CE, OE, WE,
BHE, BLE
Address Bus
(19 - 21)
ECC
Encoder
ECC
ECC
Encoder
Sense
AMPS
Control
Circuit
PARAMETERS 4 - M b IT Fa S T SRaM 4-MbIT LOw POwER
SRaM
4 - M bIT FaST SRa M
wITH POwE R SN O OzE16 - M b I T FaS T SRaM 16 - M bI T LOw
POwER SRa M
16 - M bI T FaST SRa M
wITH POwE R SN O OzE
ACCESS TIME 10 ns 45 ns 10 ns 10 ns 45 ns 10 ns
OPERATING CURRENT (MAX.) 45 mA 20 mA 45 mA 110 m A 36 mA 110 m A
STANDBY CURRENT (MAX.) 8 mA 8.7 µA 15 µA 30 mA 16 µA 22 µA
ASYNCHRONOUS SRAM WITH ON-CHIP ECC FAMILY
ASYNC SRAM WITH ON-CHIP ECC
Address
Decoder Memory Array
A
0
- A
19
I/O
0
-
I/O
7
I/O
8
-
I/O
15
DS#
ECC
Encoder
Sense
AMPS ECC
Encoder
Power Management Block
(Enables PowerSnooze
TM
)
I/O
MUX
Control
Circuit
CE#
OE#
WE#
BHE#
BHE#
Input
Buffer
async.cypress.com 6
HIGH PERFORMANCE AND
LOW POWER. NOW A REALITY
Fast SRAM with PowerSnooze™ is a revolutionary product that eliminates the tradeoff between performance and
power consumption in Asynchronous SRAM applications. In this new family of devices, the best features of Fast
SRAMs (High speed) & Low-Power SRAMs (Low power consumption) are available through a novel on-chip power
saving mode called PowerSnooze.
PowerSnooze is an additional power saving mode to standard Asynchronous SRAM operating modes (Active,
Standby, and Data-Retention). The Deep Sleep pin (DS#) enables switching between the high performance active
mode and the ultra low-power PowerSnooze mode. With deep sleep current as low as 15 μA (in 4-Mbit devices),
Fast SRAM with PowerSnooze combines the best features of fast and low-power SRAM in a single device.
PARAMETERS 16 - M bIT Fa S T SRaM 16- Mb I T LOw POwER SR aM 16- Mb I T FaST SRa M w I T H POwERSN O OzE
ACCESS TIME 10 ns 45 ns 10 ns
ACTIVE CURRENT 110 m A 36 mA 110 m A
STANDBY CURRENT 30 mA 16 µA 22 µA
PERFORMANCE AND POWER TRADEOFF IN ASYNCHRONOUS SRAMS
async.cypress.com 6
7
ORDERING CODE
54-pin TSOP-II, 44-pin TSOP-II, 44-pin SOJ, 48-pin BGA, 48-pin TSOP-I, 119-pin BGA
44-pin TSOP-II, 48-pin TSOP-I, 48-pin BGA, 119-pin BGA
48-pin BGA, 48-pin TSOP-I, 119-pin BGA
PART NUMBER OR ga N I z aT I O N VOLTagE SPEEd TEM P E R a TU RE gR a d E
CY7C1049G(E) 512 K X 8 1.8 V, 3 V, 5 V 10 ns, 15 ns Industrial
CY7C1041G(E) 256 K x 16 1.8 V, 3 V, 5 V 10 ns, 12 ns, 15 ns, 17 ns Industrial, Automotive
CY7C1069G(E) 2 M x 8 1.8 V, 3 V, 5 V 10 ns, 15 ns Industrial
CY7C1061G(E) 1 M X 16 1.8 V, 3 V, 5 V 10 ns, 12 ns, 15 ns, 17 ns Industrial, Automotive
CY7C1062G(E) 512 K X 32 1.8 V, 3 V 10 ns, 15 ns Industrial
PART NUMBER OR ga N I z aT I O N VOLTagE SPEEd TEM P E R a TU RE gR a d E
CY62148G 512 K X 8 1.8 V, 3 V, 5 V 45 ns, 55 ns Industrial
CY62146G(E) 256 K x 16 1.8 V, 3 V, 5 V 45 ns, 55 ns Industrial, Automotive
CY62147G(E) 256 K x 16 1.8 V, 3 V, 5 V 45 ns, 55 ns Industrial, Automotive
CY62168G(E) 2 M X 8 1.8 V, 3 V, 5 V 45 ns, 55 ns Industrial
CY62167G(E) 1 M X 16 1.8 V, 3 V, 5 V 45 ns, 55 ns Industrial, Automotive
CY62162G(E) 512 K X 32 1.8 V, 3 V 45 ns, 55 ns Industrial
PART NUMBER OR ga N I z aT I O N VOLTagE SPEEd TE M P E R aT U R E gR a d E
CY7S1049G(E) 512 K X 8 1.8 V, 3 V, 5 V 10 ns, 15 ns Industrial
CY7S1041G(E) 256 K x 16 1.8 V, 3 V, 5 V 10 ns, 15 ns Industrial
CY7S1061G(E) 1 M x 16 1.8 V, 3 V, 5 V 10 ns, 15 ns Industrial
CY7S1062G 512 K X 32 1.8 V, 3 V 10 ns, 15 ns Industrial
FAST ASYNCHRONOUS SRAM WITH ECC
LOW-POWER ASYNCHRONOUS SRAM WITH ECC
FAST SRAM WITH POWERSNOOZE™
PACKAGE DIMENSIONS
Package dimensions are shown
as nominal measurements and
are intended for quick reference
only. Please refer to detailed
product datasheets for precise
package dimensions and
complete specifications.
54-pin TSOP-II 11.8 mm
22.4 mm
44-pin SOJ 11.2 mm
28.2 mm
44-pin TSOP-II 12.0 mm
18.4 mm
12.0 mm
18.4 mm
48-pin TSOP
48-pin FBGA 8.0 mm
6.0
mm
119-pin BGA 22 mm
14 mm
ASYNC SRAM WITH ON-CHIP ECC
CONTACT US
©2015 Cypress Semiconductor Corporation. All Rights Reserved. Cypress and MoBL are registered trademarks of Cypress Semiconductor Corp.
PowerSnooze is a trademark of Cypress Semiconductor Corp. All other trademarks are the property of their respective owners.
001-95454 Rev**
CYPRESS HEADQUARTERS
Cypress Semiconductor Corporation
198 Champion Court
San Jose, CA 95134 USA
Tel: +1 (408) 943-2600
Fax: +1 (408) 943-6848
Toll-free: +1 (800) 858-1810 (U.S. only)
www.cypress.com
FOR MORE INFORMATION ON ASYNC:
www.async.cypress.com
ASYNC SRAM WITH ON-CHIP ECC