Adapteva, Inc. is a privately held semiconductor company that has developed the world's most energy efficient and scalable multicore processor chip, designed for parallel computing.
Adapteva's groundbreaking Epiphany multicore architecture represents a new class of massively parallel computer architectures that is the future of computing and will disrupt a wide range of end markets from compact low power devices to next generation supercomputers. To enable parallel programming in heterogeneous environments, Adapteva is adopting an open source approach making the architecture, interface and programming information available to all.
Adapteva is the sponsor of the Parallella project and the designer of the Parallella board. The Parallella project is a community driven project dedicated to the promotion and progress of parallel processing and the use of the Epiphany architecture.
The goal of the Parallella project is to democratize access to parallel computing through providing an affordable open hardware platform and open source tools, and supporting learning and the development of software which is able to harness the power of parallel systems.
The Parallella board is an open platform to explore, prototype and contribute to an open source library of expertise, information and code samples for the benefit of the community.
- 451 Research Analysts Predicts Accelerators For Future
- Adapteva Believes High-Performance Computing is Ready for an Epiphany
- Adapteva Demos 100Gflops
- Adapteva Included in Gartner Report on Market Trends
- Adapteva: More Flops, Less Watts
- Adapteva’s Epiphany Floating Point Processor Core: A Leading-Edge Lithography May Finally Open Doors
- Epiphany Included in Guide to CPU Cores and Processor IP from Linley Group
- Processors that can do 20 GFLOPS/W
PARRALLELLA COMMUNITY FORUM
PRODUCT TRAINING PRESENTATIONS
- A 1024-core 70GFLOP/W Floating Point Manycore Microprocessor
- A 1024-core 70GFLOPS/W Floating Point Manycore Microprocessor
- A 25 GFLOP/W Software Programmable Floating Point Accelerator
- A Manycore Coprocessor Architecture for Heterogeneous Computing
- A Scalable Processor Architecture for the Next Generation of Low Power Supercomputer
- A Sub 2 W 64-Core 100 GFLOPS Accelerator Programmable in C/C++ or OpenCL
- An Alternative to GPU Acceleration For Mobile Platforms (Updated) (GF@DAC-2013)
- An Introduction to the Epiphany Manycore Architecture
- Hybrid System Design: The Only Practical Way
- Improving Engineering Efficiency Through Tiled Hierarchical Flows
- Keynote: Kickstarting the Transition to Parallel Computing With Open Hardware
- Keynote: Presenting the Parallella (MIT ARMFEST-2013)
- Keynote: There’s STILL Plenty of Room at the Bottom!
- Parallella: A Love Story
- Peaceful Coexistence Between Architectures
- The Future of HPC: Task-Parallel, Heterogeneous, Efficient, Open
- The Good, the Bad, the Ugly of Semiconductor Crowd Funding