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AD4855 Fully Buffered, 8-Channel Simultaneous Sampling, 16-bit Data Acquisition System (DAS)
Analog Devices 16-bit DAS is an ideal choice for applications requiring high accuracy, throughput, and precision in a compact footprint

Analog Devices AD4855 16-bit, 250 ksps data acquisition system (DAS) with differential wide common-mode range inputs is fully buffered and offers eight channels of simultaneous sampling. Operating from a 5 V low-voltage supply, flexible input buffer supplies, and using the precision low-drift internal reference and reference buffer, the AD4855 allows the SoftSpan™ range of each channel to be independently configured to match the native application signal swing, thereby minimizing additional external signal conditioning. It also incorporates seamless high dynamic range (SHDR) technology to further maximize the single-conversion dynamic range. When enabled, the input signal path gain of the channel is automatically optimized on a sample-by-sample basis, minimizing converter noise on each sample without impacting linearity.

The AD4855 is able to directly digitize input signals with arbitrary swings on INx+ and INx- thanks to an 11 MHz bandwidth, picoamp input analog buffers, wide input common-mode range, and 120 dB common-mode rejection ratio (CMRR). Input signal flexibility, ±160 µV integral nonlinearity (INL), no missing codes at 16 bits, 94.6 dB signal-to-noise ratio (SNR), and 98.1 dB dynamic range (DR) make the AD4855 an ideal choice for applications requiring high accuracy, throughput, and precision in a compact footprint. Enabling 16-bit oversampling offers further SNR and dynamic range improvements. Optional per-channel offset, gain, and phase adjustment provide the ability to calibrate and remove system-level errors upstream to the DAS.

The AD4855 features a serial peripheral interface (SPI) register configuration bus (0.9 V to 5.25 V) and supports both low-voltage differential signaling (LVDS) buses and complementary metal-oxide semiconductor (CMOS) conversion data output buses that can be selected by using the LVDS/CMOS pin. Between one and eight lines of data output can be employed in CMOS mode, allowing the user to optimize bus width and throughput. The 7.00 mm x 7.00 mm, 64-ball, ball grid array (BGA) of the AD4855 includes all critical power supply and reference bypass capacitors, minimizing the full solution footprint and component count and reducing sensitivity to application printed circuit board (PCB) layout. The device operates over an extended industrial temperature range of -40°C to +125°C.

  • Complete 16-bit DAS
    • Simultaneous sampling of eight internally buffered channels
    • 250 ksps per channel throughput
    • Differential, wide common-mode range inputs
    • ±75 pA typical input leakage at +25°C
    • Full-scale input step settling time: <300 ns
    • Integrated reference and reference buffer: 4.096 V
    • Integrated supply decoupling capacitors
    • 27 mW per channel at 250 ksps, scales with throughput
  • Minimal external signal conditioning
  • Seamless high dynamic range
    • Per sample and per channel automatic gain ranging
    • Maintains ppm-level INL
  • Per channel SoftSpan input ranges, bipolar or unipolar
    • ±40 V, ±25 V, ±20 V, ±12.5 V, ±10 V, ±6.25 V, ±5 V, and ±2.5 V
    • 0 V to 40 V, 25 V, 20 V, 12.5 V, 10 V, 6.25 V, 5 V, and 2.5 V
  • Rail-to-rail input overdrive tolerance
  • High performance
    • INL: ±160 µV typical (±40 V range)
    • SNR: 94.6 dB single-conversion typical (±40 V range)
    • DR: 98.1 dB single-conversion typical (±40 V range)
    • THD: -117 dB typical (±40 V range)
    • CMRR: 120 dB typical
  • Digital flexibility
    • SPI CMOS (0.9 V to 5.25 V) and LVDS serial input and output
    • Optional oversampling with 16-bit digital averaging
    • Optional offset, gain, and phase correction
    • 7.00 mm x 7.00 mm, 64-ball BGA full solution footprint