NXP Semiconductors brings a new level of power performance to the ARM architecture with the LPC1300 series, one of the industry’s lowest-power Cortex-M3 MCUs. These new MCUs consume approximately 200 μA / MHz, bringing low-power benefits to a wide range of 16- and 32-bit applications.
Built around a Cortex-M3 Rev 2 processor core, the LPC1300 is equipped with up to 32 kB of flash and up to 8 kB of SRAM, uses a single 3.3 V power supply (for operation between 1.8 V and 3.6 V), and is available in LQFP48 and HVQFN 33 packages.
The LPC1300 series is pin-to-pin compatible with the LPC1100 series, NXP’s new family of Cortex-M0 MCUs, so it gives designers a straightforward migration path to the even lower-power features of the Cortex-M0 architecture.
ARM Cortex-M3 processor
- 72 MHz operation
- Nested vectored interrupt controller for fast deterministic interrupts
- Wake-up interrupt controller allows automatic wake from an priority interrupt
- Three reduced-power modes: sleep, deep-sleep, and deep power-down
- Up to 32 kB Flash memory
- Up to 8 kB SRAM
- 10-bit analog-to-digital converter with eight channels and conversion rates up to 250 k samples per second
- Battery-powered systems
- Consumer peripherals
- Remote sensors
- 16- and 32-bit applications
- USB 2.0 full-speed device controller with on-chip PHY
- UART with fractional baud rate generation, internal FIFO, and RS-485 support
- SSP / SPI controller with FIFO and multi-protocol capabilities
- I2C-bus interface supporting full I2C-bus specification and fast mode plus with a data rate of 1 Mbit/s with multiple address recognition and monitor mode
- Up to 42 general purpose I/O (GPIO) pins with configurable pull-up / down resistors and a new, configurable open-drain operating mode
- Four general purpose counter / timers, with a total of four capture inputs and 13 match outputs
- Programmable watchdog timer (WDT) with lock-out feature
- System tick timer
- Each peripheral has its own clock divider for power savings