DSA2311 Datasheet

‘ Mlcgcmp DSA231 1
2017 Microchip Technology Inc. DS20005893A-page 1
DSA2311
Features
Automotive AEC-Q100 Qualified
Two Simultaneous CMOS Outputs
- Output 1 Range: 2.3 MHz to 170 MHz
- Output 2 Range: 2.3 MHz to 170 MHz
Low RMS Phase Jitter: <1 ps (typ.)
High Stability: ±20 ppm, ±25 ppm, ±50 ppm
Wide Temperature Range:
- Automotive Grade 1: –40°C to +125°C
- Automotive Grade 2: –40°C to +105°C
- Automotive Grade 3: –40°C to +85°C
High Supply Noise Rejection: –50 dBc
High Shock and Vibration Immunity
- Qualified to MIL-STD-883
High Reliability
- 20x higher MTBF than crystal-based clock
generator designs
Supply Range of 2.25 to 3.63V
Lead-Free and RoHS Compliant
Applications
Automotive Infotainment
Automotive ADAS
Automotive Camera Module
Automotive LIDAR and RADAR
Benefits
Replace High Temperature Crystals and Quartz
Oscillators
General Description
The DSA2311 is a crystal-less™ clock generator that is
factory-configurable to simultaneously output two
separate frequencies from 2.3 MHz to 170 MHz. The
clock generator uses proven silicon MEMS technology
to provide low jitter and high frequency stability across
a wide range of supply voltages and temperatures. By
eliminating the external quartz crystal, crystal-less
clock generators significantly enhance reliability and
accelerate product development, while meeting
stringent clock performance criteria for a variety of
consumer electronics, communications, and storage
applications.
DSA2311 has an Output Enable/Disable feature that
allows it to disable the outputs when OE is low. The
device is available in a space-saving 6-pin 2.5 mm x
2.0 mm crystal-less VDFN package that uses only a
single external bypass capacitor.
The two output frequencies can be customized by
using Clockworks:
http://clockworks.microchip.com/timing
Block Diagram
Control Circuitry
MEMS PLL Output
Control
and
Divider
F
OUT2
F
OUT1
OE
Crystal-less™ Configurable Two-Output Clock Generator for
Automotive
20% I0 80%. CL 20% m 80%. CL
DSA2311
DS20005893A-page 2 2017 Microchip Technology Inc.
1.0 ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings †
Input Voltage, VIN ...............................................................................................................................–0.3V to VDD +0.3V
Supply Voltage ......................................................................................................................................... –0.3V to + 4.0V
ESD Protection (HBM) ...............................................................................................................................................4 kV
ESD Protection (CDM) ............................................................................................................................................1.5 kV
Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at those or any other conditions above those indicated
in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended
periods may affect device reliability.
TABLE 1-1: ELECTRICAL CHARACTERISTICS
Parameters Sym. Min. Typ. Max. Units Conditions
Supply Voltage (Note 1)V
DD 2.25 3.6 V —
Supply Current (Note 2)I
DD —21 23 mA
EN pin low. All outputs
disabled.
Frequency Stability (Note 3f
——±20
ppm
Includes frequency variations
due to initial tolerance,
temperature, and power supply
voltage.
——±50
Aging Δf ±5 ppm One year at +25°C
Start-up Time (Note 4)t
SU —— 5 msT = +25
°C
Input Logic Levels VIH 0.75 x VDD —— VInput logic high
VIL 0.25 x VDD Input logic low
Output Disable Time tDA —— 5 ns
Output Enable Time tEN 20 ns —
Pull-Up Resistor (Note 2) 40 kΩ Pull-up exists on all digital IO
Output Logic Levels VOH 0.9 x VDD —— VOutput logic high, I = ±6 mA
VOL 0.1 x VDD Output logic low, I = ±6 mA
Output Transition Rise Time tR—1.12.0 ns 20% to 80%; CL = 15 pF
Output Transition Rise Time tF 1.4 2.0 20% to 80%; CL = 15 pF
Frequency f0
2.3 — 170
MHz
Grade 3 temp. range
3.3 100 Grade 1 temp. range
3.3 170 Grade 2 temp. range
Output Duty Cycle SYM 45 55 %
Period Jitter (Note 5)J
PER —3 —ps
RMS FO1 = FO2 = 25 MHz
Integrated Phase Noise JCC
—0.3 —
psRMS
200 kHz to 20 MHz @ 25 MHz
0.38 100 kHz to 20 MHz @ 25 MHz
1.7 2 12 kHz to 20 MHz @ 25 MHz
Note 1: Pin 4 VDD should be filtered with a 0.01 µF capacitor.
2: Output is enabled if Enable pad is floated or not connected. Operating current = disabled current + ΔIDD
from FOUT1 + ΔIDD from FOUT2. See graph for more information.
3: For other ppm stabilities, please contact the factory.
4: tSU is time to 100 ppm stable output frequency after VDD is applied and outputs are enabled.
5: Period jitter includes crosstalk from adjacent output.
2017 Microchip Technology Inc. DS20005893A-page 3
DSA2311
TEMPERATURE SPECIFICATIONS (Note 1)
Parameters Sym. Min. Typ. Max. Units Conditions
Temperature Ranges
Operating Temperature Range (T)
TA–40 +85 °C Ordering Option I
TA–40 +105 °C Ordering Option L
TA–40 +125 °C Ordering Option A
Junction Operating Temperature TJ +150 °C —
Storage Temperature Range TA–40 +150 °C —
Soldering Temperature Range TS +260 °C 40 sec. max.
Note 1: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable
junction temperature and the thermal resistance from junction to air (i.e., TA, TJ, JA). Exceeding the
maximum allowable power dissipation will cause the device operating junction temperature to exceed the
maximum +150°C rating. Sustained junction temperatures above +150°C can impact the device reliability.
DSA2311
DS20005893A-page 4 2017 Microchip Technology Inc.
2.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1: PIN FUNCTION TABLE
Pin Number Pin Name Description
1 ENABLE Output Enable for both CLK0 and CLK1.
2 N/C Do not connect.
3 GROUND Ground.
4 CLK0 Clock Output 0 (CMOS).
5 CLK1 Clock Output 1 (CMOS).
6 VDD Supply Voltage.
_Mwm ________ 1/fa 4—» IDA T OE Function and Output Waveform: LVCMOS.
2017 Microchip Technology Inc. DS20005893A-page 5
DSA2311
3.0 OUTPUT WAVEFORM
FIGURE 3-1: OE Function and Output Waveform: LVCMOS.
V
OH
V
OL
V
IL
1/f
o
Output
Enable
t
DA
t
EN
t
F
t
R
V
IH
pF pF Al / Output vs. Frequency and Load @ 3.3V V
DSA2311
DS20005893A-page 6 2017 Microchip Technology Inc.
4.0 CURRENT CONSUMPTION
Total Current = Disabled Current + ΔIDD FOUT1 + ΔIDD FOUT2
FIGURE 4-1: ΔIDD / Output vs. Frequency and Load @ 3.3V VDD.
3 pF
5 pF
10 pF
15 pF
FOUT (MHz)
ǻ,
DD
(mA)
0 20 40 60 80 100 120 140
18
16
14
12
10
8
6
4
2
0
Tempevature 2040 seconds 8 minutes max. j 260% 217% 200°C 150°C 607180 507150 setonds seconds —> 25°C Preheat Relew Coo‘duwn > Time Solder Reflow Profile.
2017 Microchip Technology Inc. DS20005893A-page 7
DSA2311
5.0 SOLDER REFLOW PROFILE
FIGURE 5-1: Solder Reflow Profile.
TABLE 5-1: SOLDER REFLOW
MSL 1 @ 260°C Refer to JSTD-020C
Ramp-Up Rate (200°C to Peak Temp.) 3°C/sec. max.
Preheat Time 150°C to 200°C 60 to 180 sec.
Time Maintained above 217°C 60 to 150 sec.
Peak Temperature 255°C to 260°C
Time within 5°C of Actual Peak 20 to 40 sec.
Ramp-Down Rate 6°C/sec. max.
Time 25°C to Peak Temperature 8 minutes max.
NNN namr ( )
DSA2311
DS20005893A-page 8 2017 Microchip Technology Inc.
6.0 PACKAGING INFORMATION
6.1 Package Marking Information
Example
6-Lead VDFN*
XXXXXXX
0SSS
DCPYYWW
DSA2311
0603
DCP1121
Legend: XX...X Product code, customer-specific information, or frequency in MHz
without printed decimal point
Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
*This package is Pb-free. The Pb-free JEDEC designator ( )
can be found on the outer packaging for this package.
●, ▲, ▼ Pin one index is identified by a dot, delta up, or delta down (triangle
mark).
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information. Package may or may not include
the corporate logo.
Underbar (_) and/or Overbar (‾) symbol may not be to scale.
3
e
3
e
f E? :\1 \’%/7i*’*” %//‘ El—fl 1 EEC $ W—fl g ,7, * S‘DEVIEW EEC! » ”f 7¥ i * ---—-—&—-—--— a T 1 1 1 1* k * PW e> g
2017 Microchip Technology Inc. DS20005893A-page 9
DSA2311
6-Lead VDFN 2.5 mm x 2.0 mm Package Outline and Recommended Land Pattern
B
A
0.05 C
0.05 C
(DATUM B)
(DATUM A)
C
SEATING
PLANE
1
N
2X TOP VIEW
SIDE VIEW
NOTE 1
0.10 C
0.08 C
Microchip Technology Drawing C04-1005A Sheet 1 of 2
2X
6X
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
6-Lead Very Thin Dual Flatpack No-Leads (J7A) - 2.5x2.0 mm Body [VDFN]
D
E
A
A1
0.10 C A B
0.05 C
BOTTOM VIEW
12
N
2X b2
4X b1
5X L1
L2
e
2
DSA2311
DS20005893A-page 10 2017 Microchip Technology Inc.
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2017 Microchip Technology Inc. DS20005893A-page 11
DSA2311
RECOMMENDED LAND PATTERN
Dimension Limits
Units
C
Contact Pad Width (X4)
Contact Pad Spacing
Contact Pad Width (X2)
Contact Pitch
X2
X1
0.25
0.65
MILLIMETERS
0.825 BSC
MIN
E
MAX
1.45
Space Between Contacts (X3)
Space Between Contacts (X4)
G2
G1
0.60
0.38
Microchip Technology Drawing C04-3005A
NOM
6-Lead Very Thin Dual Flatpack No-Leads (J7A) - 2.5x2.0 mm Body [VDFN]
12
6
YContact Pad Length (X6) 0.85
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Notes:
Dimensioning and tolerancing per ASME Y14.5M
For best soldering results, thermal vias, if used, should be filled or tented to avoid solder loss during
reflow process
1.
2.
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
C
E
X1
X2
Y
G1
G2
SILK SCREEN
DSA2311
DS20005893A-page 12 2017 Microchip Technology Inc.
NOTES:
2017 Microchip Technology Inc. DS20005893A-page 13
DSA2311
APPENDIX A: REVISION HISTORY
Revision A (March 2018)
Initial release of DSA2311 as Microchip data
sheet DS20005893A.
DSA2311
DS20005893A-page 14 2017 Microchip Technology Inc.
NOTES:
PART No. v Ax
2017 Microchip Technology Inc. DS20005893A-page 15
DSA2311
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office.
PART NO.
X
X
Packing
Stability
Device
Device: DSA2311: Crystal-less Configurable Two-Output Clock
Generator for Automotive
Package: K = 6-LEAD 2.5 mm x 2.0 mm VDFN
Temperature
Range:
A = –40C to +125C (Grade 1)
L = –40C to +105C (Grade 2)
I = –40C to +85C (Grade 3)
Stability: 1=±50 ppm
2=±25 ppm
3=±20ppm
Frequency: Rxxxx = Custom Frequency Code
Packing Option: <blank> = Tube
T = Tape & Reel
X
Package
X
Temperature
Range
RXXXX
Frequency
Note 1: Tape and Reel identifier only appears in the
catalog part number description. This
identifier is used for ordering purposes and
is not printed on the device package. Check
with your Microchip Sales Office for package
availability with the Tape and Reel option.
Examples:
a) DSA2311KL1-
Rxxxx
Crystal-less Configurable Two-Out-
put Clock Generator, 6-LD VDFN,
Grade 2 Temp. Range, ±50 ppm
Stability, Custom Frequency (FOUT1
and FOUT2), Tube
b) DSA2311KI3-
Rxxxx
Crystal-less Configurable Two-Out-
put Clock Generator, 6-LD VDFN,
Grade 3 Temp. Range, ±20 ppm
Stability, Custom Frequency (FOUT1
and FOUT2), Tube
Output Clock Frequencies
Output frequencies are factory-configured to individual customer and
product requirements, subject to output control and divider limitations.
Contact sales with your custom frequency needs.
http://clockworks.microchip.com/timing/
Frequency Code FOUT1 (MHz) FOUT2 (MHz)
R0001 127 127
R0002 25 125
Option
DSA2311
DS20005893A-page 16 2017 Microchip Technology Inc.
NOTES:
YSTEM
2017 Microchip Technology Inc. DS20005893A-page 17
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and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
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The Microchip name and logo, the Microchip logo, AnyRate, AVR,
AVR logo, AVR Freaks, BeaconThings, BitCloud, CryptoMemory,
CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KEELOQ,
KEELOQ logo, Kleer, LANCheck, LINK MD, maXStylus,
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ClockWorks, The Embedded Control Solutions Company,
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Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any
Capacitor, AnyIn, AnyOut, BodyCom, chipKIT, chipKIT logo,
CodeGuard, CryptoAuthentication, CryptoCompanion,
CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average
Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial
Programming, ICSP, Inter-Chip Connectivity, JitterBlocker,
KleerNet, KleerNet logo, Mindi, MiWi, motorBench, MPASM, MPF,
MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach,
Omniscient Code Generation, PICDEM, PICDEM.net, PICkit,
PICtail, PureSilicon, QMatrix, RightTouch logo, REAL ICE, Ripple
Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI,
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USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and
ZENA are trademarks of Microchip Technology Incorporated in the
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SQTP is a service mark of Microchip Technology Incorporated in
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Silicon Storage Technology is a registered trademark of Microchip
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GestIC is a registered trademark of Microchip Technology
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All other trademarks mentioned herein are property of their
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© 2017, Microchip Technology Incorporated, All Rights Reserved.
ISBN: 978-1-5224-2773-5
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YSTEM
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DS20005893A-page 18 2017 Microchip Technology Inc.
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