LTC4160(-1) Datasheet by Analog Devices Inc.

l ’ LINE “I2 LTCA1604LTC4160—1 TECHNOLOGY 5 5 usa SVSIEM 750 I 5mm CUR (CHARGING! i . + _____ J;- L7 LJUW 1
LTC4160/LTC4160-1
1
41601fa
TYPICAL APPLICATION
DESCRIPTION
Switching Power Manager
with USB On-The-Go And
Overvoltage Protection
The LTC
®
4160/LTC4160-1 are high efficiency power man-
agement and Li-Ion/Polymer battery charger ICs. They each
include a bidirectional switching PowerPath™ controller
with automatic load prioritization, a battery charger, and
an ideal diode.
The LTC4160/LTC4160-1’s bidirectional switching regulator
transfers nearly all of the power available from the USB
port to the load with minimal loss and heat which eases
thermal constraints in small spaces. These devices feature
a precision input current limit for USB compatibility and
Bat-Track output control for efficient charging. In addition,
the ICs can also generate 5V at 500mA for USB On-The-
Go applications.
An overvoltage circuit protects the LTC4160/LTC4160-1
from high voltage damage on the USB/wall adapter inputs
with an external N-channel MOSFET and a resistor.
The LTC4160/LTC4160-1 are available in a 3mm × 4mm
× 0.75mm QFN surface mount package.
L, LT, LTC, LTM, Linear Technology, Burst Mode and the Linear logo are registered trademarks
and PowerPath and Bat-Track are a trademarks of Linear Technology Corporation. All other
trademarks are the property of their respective owners. Protected by U.S. Patents including
6522118, 6404251. Other patents pending.
FEATURES
APPLICATIONS
n Bidirectional Switching Regulator Makes Optimal
Use of Limited Power Available from USB Port and
also Provides a 5V Output for USB On-The-Go
n Overvoltage Protection Guards Against Damage
n 180mΩ Internal Ideal Diode Plus Optional External
Ideal Diode Controller Seamlessly Provides Low
Loss PowerPath When Input Power is Limited or
Unavailable
n Instant-On Operation with Discharged Battery
n Full Featured Li-Ion/Polymer Battery Charger
n Bat-Track™ Adaptive Output Control For Efficient
Charging
n 1.2A Max Input Current Limit
n 1.2A Max Charge Current with Thermal Limiting
n Battery Float Voltage: 4.2V (LTC4160), 4.1V
(LTC4160-1)
n Low Battery Powered Quiescent Current (8µA)
n 20-pin 3mm × 4mm × 0.75mm QFN Package
n Media Players and Personal Navigation Devices
n Digital Cameras, PDAs, Smart Phones
Battery and VBUS Currents
vs Load Current
High Efficiency Power Manager/Battery Charger with USB
On-The-Go and Overvoltage Protection
VBUS
USB
USB
ON-THE-GO 3.3µH
10µF
0.1µF 3.01k 1k
41601 TA01a
CLPROG PROG
LTC4160/
LTC4160-1
SW
VOUT
BAT
Li-Ion +
OVGATE
OVSENS
OPTIONAL
OVERVOLTAGE
PROTECTION
SYSTEM
LOAD
6.2k
10µF
LOAD CURRENT (mA)
0
CURRENT (mA)
250
500
750
800
41601 TA01c
0
–250
–500 200 400 600 1000
VBUS CURRENT
BATTERY CURRENT
(CHARGING)
VBUS = 5V
BAT = 3.8V
5x MODE
BATTERY CURRENT
(DISCHARGING)
USB OTG VBUS Voltage
vs VBUS Current
VBUS CURRENT (mA)
0
VBUS (V)
4.5
5.0
5.5
41601 TA01b
4.0
3.5
3.0 200 400 600100 300 500 700
VBUS = 4.75V
IVBUS = 500mA
VOUT = BAT = 3.8V
USB 2.0 SPECIFICATIONS
REQUIRE THAT HIGH
POWER DEVICES NOT
OPERATE IN THIS REGION
LTC41 60/ LTC41 60—1 ‘20) Q9) ‘13) \lL‘ UDC PACKAGE zurLEAD (3mm x 4mm) PLAST‘C OFM 2 L7LJ1‘JW
LTC4160/LTC4160-1
2
41601fa
PIN CONFIGURATIONABSOLUTE MAXIMUM RATINGS
VBUS (Transient) t < 1ms, Duty Cycle < 1% .. –0.3V to 7V
VBUS (Static), BAT, VOUT, NTC, ENOTG, ID,
ENCHARGER, VBUSGD, FAULT, CHRG......... –0.3V to 6V
ILIM0, IILIM1 ........ –0.3V to Max(VBUS, VOUT, BAT) + 0.3V
IOVSENS ................................................................... 10mA
ICLPROG ....................................................................3mA
ICHRG, IVBUSGD, IFAULT.............................................50mA
IPROG ........................................................................2mA
ILDO3V3 ...................................................................30mA
ISW, IBAT, IVOUT, IVBUS ..................................................2A
Operating Temperature Range..................–40°C to 85°C
Maximum Junction Temperature...........................125°C
Storage Temperature Range ...................–65°C to 125°C
(Notes 1, 2, 3)
20 19 18 17
7 8
TOP VIEW
21
GND
UDC PACKAGE
20-LEAD (3mm × 4mm) PLASTIC QFN
9 10
6
5
4
3
2
1
11
12
13
14
15
16
OVGATE
OVSENS
VBUSGD
FAULT
ID
ENOTG
ILIM1
ILIM0
SW
VBUS
VOUT
BAT
NTC
NTCBIAS
LDO3V3
CLPROG
ENCHARGER
PROG
CHRG
IDGATE
TJMAX = 125°C, θJA = 43°C/W
EXPOSED PAD (PIN 21) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC4160EUDC#PBF LTC4160EUDC#TRPBF LFXY 20-Lead (3mm × 4mm) Plastic QFN –40°C to 85°C
LTC4160EUDC-1#PBF LTC4160EUDC-1#TRPBF LFXZ 20-Lead (3mm × 4mm) Plastic QFN –40°C to 85°C
LTC4160EPDC#PBF LTC4160EPDC#TRPBF FDRT 20-Lead (3mm × 4mm) Plastic UTQFN –40°C to 85°C (OBSOLETE)
LTC4160EPDC-1#PBF LTC4160EPDC-1#TRPBF FDST 20-Lead (3mm × 4mm) Plastic UTQFN –40°C to 85°C (OBSOLETE)
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
PowerPath Switching Regulator – Step-Down Mode
VBUS Input Supply Voltage 4.35 5.5 V
IBUS(LIM) Total Input Current 1x Mode
5x Mode
10x Mode
Suspend Mode
l
l
l
l
82
440
900
0.32
90
480
955
0.43
100
500
1000
0.5
mA
mA
mA
mA
IVBUSQ (Note 4) Input Quiescent Current 1x Mode
5x, 10x Modes
Suspend Mode
7
20
0.050
mA
mA
mA
hCLPROG (Note 4) Ratio of Measured VBUS Current to
CLPROG Program Current 1x Mode
5x Mode
10x Mode
Suspend Mode
211
1170
2377
9.6
mA/mA
mA/mA
mA/mA
mA/mA
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C (Note 2). VBUS = 5V, BAT = 3.8V, RCLPROG = 3.01k, unless otherwise noted.
LTC41 60/ LTC41 60—1 L7 LJUW 3
LTC4160/LTC4160-1
3
41601fa
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
IVOUT(POWERPATH) VOUT Current Available Before
Discharging Battery 1x Mode, BAT = 3.3V
5x Mode, BAT = 3.3V
10x Mode, BAT = 3.3V
Suspend Mode
0.26
121
667
1217
0.34
0.43
mA
mA
mA
mA
VCLPROG CLPROG Servo Voltage in Current Limit Switching Modes
Suspend Mode 1.183
100 V
mV
VUVLO VBUS Undervoltage Lockout Rising Threshold
Falling Threshold
3.95 4.3
44.35 V
V
VDUVLO VBUS To BAT Differential Undervoltage
Lockout Rising Threshold
Falling Threshold 200
50 mV
mV
VOUT VOUT Voltage 1x, 5x, 10x Modes, 0V < BAT ≤ 4.2V,
IVOUT = 0mA, Battery Charger Off
USB Suspend Mode, IVOUT = 250µA
3.5
4.5
BAT + 0.3
4.6
4.7
4.7
V
V
fOSC Switching Frequency 1.8 2.25 2.7 MHz
RPMOS_POWERPATH PMOS On-Resistance 0.18 Ω
RNMOS_POWERPATH NMOS On-Resistance 0.3 Ω
IPEAK_POWERPATH Peak Inductor Current Clamp 1x Mode (Note 5)
5x Mode (Note 5)
10x Mode (Note 5)
1
1.6
3
A
A
A
RSUSP Suspend LDO Output Resistance Closed Loop 10 Ω
PowerPath Switching Regulator – Step-Up Mode (USB On-The-Go)
VBUS Output Voltage 0 ≤ IVBUS ≤ 500mA, VOUT > 3.2V 4.75 5.25 V
VOUT Input Voltage 2.9 4.2 V
IVBUS Output Current Limit l550 680 mA
IPEAK Peak Inductor Current Limit (Note 5) 1.8 A
IOTGQ VOUT Quiescent Current VOUT = 3.8V, IVBUS = 0mA (Note 6) 1.6 mA
VCLPROG Output Current Limit Servo Voltage 1.15 V
VOUTUVLO VOUT UVLO – VOUT Falling
VOUT UVLO – VOUT Rising 2.5 2.6
2.8
2.9 V
V
tSCFAULT Short Circuit Fault Delay PMOS Switch Off 7.2 ms
Overvoltage Protection
VOVCUTOFF Overvoltage Protection Threshold With 6.2k Series Resistor 6.1 6.42 6.7 V
VOVGATE OVGATE Output Voltage VOVSENS < VOVCUTOFF
VOVSENS > VOVCUTOFF
1.88 • VOVSENS
012 V
V
tRISE OVGATE Time To Reach Regulation OVGATE CLOAD = 1nF 1.25 ms
Battery Charger
VFLOAT BAT Regulated Output Voltage LTC4160
l
4.179
4.165 4.2
4.2 4.221
4.235 V
V
LTC4160-1
l
4.079
4.065 4.1
4.1 4.121
4.135 V
V
ICHG Constant Current Mode Charger Current RPROG = 845Ω, 10x Mode RCLPROG ≤ 2.49k
RPROG = 5k, 5x or 10x Mode 1120
185 1219
206 1320
223 mA
mA
IBAT Battery Drain Current VBUS > VUVLO, Suspend Mode,
IVOUT = 0µA 3.8 6 µA
VBUS = 0V, IVOUT = 0µA
(Ideal Diode Mode) 8 12 µA
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C (Note 2). VBUS = 5V, BAT = 3.8V, RCLPROG = 3.01k, unless otherwise noted.
LTC41 60/ LTC41 60—1 4 L7LJ1W
LTC4160/LTC4160-1
4
41601fa
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VPROG PROG Pin Servo Voltage 1 V
VPROG_TRKL PROG Pin Servo Voltage in Trickle Charge BAT < VTRKL 0.1 V
VC/10 C/10 Threshold Voltage at PROG 100 mV
hPROG Ratio of IBAT to PROG Pin Current 1030 mA/mA
ITRKL Trickle Charge Current BAT < VTRKL 100 mA
VTRKL Trickle Charge Threshold Voltage BAT Rising 2.7 2.85 3 V
∆VTRKL Trickle Charge Hysteresis Voltage 135 mV
∆VRECHRG Recharge Battery Threshold Voltage Threshold Voltage Relative to VFLOAT –75 –100 –125 mV
tTERM Safety Timer Termination Period Timer Starts when VBAT = VFLOAT 3.9 4.3 5.4 Hour
tBADBAT Bad Battery Termination Time BAT < VTRKL 0.4 0.5 0.6 Hour
hC/10 End of Charge Current Ratio (Note 7) 0.085 0.1 0.115 mA/mA
RON_CHG Battery Charger Power FET
On-Resistance (Between VOUT and BAT) 0.18 Ω
TLIM Junction Temperature in Constant
Temperature Mode 110 °C
NTC
VCOLD Cold Temperature Fault Threshold
Voltage Rising Threshold
Hysteresis 75 76.5
1.5 78 %NTCBIAS
%NTCBIAS
VHOT Hot Temperature Fault Threshold Voltage Falling Threshold Hysteresis 33.4 34.9
1.8 36.4 %NTCBIAS
%NTCBIAS
VDIS NTC Disable Threshold Voltage Falling Threshold
Hysteresis 0.7 1.7
50 2.7 %NTCBIAS
mV
INTC NTC Leakage Current NTC = NTCBIAS = 5V –50 50 nA
Ideal Diode
VFWD Forward Voltage Detection VBUS = 0V, IVOUT = 10mA
IVOUT = 10mA 2
15 mV
mV
RDROPOUT Internal Diode On-Resistance, Dropout IVOUT = 200mA 0.18 Ω
IMAX_DIODE Diode Current Limit 2 A
Always On 3.3V LDO Supply
VLDO3V3 Regulated Output Voltage 0mA < ILDO3V3 < 20mA 3.1 3.3 3.5 V
RCL_LDO3V3 Closed-Loop Output Resistance 2.7 Ω
ROL_LDO3V3 Dropout Output Resistance 23 Ω
Logic (ILIM0, ILIM1, ID, ENOTG, ENCHARGER)
VIL Logic Low Input Voltage 0.4 V
VIH Logic High Input Voltage 1.2 V
IPD1 ILIM0, ILIM1, ENOTG, ENCHARGER
Pull-Down Current 1.8 µA
IPU1 ID Pull-Up Current 2.5 µA
Status Outputs (CHRG, VBUSGD, FAULT)
VVBUSGD Output Low Voltage IVBUSGD = 5mA, VBUS = 5V 65 100 mV
VCHRG, VFAULT Output Low Voltage ICHRG = IFAULT = 5mA, VOUT = 3.8V 100 150 mV
ICHRG, IVBUSGD,
IFAULT
Leakage Current VCHRG = VVBUSGD = VFAULT = 5V 1 μA
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C (Note 2). VBUS = 5V, BAT = 3.8V, RCLPROG = 3.01k, unless otherwise noted.
LTC41 60/ LTC41 60—1 900 ‘50 750 ‘ ‘ (A - g E z 5 g E E x g g g u u g a u ‘3‘ § 700 Mu WW A HATE , g (CHA 5 ; I 8 CURRENT HARG‘NG) L7 LJUW 5
LTC4160/LTC4160-1
5
41601fa
TYPICAL PERFORMANCE CHARACTERISTICS
USB Limited Load Current vs Battery
Voltage (Battery Charger Disabled)
USB Limited Load Current vs Battery
Voltage (Battery Charger Disabled)
Battery and VBUS Currents vs
Load Current
USB Limited Battery Charge
Current vs Battery Voltage
USB Limited Battery Charge
Current vs Battery Voltage
Battery and VBUS Currents
vs Load Current
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC4160E/LTC4160E-1 are guaranteed to meet specifications
from 0°C to 85°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
Note 3: The LTC4160E/LTC4160E-1 include overtemperature protection
that is intended to protect the device during momentary overload
conditions. Junction temperature will exceed 125°C when overtemperature
protection is active. Continuous operation above the specified maximum
operating junction temperature may impair device reliability.
ELECTRICAL CHARACTERISTICS
TA = 25°C, unless otherwise noted.
Note 4: Total input current is the sum of quiescent current, IVBUSQ, and
measured current given by VCLPROG/RCLPROG • (hCLPROG + 1).
Note 5: The current limit features of this part are intended to protect the
IC from short term or intermittent fault conditions. Continuous operation
above the maximum specified pin current rating may result in device
degradation or failure.
Note 6: The bidirectional switcher’s supply current is bootstrapped to
VBUS and in the application will reflect back to VOUT by (VBUS/VOUT) •
1/efficiency. Total quiescent current is the sum of the current into the VOUT
pin plus the reflected current.
Note 7: hC/10 is expressed as a fraction of the measured full charge current
with indicated PROG resistor.
BATTERY VOLTAGE (V)
2.7
0
LOAD CURRENT (mA)
100
300
400
500
3.3 3.9 4.2
900
41601 G01
200
3.0 3.6
600
700
800
VBUS = 5V
5x MODE
LOAD CURRENT (mA)
0
250
500
800
41601 G03
0
–250
–500 200 400 600 1000
VBUS CURRENT
BATTERY CURRENT
(CHARGING)
VBUS = 5V
BAT = 3.8V
5x MODE
RCLPROG = 3.01k
RPROG = 1k BATTERY CURRENT
(DISCHARGING)
BATTERY VOLTAGE (V)
2.7
0
LOAD CURRENT (mA)
20
60
80
100
3.3 3.9 4.2
160
41601 G02
40
3.0 3.6
120
140
VBUS = 5V
1x MODE
BATTERY VOLTAGE (V)
2.7
0
CHARGE CURRENT (mA)
100
300
400
500
3.3 3.9 4.2
700
41601 G04
200
3.0 3.6
600
VBUS = 5V
5x MODE
RPROG = 1k
BATTERY VOLTAGE (V)
2.7
CHARGE CURRENT (mA)
3.3 3.9 4.2
41601 G05
3.0 3.6
VBUS = 5V
1x MODE
RPROG = 1k
0
20
60
80
100
140
40
120
LOAD CURRENT (mA)
0
CURRENT (mA)
250
500
1000
750
41601 G06
0
–250
–500 250 500 750 150012501000
VBUS CURRENT
BATTERY CURRENT
(CHARGING)
VBUS = 5V
BAT = 3.8V
10x MODE
RCLPROG = 3.01k
RPROG = 2k BATTERY CURRENT
(DISCHARGING)
LTC41 60/ LTC41 60—1 I u n25 4 5w IDEAL DIODE . PLEMENTAL VISHAV 05 \\_ g a g S E INTERNAL IDEAL 3 V g DIODE 0va 5, 2 7, > 0 § ace 4 7 I 50 3 E E Z A E a S K _ S E > > E IxmouE 5-5 BATIEIIV VOLTAGE Inn \\ EFFICIENDV ("M EFFICIENCY ( I)
LTC4160/LTC4160-1
6
41601fa
TYPICAL PERFORMANCE CHARACTERISTICS
Battery Charge Current vs VOUT
Voltage
VOUT Voltage vs Battery Voltage
(Charger Overprogrammed)
VOUT Voltage vs Load Current
(Battery Charger Enabled)
PowerPath Switching Regulator
Transient Response
PowerPath Switching Regulator
Efficiency vs Load Current
Battery Charging Efficiency vs
Battery Voltage with No External
Load (PBAT/PVBUS)
Ideal Diode V-I Characteristics
Ideal Diode Resistance
vs Battery Voltage
VOUT Voltage vs Load Current
(Battery Charger Disabled)
TA = 25°C, unless otherwise noted.
FORWARD VOLTAGE (V)
0
CURRENT (A)
0.6
0.8
1.0
0.16
41601 G07
0.4
0.2
00.04 0.08 0.12 0.20
INTERNAL IDEAL DIODE
WITH SUPPLEMENTAL
EXTERNAL VISHAY
Si2333 PMOS
INTERNAL IDEAL
DIODE ONLY
VBUS = 5V
BATTERY VOLTAGE (V)
2.7
RESISTANCE (Ω)
0.15
0.20
0.25
3.9
41601 G08
0.10
0.05
03.0 3.3 3.6 4.2
INTERNAL IDEAL DIODE
WITH SUPPLEMENTAL
EXTERNAL VISHAY
Si2333 PMOS
INTERNAL IDEAL
DIODE
LOAD CURRENT (mA)
0
V
OUT
(V)
4.00
4.25
4.50
800
41601 G09
3.75
3.00
2.75
3.50
2.50
3.25
200 400 600 1000
BAT = 4V
BAT = 3.4V
BAT = 2.8V
VBUS = 5V
RCLPROG = 3.01k
RPROG = 2k
VOUT (V)
3.40
0
BATTERY CURRENT (mA)
100
200
300
400
3.50 3.60 3.70 3.80
41601 G10
500
600
3.45 3.55 3.65 3.75
RCLPROG = 3.01k
RPROG = 2k
5x MODE
BATTERY VOLTAGE (V)
2.7
V
OUT
(V)
3.9
4.3
4.7
3.9
41601 G11
3.5
3.1
3.7
4.1
4.5
3.3
2.9
2.7 3.0 3.3 3.6 4.2
5x MODE
1x MODE
VBUS = 5V
IVOUT = 0µA
RCLPROG = 3.01k
RPROG = 1k
BATTERY VOLTAGE
LOAD CURRENT (mA)
0
V
OUT
(V)
800
41601 G12
200 400 600 1000
BAT = 4V
BAT = 3.4V
BAT = 2.8V
VBUS = 5V
RCLPROG = 3.01k
RPROG = 2k
4.00
4.25
4.50
3.75
3.00
2.75
3.50
2.50
3.25
VOUT
50mV/DIV
AC-COUPLED
IVOUT
500mA/DIV
0mA
20µs/DIV 41601 G13
VBUS = 5V
VOUT = 3.65V
CHARGER OFF
10x MODE
LOAD CURRENT (mA)
30
60
50
40
100
90
80
70
41601 G14
EFFICIENCY (%)
10 1000
100
1x MODE
5x, 10x MODE
BATTERY VOLTAGE (V)
2.7
50
EFFICIENCY (%)
55
65
70
75
3.3 3.9 4.2
95
41601 G15
60
3.0 3.6
80
85
90
RCLPROG = 3.01k
RPROG = 1k
1x MODE
5x MODE
LTC41 60/ LTC41 60—1 v3“ 5v BA 3v 3m Rcmua as :5 5:55 > so so EEEWEB 583:6 /\ / mm ‘2 545323 854552 33:35:: )EEm sun 70 EEFEEB 65in zemexS Emummg / 25 zeEmES 395; 3:: SEE: Emummsa L7 LJUW
LTC4160/LTC4160-1
7
41601fa
TYPICAL PERFORMANCE CHARACTERISTICS
Battery Drain Current vs
Battery Voltage
Battery Charge Current vs
Temperature
Normalized Battery Charger Float
Voltage vs Temperature
VBUS Quiescent Current vs
Temperature
VBUS Quiescent Current in
Suspend vs Temperature
Battery Drain Current vs
Temperature
VBUS Quiescent Current vs
VBUS Voltage (Suspend)
VOUT Voltage vs Load Current in
Suspend
VBUS Current vs Load Current in
Suspend
TA = 25°C, unless otherwise noted.
BUS VOLTAGE (V)
0
0
QUIESCENT CURRENT (µA)
10
20
30
40
50
60
1234
41601 G16
65
BAT = 3.8V
LOAD CURRENT (mA)
0
VOUT (V)
4.0
4.5
5.0
0.4
41601 G17
3.5
3.0
2.5 0.1 0.2 0.3 0.5
VBUS = 5V
BAT = 3.3V
RCLPROG = 3.01k
LOAD CURRENT (mA)
V
BUS
CURRENT (mA)
41601 G18
VBUS = 5V
BAT = 3.3V
RCLPROG = 3.01k
0
0.5
0.4
0.3
0.2
0.1
0.4
00.1 0.2 0.3 0.5
BATTERY VOLTAGE (V)
2.7
7
8
9
3.9
41601 G19
6
5
3.0 3.3 3.6 4.2
4
3
2
1
0
BATTERY CURRENT (µA)
IVOUT = 0mA
VBUS = 0V
VBUS = 5V
(SUSPEND MODE)
TEMPERATURE (°C)
–40
NORMALIZED FLOAT VOLTAGE
0.998
0.999
1.000
60
41601 G21
0.997
0.996 –15 10 35 85
1.001
TEMPERATURE (°C)
–40
QUIESCENT CURRENT (mA)
15
20
25
60
41601 G22
10
5
0–15 10 35 85
VBUS = 5V
5x MODE
1x MODE
TEMPERATURE (°C)
–40
0
QUIESCENT CURRENT (µA)
10
20
30
40
50
70
60
–15 10 35 60
41601 G23
85
VBUS = 5V
TEMPERATURE (°C)
–40
8
12
60
41601 G24
6
4
–15 10 35 85
10
2
0
BATTERY CURRENT (µA)
BAT = 3.8V
VBUS = 0V
TEMPERATURE (°C)
–40
0
CHARGE CURRENT (mA)
100
200
300
400
0 40 80 120
41601 G20
500
600
–20 20 60 100
THERMAL REGULATION
RPROG = 2k
LTC41 60/ LTC41 60—1 an 55 mo EFFICIENDV (m GUIESCENT CURRENUmA) mu 0qu LOAD £ch
LTC4160/LTC4160-1
8
41601fa
TYPICAL PERFORMANCE CHARACTERISTICS
OTG Boost Efficiency
vs Battery Voltage
OTG Boost Start-Up Time
into Current Source Load vs
Battery Voltage
OTG Boost Burst Mode Current
Threshold vs Battery Voltage
OTG Boost Transient Response
OTG Boost Start-Up into Current
Source Load OTG Boost Burst Mode Operation
OTG Boost Quiescent Current
vs Battery Voltage
OTG Boost VBUS Voltage
vs Load Current
OTG Boost Efficiency
vs Load Current
TA = 25°C, unless otherwise noted.
BATTERY VOLTAGE (V)
0.5
QUIESCENT CURRENT (mA)
1.0
1.5
3.0
2.5
41601 G25
2.0
2.7 3.3 3.9 4.2
3.0 3.6
VOUT = BAT
LOAD CURRENT (mA)
0 100
2.5
3.0
V
BUS
(V)
4.0
5.5
200 400 500
41601 G26
3.5
5.0
4.5
300 600 700
VOUT = BAT = 4.2V
VOUT = BAT = 3.8V
VOUT = BAT = 3.4V
VOUT = BAT = 3V
VBUS = 4.75V
IVBUS = 500mA
LOAD CURRENT (mA)
1
30
40
EFFICIENCY (%)
80
90
100
10 100 1000
41601 G27
70
60
50 VOUT = BAT = 4.2V
VOUT = BAT = 3.8V
VOUT = BAT = 3.4V
VOUT = BAT = 3V
BATTERY VOLTAGE (V)
2.7 3.3 3.9 4.2
3.0 3.6
EFFICIENCY (%)
80
85
41601 G28
75
70
100
95
90 500mA LOAD
100mA LOAD
VOUT = BAT
BATTERY VOLTAGE (V)
2.7 3.3 3.9 4.2
3.0 3.6
1.6
TIME (ms)
1.7
1.8
1.9
2.0
2.1
2.2
2.3
2.4
41601 G29
22µF ON VBUS, 22µF AND
LOAD THROUGH OVP
22µF ON VBUS,
LOAD THROUGH OVP
22µF ON VBUS,
NO OVP
VOUT = BAT
ILOAD = 500mA
2.7 3.3 3.9 4.2
3.0 3.6
BATTERY VOLTAGE (V)
LOAD CURRENT (mA)
20
41601 G30
30
0
100
90
40
80
10
70
60
50
VOUT = BAT
VBUS
50mV/DIV
AC COUPLED
IVBUS
200mA/DIV
0mA
20µs/DIV 41601 G31
VOUT = 3.8V
IVBUS
200mA/DIV
VBUS
2V/DIV
0V
0mA
200µs/DIV 41601 G32
VOUT = 3.8V
ILOAD = 500mA
VBUS
50mV/DIV
AC COUPLED
VSW
1V/DIV
0V 50µs/DIVVOUT = 3.8V
ILOAD = 10mA
41601 G33
LTC41 60/ LTC41 60—1 230 a a \ BA 42v 5 V‘fi—H‘ a a / \ n 5? i 5 E 2 s g g m ,4 E g 7/; // w /$ /// 547 S C. 5 § § 5 5 ‘2 as m 2 E, A E \ g / E vaussu E 3 5 E E E 2 5 :3 E ‘3 FA 2 LL 3 § ‘3' E ‘5 g hi ‘8 2 \§ L7 LJUW 9
LTC4160/LTC4160-1
9
41601fa
TYPICAL PERFORMANCE CHARACTERISTICS
OVP Connect Waveform OVP Disconnect Waveform
Rising OVP Threshold vs
Temperature
OVGATE vs OVSENS
OVSENS Quiescent Current vs
Temperature
VBUSGD, CHRG, FAULT Pin
Current vs Voltage (Pull-Down
State)
3.3V LDO Output Voltage vs
Load Current, VBUS = 0V
3.3V LDO Step Response
(5mA to 15mA)
Oscillator Frequency vs
Temperature
TA = 25°C, unless otherwise noted.
LOAD CURRENT (mA)
0
OUTPUT VOLTAGE (V)
3.0
3.2
20
41601 G34
2.8
2.6 510 15 25
3.4
BAT = 3.9V, 4.2V
BAT = 3.6V
BAT = 3V
BAT = 3.5V
BAT = 3.4V
BAT = 3.1V
BAT = 3.2V
BAT = 3.3V
ILDO3V3
5mA/DIV
0mA
20µs/DIVBAT = 3.8V 41601 G35
VLDO3V3
20mV/DIV
AC COUPLED
TEMPERATURE (°C)
–40
FREQUENCY (MHz)
2.20
2.25
2.30
60
41601 G36
2.15
2.10
2.05 –15 10 35 85
VOUT = 5V
VOUT = 4.2V
VOUT = 3.6V
VOUT = 3V
VOUT = 2.7V
TEMPERATURE (°C)
–40
OVP THRESHOLD (V)
6.45
6.46
6.47
60
41601 G39
6.44
6.43
6.42 –15 10 35 85
INPUT VOLTAGE (V)
0
0
OVGATE (V)
2
4
6
8
10
12
2 4 6 8
41601 G40
OVSENS CONNECTED
TO INPUT THROUGH
6.2k RESISTOR
TEMPERATURE (°C)
–40
QUIESCENT CURRENT (µA)
39
42
48
45
60
41601 G41
36
33
30 –15 10 35 85
VOVSENS = 5V
VBUSGD, CHRG, FAULT PIN VOLTAGE (V)
0
VBUSGD, CHRG, FAULT PIN CURRENT (mA)
60
80
120
100
4
41601 G42
40
20
01235
VBUS = 5V
BAT = 3.8V
VBUSGD
FAULT, CHRG
VBUS
5V/DIV
OVGATE
5V/DIV
500µs/DIV 41601 G38
OVP INPUT
VOLTAGE
5V TO 10V
STEP 5V/DIV
OVGATE
250µs/DIV 41601 G37
0V
2V/DIV
VBUS
LTC41 60/ LTC41 6’04
LTC4160/LTC4160-1
10
41601fa
PIN FUNCTIONS
OVGATE (Pin 1): Overvoltage Protection Gate Output.
Connect OVGATE to the gate pin of an external N-channel
MOSFET. The source of the transistor should be connected
to VBUS and the drain should be connected to the product’s
DC input connector. In the absence of an overvoltage con-
dition, this pin is connected to an internal charge pump
capable of creating sufficient overdrive to fully enhance
the MOSFET. If an overvoltage condition is detected, OV-
GATE is brought rapidly to GND to prevent damage to the
LTC4160/LTC4160-1. OVGATE works in conjunction with
OVSENS to provide this protection.
OVSENS (Pin 2): Overvoltage Protection Sense Input.
OVSENS should be connected through a 6.2k resistor to
the input power connector and the drain of an external
N-channel MOSFET. When the voltage on this pin exceeds
VOVCUTOFF, the OVGATE pin will be pulled to GND to dis-
able the MOSFET and protect the LTC4160/LTC4160-1.
The OVSENS pin shunts current during an overvoltage
transient in order to keep the pin voltage at 6V.
VBUSGD (Pin 3): Logic Output. This is an open-drain
output which indicates that VBUS is above VUVLO and
VDUVLO. VBUSGD requires a pull-up resistor and/or LED
to provide indication.
FAULT (Pin 4): Logic Output. This in an open-drain output
which indicates a bad battery fault when the charger is
enabled or a short circuit condition on VBUS when the
bidirectional PowerPath switching regulator is in step-up
mode (On-The-Go). FAULT requires a pull-up resistor
and/or LED to provide indication.
ID (Pin 5): Logic Input. This pin independently enables
the bidirectional switching regulator to step-up the volt-
age on VOUT and provide a 5V output on the VBUS pin for
USB On-The-Go applications. If the host does not power
down VBUS then connect this pin directly to the ID pin of
a USB micro-AB receptacle. Active low. Has an internal
2.5µA pull-up current source.
ENOTG (Pin 6): Logic Input. This pin independently enables
the bidirectional switching regulator to step-up the voltage
on VOUT and provide a 5V output on the VBUS pin for USB
On-The-Go applications. Active high. Has an internal 1.8µA
pull-down current source.
ENCHARGER (Pin 7): Logic Input. This pin enables the
battery charger. Active low. Has an internal 1.8µA pull-
down current source.
PROG (Pin 8): Charge Current Program and Charge Cur-
rent Monitor Pin. Connecting a 1% resistor from PROG to
ground, programs the charge current. If sufficient input
power is available in constant-current mode, this pin servos
to 1V. The voltage on this pin always represents the actual
charge current by using the following formula:
IV
R
BAT PROG
PROG
=•1030
CHRG (Pin 9): Logic Output. This is an open-drain out-
put that indicates whether the battery is charging or not
charging. CHRG requires a pull-up resistor and/or LED to
provide indication.
IDGATE (Pin 10): Ideal Diode Amplifier Output. This pin
controls the gate of an optional external P-channel MOSFET
used as an ideal diode between VOUT and BAT. The external
ideal diode operates in parallel with the internal ideal diode.
The source of the P-channel MOSFET should be connected
to VOUT and the drain should be connected to BAT. If the
external ideal diode MOSFET is not used, IDGATE should
be left floating.
BAT (Pin 11): Single Cell Li-Ion Battery Pin. Depending on
available VBUS power, a Li-Ion battery on BAT will either
deliver power to VOUT through the ideal diode or be charged
from VOUT via the battery charger.
VOUT (Pin 12): Output Voltage of the Bidirectional Power-
Path Switching Regulator in Step-Down Mode and Input
Voltage of the Battery Charger. The majority of the portable
product should be powered from VOUT. The LTC4160/
LTC4160-1 will partition the available power between the
external load on VOUT and the internal battery charger.
Priority is given to the external load and any extra power
is used to charge the battery. An ideal diode from BAT to
VOUT ensures that VOUT is powered even if the load exceeds
the allotted power from VBUS or if the VBUS power source
is removed. In On-The-Go mode, this pin delivers power
to VBUS via the SW pin. VOUT should be bypassed with a
low impedance multilayer ceramic capacitor.
LTC41 60/ LTC41 60—1 L7 LJUW 1 1
LTC4160/LTC4160-1
11
41601fa
PIN FUNCTIONS
VBUS (Pin 13): Power Pin. This pin delivers power to VOUT
via the SW pin by drawing controlled current from a DC
source such as a USB port or DC output wall adapter.
In On-The-Go mode this pin provides power to external
loads. Bypass VBUS with a low impedance multilayer
ceramic capacitor.
SW (Pin 14): The SW pin transfers power between VBUS
to VOUT via the bidirectional switching regulator. See
the Applications Information section for a discussion of
inductance value and current rating.
ILIM0, ILIM1 (Pins 15, 16): ILIM0 and ILIM1 control the VBUS
input current limit of the bidirectional PowerPath switching
regulator in step-down mode. See Table 1. Each has an
internal 1.8µA pull-down current source.
CLPROG (Pin 17): USB Current Limit Program and Monitor
Pin. A 1% resistor from CLPROG to ground determines
the upper limit of the current drawn or sourced from the
VBUS pin. A precise fraction, hCLPROG, of the VBUS current
is sent to the CLPROG pin when the PMOS switch of the
bidirectional PowerPath switching regulator is on. The
switching regulator delivers power until the CLPROG pin
reaches 1.18V in step-down mode and 1.15V in step-up
mode. When the switching regulator is in step-down mode,
CLPROG is used to regulate the average input current.
Several VBUS current limit settings are available via user
input which will typically correspond to the 500mA and
100mA USB specifications. When the switching regulator
is in step-up mode (USB On-The-Go), CLPROG is used to
limit the average output current to 680mA. A multilayer
ceramic averaging capacitor or R-C network is required
at CLPROG for filtering.
LDO3V3 (Pin 18): 3.3V LDO Output Pin. This pin provides
a regulated always-on 3.3V supply voltage. LDO3V3
gets its power from VOUT. It may be used for light loads
such as a watch dog microprocessor or real time clock.
A 1µF capacitor is required from LDO3V3 to ground. If
the LDO3V3 output is not used it should be disabled by
connecting it to VOUT.
NTCBIAS (Pin 19): NTC Thermistor Bias Output. If NTC
operation is desired, connect a bias resistor between
NTCBIAS and NTC, and an NTC thermistor between NTC
and GND. To disable NTC operation, connect NTC to GND
and leave NTCBIAS open.
NTC (Pin 20): Input to the Thermistor Monitoring Circuits.
The NTC pin connects to a negative temperature coefficient
thermistor, which is typically co-packaged with the battery,
to determine if the battery is too hot or too cold to charge.
If the battery’s temperature is out of range, charging is
paused until it re-enters the valid range. A low drift bias
resistor is required from NTCBIAS to NTC and a thermistor
is required from NTC to ground. To disable NTC operation,
connect NTC to GND and leave NTCBIAS open.
GND (Exposed Pad Pin 21): Ground. The Exposed Pad
should be connected to a continuous ground plane on the
second layer of the printed circuit board by several vias
directly under the LTC4160/LTC4160-1.
LTC41 60/ LTC41 6’04
LTC4160/LTC4160-1
12
41601fa
BLOCK DIAGRAM
+
–
+
+
–
0.3V
VCLPROG
3.6V
CLPROG
ISWITCH/N
+–
+
–
15mV
OmV
IDEAL
DIODE
PWM AND
GATE DRIVE
AVERAGE VBUS
CURRENT LIMIT
CONTROLLER
VBUS VOLTAGE
CONTROLLER
VOUT VOLTAGE
CONTROLLER
+
–
5.1V
IDGATE
10
VOUT
12
SW
TO SYSTEM LOAD
SINGLE CELL
Li-Ion
41601 BD
14
BAT
11
TO USB
OR WALL
ADAPTER
OPTIONAL EXTERNAL
OVERVOLTAGE PROTECTION
N-CHANNEL MOSFET
OPTIONAL
EXTERNAL
OVERVOLTAGE
PROTECTION
RESISTOR
+
VBUS
+
–
6V
OVERVOLTAGE PROTECTION
×2
+
–
+–
1V
BATTERY CHARGER
IBAT/1000
+
–
VFLOAT
+
–
PROG
8
17
13
2
OVSENS
1
OVGATE
+–
3.3V
LDO3V3
3V3 LDO
18
+
–
+–
4.6V
100mV
SUSPEND
LDO
ILDO/M
20
+
–
+
–
+
–
0.1V
UNDERTEMP
OVERTEMP
NTC
NTCBIAS
VOUT
NTC
T
NTC FAULT
LOW BAT
ENOTG
NTC ENABLE
6
ID
5
CONTROL LOGIC
GND
21
19
ENCHARGER
716
ILIM0
15
ILIM1
4HRS
100mV +
–
2.9V
+
–
RECHRG VRECHRG
FAULT
+
–
9
CHRG
OTG SHORT CIRCUIT
BAD CELL
4FAULT
VBUSGD
4.3V
0.2V
BAT
3VBUSGD
–
+
+
–
+–
OPTIONAL
EXTERNAL
IDEAL DIODE
P-CHANNEL
MOSFET
L7 LJUW LTC41 60/ LTC41 60—1 13
LTC4160/LTC4160-1
13
41601fa
OPERATION
Introduction
The LTC4160/LTC4160-1 are high efficiency bidirectional
switching power managers and Li-Ion/Polymer battery
chargers designed to make optimal use of the power
available while minimizing power dissipation and easing
thermal budgeting constraints. The innovative PowerPath
architecture ensures that the end product application is
powered immediately after external voltage is applied,
even with a completely dead battery, by prioritizing power
to the end product.
When acting as a step-down converter, the LTC4160/
LTC4160-1’s bidirectional switching regulator takes power
from USB, wall adapters, or other 5V sources and provides
power to the end product application and efficiently charges
the battery using Bat-Track. Because power is conserved,
the LTC4160/LTC4160-1 allow the load current on VOUT to
exceed the current drawn by the USB port, making maxi-
mum use of the allowable USB power for battery charging.
For USB compatibility, the switching regulator includes
a precision average input current limit. The bidirectional
switching regulator and battery charger communicate to
ensure that the average input current never exceeds the
USB specifications.
In addition, the bidirectional switching regulator can also
operate as a 5V synchronous step-up converter, taking
power from VOUT and delivering up to 500mA to VBUS
without the need for any additional external components.
This enables systems with USB dual-role transceivers to
function as USB On-The-Go dual-role devices. True output
disconnect and average output current limit features are
included for short circuit protection.
The LTC4160/LTC4160-1 contain both an internal 180mΩ
ideal diode as well as an ideal diode controller for use
with an external P-channel MOSFET. The ideal diodes
from BAT to VOUT guarantee that ample power is always
available to VOUT even if there is insufficient or absent
power at VBUS.
An always-on LDO provides a regulated 3.3V from avail-
able power at VOUT. Drawing very little quiescent current,
this LDO will be on at all times and can be used to supply
up to 20mA.
The LTC4160/LTC4160-1 also feature an overvoltage pro-
tection circuit which is designed to work with an external
N-channel MOSFET to prevent damage to their inputs
caused by accidental application of high voltage.
Finally, to prevent battery drain when a device is con-
nected to a suspended USB port, an LDO from VBUS to
VOUT provides low power USB suspend current to the end
product application.
Bidirectional PowerPath Switching Regulator –
Step-Down Mode
The power delivered from VBUS to VOUT is controlled by
a 2.25MHz constant frequency bidirectional switching
regulator in step-down mode. VOUT drives the combination
of the external load and the battery charger. To meet the
maximum USB load specification, the switching regulator
contains a measurement and control system that ensures
that the average input current remains below the level
programmed at CLPROG.
If the combined load does not cause the switching regu-
lator to reach the programmed input current limit, VOUT
will track approximately 0.3V above the battery voltage.
By keeping the voltage across the battery charger at this
low level, power lost to the battery charger is minimized.
Figure 1 shows the power flow in step-down mode.
If the combined external load plus battery charge current
is large enough to cause the switching regulator to reach
the programmed input current limit, the battery charger
will reduce its charge current by precisely the amount
necessary to enable the external load to be satisfied. Even
if the battery charge current is programmed to exceed the
allowable USB current, the USB specification for average
input current will not be violated; the battery charger will
reduce its current as needed. Furthermore, if the load cur-
rent at VOUT exceeds the programmed power from VBUS,
load current will be drawn from the battery via the ideal
diode(s) even when the battery charger is enabled.
The current out of CLPROG is a precise fraction of the VBUS
current. When a programming resistor and an averaging
capacitor are connected from CLPROG to GND, the volt-
age on CLPROG represents the average input current of
the switching regulator. As the input current approaches
LTC4160/LTC4160—1 L7LJCUEN2 14
LTC4160/LTC4160-1
14
41601f
OPERATION
the programmed limit, CLPROG reaches 1.18V and power
delivered by the switching regulator is held constant.
The input current limit is programmed by the ILIM0 and
ILIM1 pins. The input current limit has four possible set-
tings ranging from the USB suspend limit of 500μA up
to 1A for wall adapter applications. Two of these settings
are specifically intended for use in the 100mA and 500mA
USB application. Refer to Table 1 for current limit settings
using ILIM0 and ILIM1.
Table 1. USB Current Limit Settings Using ILIM0 and ILIM1
ILIM1 ILIM0 USB SETTING
0 0 1x Mode (USB 100mA Limit)
0 1 10x Mode (Wall 1A Limit)
1 0 Low Power Suspend (USB 500μA Limit)
1 1 5x Mode (USB 500mA Limit)
When the switching regulator is activated, the average
input current will be limited by the CLPROG programming
resistor according to the following expression:
II V
Rh
VBUSVBUSQ CLPROG
CLPROG CLPROG
=+ +
()
•1
where IVBUSQ is the quiescent current of the LTC4160/
LTC4160-1, VCLPROG is the CLPROG servo voltage in
current limit, RCLPROG is the value of the programming
resistor and hCLPROG is the ratio of the measured cur-
rent at VBUS to the sample current delivered to CLPROG.
Refer to the Electrical Characteristics table for values of
hCLPROG, VCLPROG and IVBUSQ. Given worst-case circuit
tolerances, the USB specification for the average input
current in 100mA or 500mA mode will not be violated,
provided that RCLPROG is 3.01k or greater.
While not in current limit, the switching regulator’s
Bat-Track feature will set VOUT to approximately 300mV
above the voltage at BAT. However, if the voltage at BAT
is below 3.3V, and the load requirement does not cause
the switching regulator to exceed its current limit, VOUT
will regulate at a fixed 3.6V, as shown in Figure 2. This
instant-on operation will allow a portable product to run
immediately when power is applied without waiting for the
battery to charge. If the load does exceed the current limit
at VBUS, VOUT will range between the no-load voltage and
slightly below the battery voltage, indicated by the shaded
region of Figure 2.
Figure 1. Power Path Block Diagram – Power Available from USB/Wall Adapter
+
–
+
+
–
0.3V
1.18V
3.6V
CLPROG
ISWITCH/N
+–
+
–
15mV
OmV
IDEAL
DIODE
PWM AND
GATE DRIVE
AVERAGE VBUS INPUT
CURRENT LIMIT
CONTROLLER
VBUS
VOLTAGE
CONTROLLER
VOUT VOLTAGE
CONTROLLER
+
–
5V
IDGATE
10
VOUT
12
SW
3.5V TO
(BAT + 0.3V)
TO SYSTEM LOAD
SINGLE CELL
Li-Ion
41601 F01
14
BAT
USB INPUT
BATTERY POWER
11
TO USB
OR WALL
ADAPTER
+
VBUS
+
–
6V
OVERVOLTAGE PROTECTION
×2
+
–
+–
1V
BATTERY CHARGER
IBAT/1000
+
–
VFLOAT
+
–
PROG
8
17
13
2
OVSENS
1
OVGATE
45 r(W v L7 LJUW LTC41 60/ LTC41 60—1 15
LTC4160/LTC4160-1
15
41601f
For very low-battery voltages, the battery charger acts like
a load and, due to limited input power, its current will tend
to pull VOUT below the 3.6V instant-on voltage. To prevent
VOUT from falling below this level, an undervoltage circuit
automatically detects that VOUT is falling and reduces the
battery charge current as needed. This reduction ensures
that load current and voltage are always prioritized while
allowing as much battery charge current as possible. See
Over Programming the Battery Charger in the Applications
Information section.
The voltage regulation loop compensation is controlled by
the capacitance on VOUT. A multilayer ceramic capacitor of
10µF is required for loop stability. Additional capacitance
beyond this value will improve transient response.
An internal undervoltage lockout circuit monitors VBUS and
keeps the switching regulator off until VBUS rises above
4.30V and is about 200mV above the battery voltage.
When both conditions are met, VBUSGD goes low and
the switching regulator turns on. Hysteresis on the UVLO
forces VBUSGD high and turns off the switching regulator
if VBUS falls below 4.00V or to within 50mV of the battery
voltage. When this happens, system power at VOUT will
be drawn from the battery via the ideal diode(s).
comes from the battery via the ideal diode(s). As a step-up
converter, the bidirectional switching regulator produces
5V on VBUS and is capable of delivering at least 500mA.
USB On-The-Go can be enabled by either of the external
control pins, ENOTG or ID. Figure 3 shows the power flow
in step-up mode.
An undervoltage lockout circuit monitors VOUT and prevents
step-up conversion until VOUT rises above 2.8V. To prevent
backdriving of VBUS when input power is available, the VBUS
undervoltage lockout circuit prevents step-up conversion
if VBUS is already greater than 4.3V at the time step-up
mode is enabled. The switching regulator is also designed
to allow true output disconnect by eliminating body diode
conduction of the internal PMOS switch. This allows VBUS
to go to zero volts during a short-circuit condition or while
shutdown, drawing zero current from VOUT.
The voltage regulation loop is compensated by the capaci-
tance on VBUS. A 4.7µF multilayer ceramic capacitor is
required for loop stability. Additional capacitance beyond
this value will improve transient response. The VBUS volt-
age has approximately 3% load regulation up to an output
current of 500mA. At light loads, the switching regulator
goes into Burst Mode
®
operation. The regulator will deliver
power to VBUS until it reaches 5.1V after which the NMOS
and PMOS switches shut off. The regulator delivers power
again to VBUS once it falls below 5.1V.
The switching regulator features both peak inductor and
average output current limit. The peak current-mode
architecture limits peak inductor current on a cycle-by-
cycle basis. The peak current limit is equal to VBUS/2Ω to
a maximum of 1.8A so that in the event of a sudden short
circuit, the current limit will fold back to a lower value.
In step-up mode, the voltage on CLPROG represents the
average output current of the switching regulator when
a programming resistor and an averaging capacitor are
connected from CLPROG to GND. With a 3.01k resistor
on CLPROG, the bidirectional switching regulator has an
output current limit of 680mA. As the output current ap-
proaches this limit, CLPROG servos to 1.15V and VBUS falls
rapidly to VOUT. When VBUS is close to VOUT there may not
be sufficient negative slope on the inductor current when
the PMOS switch is on to balance the rise in the inductor
OPERATION
Figure 2. VOUT vs BAT
Bidirectional PowerPath Switching Regulator –
Step-Up Mode
For USB On-The-Go applications, the bidirectional
PowerPath switching regulator acts as a step-up converter
to deliver power from VOUT to VBUS. The power from VOUT
BAT (V)
2.4
4.5
4.2
3.9
3.6
3.3
3.0
2.7
2.4 3.3 3.9
41601 F02
2.7 3.0 3.6 4.2
V
OUT
(V)
NO LOAD
300mV
LTC4160/LTC4160—1 2200 IVISHAV $0333 I OPTIONAL EXTERNAL IDEAL DIODE III I x , mouse/,ii i LTCM eurl IDEAL DIODE I CURRENTWAI I I I ON [I SEMICONDUCTOR I/ MERMVZULTy WI 1 6 L7LJCUEN2
LTC4160/LTC4160-1
16
41601fa
+
–
+
+
–
0.3V
1.18V
3.6V
CLPROG
ISWITCH/N
+–
+
–
15mV
OmV
IDEAL
DIODE
PWM AND
GATE DRIVE
AVERAGE VBUS OUTPUT
CURRENT LIMIT
CONTROLLER
VBUS
VOLTAGE
CONTROLLER
VOUT VOLTAGE
CONTROLLER
+
–
5.1V
17
IDGATE
10
VOUT
12
SW
3.5V TO
(BAT + 0.3V)
TO SYSTEM LOAD
SINGLE CELL
Li-Ion
41601 F03
14
BAT
BATTERY POWER
11
TO USB
OR WALL
ADAPTER
13
+
2
OVSENS
VBUS
1
OVGATE
+
–
6V
OVERVOLTAGE PROTECTION
×2
+
–
+–
1V
BATTERY CHARGER
IBAT/1000
+
–
VFLOAT
+
–
PROG
8
OPERATION
current when the NMOS switch is on. This will cause the
inductor current to run away and the voltage on CLPROG
to rise. When CLPROG reaches 1.2V the switching of the
synchronous PMOS is terminated and VOUT is applied
statically to its gate. This ensures that the inductor current
will have sufficient negative slope during the time current
is flowing out of the VBUS pin. The PMOS will resume
switching when CLPROG drops down to 1.15V.
The PMOS switch is enabled when VBUS rises above
VOUT + 180mV and is disabled when it falls below
VOUT + 70mV to prevent the inductor current from run-
ning away when not in current limit. If the PMOS switch is
disabled for more than 7.2ms then the switcher will shut
off, the FAULT pin will go low and a short circuit fault will be
declared. To re-enable step-up mode, the ENOTG pin, with
ID high, must be cycled low and then high or the ID pin, with
ENOTG grounded, must be cycled high and then low.
Ideal Diode(s) from BAT to VOUT
The LTC4160/LTC4160-1 each have an internal ideal diode
as well as a controller for an external ideal diode. Both the
internal and the external ideal diodes are always on and
will respond quickly whenever VOUT drops below BAT.
If the load current increases beyond the power allowed
from the bidirectional switching regulator, additional
power will be pulled from the battery via the ideal diode(s).
Furthermore, if power to VBUS (USB or wall adapter) is
removed, then all of the application power will be provided
by the battery via the ideal diode(s). The ideal diode(s) will
prevent VOUT from drooping with only the storage capaci-
tance required for the bidirectional switching regulator. The
internal ideal diode consists of a precision amplifier that
activates a large on-chip P-channel MOSFET whenever
Figure 4. Ideal Diode V-I Characteristics
Figure 3. PowerPath Block Diagram – USB On-The-Go
FORWARD VOLTAGE (mV) (BAT – VOUT)
0
CURRENT (mA)
600
1800
2000
2200
120 240 300
41601 F04
200
1400
1000
400
1600
0
1200
800
60 180 360 480420
VISHAY Si2333
OPTIONAL EXTERNAL
IDEAL DIODE
LTC4160/
LTC4160-1
IDEAL DIODE
ON
SEMICONDUCTOR
MBRM120LT3
L7 LJUW LTC41 60/ LTC41 60—1 17
LTC4160/LTC4160-1
17
41601fa
OPERATION
the voltage at VOUT is approximately 15mV (VFWD) below
the voltage at BAT. Within the amplifier’s linear range, the
small-signal resistance of the ideal diode will be quite low,
keeping the forward drop near 15mV. At higher current
levels, the MOSFET will be in full conduction.
To supplement the internal ideal diode, an external P-
channel MOSFET may be added from BAT to VOUT. The
IDGATE pin of the LTC4160/LTC4160-1 drives the gate of
the external P-channel MOSFET for automatic ideal diode
control. The source of the external P-channel MOSFET
should be connected to VOUT and the drain should be con-
nected to BAT. Capable of driving a 1nF load, the IDGATE
pin can control an external P-channel MOSFET having an
on-resistance of 30mΩ or lower.
Suspend LDO
If the LTC4160/LTC4160-1 is configured for USB suspend
mode, the bidirectional switching regulator is disabled and
the suspend LDO provides power to the VOUT pin (pre-
suming there is power available at VBUS). This LDO will
prevent the battery from running down when the portable
product has access to a suspended USB port. Regulating at
4.6V, this LDO only becomes active when the bidirectional
switching regulator is disabled (suspended). The sus-
pend LDO sends a scaled copy of the VBUS current to the
CLPROG pin, which will servo to approximately 100mV in
this mode. In accordance with the USB specification, the
input to the LDO is current limited so that it will not exceed
the low power suspend specification. If the load on VOUT
exceeds the suspend current limit, the additional current
will come from the battery via the ideal diode(s).
3.3V Always-On LDO Supply
The LTC4160/LTC4160-1 include a low quiescent current
low dropout regulator that is always powered. This LDO
can be used to provide power to a system pushbutton
controller, standby microcontroller or real time clock.
Designed to deliver up to 20mA, the always-on LDO re-
quires at least a 1μF multilayer ceramic bypass capacitor
for compensation. The LDO is powered from VOUT, and
therefore will enter dropout at loads less than 20mA as
VOUT falls near 3.3V. If the LDO3V3 output is not used, it
should be disabled by connecting it to VOUT.
Battery Charger
The LTC4160/LTC4160-1 include a constant-current/con-
stant-voltage battery charger with automatic recharge,
automatic termination by safety timer, low voltage trickle
charging, bad cell detection, and thermistor sensor input
for out-of-temperature charge pausing. The charger can
be disabled using the ENCHARGER pin.
Battery Preconditioning
When a battery charge cycle begins, the battery charger
first determines if the battery is deeply discharged. If the
battery voltage is below VTRKL, typically 2.85V, an automatic
trickle charge feature sets the battery charge current to
10% of the programmed value. If the low voltage persists
for more than a 1/2 hour, the battery charger automatically
terminates and indicates via the CHRG and FAULT pins that
the battery was unresponsive.
Once the battery voltage is above 2.85V, the charger begins
charging in full power constant-current mode. The cur-
rent delivered to the battery will try to reach 1030/RPROG.
Depending on available input power and external load
conditions, the battery charger may or may not be able
to charge at the full programmed rate. The external load
will always be prioritized over the battery charge current.
Likewise, the USB current limit programming will always
be observed and only additional power will be available to
charge the battery. When system loads are light, battery
charge current will be maximized.
Charge Termination
The battery charger has a built-in safety timer. When the
voltage on the battery reaches the pre-programmed float
voltage, the battery charger will regulate the battery volt-
age and the charge current will decrease naturally. Once
the battery charger detects that the battery has reached
the float voltage, the four hour safety timer is started.
After the safety timer expires, charging of the battery will
discontinue and no more current will be delivered.
Automatic Recharge
After the battery charger terminates, it will remain off
drawing only microamperes of current from the battery.
If the portable product remains in this state long enough,
LTC41 60/ LTC41 6’04
LTC4160/LTC4160-1
18
41601fa
the battery will eventually self discharge. To ensure that
the battery is always topped off, a charge cycle will auto-
matically begin when the battery voltage falls below the
recharge threshold which is typically 100mV less than
the charger’s float voltage. In the event that the safety
timer is running when the battery voltage falls below the
recharge threshold, it will reset back to zero. To prevent
brief excursions below the recharge threshold from reset-
ting the safety timer, the battery voltage must be below
the recharge threshold for more than 1ms. The charge
cycle and safety timer will also restart if the VBUS UVLO
cycles low and then high (e.g., VBUS is removed and then
replaced), or if the battery charger is cycled on and off by
the ENCHARGER pin.
Charge Current
The charge current is programmed using a single resis-
tor from PROG to ground. 1/1030th of the battery charge
current is sent to PROG, which will attempt to servo to
1.000V. Thus, the battery charge current will try to reach
1030 times the current in the PROG pin. The program
resistor and the charge current are calculated using the
following equation:
IV
R
CHGPROG
PROG
=•1030
In either the constant-current or constant-voltage charging
modes, the voltage at the PROG pin will be proportional to
the actual charge current delivered to the battery. There-
fore, the actual charge current can be determined at any
time by monitoring the PROG pin voltage and using the
following equation:
IV
R
BAT PROG
PROG
=•1030
In many cases, the actual battery charge current, IBAT, will
be lower than ICHG due to limited input power available and
prioritization with the system load drawn from VOUT.
The Battery Charger Flow Chart on the next page illustrates
the battery charger’s algorithm.
Charge Status Indication
The CHRG and FAULT pins can be used to indicate the status
of the battery charger. Two possible states are represented
by CHRG: charging and not charging. An open-drain output,
the CHRG pin can drive an indicator LED through a current
limiting resistor for human interfacing or simply a pull-up
resistor for microprocessor interfacing.
When charging begins, CHRG is pulled low and remains
low for the duration of a normal charge cycle. When charg-
ing is complete, i.e., the BAT pin reaches the float and the
charge current has dropped to one tenth of the programmed
value, the CHRG pin goes high. The CHRG pin does not
respond to the C/10 threshold if the LTC4160/LTC4160-1
is in VBUS input current limit. This prevents false end-of-
charge indications due to insufficient power available to
the battery charger.
Table 2 illustrates the possible states of the CHRG and
FAULT pins when the battery charger is active.
Table 2. Charge Status Readings Using the CHRG and FAULT Pins
STATUS CHRG FAULT
Charging/NTC Fault Low High
Not Charging High High
Bad Battery High Low
An NTC fault pauses charging while the battery tempera-
ture is out of range but is not indicated using the CHRG
or FAULT pins.
If a battery is found to be unresponsive to charging (i.e.,
its voltage remains below 2.85V for 1/2 hour) the CHRG
pin goes high and the FAULT pin goes low to indicate a
bad battery fault.
Note that the LTC4160/LTC4160-1 are 3-terminal
PowerPath products where system load is always priori-
tized over battery charging. Due to excessive system load,
there may not be sufficient power to charge the battery
beyond the trickle charge threshold voltage within the bad
battery timeout period. In this case, the battery charger
will falsely indicate a bad battery. System software may
then reduce the load and reset the battery charger to try
again.
The FAULT pin is also used to indicate whether there is
a short circuit condition on VBUS when the bidirectional
OPERATION
Q LTC41 60/ LTC41 60—1 C: :2 l 3 ng
LTC4160/LTC4160-1
19
41601fa
OPERATION
Battery Charger Flow Chart
CLEAR EVENT TIMER
NTC OUT OF RANGE
BATTERY STATE
CHARGE AT
1030V/RPROG RATE
PAUSE EVENT TIMER PAUSE EVENT TIMER
CHARGE WITH
FIXED VOLTAGE
(VFLOAT)
RUN EVENT TIMER
CHARGE AT
100V/RPROG (C/10 RATE)
RUN EVENT TIMER
ASSERT CHRG LOW
POWER ON/
ENABLE CHARGER
TIMER > 30 MINUTES TIMER > 4 HOURS
BAT > 2.85V BAT < VRECHRG
IBAT < C/10
NO
NO YES
YES
YES
YES
YES
YES
NO
NO
BAT > VFLOAT – εBAT < 2.85V
2.85V < BAT < VFLOAT – ε
NO
NONO
INHIBIT CHARGING STOP CHARGING
INDICATE BATTERY
FAULT AT FAULT
BAT RISING
THROUGH
VRECHRG
BAT FALLING
THROUGH
VRECHRG
CHRG Hi-Z CHRG Hi-Z
41601 FLOW
NO
YES
YES
INHIBIT CHARGING
LTC41 60/ LTC41 60—1 20 L7ELUEN2
LTC4160/LTC4160-1
20
41601fa
OPERATION
switching regulator is in On-The-Go mode. When a short
circuit condition is detected, FAULT will go low-Z. The
ENOTG or VBUSGD pins can be used to determine which
fault has occurred. If ENOTG or VBUSGD is low when FAULT
went low, then a bad battery fault has occurred. If either
pin is high, then a short circuit on VBUS has occurred.
NTC Thermistor
The battery temperature is measured by placing a nega-
tive temperature coefficient (NTC) thermistor close to the
battery pack.
To use this feature connect the NTC thermistor, RNTC, be-
tween the NTC pin and ground and a bias resistor, RNOM,
from NTCBIAS to NTC. RNOM should be a 1% 200ppm
resistor with a value equal to the value of the chosen NTC
thermistor at 25°C (R25).
The LTC4160/LTC4160-1 will pause charging when the
resistance of the NTC thermistor drops to 0.54 times the
value of R25 or approximately 54k for a 100k thermis-
tor. For a Vishay Curve 1 thermistor, this corresponds to
approximately 40°C. If the battery charger is in constant-
voltage (float) mode, the safety timer also pauses until the
thermistor indicates a return to a valid temperature. As the
temperature drops, the resistance of the NTC thermistor
rises. The LTC4160/LTC4160-1 are also designed to pause
charging when the value of the NTC thermistor increases
to 3.25 times the value of R25. For a Vishay Curve 1
100k thermistor, this resistance, 325k, corresponds to
approximately 0°C. The hot and cold comparators each
have approximately 3°C of hysteresis to prevent oscilla-
tion about the trip point. Grounding the NTC pin disables
all NTC functionality.
Thermal Regulation
To prevent thermal damage to the LTC4160/LTC4160-1 or
surrounding components, an internal thermal feedback
loop will automatically decrease the programmed charge
current if the die temperature rises to 105°C. This thermal
regulation technique protects the LTC4160/LTC4160-1
from excessive temperature due to high power operation
or high ambient thermal conditions, and allows the user
to push the limits of the power handling capability with
a given circuit board design. The benefit of the LTC4160/
LTC4160-1 thermal regulation loop is that charge current
can be set according to actual conditions rather than
worst-case conditions for a given application with the
assurance that the charger will automatically reduce the
current in worst-case conditions.
Overvoltage Protection
The LTC4160/LTC4160-1 can protect themselves from the
inadvertent application of excessive voltage to VBUS with
just two external components: an N-channel MOSFET and
a 6.2k resistor. The maximum safe overvoltage magnitude
will be determined by the choice of the external MOSFET
and its associated drain breakdown voltage.
The overvoltage protection circuit consists of two pins.
The first, OVSENS, is used to measure the externally ap-
plied voltage through an external resistor. The second,
OVGATE, is an output used to drive the gate pin of the
external MOSFET. When OVSENS is below 6V, an inter-
nal charge pump will drive OVGATE to approximately
1.88 • OVSENS. This will enhance the N-channel MOSFET
and provide a low impedance connection to VBUS which
will, in turn, power the LTC4160/LTC4160-1. If OVSENS
should rise above 6V due to a fault or the use of an in-
correct wall adapter, OVGATE will be pulled to GND. This
disables the external MOSFET and protects downstream
circuitry. When the voltage drops below 6V again, the
external MOSFET will be re-enabled.
The charge pump output on OVGATE has limited output
drive capability. Care must be taken to avoid leakage on
this pin as it may adversely affect operation.
See the Applications Information section for resistor power
dissipation rating calculations, a table of recommended
components, and reverse-voltage protection.
Shutdown Mode
The USB switching regulator is enabled whenever VBUS is
above VUVLO and the LTC4160/LTC4160-1 are not in USB
suspend mode.
The ideal diode(s) are enabled at all times and cannot be
disabled.
LTC41 60/ LTC41 60—1 L7 LJUW 2 1
LTC4160/LTC4160-1
21
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APPLICATIONS INFORMATION
Bidirectional PowerPath Switching Regulator CLPROG
Resistor and Capacitor Selection
As described in the Bidirectional PowerPath Switching
Regulator – Step-Down Mode section, the resistor on the
CLPROG pin determines the average VBUS input current
limit. In step-down mode the switching regulator’s VBUS
input current limit can be set to either the 1x mode (USB
100mA), the 5x mode (USB 500mA) or the 10x mode. The
VBUS input current will be comprised of two components,
the current that is used to drive VOUT and the quiescent
current of the switching regulator. To ensure that the total
average input current remains below the USB specification,
both components of input current should be considered.
The Electrical Characteristics table gives the typical values
for quiescent currents in all settings as well as current limit
programming accuracy. To get as close to the 500mA or
100mA specifications as possible, a precision resistor
should be used. Recall that:
IVBUS = IVBUSQ + VCLPROG/RCLPPROG • (hCLPROG +1).
An averaging capacitor is required in parallel with the
resistor so that the switching regulator can determine the
average input current. This capacitor also provides the
dominant pole for the feedback loop when current limit
is reached. To ensure stability, the capacitor on CLPROG
should be 0.1µF or larger.
Bidirectional PowerPath Switching Regulator Inductor
Selection
Because the VBUS voltage range and VOUT voltage range
of the PowerPath switching regulator are both fairly nar-
row, the LTC4160/LTC4160-1 were designed for a specific
inductance value of 3.3μH. Some inductors which may be
suitable for this application are listed in Table 3.
Table 3. Recommended PowerPath Inductors for the
LTC4160/LTC4160-1
INDUCTOR
TYPE
L
(μH)
MAX IDC
(A)
MAX DCR
(Ω)
SIZE IN mm
(L x W x H) MANUFACTURER
LPS4018 3.3 2.2 0.08 3.9 x 3.9 x 1.7 Coilcraft
www.coilcraft.com
D53LC
DB318C 3.3
3.3 2.26
1.55 0.034
0.070 5 x 5 x 3
3.8 x 3.8 x 1.8 Toko
www.toko.com
WE-TPC
Type M1 3.3 1.95 0.065 4.8 x 4.8 x 1.8 Wurth Electronik
www.we-online.com
CDRH6D12
CDRH6D38 3.3
3.3 2.2
3.5 0.063
0.020 6.7 x 6.7 x 1.5
7 x 7 x 4 Sumida
www.sumida.com
Bidirectional PowerPath Switching Regulator VBUS
and VOUT Bypass Capacitor Selection
The type and value of capacitors used with the LTC4160/
LTC4160-1 determine several important parameters such
as regulator control-loop stability and input voltage ripple.
Because the LTC4160/LTC4160-1 use a bidirectional
switching regulator between VBUS and VOUT, the VBUS
current waveform contains high frequency components.
It is strongly recommended that a low equivalent series
resistance (ESR) multilayer ceramic capacitor (MLCC) be
used to bypass VBUS. Tantalum and aluminum capacitors
are not recommended because of their high ESR. The value
of the capacitor on VBUS directly controls the amount of
input ripple for a given load current. Increasing the size
of this capacitor will reduce the input ripple.
The inrush current limit specification for USB devices is
calculated in terms of the total number of Coulombs needed
to charge the VBUS bypass capacitor to 5V. The maximum
inrush charge for USB On-The-Go devices is 33μC. This
places a limit of 6.5μF of capacitance on VBUS assuming
a linear capacitor. However, most ceramic capacitors have
a capacitance that varies with bias voltage. The average
capacitance needs to be less than 6.5μF over a 0V to 5V bias
voltage range to meet the inrush current-limit specification.
A 10μF capacitor in a 0805 package, such as the Murata
GRM21BR71A106KE51L would be a suitable VBUS bypass
capacitor. If more capacitance is required for better noise
performance and stability, it should be connected directly
to the VBUS pin when using the overvoltage protection
circuit. This extra capacitance will be soft-connected over
a couple of milliseconds to limit inrush current and avoid
excessive transient voltage drops on VBUS.
To prevent large VOUT voltage steps during transient load
conditions, it is also recommended that an MLCC be used
to bypass VOUT. The output capacitor is used in the com-
pensation of the switching regulator. At least 10µF with
low ESR are required on VOUT. Additional capacitance will
improve load transient performance and stability.
MLCCs typically have exceptional ESR performance.
MLCCs combined with a tight board layout and an unbroken
ground plane will yield very good performance and low
EMI emissions.
LTC41 60/ LTC41 60—1 22 L7ELUEN2
LTC4160/LTC4160-1
22
41601fa
APPLICATIONS INFORMATION
There are MLCCs available with several types of dielectrics
each having considerably different characteristics. For
example, X7R MLCCs have the best voltage and tempera-
ture stability. X5R MLCCs have apparently higher packing
density but poorer performance over their rated voltage
and temperature ranges. Y5V MLCCs have the highest
packing density, but must be used with caution, because
of their extreme nonlinear characteristic of capacitance
versus voltage. The actual in-circuit capacitance of a
ceramic capacitor should be measured with a small AC
signal and DC bias as is expected in-circuit. Many vendors
specify the capacitance versus voltage with a 1VRMS AC
test signal and, as a result, over state the capacitance that
the capacitor will present in the application. Using similar
operating conditions as the application, the user must
measure or request from the vendor the actual capacitance
to determine if the selected capacitor meets the minimum
capacitance that the application requires.
Overvoltage Protection
VBUS can be protected from overvoltage damage with two
additional components, a resistor R1 and an N-channel
MOSFET MN1, as shown in Figure 5. Suitable choices for
MN1 are listed in Table 4.
Table 4. Recommended N-Channel MOSFETs for the Overvoltage
Protection Circuit
PART # BVDSS RON PACKAGE
Si1472DH 30V 57mΩ SC70-6
Si2302ADS 20V 60mΩ SOT-23
Si2306BDS 30V 47mΩ SOT-23
Si2316DS 30V 50mΩ SOT-23
IRLML2502 20V 50mΩ SOT-23
FDN372S 30V 50mΩ SOT-23
NTLJS4114N 30V 35mΩ WDFN6
R1 is a 6.2k resistor and must be rated for the power dis-
sipated during maximum overvoltage. In an overvoltage
condition the OVSENS pin will be clamped at 6V. R1 must
be sized appropriately to dissipate the resultant power.
For example, a 1/10W 6.2k resistor can have at most
√(PMAX • 6.2kΩ) = 25V applied across its terminals. With
the 6V at OVSENS, the maximum overvoltage magnitude
that this resistor can withstand is 31V. A 1/4W 6.2k resis-
tor raises this value to 45V. OVSENS’s absolute maximum
current rating of 10mA imposes an upper limit of 68V
protection.
Reverse Voltage Protection
The LTC4160/LTC4160-1 can also be easily protected
against the application of reverse voltages, as shown in
Figure 6. D1 and R1 are necessary to limit the maximum
VGS seen by MP1 during positive overvoltage events. D1’s
breakdown voltage must be safely below MP1’s BVGS. The
circuit shown in Figure 6 offers forward voltage protection
up to MN1’s BVDSS and reverse voltage protection up to
MP1’s BVDSS.
Figure 5. Overvoltage Protection
Figure 6. Dual Polarity Voltage Protection
R1
USB/WALL
ADAPTER
41601 F05
C1
MN1
VBUS
OVSENS
OVGATE
LTC4160/
LTC4160-1
Battery Charger Over Programming
The USB high power specification allows for up to 2.5W
to be drawn from the USB port. The LTC4160/LTC4160-1’s
bidirectional switching regulator in step-down mode con-
verts the voltage at VBUS to a voltage just above BAT on
VOUT, while limiting power to less than the amount pro-
grammed at CLPROG. The charger should be programmed
(with the PROG pin) to deliver the maximum safe charging
current without regard to the USB specifications. If there
is insufficient current available to charge the battery at the
programmed rate, the charge current will be reduced until
the system load on VOUT is satisfied and the VBUS cur-
rent limit is satisfied. Programming the charger for more
R2R1
USB/WALL
ADAPTER
41601 F06
C1D1
MN1MP1
VBUS POSITIVE PROTECTION UP TO BVDSS OF MN1
VBUS NEGATIVE PROTECTION UP TO BVDSS OF MP1
VBUS
OVSENS
OVGATE
LTC4160/
LTC4160-1
L7 LJUW LTC41 60/ LTC41 60—1 23
LTC4160/LTC4160-1
23
41601fa
APPLICATIONS INFORMATION
current than is available will not cause the average input
current limit to be violated. It will merely allow the battery
charger to make use of all available power to charge the
battery as quickly as possible, and with minimal dissipa-
tion within the charger.
Battery Charger Stability Considerations
The LTC4160/LTC4160-1’s battery charger contains both a
constant-voltage and a constant-current control loop. The
constant-voltage loop is stable without any compensation
when a battery is connected with low impedance leads.
Excessive lead length, however, may add enough series
inductance to require a bypass capacitor of at least 1µF
from BAT to GND.
High value, low ESR MLCCs reduce the constant-voltage
loop phase margin, possibly resulting in instability. Up
to 22µF may be used in parallel with a battery, but larger
capacitors should be decoupled with 0.2Ω to 1Ω of series
resistance.
Furthermore, a 100µF capacitor in series with a 0.3Ω re-
sistor from BAT to GND is required to prevent oscillation
when the battery is disconnected.
In constant-current mode, the PROG pin is in the feed-
back loop rather than the battery voltage. Because of the
additional pole created by any PROG pin capacitance,
capacitance on this pin must be kept to a minimum. With
no additional capacitance on the PROG pin, the charger
is stable with program resistor values as high as 25k.
However, additional capacitance on this node reduces the
maximum allowed program resistor. The pole frequency at
the PROG pin should be kept above 100kHz. Therefore, if
the PROG pin has a parasitic capacitance, CPROG, the fol-
lowing equation should be used to calculate the maximum
resistance value for RPROG:
RkHzC
PROG PROG
≤1
2100π
••
Alternate NTC Thermistors and Biasing
The LTC4160/LTC4160-1 provide temperature qualified
charging if a grounded thermistor and a bias resistor
are connected to NTC. By using a bias resistor whose
value is equal to the room temperature resistance of the
thermistor (R25) the upper and lower temperatures are
pre-programmed to approximately 40°C and 0°C respec-
tively assuming a Vishay Curve 1 thermistor.
The upper and lower temperature thresholds can be ad-
justed by either a modification of the bias resistor value
or by adding a second adjustment resistor to the circuit.
If only the bias resistor is adjusted, then either the upper
or the lower threshold can be modified but not both. The
other trip point will be determined by the characteristics
of the thermistor. Using the bias resistor in addition to an
adjustment resistor, both the upper and the lower tempera-
ture trip points can be independently programmed with
the constraint that the difference between the upper and
lower temperature thresholds cannot decrease. Examples
of each technique are given below.
NTC thermistors have temperature characteristics which
are indicated on resistance-temperature conversion tables.
The Vishay-Dale thermistor NTHS0603N011-N1003F, used
in the following examples, has a nominal value of 100k
and follows the Vishay Curve 1 resistance-temperature
characteristic.
In the explanation below, the following notation is used.
R25 = Value of the thermistor at 25°C
RNTC|COLD = Value of the thermistor at the cold
trip point
RNTC|HOT = Value of the thermistor at the hot
trip point
rCOLD = Ratio of RNTC|COLD to R25
rHOT = Ratio of RNTC|HOT to R25
RNOM – Primary thermistor bias resistor
(see Figure 7)
R1 = Optional temperature range adjustment resistor
(see Figure 8)
The trip points for the LTC4160/LTC4160-1’s temperature
qualification are internally programmed at 0.349 • NTCBIAS
for the hot threshold and 0.765 • NTCBIAS for the cold
threshold.
LTC41 60/ LTC41 60-1 room 3.25 2.714 L7H11N§AQ
LTC4160/LTC4160-1
24
41601fa
Therefore, the hot trip point is set when:
R
RR NTCBIAS NTCBIAS
NTCHOT
NOM NTCHOT
+=•.•0349
And the cold trip point is set when:
R
RR NTCBIAS NTCBIAS
NTCCOLD
NOM NTCCOLD
+=•.•0765
Solving these equations for RNTC|COLD and RNTC|HOT results
in the following:
RNTC|HOT = 0.536 • RNOM
and
RNTC|COLD = 3.25 • RNOM
By setting RNOM equal to R25, the above equations result
in rHOT = 0.536 and rCOLD = 3.25. Referencing these ratios
to the Vishay Resistance-Temperature Curve 1 chart gives
a hot trip point of about 40°C and a cold trip point of about
0°C. The difference between the hot and cold trip points
is approximately 40°C.
By using a bias resistor, RNOM, different in value from
R25, the hot and cold trip points can be moved in either
direction. The temperature span will change somewhat
due to the non-linear behavior of the thermistor. The fol-
lowing equations can be used to calculate a new value for
the bias resistor:
RrR
RrR
NOM HOT
NOM COLD
=
=
0536 25
325
25
.•
.
•
where rHOT and rCOLD are the resistance ratios at the de-
sired hot and cold trip points. Note that these equations
are linked. Therefore, only one of the two trip points can
be chosen, the other is determined by the default ratios
designed in the IC. Consider an example where a 60°C
hot trip point is desired.
From the Vishay Curve 1 R-T characteristics, rHOT is
0.2488 at 60°C. Using the above equation, RNOM should
be set to 46.4k. With this value of RNOM, rCOLD is 1.436
and the cold trip point is about 16°C. Notice that the span
is now 44°C rather than the previous 40°C. This is due to
the decrease in “temperature gain” of the thermistor as
absolute temperature increases.
The upper and lower temperature trip points can be inde-
pendently programmed by using an additional bias resistor,
R1, as shown in Figure 8. The following formulas can be
used to compute the values of RNOM and R1:
Rrr
R
RRr
NOM COLD HOT
NOM HOT
=
=
–
.•
.•
–•
2714 25
10536 RR25
For example, to set the trip points to 0°C and 45°C with
a Vishay Curve 1 thermistor choose:
Rk
k
NOM
==
3266 04368
2714
100 104 2
.–.
.•.
the nearest 1% value is 105k:
R1 = 0.536 • 105k – 0.4368 • 100k = 12.6k
the nearest 1% value is 12.7k. The final solution is shown
in Figure 8 and results in an upper trip point of 45°C and
a lower trip point of 0°C.
APPLICATIONS INFORMATION
Figure 7. Standard NTC Configuration
–
+
–
+
RNOM
100k
RNTC
100k
NTC
NTCBIAS
0.1V
NTC_ENABLE
41601 F07
LTC4160/LTC4160-1
NTC BLOCK
TOO_COLD
TOO_HOT
0.765 • NTCBIAS
0.349 • NTCBIAS
–
+
3
4
T
L7Lé£k§l§g LTC4160/LTC4160-1 25
LTC4160/LTC4160-1
25
41601fa
APPLICATIONS INFORMATION
Hot Plugging and USB Inrush Current Limiting
The overvoltage protection circuit provides inrush current
limiting due to the long time it takes for OVGATE to fully
enhance the N-channel MOSFET. This prevents the current
from building up in the cable too quickly and dampens
out any resonant overshoot on VBUS. It is possible to
observe voltage overshoot on VBUS when connecting the
LTC4160/LTC4160-1 to a lab supply if the overvoltage
protection circuit is not used. This overshoot is caused by
the inductance of the long leads from the supply to VBUS.
Twisting the wires together from the supply to VBUS can
greatly reduce the parasitic inductance of these long leads
and keep VBUS at a safe level. USB cables are generally
manufactured with the power leads in close proximity and
thus have fairly low parasitic inductance.
Hot Plugging and USB On-The-Go
If there is more than 4.3V on VBUS when On-The-Go is
enabled, the bidirectional switching regulator will not try
to drive VBUS. If USB On-The-Go is enabled and an external
supply is then connected to VBUS, one of three things will
happen depending on the properties of the external sup-
ply. If the external supply has a regulation voltage higher
than 5.1V, the bidirectional switching regulator will stop
Figure 8. Modified NTC Configuration
–
+
–
+
RNOM
105k
RNTC
100k
R1
12.7k
NTC
NTCBIAS
0.1V
NTC_ENABLE
41601 F08
LTC4160/LTC4160-1
NTC BLOCK
TOO_COLD
TOO_HOT
0.765 • NTCBIAS
0.349 • NTCBIAS
–
+
3
4
T
switching and VBUS will be held at the regulation voltage
of the external supply. If the external supply has a lower
regulation voltage and is capable of only sourcing current,
then VBUS will be regulated to 5.1V. The external supply
will not source current to VBUS.
For a supply that can also sink current and has a regulation
voltage less than 5.1V, the bidirectional switching regulator
will source current into the external supply in an attempt
to bring VBUS up to 5.1V. As long as the external supply
holds VBUS to more than VOUT + 70mV, the bidirectional
switching regulator will source up to 680mA into the sup-
ply. If VBUS is held to a voltage that is less than VOUT +
70mV then the short circuit timer will shut off the switching
regulator after 7.2ms. The FAULT pin will then go low to
indicate a short circuit current fault.
VBUS Bypass Capacitance and USB On-The-Go
Session Request Protocol
When two On-The-Go devices are connected, one will be
the A device and the other will be the B device depending
on whether the device is connected to a micro-A or micro-
B plug. The A device provides power to the B device and
starts as the host. To prolong battery life, the A device
can power down VBUS when the BUS is not being used.
If the A device has powered down VBUS, the B device can
request the A device to power up VBUS and start a new
session using the session request protocol (SRP). The
SRP consists of data-line pulsing and VBUS pulsing. The
B device must first pulse the D+ or D– data lines. The B
device must then pulse VBUS only if the A device does not
respond to the data-line pulse. The A device is required
to respond to only one of the pulsing methods. USB A
devices that never power down VBUS are not required to
respond to the SRP.
For VBUS pulsing, the limit on the VBUS capacitance on
the A device allows a B device to differentiate between a
powered down On-The-Go device and a powered down
standard host. The B device will send out a pulse of current
that will raise VBUS to a voltage between 2.1 and 5.25V if
connected to an On-The-Go A device which must have no
more than 6.5μF. An On-The-Go A device must drive VBUS
as soon as the current pulse raises VBUS above 2.1V if the
device is capable of responding to VBUS pulsing.
LTC4160/LTC41éO—1 26 L7ELUEN2
LTC4160/LTC4160-1
26
41601fa
APPLICATIONS INFORMATION
This same current pulse must not raise VBUS any higher
than 2V when connected to a standard host which must
have at least 96μF. The 96μF for a standard host represents
the minimum capacitance with VBUS between 4.75V and
5.25V. Since the SRP pulse must not drive VBUS greater
than 2V, the capacitance seen at these voltage levels can be
greater than 96μF, especially if MLCCs are used. Therefore,
the 96μF represents a lower bound on the standard host
bypass capacitance for determining the amplitude and
duration of the current pulse. More capacitance will only
decrease the maximum level that VBUS will rise to for a
given current pulse.
Figure 9 shows an On-The-Go device using the LTC4160/
LTC4160-1 acting as the A device. Additional capacitance
can be placed on the VBUS pin of the LTC4160/LTC4160-
1 when using the overvoltage protection circuit. The B
device may not be able to distinguish between a powered
down LTC4160/LTC4160-1 with overvoltage protection
and a powered down standard host because of this extra
capacitance. In addition, if the SRP pulse raises VBUS
above its UVLO threshold of 4.3V the LTC4160/LTC4160-1
will assume input power is available and will not attempt
to drive VBUS. Therefore, it is recommended that an On-
The-Go device using the LTC4160/LTC4160-1 respond to
data-line pulsing.
When an On-The-Go device using the LTC4160/LTC4160-1
becomes the B device, as in Figure 10, it must send out
a data line pulse followed by a VBUS pulse to request a
session from the A device. The On-The-Go device designer
can choose how much capacitance will be placed on the
VBUS pin of the LTC4160/LTC4160-1 and then generate
a VBUS pulse that can distinguish between a powered
down On-The-Go A device and a powered down standard
host. A suitable pulse can be generated because of the
disparity in the bypass capacitances of an On-The-Go A
device and a standard host even if there is somewhat more
than 6.5μF capacitance connected to the VBUS pin of the
LTC4160/LTC4160-1.
Board Layout Considerations
The Exposed Pad on the backside of the LTC4160/
LTC4160-1 package must be securely soldered to the PC
board ground. This is the primary ground pin in the pack-
age, and it serves as the return path for both the control
circuitry and N-channel MOSFET switch.
Furthermore, due to its high frequency switching circuitry,
it is imperative that the input capacitor, inductor, and output
capacitor be as close to the LTC4160/LTC4160-1 as pos-
sible and that there be an unbroken ground plane under the
LTC4160/LTC4160-1 and all of its external high frequency
components. High frequency current, such as the VBUS
current tends to find its way on the ground plane along a
mirror path directly beneath the incident path on the top
of the board. If there are slits or cuts in the ground plane
due to other traces on that layer, the current will be forced
to go around the slits. If high frequency currents are not
allowed to flow back through their natural least-area path,
excessive voltage will build up and radiated emissions will
occur (see Figure 11). There should be a group of vias
directly under the grounded backside leading directly
down to an internal ground plane. To minimize parasitic
inductance, the ground plane should be as close as pos-
sible to the top plane of the PC board (layer 2).
Figure 9. LTC4160/LTC4160-1 as the A Device
ON-THE-GO
POWER
MANAGER
ON-THE-GO
TRANSCEIVER
B DEVICE 41601 F11
A DEVICE
D+
D–
OVSENS
OVGATE
VBUS
CB
<6.5µF
CA
<6.5µF
WITHOUT OVP
OVP
(OPTIONAL)
ON-THE-GO
TRANSCEIVER
LTC4160/
LTC4160-1
ENOTG
L7 LJUW LTC4160/LTC4160—1 27
LTC4160/LTC4160-1
27
41601fa
APPLICATIONS INFORMATION
Figure 10. LTC4160/LTC4160-1 as the B Device
Figure 11. Higher Frequency Ground Current Follow Their
Incident Path. Slices in the Ground Plane Create Large Loop
Areas. The Large Loop Areas Increase the Inductance of the Path
Leading to Higher System Noise.
The IDGATE pin for the external ideal diode controller has
extremely limited drive current. Care must be taken to
minimize leakage to adjacent PC board traces. 100nA of
leakage from this pin will introduce an additional offset to
the ideal diode of approximately 10mV. To minimize leakage,
the trace can be guarded on the PC board by surrounding
it with VOUT connected metal, which should generally be
less than one volt higher than IDGATE.
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC4160/LTC4160-1:
1. The Exposed Pad of the package (Pin 21) should connect
directly to a large ground plane to minimize thermal and
electrical impedance.
2. The trace connecting VBUS to its respective decoupling
capacitor should be as short as possible. The GND
side of these capacitors should connect directly to the
ground plane of the part. These capacitors provide the
AC current to the internal power MOSFETs and their
drivers. It is critical to minimize inductance from these
capacitors to the LTC4160/LTC4160-1.
3. Connections between the PowerPath switching regulator
inductor and the output capacitor on VOUT should be kept
as short as possible. Use area fills whenever possible.
The GND side of the output capacitors should connect
directly to the thermal ground plane of the part.
4. The switching power trace connecting SW to its respec-
tive inductor should be minimized to reduce radiated
EMI and parasitic coupling.
STANDARD
USB HOST OR
ON-THE-GO
POWER
MANAGER
STANDARD OR
ON-THE-GO
TRANSCEIVER
A DEVICE 41601 F12
B DEVICE
D+
D–
OVSENS
OVGATE
VBUS
CA
<6.5µF FOR OTG DEVICES
>96µF FOR STANDARD HOST
CB
<6.5µF
WITHOUT OVP
OVP
(OPTIONAL)
ON-THE-GO
TRANSCEIVER
LTC4160/
LTC4160-1
ENOTG
41601 F11
LTC41 60/ LTC41 60—1 4W. W. ._| L7LJCUEN2
LTC4160/LTC4160-1
28
41601fa
TYPICAL APPLICATIONS
Low Component Count Switching Battery Charger with USB On-The-Go
Low Component Count Power Manager/Battery Charger with USB On-The-Go and Low Battery Start-Up
VBUS
USB
WALL ADAPTER
USB
ON-THE-GO L1
3.3µH
TO µC
SYSTEM
LOAD
C3
22µF
0805
C2
0.1µF
0402
17 8
13
1
2
15
16
5
7
3.01k 1k
41601 TA03
CLPROG
20
NTC PROG
LTC4160/LTC4160-1
SW
ENCHARGER
ID
19 NTCBIAS
9
3
VBUSGD
CHRG
4
FAULT
VOUT
IDGATE
LDO3V3
BAT
14
12
GND 21
10
18
11
Li-Ion +
C1
10µF
0805 OVGATE
OVSENS
ILIM0
ILIM1
6ENOTG
C1: MURATA GRM21BR7A106KE51L
C3: TAYIO YUDEN JMK212BJ226MG
L1: COILCRAFT LPS4018-332LM
VBUS
USB
WALL ADAPTER
USB
ON-THE-GO L1
3.3µH
TO µC
SYSTEM
LOAD
C3
22µF
0805
C2
0.1µF
0402
17 8
13
1
2
15
16
5
7
3.01k 1k
41601 TA02
CLPROG
20
NTC PROG
LTC4160/LTC4160-1
SW
ENCHARGER
ID
19 NTCBIAS
9
3
VBUSGD
CHRG
4
FAULT
VOUT
IDGATE
BAT
LDO3V3
14
12
GND 21
10
11
18
Li-Ion +
C1
10µF
0805 OVGATE
OVSENS
ILIM0
ILIM1
6ENOTG
C1: MURATA GRM21BR7A106KE51L
C3: TAYIO YUDEN JMK212BJ226MG
L1: COILCRAFT LPS4018-332LM
LTC41 60/ LTC41 60—1 L7HEJWEGR 29
LTC4160/LTC4160-1
29
41601fa
TYPICAL APPLICATIONS
High Efficiency Power Manager/Battery Charger with USB On-The-Go, Overvoltage Protection and Low Battery Start-Up
M2
VBUS
USB
WALL ADAPTER
USB
ON-THE-GO L1
3.3µH
M1
TO µC
SYSTEM
LOAD
C3
22µF
0805
C2
0.1µF
0402
17 8
13
1
2
15
16
5
7
3.01k 1k
41601 TA04
CLPROG
20
NTC PROG
LTC4160/LTC4160-1
SW
ENCHARGER
ID
19 NTCBIAS
9
3
VBUSGD
CHRG
4
FAULT
VOUT
IDGATE
BAT
LDO3V3 RTC
14
12
GND 21
10
11
18
Li-Ion +
1µF
OVGATE
OVSENS
ILIM0
ILIM1
6ENOTG
C1, C3: TAYIO YUDEN JMK212BJ226MG
L1: COILCRAFT LPS4018-332LM
M1: FAIRCHILD FDN372S
M2: SILICONIX Si2333DS
R1: 1/10 WATT RESISTOR
R2: VISHAY CURVE 1
100k
R1
6.2k
R2
100k
T
1k
1k
1k
C1
22µF
0805
High Efficiency Switching Battery Charger with USB On-The-Go, Overvoltage and Reverse-Voltage Protection
TO µC
15
16
5
7ENCHARGER
ID
19 NTCBIAS
ILIM0
ILIM1
6ENOTG
100k
R2
100k
T
VBUS
USB
WALL ADAPTER
USB
ON-THE-GO L1
3.3µH
M2
C3
22µF
0805
C2
0.1µF
0402
17 8
13
1
2
3.01k 1k
41601 TA05
CLPROG
20
NTC PROG
LTC4160/LTC4160-1
SW
9
3
VBUSGD
CHRG
4
FAULT
VOUT
IDGATE
LDO3V3
BAT SYSTEM
LOAD
14
12
GND 21
10
18
11
OVGATE
OVSENS
C1, C3: TAYIO YUDEN JMK212BJ226MG
L1: COILCRAFT LPS4018-332LM
M1: SILICONIX Si2333DS
M2: FAIRCHILD FDN372S
R1: 1/10 WATT RESISTOR
R2: VISHAY CURVE 1
R1
6.2k
10k
10k
10k
M1
C1
22µF
0805
TO µC
Li-Ion +
LTC4160/LTC41éO—1 J k L7LJCUEN2 30
LTC4160/LTC4160-1
30
41601fa
3.00 ± 0.10 1.50 REF
4.00 ± 0.10
NOTE:
1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
PIN 1
TOP MARK
(NOTE 6)
0.40 ± 0.10
19 20
1
2
BOTTOM VIEW—EXPOSED PAD
2.50 REF
0.75 ± 0.05
R = 0.115
TYP
PIN 1 NOTCH
R = 0.20 OR 0.25
× 45° CHAMFER
0.25 ± 0.05
0.50 BSC
0.200 REF
0.00 – 0.05
(UDC20) QFN 1106 REV Ø
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
0.70 ±0.05
0.25 ±0.05
2.50 REF
3.10 ± 0.05
4.50 ± 0.05
1.50 REF
2.10 ± 0.05
3.50 ± 0.05
PACKAGE OUTLINE
R = 0.05 TYP
1.65 ± 0.10
2.65 ± 0.10
1.65 ± 0.05
UDC Package
20-Lead Plastic QFN (3mm × 4mm)
(Reference LTC DWG # 05-08-1742 Rev Ø)
2.65 ± 0.05
0.50 BSC
PACKAGE DESCRIPTION
UDC Package
20-Lead Plastic QFN (3mm × 4mm)
(Reference LTC DWG # 05-08-1742 Rev Ø)
LTC41 60/ LTC41 60—1 L7 LJUW 3 1
LTC4160/LTC4160-1
31
41601fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
REVISION HISTORY
REV DATE DESCRIPTION PAGE NUMBER
A 10/10 Removal of PDC package and inclusion of UDC package information in data sheet
LTC4160EPDC and LTC4160EPDC-1 designated obsolete in Order Information section
1 to 32
2
LTC41 60/ LTC41 60—1 M USE 32 L7ELUEN2
LTC4160/LTC4160-1
32
41601fa
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com
LINEAR TECHNOLOGY CORPORATION 2009
LT 1010 REV A • PRINTED IN USA
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Power Manager/Battery Charger with Automatic USB On-The-Go and Overvoltage Protection
TO µC
15
16
6
7ENCHARGER
ENOTG
19 NTCBIAS
ILIM0
ILIM1
5ID
TO USB
TRANSCEIVER
J1
MICRO-AB
VBUS
USB
ON-THE-GO L1
3.3µH
M1
C3
22µF
0805
C2
0.1µF
0402
17 8
13
1
2
3.01k 1k
41601 TA06
CLPROG
20
NTC PROG
LTC4160/LTC4160-1
SW
9
3
VBUSGD
CHRG
4
FAULT
VOUT
IDGATE
BAT
VBUS
D–
D+
ID
GND
LDO3V3 RTC
SYSTEM
LOAD
14
12
GND 21
10
11
18
Li-Ion +
1µF
OVGATE
OVSENS
C1, C3: TAYIO YUDEN JMK212BJ226MG
J1: HIROSE ZX62-AB-5PA
L1: COILCRAFT LPS4018-332LM
M1: FAIRCHILD FDN372S
M2: SILICONIX Si2333DS
R1: 1/10 WATT RESISTOR
VBUS POWERS UP WHEN ID PIN HAS
LESS THAN 10Ω TO GND
(MICRO-A PLUG CONNECTED)
R1
6.2k
10k
10k
10k
C1
22µF
0805
TO µC
M2