DCM2322xA5N31A2y6z Datasheet by Vicor Corporation

M VICOR ’ Ice VICOFx’
CUS
®
DCM™DC-DC Converter
Isolated, Regulated DC Converter
DCM2322xA5N31A2y6z
Features & Benefits
•Isolated, regulated DC-DC converter
•Up to 120 W, 4.30 A continuous
•90.3% peak efficiency
•532 W/in3Power density
•Wide input range 43 – 154 Vdc
•Safety Extra Low Voltage (SELV) 28.0 V Nominal Output
•3000 Vdc isolation
•ZVS high frequency switching
n
Enables low-profile, high-density filtering
•
Dual modes of operation:
n
Array mode
–
Up to 8 units – 960 W
–
No power derating needed
–
Sharing strategy permits dissimilar line voltages
across an array
n
Enhanced VOUT regulation mode
–
Standalone: 120 W
•Fully operational current limit
•OV, OC, UV, short circuit and thermal protection
•2322 through-hole ChiP™ package
n0.978” x 0.898” x 0.284”
(24.84 mm x 22.8 mm x 7.21 mm)
Typical Applications
•Rail Transportation
•Defense / Aerospace
•Industrial
•Process Control
Product Description
The DCM2322 is a lower power, isolated and regulated DC-DC
converter that operates from an unregulated, wide-range input
to generate an isolated 28.0 Vdc output. With its high-frequency
zero-voltage switching (ZVS) topology, the DCM2322 converter
consistently delivers high efficiency across the input line range.
Modular DCM converters and downstream DC-DC products
support efficient power distribution, providing superior power
system performance and connectivity from a variety of
unregulated power sources to the point-of-load.
Leveraging the thermal and density benefits of Vicor’s ChiP
packaging technology, the DCM2322 offers flexible thermal
management options with very low top and bottom side
thermal impedances. Thermally adept ChiP based power
components enable customers to quickly and predictably
achieve cost effective power system solutions.
Product Ratings
VIN = 43 V to 154 V POUT = 120 W
VOUT = 28.0 V
(16.8 V to 30.8 V Trim) IOUT = 4.30 A
DCM™DC-DC Converter Rev 1.3
Page 1 of 31 01/2020
S
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Part Ordering Information
Product
Function
Package
Size
Package
Type
Max
Input
Voltage
Range
Ratio
Max
Output
Voltage
Max
Output
Power
Temperature
Grade Option
DCM 23 22 x A5 N 31 A2 y 6z
DCM =
DC-DC
Converter
mm
T =
Through hole
ChiPs
Internal Reference T = -40°C to 125°C
M = -55°C to 125°C
60 = Array and
Enhanced VOUT Regultion
Modes / Analog Control
Interface Version
DCM:}—‘; " 1 T I T 3 1 1 1 E: T " ’1‘ T T T 1 J1 J —‘HH ,l DCMZHF 1 1” 1,11 T —- i T 1 J. ; flv—O—IF; —w~—<>—u— u T T ”"4““? 1 1 T - .1 T 1 J. ; M—H—Ik ; VICOFx’
Typical Applications
L
1_1
C
1_1
L
2_1
C
OUT-EXT_1
C
3
C
IN
L
1_2
C
1_2
L
1_4
C
1_4
DCM1
DCM2
DCM4
V
IN
≈≈ ≈
Load
R
d_4
C
d_4
R
dm_1
R
d_2
C
d_2
R
d_1
C
d_1
≈
F
1_1
F
1_2
F
1_4
TR
EN
FT
+IN +OUT
–IN –OUT
TR
EN
FT
+IN +OUT
TR
EN
FT
+IN +OUT
L
b_1
R
COUT-EXT_1
C
OUT-EXT_2
R
COUT-EXT_2
L
2_2
L
b_2
R
dm_2
C
OUT-EXT_4
R
COUT-EXT_4
L
2_4
L
b_4
R
dm_4
C
4
C
Y
C
Y
R
b
R
b
C
b1
C
b1
C
Y
C
Y
C
Y
C
Y
C
Y
C
Y
C
Y
C
Y
C
Y
C
Y
C
2_1
C
2_2
C
2_4
EMI_GND
–IN –OUT
–IN –OUT
C
IN
R
b
R
b
C
b1
C
b1
C
IN
R
b
R
b
C
b1
C
b1
C
b2
C
b2
C
b2
C
b2
C
b2
C
b2
DCM2322xA5N31A2y6z in an array of four units; applicable when DCM is operating in Array Mode
DCM™DC-DC Converter Rev 1.3
Page 2 of 31 01/2020
DCM2322xA5N31A2y6z
Note: CIN, Rb, Cb1 and Cb2 are required components for proper operation of the DCM. See required components table below.
Required Components
CIN TDK C5750X7T2E225M250KA, 2.2 µF, 250 V
RbGeneric 1 Ω, 1/4 W
Cb1 , Cb2 KEMET C1812C103KGRACTU, 10,000 pF, 2000 V
4W—0—07 gm MT IT iT WIT mil all MIT ”iTm wIT ”iTm wiTziTiTm H F H H F H H H H H 4 a : % wIT le MIT : 1; WIT iTm 321$. l 21¢ 1:1 H—H—(F /; MAI—(PI; l VICOFx’
Load 2
L
1
C
1
L
2
TR
EN
FT
+IN +OUT
–IN –OUT
DCM
V
IN
F
1
R
d
C
d
R
dm
C
2
Non-isolated
Point-of-Load
Regulator
Load 1
C
OUT-EXT
R
COUT-EXT
L
b
C
Y
C
Y
C
Y
C
Y
EMI_GND
C
IN
R
b
R
b
C
b1
C
b1
C
b2
C
b2
Single DCM2322xA5N31A2y6z, to a non-isolated regulator, and direct to load
Typical Applications (Cont.)
VIN
L2_1
C3C4
TR
EN
FT
+IN +OUT
TR
EN
FT
+IN +OUT
TR
EN
FT
+IN +OUT
DCM1
DCM2
DCM8
≈≈ ≈≈
CY
CY
CY
CY
CY
CY
F1_1
F1_2
F1_8
Load
CY
CY
CY
CY
CY
CY
C1_1
C1_2
C1_8
Cd_1
Rd_1
Cd_2
Rd_2
Cd_8
Rd_8
Rdm_1
T1_1
T1_2
T1_8
Lb_1
COUT-EXT_1
RCOUT-EXT_1
L2_2
Rdm_2 Lb_2
COUT-EXT_2
RCOUT-EXT_2
L2_8
COUT-EXT_8
RCOUT-EXT_8
EMI_GND
Rdm_8 Lb_8
C2_1
C2_2
C2_8
–IN –OUT
–IN –OUT
–IN –OUT
CIN
Rb
Rb
Cb1
Cb2
CIN
Rb
Rb
Cb1
Cb1
CIN
Rb
Rb
Cb1
Cb1
Cb2
Cb2
Cb2
Cb2
Cb2
Cb2
Parallel operation of DCMs with common mode chokes installed on the input side to suppress common mode noise; applicable when DCM
is operating in Array Mode
DCM™DC-DC Converter Rev 1.3
Page 3 of 31 01/2020
DCM2322xA5N31A2y6z
Note: CIN, Rb, Cb1 and Cb2 are required components for proper operation of the DCM. See required components table on page 2.
Note: CIN, Rb, Cb1 and Cb2 are required components for proper operation of the DCM. See required components table on page 2.
TOP VIEW UT UT VICOF?
Pin Configuration
Pin Descriptions
Pin
Number Signal Name Type Function
A1 +IN INPUT POWER Positive input power terminal
B1 TR INPUT Enables and disables trim functionality. Adjusts output voltage when trim active.
C1 EN INPUT
Dual function:
1. Enables either Array or Enhanced VOUT Regulation mode
2. Enables and disables power supply
D1 FT OUTPUT Fault monitoring
E1 -IN INPUT POWER
RETURN Negative input power terminal
A’2, C’2 +OUT OUTPUT POWER Positive output power terminal
B’2, D’2 -OUT OUTPUT POWER
RETURN Negative output power terminal
DCM™DC-DC Converter Rev 1.3
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DCM2322xA5N31A2y6z
C’
B’
A’
D’
A
B
C
D
E
21
+OUT
+OUT
–OUT
–OUT
+IN
TR
EN
FT
–IN
TOP VIEW
DCM ChiP™
140 120 omrM) m a a :3 ; a Muimum Output P 3 3 a o 25 Top only at temperature 50 75 ml) 125 150 Temperature ('C) Top and leads all bempeniiula Tout leads and belly at temperature Output Voltage (V) 32\ 27 22 17 12 as 1,8 2.8 3,8 Average Output Current (A) — Luv/Trim — Nam Tnlll — High Trim 4.8 Output Voltage (V) 32 27 22 17 12 7 0.8 1'8 2 E 18 4 8 Average Output Current (A) — Luv/Trim — Nam Tnlll — High Trim VICOFQ
Absolute Maximum Ratings
The absolute maximum ratings below are stress ratings only. Operation at or beyond these maximum ratings can cause permanent damage to the device.
Electrical specifications do not apply when operating beyond rated operating conditions.
Figure 2 — Electrical Specified Operating Area: Array Mode
Figure 1 — Thermal Specified Operating Area: Max Output Power vs. Case Temp, Single unit at minimum full load efficiency
Figure 3 — Electrical Specified Operating Area: Enhanced VOUT
Regulation Mode
DCM™DC-DC Converter Rev 1.3
Page 5 of 31 01/2020
DCM2322xA5N31A2y6z
Parameter Comments Min Max Unit
Input Voltage (+IN to –IN) -0.5 175.0 V
Input Voltage Slew Rate -1 1 V/µs
TR to –IN -0.3 3.5 V
EN to –IN -0.3 3.5 V
FT to –IN -0.3 3.5 V
5 mA
Output Voltage (+OUT to –OUT) -0.5 37.0 V
Dielectric withstand (input to output) Supplementary insulation 3000 Vdc
Internal Operating Temperature T-Grade -40 125 °C
M-Grade -55 125 °C
Storage Temperature T-Grade -40 125 °C
M-Grade -65 125 °C
Average Output Current 7.6 A
VICOR
Common Electrical Specifications: Array and Enhanced VOUT Regulation Modes
Specifications apply over all line, trim and load conditions, internal temperature TINT = 25ºC, unless otherwise noted. Boldface specifications apply over the
temperature range of -40°C < TINT < 125°C for T-Grade and -55°C < TINT < 125°C for M-grade.
Attribute Symbol Conditions / Notes Min Typ Max Unit
Power Input Specification
Input voltage range VIN Continuous operation 43 100 154 V
Inrush current (peak) IINRP With maximum COUT-EXT
, full resistive load 6.0 A
Input capacitance (internal) CIN-INT Effective value at nominal input voltage 1.3 µF
Input capacitance (internal) ESR RCIN-INT At 1 MHz 2.68 mΩ
Input inductance (external) LIN Differential mode, with no further line bypassing 1µH
No Load Specification
Input power – disabled PQ
Nominal line, see Fig. 4 0.6 0.8 W
Worst case line, see Fig. 4 1.0 W
Input power – enabled with no load PNL
Nominal line, see Fig. 5 2.0 3.5 W
Worst case line, see Fig. 5 3.7 W
Power Output Specification
Output voltage set point VOUT-NOM VIN = 100 V, nominal trim, at 100% Load, TINT = 25°C 27.86 28.0 28.14 V
Rated output voltage trim range VOUT-TRIMMING
Specifies the Low, Nominal and High Trim conditions.
• Array Mode: trim range over temp at full load
• Enhanced VOUT Regultion Mode: trim range over
temp, with > 10% rated load
16.8 28.0 30.8 V
Rated output power POUT Continuous, VOUT ≥28.0 V 120 W
Rated output current IOUT Continuous, VOUT ≤28.0 V 4.30 A
Output current limit IOUT-LM
Of rated IOUT max. Fully operational current limit, for
nominal trim and below 100 120 140 %
Current limit delay tIOUT-LIM The module will power limit in a fast transient event 1 ms
Efficiency η
Full load, nominal line, nominal trim 88.3 90.3 %
Full load, over line and temperature, nominal trim 80.0 %
50% load, over rated line, temperature and trim 75.0 %
Output voltage ripple VOUT-PP
20 MHz bandwidth. At nominal trim, minimum COUT-EXT and
at least 10 % rated load 572 mV
Output capacitance (internal) COUT-INT Effective value at nominal output voltage 80 µF
Output capacitance (internal) ESR RCOUT-INT At 1 MHz 0.147 mΩ
Output capacitance (external) COUT-EXT
Excludes component temperature coefficient For load
transients that remain > 10% rated load 220 5000 µF
Output capacitance (external) COUT-EXT-TRANS
Excludes component temperature coefficient For load
transients down to ITRAN_MIN rated load, with static trim 1000 5000 µF
Output capacitance (external) COUT-EXT-
TRANS-TRIM
Excludes component temperature coefficient For load
transients down to ITRAN_MIN rated load, with dynamic trimming 2200 5000 µF
Minimum Transient Load ITRAN_MIN
Minimum required load for proper operation of DCM during
load transient conditions 0 %
Output capacitance, ESR (ext.) RCOUT-EXT At 10 kHz, excludes component tolerances 10 mΩ
DCM™DC-DC Converter Rev 1.3
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DCM2322xA5N31A2y6z
VICOR
Common Electrical Specifications (Cont.): Array and Enhanced VOUT Regulation Modes
Specifications apply over all line, trim and load conditions, internal temperature TINT = 25ºC, unless otherwise noted. Boldface specifications apply over the
temperature range of -40°C < TINT < 125°C for T-Grade and -55°C < TINT < 125°C for M-grade.
Attribute Symbol Conditions / Notes Min Typ Max Unit
Power Output Specifications (Cont.)
Initialization delay tINIT See state diagram 25 40 ms
Output turn-on delay tON
From rising edge EN, with VIN pre-applied.
See timing diagram 200 µs
Output turn-off delay tOFF From falling edge EN. See timing diagram 600 µs
Soft start ramp time tSS
At full rated resistive load. Typ spec is 1-up with min
COUT-EXT
. Max spec is for arrays with max COUT-EXT
250 500 ms
VOUT threshold for max
rated load current VOUT-FL-THRESH
During startup, VOUT must achieve this threshold before
output can support full rated current 14.0 V
IOUT at startup IOUT-START
Max load current at startup while VOUT
is below VOUT-FL_THRESH
0.43 A
Monotonic soft-start threshold
voltage VOUT-MONOTONIC
Output voltage rise becomes monotonic with 10% of
preload once it crosses VOUT-MONOTONIC
14.0 V
Minimum required disabled duration tOFF-MIN
This refers to the minimum time a module needs to be
in the disabled state before it will attempt to start via EN 2ms
Minimum required disabled duration
for predictable restart tOFF-MONOTONIC
This refers to the minimum time a module needs to be in
the disabled state before it is guaranteed to exhibit
monotonic soft-start and have predictable startup timing
100 ms
Voltage deviation (transient) %VOUT-TRANS Minimum COUT_EXT (10 ↔90% load step),
excluding load line.
<10 %
Settling time tSETTLE 8.0 ms
Powertrain Protections
Input Voltage Initialization threshold VIN-INIT Threshold to start tINIT delay 9V
Input Voltage Reset threshold VIN-RESET Latching faults will clear once VIN falls below VIN-RESET 3V
Input undervoltage lockout threshold VIN-UVLO- 25.80 40.85 V
Input undervoltage recovery threshold VIN-UVLO+ See Timing diagram 43.00 V
Input overvoltage lockout threshold VIN-OVLO+ 171 V
Input overvoltage recovery threshold VIN-OVLO- See Timing diagram 154 V
Output overvoltage threshold VOUT-OVP From 25% to 100% load. Latched shutdown 35.42 V
Output overvoltage threshold VOUT-OVP-LL From 0% to 25% load. Latched shutdown 36.96 V
Minimum current limited VOUT VOUT-UVP Over all operating steady-state line and trim conditions 12.60 V
Overtemperature threshold (internal) TINT-OTP 125 °C
Power limit PLIM 180 W
VIN overvoltage to cessation of
powertrain switching tOVLO-SW Independent of fault logic 2.5 µs
VIN overvoltage response time tOVLO For fault logic only 200 µs
VIN undervoltage response time tUVLO 100 ms
Short circuit response time tSC Powertrain on, operational state 200 µs
Short circuit, or temperature fault
recovery time tFAULT See Timing diagram 1 s
DCM™DC-DC Converter Rev 1.3
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DCM2322xA5N31A2y6z
Electrical Specifications: Enhanced VOUT Regulation Mode Only
Specifications apply over all line, trim and load conditions, internal temperature TINT = 25ºC, unless otherwise noted. Boldface specifications apply over the
temperature range of -40°C < TINT < 125°C for T-Grade and -55°C < TINT < 125°C for M-grade.
Attribute Symbol Conditions / Notes Min Typ Max Unit
Power Output Specification
Output voltage load regulation ΔVOUT-LOAD
Linear load line. Output voltage increase from full rated
load current to no load (Does not include light load
regulation). See Fig. 17 and Sec. Design Guidelines
1.3194 1.4736 1.6296 V
Output voltage light load regulation ΔVOUT-LL
0% to 10% load, additional VOUT relative to calculated
load-line point; see Sec. Design Guidelines -0.42 2.95 V
Output voltage temperature
coefficient ΔVOUT-TEMP
Nominal, linear temperature coefficient, relative to
TINT = 25ºC. See Fig. 18 and Design Guidelines Section -3.73 mV/°C
Output voltage accuracy %VOUT-ACCURACY
The total output voltage setpoint accuracy from the
calculated ideal VOUT based on load, temp and trim.
Excludes ΔVOUT-LL
-3.0 3.0 %
Electrical Specifications: Array Mode Only
Specifications apply over all line, trim and load conditions, internal temperature TINT = 25ºC, unless otherwise noted. Boldface specifications apply over the
temperature range of -40°C < TINT < 125°C for T-Grade and -55°C < TINT < 125°C for M-grade.
Attribute Symbol Conditions / Notes Min Typ Max Unit
Power Output Specifications
Output voltage regulation %VOUT-
REGULATION
At nominal line, nominal trim, full load and
ambient temperature -0.5 0.5
%
At nominal line, nominal trim and:
• Load >20% of full load and ambient temperature
• Full load and over temperature
-1.0 1.0
All other conditions
(does not include light load regulation) -1.5 1.5
Output voltage accuracy %VOUT-ACCURACY
The total output voltage set-point accuracy from the
calculated VOUT based on load, temp and trim.
Excludes:
•ΔVOUT-LL
• %VOUT-REGULATION
-2.0 2.0 %
Output voltage light load regulation ΔVOUT-LL
0% to 10% load, additional VOUT relative to VOUT
accuracy; see Design Guidelines section -0.42 2.95 V
DCM™DC-DC Converter Rev 1.3
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DCM2322xA5N31A2y6z
Signal Specifications
Specifications apply over all line, trim and load conditions, internal temperature TINT = 25ºC, unless otherwise noted. Boldface specifications apply over the
temperature range of -40°C < TINT < 125°C for T-Grade and -55°C < TINT < 125°C for M-grade.
Enable: EN
• Dual Function:
– The EN pin enables either the Array mode or Enhanced VOUT Regulation mode based on the voltage level on EN pin during start up.
– The EN pin enables and disables the DCM converter; when held low the unit will be disabled.
• The EN pin has an internal pull-up to VCC and is referenced to the -IN pin of the converter.
SIGNAL TYPE STATE ATTRIBUTE SYMBOL CONDITIONS / NOTES MIN NOM MAX UNIT
DIGITAL
INPUT Any
EN enable threshold VENABLE-EN-TH 2.31 V
EN disable threshold VENABLE-DIS-TH 0.99 V
Internally generated VCC VCC 3.21 3.30 3.39 V
EN internal pull up
resistance to VCC
RENABLE-INT 9.9 10.0 10.1 kΩ
Array mode
enable threshold VARRAY-EN-TH 2.97 V
Enhanced VOUT Regulation
mode enable threshold VREG-EN-TH 2.63 V
Trim: TR
• The TR pin enables and disables trim functionality when VIN is initially applied to the DCM converter.
When Vin first crosses VIN-UVLO+, the voltage on TR determines whether or not trim is active.
• If TR is not floating at power up and has a voltage less than TR trim enable threshold, trim is active.
• If trim is active, the TR pin provides dynamic trim control with at least 30Hz of -3dB control bandwidth over the output voltage of the DCM converter.
• The TR pin has an internal pull-up to VCC and is referenced to the -IN pin of the converter.
SIGNAL TYPE STATE ATTRIBUTE SYMBOL CONDITIONS / NOTES MIN NOM MAX UNIT
DIGITAL
INPUT Startup
TR trim disable threshold VTRIM-DIS-TH
Trim disabled when TR above this threshold
at power up 3.20 V
TR trim enable threshold VTRIM-EN-TH
Trim enabled when TR below this threshold
at power up 3.15 V
ANALOG
INPUT
Operational
with Trim
enabled
Internally generated VCC VCC 3.21 3.30 3.39 V
TR pin functional range VTRIM-EN 0.00 2.44 3.16 V
VOUT referred TR
pin resolution VOUT-RES With VCC = 3.3 V 36 mV
TR internal pull up
resistance to VCC
RTRIIM-INT 9.9 10.0 10.1 kΩ
Fault: FT
• The FT pin is a Fault flag pin.
• When the module is enabled and no fault is present, the FT pin does not have current drive capability.
• Whenever the powertrain stops (due to a fault protection or disabling the module by pulling EN low), the FT pin output Vcc and provides current to drive
an external ciruit.
• When module starts up, the FT pin is pulled high to VCC during microcontroller initialization and will remain high until soft start process starts.
SIGNAL TYPE STATE ATTRIBUTE SYMBOL CONDITIONS / NOTES MIN NOM MAX UNIT
DIGITAL
OUTPUT
Any FT internal pull up
resistance to VCC
RFAULT-INT 494 499 504 kΩ
FT Active
FT voltage VFAULT-ACTIVE At rated current drive capability 3.0 V
FT current drive capability IFAULT-ACTIVE
Over-load beyond the ABSOLUTE MAXIMUM
ratings may cause module damage 4mA
FT response time tFT-ACTIVE
Delay from cessation of switching to
FT Pin Active 200 µs
DCM™DC-DC Converter Rev 1.3
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DCM2322xA5N31A2y6z
High Level Functional State Diagram
Conditions that cause state transitions are shown along arrows. Sub-sequence activities listed inside the state bubbles.
LATCHED
FAULT
Powertrain: Stopped
FT = True
STANDBY
Powertrain: Stopped
FT = True
Application of
V
IN
INITIALIZATION
SEQUENCE
t
INIT
delay
Powertrain: Stopped
FT = True
V
IN
>V
IN-INIT
SOFT START
V
OUT
Ramp Up
t
ss
delay
Powertrain: Active
FT = Unknown
RUNNING
Regulates V
OUT
Powertrain: Active
FT = False
REGULATION
MODE
SELECTION
Latched
(based on EN voltage)
Only applies
after initialization
sequence
NON LATCHED
FAULT
t
FAULT
Powertrain: Stopped
FT = True
NON LATCHED
FAULT
t
OFF
Powertrain: Stopped
FT = True
EN = True and
No Faults
t
ON
delay t
SS
Expiry
EN = False
t
OFF
delay
REINITIALIZATION
SEQUENCE
t
INIT
delay
Powertrain: Stopped
FT = True
EN = False
Fault
Removed
Input OVLO or
Input UVLO
Fault Removed
Output OVP
Output OVP
Over-temp or
Output UVP
Over-temp or
Output UVP
Input OVLO or
Input UVLO
EN = False
t
OFF-MIN
delay
EN = False
t
MIN-OFF
delay
V
IN
≥V
IN-UVLO+
and
not Over-temp
TR mode latched
DCM2322xA5N31A2y6z
DCM™DC-DC Converter Rev 1.3
Page 10 of 31 01/2020
._L VICOFQ
VI
ARRAY-EN-TH
N-UVLO+/-
IOUT
FULL LOAD
VIN-OVLO+/-
V
IN
TR
I
LOAD
Input
Output
EN
1
Input Power On
- Trim Inactive
3
TR
Ignored
5
E
4
EN
Latched
N
Low
6
EN
High
7
Input
OVLO
8
Input
UVLO
2
Ramp to
Full Load
tINIT tON tSS
tOFF tOFF
tSS tSS
tOFF tOFF
9
Input
returned
to zero
VTRIM-DIS-TH
FT
tMIN_OFF
tSS
tON
V
V
REG-EN-TH
V
IN-INIT
VOUT-NOM
FULL LOAD
V
OUT
VOUT-UVP
Timing Diagrams – Array Mode
Module Inputs are shown in blue; Module Outputs are shown in brown.
DCM2322xA5N31A2y6z
DCM™DC-DC Converter Rev 1.3
Page 11 of 31 01/2020
VICOFx’
Timing Diagrams – Array Mode (Cont.)
Module Inputs are shown in blue; Module Outputs are shown in brown.
DCM2322xA5N31A2y6z
DCM™DC-DC Converter Rev 1.3
Page 12 of 31 01/2020
VICOFQ
V
OUT-NOM
FULL LOAD
V
OUT
V
IN-UVLO+/-
I
OUT
FULL LOAD
V
OUT-UVP
V
IN-OVLO+/-
V
IN
TR
I
LOAD
Input
Output
EN
1
Input Power On
- Trim Inactive
3
TR
Ignored
5
E
4
EN
Latched
N
Low
6
EN
High
7
Input
OVLO
8
Input
UVLO
2
Ramp to
Full Load
t
INIT
t
ON
t
SS
t
OFF
t
OFF
t
SS
t
SS
t
OFF
t
OFF
9
Input
returned
to zero
V
TR-DIS
FT
t
MIN_OFF
t
SS
t
ON
V
IN-INIT
ARRAY-EN
V
REG-EN
V
Timing Diagrams – Enhanced VOUT Regulation Mode
Module Inputs are shown in blue; Module Outputs are shown in brown.
DCM2322xA5N31A2y6z
DCM™DC-DC Converter Rev 1.3
Page 13 of 31 01/2020
VICOFx’
V
OUT-NOM
FULL LOAD
V
OUT
V
IN-UVLO+/-
I
OUT
FULL LOAD
V
OUT-UVP
V
IN-OVLO+/-
V
IN
TR
I
LOAD
Input
Output
EN
V
TR
= nom
V
TRIM-EN-TH
OUT-OVP
10
Input Power On
- Trim Active
12
Load dump
and reverse
current
13
Vout OVP
(primary
sensed)
15
Current Limit
with Resistive
Load
16
Resistive
Load with
decresing R
11
Vout
based on
V
TR
t
INIT
t
ON
t
SS
t
OFF
t
INIT
t
ON
t
SS
t
INIT
t
ON
t
SS
14
Latched
fault cleared
t
IOUT-LIM
17
Overload induced
Output UVP
t
FAULT
R
LOAD
FT
V
IN-INIT
Timing Diagrams – Enhanced VOUT Regulation Mode (Cont.)
Module Inputs are shown in blue; Module Outputs are shown in brown.
DCM2322xA5N31A2y6z
DCM™DC-DC Converter Rev 1.3
Page 14 of 31 01/2020
VICOFx’
Common Typical Performance Characteristics: Array and Enhanced VOUT Regulation Modes
The following figures present typical performance at TC= 25ºC, unless otherwise noted. See associated figures for general trend data.
Unless otherwise specified, figures are applicable for both modes of operation








      

  
Figure 5 — No load power dissipation vs. VIN, at nominal trim











      

  
Figure 4 — Disabled power dissipation vs. VIN










      

  
Figure 8 — Full Load Efficiency vs. VIN, at high trim










      

  
Figure 6 — Full Load Efficiency vs. VIN, at low trim










      

  
Figure 7 — Full Load Efficiency vs. VIN, at nominal trim
DCM2322xA5N31A2y6z
DCM™DC-DC Converter Rev 1.3
Page 15 of 31 01/2020
6. 2.0.3.542. 110000 I... 025633 SAE a Inn 150 200 250 Jun 350 400 50 Input Voltage (V) VICOR


















         

     






















         

     
Figure 9 — Efficiency and power dissipation vs.load at
TCASE = -40°C,nominal trim
Common Typical Performance Characteristics (Cont.): Array and Enhanced VOUT Regulation Modes
The following figures present typical performance at TC= 25ºC, unless otherwise noted. See associated figures for general trend data.
Unless otherwise specified, figures are applicable for both modes of operation
Figure 10 — Efficiency and power dissipation vs.load at
TCASE = 25°C, nominal trim






















         

     
Figure 11 — Efficiency and power dissipation vs.load at
TCASE = 90°C, nominal trim










         

  
Figure 13 — Nominal powertrain switching frequency vs. load,
at nominal trim










         

  
Figure 14 — Nominal powertrain switching frequency vs. load,
at nominal VIN
Figure 12 — Effective internal input capacitance vs. applied voltage
DCM™DC-DC Converter Rev 1.3
Page 16 of 31 01/2020
DCM2322xA5N31A2y6z
/ ./ CH2>————/"/ ‘ ‘ CH3>——[ CH1 Vent: 200 mV/dlv Tlmebase:1 us/dlv CH1 Vent: 20 V/dlv CH3 EN: 2 Vldlv Tlmebase: 100 msldlv CH2Hn11A/dlv WW Mm W VICOFQ
Figure 15 — Output voltage ripple, VIN = 100 V,
VOUT = 28.0 V, COUT_EXT = 220 µF, RLOAD = 6.512 Ω
Figure 16 —Startup from EN, VIN = 100 V, COUT_EXT = 5000 µF,
RLOAD = 6.512 Ω
Common Typical Performance Characteristics (Cont.): Array and Enhanced VOUT Regulation Modes
The following figures present typical performance at TC= 25ºC, unless otherwise noted. See associated figures for general trend data.
Unless otherwise specified, figures are applicable for both modes of operation
DCM™DC-DC Converter Rev 1.3
Page 17 of 31 01/2020
DCM2322xA5N31A2y6z
CH1»—-—-’ CH2» CHI Vom: I V/dlv CH2 lam: SA/dlv Tlmebase: 4 msldlv CH1» CH2» CH1 Voul‘ 1 V/dlv Tlmebase: 4 msldlv CH2 loutt SAIdN VICOR
Typical Performance Characteristics: Array Mode Only
The following figures present typical performance at TC= 25ºC, unless otherwise noted. See associated figures for general trend data.
Figure 20 — 10% to 100% load transient response, VIN = 100 V,
nominal trim, COUT_EXT = 220 µF








         

    
Figure 17 — Ideal VOUT vs. load current, at 25°C case














       

    
Figure 18 — Ideal VOUT vs. case temperature, at full load
Figure 19 — 100% to 10% load transient response, VIN = 100 V,
nominal trim, COUT_EXT = 220 µF
DCM™DC-DC Converter Rev 1.3
Page 18 of 31 01/2020
DCM2322xA5N31A2y6z
Output Vomgo (V) 35 30 25 20 15 1o 5 o o I 05115225335445 Output Current (A) — Min Tnm — Low mm — Nam Trim — High Tum — Max Tnm VICOFQ
Figure 21 — Ideal VOUT vs. load current, at 25°C case, operating in
Enhanced VOUT Regulation Mode
Typical Performance Characteristics: Enhanced VOUT Regulation Mode Only
The following figures present typical performance at TC= 25ºC, unless otherwise noted. See associated figures for general trend data.
DCM™DC-DC Converter Rev 1.3
Page 19 of 31 01/2020
DCM2322xA5N31A2y6z
VICOR
General Characteristics
Specifications apply over all line, trim and load conditions, internal temperature TINT = 25ºC, unless otherwise noted. Boldface specifications apply over the
temperature range of -40°C < TINT < 125°C for T-Grade and -55°C < TINT < 125°C for M-grade.
Attribute Symbol Conditions / Notes Min Typ Max Unit
Mechanical
Length L 24.46/[0.963] 24.84/[0.978] 25.22/[0.993] mm/[in]
Width W 22.67/[0.893] 22.8/[0.898] 22.93/[0.903] mm/[in]
Height H 7.11/[0.28] 7.21/[0.284] 7.31/[0.288] mm/[in]
Volume Vol No heat sink 4.08/[0.25] cm3/[in3]
Weight W 14.4/[0.51] g/[oz]
Lead finish
Nickel 0.51 2.03
µmPalladium 0.02 0.15
Gold 0.003 0.051
Thermal
Operating internal temperature TINT
T-Grade -40 125
°C
M-Grade -55 125
Thermal resistance top side θINT-TOP
Estimated thermal resistance to maximum
temperature internal component from
isothermal top
3.60 °C/W
Thermal resistance leads θINT-LEADS
Estimated thermal resistance to
maximum temperature internal
component from isothermal leads
8.50 °C/W
Thermal resistance bottom side θINT-BOTTOM
Estimated thermal resistance to
maximum temperature internal
component from isothermal bottom
4.00 °C/W
Thermal capacity 10.3 Ws/°C
Assembly
Storage temperature TST
T-Grade -40 125
°C
M-Grade -65 125
ESD rating
HBM Method per Human Body Model Test
ESDA/JEDEC JDS-001-2012 CLASS 1C
V
CDM Charged Device Model JESD22-C101E CLASS 2
Soldering [1]
Peak temperature top case For further information, please contact
factory applications 135 °C
[1] Product is not intended for reflow solder attach.
DCM™DC-DC Converter Rev 1.3
Page 20 of 31 01/2020
DCM2322xA5N31A2y6z
VICOR
General Characteristics (Cont.)
Specifications apply over all line, trim and load conditions, internal temperature TINT = 25ºC, unless otherwise noted. Boldface specifications apply over the
temperature range of -40°C < TINT < 125°C for T-Grade and -55°C < TINT < 125°C for M-grade.
Attribute Symbol Conditions / Notes Min Typ Max Unit
Safety
Dielectric Withstand Test VHIPOT
IN to OUT 3000 Vdc
IN to CASE 1500 Vdc
OUT to CASE 1500 Vdc
Reliability
MTBF
MIL-HDBK-217 FN2 Parts Count 25°C
Ground Benign, Stationary, Indoors /
Computer
3.84 MHrs
Telcordia Issue 2, Method I Case 3, 25°C,
100% D.C., GB, GC 8.95 MHrs
Agency Approvals
Agency approvals/standards
CE Marked for Low Voltage Directive and RoHS Recast Directive, as applicable
Previous Part Number
NOT APPLIED
cURus,
cTÜVus,
DCM™DC-DC Converter Rev 1.3
Page 21 of 31 01/2020
DCM2322xA5N31A2y6z
Selecting Anay Made a! Enhanced v Regulalian Made VICOR
Pin Functions
+IN, -IN
Input power pins. -IN is the reference for all control pins, and therefore
a Kelvin connection for the control signals is recommended as close as
possible to the pin on the package, to reduce effects of voltage drop due
to -IN currents.
+OUT, -OUT
Output power pins.
EN (Enable)
The EN pin provides two functionalities:
nEnables and disables the DCM converter.
nSelects Array mode or Enhanced VOUT Regulation mode.
The EN pin is referenced to the –IN pin of the converter. It has an
internal pull up to VCC through a 10kΩ resistor.
EN is an input only, it does not pull low in the event of a fault.
Enable/Disable Control
nOutput disable: when EN is pulled down externally below the
disable threshold (VENABLE-DIS-TH), the DCM converter will
be disabled.
nOutput enable: when EN is allowed to pull up above the enable
threshold (VENABLE-EN-TH) through the internal pull up to VCC,
the DCM converter will be enabled.
Selecting Array Mode or Enhanced VOUT Regulation Mode
The EN pin can also be used to select Array mode operation or
Enhanced VOUT Regulation mode operation. The DCM mode of
operation is dependent on the voltage seen by the DCM at its EN pin at
first start up following application of VIN. The DCM will latch in selected
mode of operation at the end of soft start, and persist in that same
mode until loss of input voltage.
At the first start up after application of VIN, if EN is allowed to float to:
nA value above VENABLE-EN-TH, but below VREG-EN-TH, the DCM will
implement Enhanced VOUT Regulation mode.
nA value above VARRAY-EN-TH and up to VCC, the DCM will implement
array mode operation.
Note that the selected mode of operation is not changed when a DCM
recovers from any fault condition, or after a disable event through EN.
The operation mode is reset only with cycling of input power.
TR (Trim)
The TR pin is used to select the trim mode and to trim the output
voltage of the DCM converter. The TR pin has an internal pull-up to VCC
through a 10.0 kΩresistor.
The DCM will latch trim behavior at application of VIN (once VIN
exceeds VIN-UVLO+), and persist in that same behavior until loss of
input voltage.
nAt application of VIN, if the voltage on TR is sampled at above
VTRIM-DIS-TH, the module will latch in a non-trim mode, and will
ignore the TR input for as long as VIN is present.
nAt application of VIN, if the voltage on TR is sampled at below
VTRIM-EN-TH, the TR will serve as an input to control the real time
output voltage, relative to full load, 25°C. It will persist in this
behavior until VIN is no longer present.
If trim is active when the DCM is operating, the TR pin provides
dynamic trim control at a typical 30 Hz of -3dB bandwidth over the
output voltage. TR also decreases the current limit threshold when
trimming above VOUT-NOM.
FT (Fault)
The FT pin provides a Fault signal.
Anytime the module is enabled and has not recognized a fault, the FT
pin is inactive. FT has an internal 499 kΩpull-up to VCC, therefore a
shunt resistor, RSHUNT, of approximately 50 kΩcan be used to ensure the
LED is completly off when there is no fault, per the diagram below.
Whenever the powertrain stops (due to a fault protection or disabling
the module by pulling EN low), the FT pin becomes active and provides
current to drive an external circuit.
When active, FT pin drives to VCC, with up to 4 mA of external loading.
Module may be damaged from an over-current FT drive, thus a resistor
in series for current limiting is recommended.
The FT pin becomes active momentarily when the module starts up.
A
Disable
rray Mode
Enhanced V
OUT
Regulation Mode
V
ENABLE-EN-TH
V
ENABLE-DIS-TH
V
CC
V
REG-EN-TH
V
ARRAY-EN-TH
Figure 22 — EN pin voltage thresholds
DCM™DC-DC Converter Rev 1.3
Page 22 of 31 01/2020
DCM2322xA5N31A2y6z
mfi F33 for nominal trim and mum temgerature VICOFQ
Typical External Circuits for Signal Pins (TR, EN, FT)
RTRIM
TR
RSERIES
SW
RSHUNT
Output Voltage
Reference, Current
Limit Reference and
Soft Start control
EN
Soft Start and
Fault Monitoring
FT
Fault
Monitoring
Kelvin –IN connection
10kΩ10kΩ 499kΩ
VCC
D
DCM
Design Guidelines
Building Blocks and System Design
The DCM™ converter input accepts the full 43 to 154 V range, and it
generates an isolated trimmable 28.0 Vdc output. Multiple DCMs may
be paralleled in array mode of operatioin for higher power capacity via
wireless load sharing, even when they are operating off of different
input voltage supplies.
The DCM converter provides a regulated output voltage around defined
nominal load line and temperature coefficients. The load line and
temperature coefficients enable configuration of an array of DCM
converters which manage the output load with no share bus among
modules. Downstream regulators may be used to provide tighter
voltage regulation, if required.
The DCM2322xA5N31A2y6z may be used in standalone applications
where the output power requirements are up to 120 W or applicaions
requires tighter voltage regultion. However, it is easily deployed as
arrays of modules to increase power handling capacity. Arrays of up to
eight units have been qualified for 960 W capacity. Application of DCM
converters in an array requires no derating of the maximum available
power versus what is specified for a single module.
Note: For more information on operation of single DCM, refer to “Single
DCM as an Isolated, Regulated DC-DC Converter” application note
AN:029.
Soft Start
When the DCM starts, it will go through a soft start. The soft start
routine ramps the output voltage by modulating the internal error
amplifier reference. This causes the output voltage to approximate a
piecewise linear ramp. The output ramp finishes when the voltage
reaches either the nominal output voltage, or the trimmed output
voltage in cases where trim mode is active.
During soft-start, the maximum load current capability is reduced.
Until Vout achieves at least VOUT-FL-THRESH, the output current must be
less than IOUT-START in order to guarantee startup. Note that this is
current available to the load, above that which is required to charge the
output capacitor.
Nominal Output Voltage Load Line
DCM in Array Mode
Throughout this document, the programmed output voltage, (either
the specified nominal output voltage if trim is inactive or the trimmed
output voltage if trim is active), is specified at full load, and at room
temperature. The actual output voltage of the DCM is given by the
programmed trimmed output voltage, with modification based on load
and temperature. The nominal output voltage is 28.0 V, and the actual
output voltage will match this at full load and room temperature with
trim inactive.
The largest modification to the actual output voltage compared to the
programmed output is due to the 5.263% VOUT-NOM load line, which for
this model corresponds to ΔVOUT-LOAD of 1.4736V. As the load is reduced,
the internal error amplifier reference, and by extension the output
voltage, rises in response. This load line is the primary enabler of the
wireless current sharing amongst an array of DCMs.
The load line impact on the output voltage is absolute, and does not
scale with programmed trim voltage.
For a given programmed output voltage, the actual output voltage
versus load current at for nominal trim and room temperature is given
by the following equation:
VOUT @ 25° = 28.0 + 1.4736 • (1 - IOUT / 4.30) (1)
Use 0 V for ∆VOUT-LL when load is above 10% of rated load. See section on
light load boosting operation for light load effects on output voltage.
DCM in Enhanced VOUT Regulation Mode
In Enhanced VOUT Regulation mode, output voltage is not a function
of load line.
DCM™DC-DC Converter Rev 1.3
Page 23 of 31 01/2020
DCM2322xA5N31A2y6z
VICOR
Nominal Output Voltage Temperature Coefficient
DCM in Array Mode
A second additive term to the programmed output voltage is based on
the temperature of the module. This term permits improved thermal
balancing among modules in an array, especially when the factory
nominal trim point is utilized (trim mode inactive). This term is much
smaller than the load line described above, representing only a -3.73
mV/°C change. Regulation coefficient is relative to 25°C.
For nominal trim and full load, the output voltage relates to the
temperature according to the following equation:
VOUT-FL = 28.0 -3.733 • 0.001 • (TINT - 25) (2)
where TINT is in °C.
The impact of temperature coefficient on the output voltage is absolute,
and does not scale with trim or load.
DCM in Array Mode
In Enhanced VOUT Regulation mode, output voltage is not a function of
temperature coefficient.
Trim Mode and Output Trim Control:
DCM in Array and Enhanced VOUT Regulation Modes
When the input voltage is initially applied to a DCM, and after tINIT
elapses, the trim pin voltage VTR is sampled. The TR pin has an internal
pull up resistor to VCC, so unless external circuitry pulls the pin voltage
lower, it will pull up to VCC. If the initially sampled trim pin voltage is
higher than VTRIM-DIS, then the DCM will disable trimming as long as
the VIN remains applied. In this case, for all subsequent operation the
output voltage will be programmed to the nominal. This minimizes the
support components required for applications that only require the
nominal rated Vout, and also provides the best output setpoint
accuracy, as there are no additional errors from external trim
components
If at initial application of VIN, the TR pin voltage is prevented from
exceeding VTRIM-EN, then the DCM will activate trim mode, and it will
remain active for as long as VIN is applied.
VOUT set point under full load and room temperature can be calculated
using the equation below:
VOUT-FL @ 25°C = 12.25 + (21.274 • VTR/VCC) (3)
Note that the trim mode is not changed when a DCM recovers from any
fault condition or being disabled.
Module performance is guaranteed through output voltage trim range
VOUT-TRIMMING. If VOUT is trimmed above this range, then certain
combinations of line and load transient conditions may trigger the
output OVP.
Overall Output Voltage Transfer Function
DCM in Array Mode
Taking load line (equation 1), temperature coefficient (equation 2)
and trim (equation 3) into account, the general equation relating the
DC VOUT to programmed trim (when active), load, and temperature is
given by:
VOUT = 12.25 + (21.274 • VTR/VCC)
+ 1.4736 • (1 - IOUT / 4.30)
-3.733 • 0.001 • (TINT -25) + ∆VOUT-LL (4)
DCM in Enhanced VOUT Regulation Mode
In Enhanced VOUT Regulation Mode, only trim (Equation 3) is
applicable. The general equation relating the DC VOUT to programmed
trim is given by:
VOUT = 12.25 + (21.274 • VTR/VCC) + ∆VOUT-LL (5)
Finally, note that when the load current is below 10% of the rated
capacity, there is an additional ∆V which may add to the output
voltage, depending on the line voltage which is related to light load
boosting. Please see the section on light load boosting below for details.
Use 0 V for ∆VOUT-LL when load is above 10% of rated load. See section on
light load boosting operation for light load effects on output voltage.
Output Current Limit
The DCM features a fully operational current limit which effectively
keeps the module operating inside the Safe Operating Area (SOA) for
all valid trim and load profiles. The current limit approximates a “brick
wall” limit, where the output current is prevented from exceeding the
current limit threshold by reducing the output voltage via the internal
error amplifier reference. The current limit threshold at nominal trim
and below is typically 120% of rated output current, but it can vary
between 100% to 140%. In order to preserve the SOA, when the
converter is trimmed above the nominal output voltage, the current
limit threshold is automatically reduced to limit the available output
power.
When the output current exceeds the current limit threshold, current
limit action is held off by 1ms, which permits the DCM to momentarily
deliver higher peak output currents to the load. Peak output power
during this time is still constrained by the internal Power Limit of the
module. The fast Power Limit and relatively slow Current Limit work
together to keep the module inside the SOA. Delaying entry into
current limit also permits the DCM to minimize droop voltage for load
steps.
Sustained operation in current limit is permitted, and no derating of
output power is required, even in an array configuration.
Some applications may benefit from well matched current distribution,
in which case fine tuning sharing via the trim pins permits control over
sharing. The DCM does not require this for proper operation, due to the
power limit and current limit behaviors described here.
Current limit can reduce the output voltage to as little as the UVP
threshold (VOUT-UVP). Below this minimum output voltage compliance
level, further loading will cause the module to shut down due to the
output undervoltage fault protection.
Line Impedance, Input Slew rate and Input Stability Requirements
Connect a high-quality, low-noise power supply to the +IN and –IN
terminals. Additional capacitance may have to be added between +IN
and –IN to make up for impedances in the interconnect cables as well
as deficiencies in the source.
Excessive source impedance can bring about system stability issues for
a regulated DC-DC converter, and must either be avoided or
compensated by filtering components. A 100 µF input capacitor is the
minimum recommended in case the source impedance is insufficient
to satisfy stability requirements.
DCM™DC-DC Converter Rev 1.3
Page 24 of 31 01/2020
DCM2322xA5N31A2y6z
wwwvico srcom/documcms/a lication nmcs/vichi a non-23 f htm‘//ap122.vicorgowcmomlfilmrDcsign/imiFilmrdo ht!p://www Vicorpnwcmom ldc-dc/isolated - regulated Idcmmncu mcmafinn VICOR
Additional information can be found in the filter design application
note:
www.vicorpower.com/documents/application_notes/vichip_appnote23.pdf
Please refer to this input filter design tool to ensure input stability:
http://app2.vicorpower.com/filterDesign/intiFilter.do.
Ensure that the input voltage slew rate is less than 1V/us, otherwise a
pre-charge circuit is required for the DCM input to control the input
voltage slew rate and prevent overstress to input stage components.
Input Fuse Selection
The DCM is not internally fused in order to provide flexibility in
configuring power systems. Input line fusing is recommended at the
system level, in order to provide thermal protection in case of
catastrophic failure. The fuse shall be selected by closely matching
system requirements with the following characteristics:
nCurrent rating (usually greater than the DCM converter’s
maximum current)
nMaximum voltage rating (usually greater than the maximum
possible input voltage)
nAmbient temperature
nBreaking capacity per application requirements
nNominal melting I2t
nRecommended fuse: See Agency Approvals for Recommended Fuse
http://www.vicorpower.com/dc-dc/isolated-
regulated/dcm#Documentation
Fault Handling
Input Undervoltage Fault Protection (UVLO)
The converter’s input voltage is monitored to detect an input under
voltage condition. If the converter is not already running, then it will
ignore enable commands until the input voltage is greater than
VIN-UVLO+. If the converter is running and the input voltage falls below
VIN-UVLO-, the converter recognizes a fault condition, the powertrain
stops switching, and the output voltage of the unit falls.
Input voltage transients which fall below UVLO for less than tUVLO may
not be detected by the fault proection logic, in which case the converter
will continue regular operation. No protection is required in this case.
Once the UVLO fault is detected by the fault protection logic, the
converter shuts down and waits for the input voltage to rise above VIN-
UVLO+. Provided the converter is still enabled, it will then restart.
Input Overvoltage Fault Protection (OVLO)
The converter’s input voltage is monitored to detect an input over
voltage condition. When the input voltage is more than the
VIN-OVLO+, a fault is detected, the powertrain stops switching, and the
output voltage of the converter falls.
After an OVLO fault occurs, the converter will wait for the input voltage
to fall below VIN-OVLO-. Provided the converter is still enabled, the
powertrain will restart.
The powertrain controller itself also monitors the input voltage.
Transient OVLO events which have not yet been detected by the fault
sequence logic may first be detected by the controller if the input slew
rate is sufficiently large. In this case, powertrain switching will
immediately stop. If the input voltage falls back in range before the
fault sequence logic detects the out of range condition, the powertrain
will resume switching and the fault logic will not interrupt operation
Regardless of whether the powertrain is running at the time or not, if
the input voltage does not recover from OVLO before tOVLO, the
converter fault logic will detect the fault.
Output Undervoltage Fault Protection (UVP)
The converter determines that an output overload or short circuit
condition exists by measuring its primary sensed output voltage and
the output of the internal error amplifier. In general, whenever the
powertrain is switching and the primary-sensed output voltage falls
below VOUT-UVP threshold, a short circuit fault will be registered. Once
an output undervoltage condition is detected, the powertrain
immediately stops switching, and the output voltage of the converter
falls. The converter remains disabled for a time tFAULT. Once recovered
and provided the converter is still enabled, the powertrain will again
enter the soft start sequence after tINIT and tON.
Temperature Fault Protections (OTP)
The fault logic monitors the internal temperature of the converter. If
the measured temperature exceeds TINT-OTP, a temperature fault is
registered. As with the under voltage fault protection, once a
temperature fault is registered, the powertrain immediately stops
switching, the output voltage of the converter falls, and the converter
remains disabled for at least time tFAULT. Then, the converter waits for
the internal temperature to return to below TINT-OTP before recovering.
Provided the converter is still enabled, the DCM will restart after tINIT
and tON.
Output Overvoltage Fault Protection (OVP)
The converter monitors the output voltage during each switching cycle
by a corresponding voltage reflected to the primary side control
circuitry. If the primary sensed output voltage exceeds VOUT-OVP, the
OVP fault protection is triggered. The control logic disables the
powertrain, and the output voltage of the converter falls.
This type of fault is latched, and the converter will not start again until
the latch is cleared. Clearing the fault latch is achieved by either
disabling the converter via the EN pin, or else by removing the input
power such that the input voltage falls below VIN-INIT.
External Output Capacitance
The DCM converter internal compensation requires a minimum
external output capacitor. An external capacitor in the range of 220 to
5000 µF with ESR of 10 mΩ is required, per DCM for control loop
compensation purposes.
However some DCM models require an increase to the minimum
external output capacitor value in certain loading and trim condition.
In applications where the load can go below 10% of rated load but the
output trim is held constant, the range of output capacitor required is
given by COUT-EXT-TRANS in the Electrical Specifications table. If the load
can go below 10% of rated load and the DCM output trim is also
dynamically varied, the range of output capacitor required is given by
COUT-EXT-TRANS-TRIM in the Electrical Specifications table.
Light Load Boosting
Under light load conditions, the DCM converter may operate in light
load boosting depending on the line voltage. Light load boosting occurs
whenever the internal power consumption of the converter combined
with the external output load is less than the minimum power transfer
per switching cycle. In order to maintain regulation, the error amplifier
will switch the powertrain off and on repeatedly, to effectively lower
the average switching frequency, and permit operation with no
external load. During the time when the power train is off, the module
internal consumption is significantly reduced, and so there is a notable
reduction in no-load input power in light load boosting. When the load
is less than 10% of rated Iout, the output voltage may rise by a
maximum of 2.95 V, above the output voltage calculated from trim,
temperature, and load line conditions.
DCM™DC-DC Converter Rev 1.3
Page 25 of 31 01/2020
DCM2322xA5N31A2y6z
www.vicorpowcmomlnnwcrhcnch VICOR’
Thermal Design
Based on the safe thermal operating area shown in page 5, the full rated
power of the DCM2322xA5N31A2y6z can be processed provided that
the top, bottom, and leads are all held below 100°C. These curves
highlight the benefits of dual sided thermal management, but also
demonstrate the flexibility of the Vicor ChiP platform for customers
who are limited to cooling only the top or the
bottom surface.
The OTP sensor is located on the top side of the internal PCB structure.
Therefore in order to ensure effective over-temperature fault
protection, the case bottom temperature must be constrained by the
thermal solution such that it does not exceed the temperature of the
case top.
The ChiP package provides a high degree of flexibility in that it presents
three pathways to remove heat from internal power dissipating
components. Heat may be removed from the top surface, the bottom
surface and the leads. The extent to which these three surfaces are
cooled is a key component for determining the maximum power that is
available from a ChiP, as can be seen from Figure 23.
Since the ChiP has a maximum internal temperature rating, it is
necessary to estimate this internal temperature based on a real thermal
solution. Given that there are three pathways to remove heat from the
ChiP, it is helpful to simplify the thermal solution into a roughly
equivalent circuit where power dissipation is modeled as a current
source, isothermal surface temperatures are represented as voltage
sources and the thermal resistances are represented as resistors.
Figure 23 shows the "thermal circuit" for a 2322 ChiP DCM, in an
application where both case top and case bottom, and leads are cooled.
In this case, the DCM power dissipation is PDTOTAL and the three surface
temperatures are represented as TCASE_TOP, TCASE_BOTTOM, and TLEADS. This
thermal system can now be very easily analyzed with simple resistors,
voltage sources, and a current source.
This analysis provides an estimate of heat flow through the various
pathways as well as internal temperature.
Alternatively, equations can be written around this circuit and
analyzed algebraically:
TINT – PD1•
θ
INT-TOP = TCASE_TOP
TINT – PD2•
θ
INT-BOTTOM = TCASE_BOTTOM
TINT – PD3•
θ
INT-LEADS = TLEADS
PDTOTAL = PD1+ PD2+ PD3
Where TINT represents the internal temperature and PD1, PD2, and PD3
represent the heat flow through the top side, bottom side, and leads
respectively.
Figure 24 shows a scenario where there is no bottom side cooling.
In this case, the heat flow path to the bottom is left open and the
equations now simplify to:
TINT – PD1•
θ
INT-TOP = TCASE_TOP
TINT – PD3•
θ
INT-LEADS = TLEADS
PDTOTAL = PD1+ PD3
Figure 25 shows a scenario where there is no bottom side and leads
cooling. In this case, the heat flow path to the bottom is left open and
the equations now simplify to:
TINT – PD1•
θ
INT-TOP = TCASE_TOP
PDTOTAL = PD1
Vicor provides a suite of online tools, including a simulator and
thermal estimator which greatly simplify the task of determining
whether or not a DCM thermal configuration is sufficient for a given
condition. These tools can be found at:
www.vicorpower.com/powerbench.
+
–
+
–
+
–
MAX INTERNAL TEMP
T
CASE_BOTTOM
(°C) T
LEADS
(°C) T
CASE_TOP
(°C)
Power Dissipation (W)
Thermal Resistance Top
θ
INT-TOP
ºC / W
Thermal Resistance Bottom
θ
INT-BOTTOM
ºC / W
Thermal Resistance Leads
θ
INT-LEADS
ºC / W
Figure 23 — Double side cooling and leads thermal model
+
–
+
–
MAX INTERNAL TEMP
T
CASE_BOTTOM
(°C) T
LEADS
(°C) T
CASE_TOP
(°C)
Power Dissipation (W)
Thermal Resistance Top
θ
INT-TOP
ºC / W
Thermal Resistance Bottom
θ
INT-BOTTOM
ºC / W
Thermal Resistance Leads
θ
INT-LEADS
ºC / W
Figure 24 — One side cooling and leads thermal model
+
–
MAX INTERNAL TEMP
T
CASE_BOTTOM
(°C) T
LEADS
(°C) T
CASE_TOP
(°C)
Power Dissipation (W)
Thermal Resistance Top
θ
INT-TOP
ºC / W
Thermal Resistance Bottom
θ
INT-BOTTOM
ºC / W
Thermal Resistance Leads
θ
INT-LEADS
ºC / W
Figure 25 — One side cooling thermal model
DCM™DC-DC Converter Rev 1.3
Page 26 of 31 01/2020
DCM2322xA5N31A2y6z
VICOFx’
Array Operation
A decoupling network is needed to facilitate paralleling:
nAn output inductor should be added to each DCM, before the
outputs are bussed together to provide decoupling.
nEach DCM needs a separate input filter, even if the multiple DCMs
share the same input voltage source. These filters limit the ripple
current reflected from each DCM, and also help suppress
generation of beat frequency currents that can result when
multiple powertrains input stages are permitted to
direclty interact.
If signal pins (TR, EN, FT) are not used, they can be left floating, and
DCM will work in the nominal output condition.
When common mode noise in the input side is not a concern, TR and
EN can be driven and FT received using a single Kelvin connection to
the shared -IN as a reference.
Note: For more information on parallel operation of DCMs, refer to
“Parallel DCMs” application note AN:030.
An example of DCM paralleling circuit is shown in Figure 26.
Recommended values to start with:
L1_x: 22 µH, minimized DCR;
C1_x: Ceramic capacitors in parallel, C1 = 6.6 µF;
Rd_x: 1.5 Ω;
Cd_x: 20 µF
L2_x: 0.33 µH;
C2_x: 80 µF;
Rdm_x: 0.05 Ω;
Lb_x: 72 nH;
COUT-EXT-x:electrolytic or tantalum capacitor, 220 µF ≤ C3 ≤5000 µF;
C3, C4: additional ceramic /electrolytic capacitors, if needed for output
ripple filtering;
In order to help sensitive signal circuits reject potential noise,
additional components are recommended:
R2_x: 301 Ohm, facilitate noise attenuation for TR pin;
FB1_x, C5_x: FB1 is a ferrite bead with an impedance of at least 10 Ωat
100MHz. C5_x can be a ceramic capacitor of 0.1uF. Facilitate noise
attenuation for EN pin.
Note: Use an RCR filter network as suggested in the application note
AN:030 to reduce the noise on the signal pins.
Note: In case of the excessive line inductance, a properly sized
decoupling capacitor CDECOUPLE is required as shown in Figure 26.
When common mode noise rejection in the input side is needed,
common mode chokes can be added in the input side of each DCM. An
example of DCM paralleling circuit is shown below:
VTR VEN
L1_1
C1_1 C3C4
TR
EN
FT
+IN +OUT
R2_1
C5_1
FB1_1
TR
EN
FT
+IN +OUT
R2_2
C5_2
FB1_2
TR
EN
FT
+IN +OUT
R2_8
C5_8
FB1_8
DCM1
DCM2
DCM8
R4
R3
D1
≈≈ ≈ ≈ ≈ ≈≈
Shared –IN Kelvin
VIN
F1_1
Rd_1
Cd_1
CDECOUPLE
L1_2
C1_2 Rd_2
Cd_2
F1_2
L1_8
C1_8 Rd_8
Cd_8
F1_8
L2_1
COUT-EXT_1
Rdm_1 Lb_1
RCOUT-EXT_1
COUT-EXT_2
RCOUT-EXT_2
L2_2
Lb_2
Rdm_2
COUT-EXT_8
RCOUT-EXT_8
L2_8
Lb_8
Rdm_8
Load
C2_1
C2_2
C2_8
CY
EMI_GND
CY
CY
CY
CY
CY
CY
CY
CY
CY
CY
CY
–IN –OUT
–IN –OUT
–IN –OUT
CIN
Rb
Rb
Cb1
Cb1
CIN
Rb
Rb
Cb1
Cb1
CIN
Rb
Rb
Cb1
Cb1
Cb2
Cb2
Cb2
Cb2
Cb2
Cb2
Figure 26 — DCM paralleling configuration circuit 1
Note: CIN, Rb, Cb1 and Cb2 are required components for proper operation of the DCM. See required components table on page 2.
DCM™DC-DC Converter Rev 1.3
Page 27 of 31 01/2020
DCM2322xA5N31A2y6z
21 19 17 15 13 M 9 7 5 25 as 45 55 as 75 as 95 105 Temperature (“12) Top only at temperature g = .9 E- m .2 a E n. E = E x m s Top and \eads a! temperature Top, leads and Deny er temperature VICOFx’
Notice that each group of control pins need to be individually driven
and isolated from the other groups control pins. This is because -IN
of each DCM can be at a different voltage due to the common mode
chokes. Attempting to share control pin circuitry could lead to
incorrect behavior of the DCMs.
An array of DCMs used at the full array rated power may generally
have one or more DCMs operating at current limit, due to sharing
errors. Load sharing is functionally managed by the load line.
Thermal balancing is improved by the nominal effective temperature
coefficient of the output voltage setpoint.
DCMs in current limit will operate with higher output current or
power than the rated levels. Therefore the following Thermal Safe
Operating Area plot should be used for array use, or loads that drive
the DCM in to current limit for sustained operation.
Figure 28 — Thermal Specified Operating Area: Max Power
Dissipation vs. Case Temp for arrays or current
limited operation
+
VTR2
_
+
VEN2
_
+
VTR8
_
+
VEN8
_
+
VTR1
_
+
VEN1
_
TR
EN
FT
+IN +OUT
–IN –OUT
R2_1
TR
EN
FT
+IN +OUT
–IN –OUT
R2_2
TR
EN
FT
+IN +OUT
–IN –OUT
R2_8
C5_8
FB1_8
DCM1
DCM2
DCM8
R4_8
R3_8
D1_8
C5_2
FB1_2
R4_2
R3_2
D1_2
C5_1
FB1_1
R4_1
R3_1
D1_1
VIN
≈≈
F1_1
F1_2
F1_8
T1_1
T1_2
T1_8
Cd_1
Rd_1
Cd_2
Rd_2
Cd_8
Rd_8
C1_1
C1_2
C1_8
CY
CY
CY
CY
CY
CY
EMI_GND
L1_1
C3C4
≈ ≈
Load
Rdm_1 Lb_1
COUT-EXT_1
RCOUT-EXT_1
L1_2
Rdm_2 Lb_2
COUT-EXT_2
RCOUT-EXT_2
L1_8
COUT-EXT_8
RCOUT-EXT_8
Rdm_8 Lb_8
CY
CY
CY
CY
CY
CY
C2_1
C2_2
C2_8
CIN
Rb
Rb
Cb1
Cb1
CIN
Rb
Rb
Cb1
Cb1
CIN
Rb
Rb
Cb1
Cb1
Cb2
Cb2
Cb2
Cb2
Cb2
Cb2
Figure 27 — DCM paralleling configuration circuit 2
Note: CIN, Rb, Cb1 and Cb2 are required components for proper operation of the DCM. See required components table on page 2.
DCM™DC-DC Converter Rev 1.3
Page 28 of 31 01/2020
DCM2322xA5N31A2y6z
“I "I La I I I: c» U: nigifl, is fiI—I I ME I :14— I I 1* ’ I i[ 1 [Hi ;ii‘i* j[ J I 21* ’ ‘ i[ Z] I a] I 1* ’ ‘ i[ 2] Yr DIMENSIONSARE MM mm VICOFQ
DCM Module Product Outline Drawing Recommended PCB Footprint and Pinout
NOTES:
1- DIMENSIONS ARE MM [INCH]
24.84±.38
.978±.015
12.42
.489
11.40
.449
22.80±.13
.898±.005
0
00
0
TOP VIEW (COMPONENT SIDE)
1.52
.060
(2) PL.
1.02
.040
(3) PL.
1.52
.060
(4) PL.
11.43
.450
.41
.016
(9) PL.
7.21±.10
.284±.004
4.17
.164
(9) PL.
SEATING
PLANE
.05 [.002]
0
2.75
.108
8.25
.325
2.75
.108
8.25
.325
8.00
.315
4.13
.162
1.38
.054
1.38
.054
8.00
.315
0
11.66
.459
11.66
.459
0
0
BOTTOM VIEW
1.52
.060
PLATED THRU
.25 [.010]
ANNULAR RING
(3) PL.
2.03
.080
PLATED THRU
.25 [.010]
ANNULAR RING
(2) PL.
2.03
.080
PLATED THRU
.38 [.015]
ANNULAR RING
(4) PL.
0
1.38±.08
.054±.003
8.00±.08
.315±.003
1.38±.08
.054±.003
4.13±.08
.162±.003
8.00±.08
.315±.003
8.25±.08
.325±.003
2.75±.08
.108±.003
2.75±.08
.108±.003
8.25±.08
.325±.003
0
11.66±.08
.459±.003
11.66±.08
.459±.003
0
0
RECOMMENDED HOLE PATTERN
(COMPONENT SIDE)
+IN
TR
EN
FT
-IN
+OUT
+OUT
-OUT
-OUT
DCM™DC-DC Converter Rev 1.3
Page 29 of 31 01/2020
DCM2322xA5N31A2y6z
Revlslon Date Descrlpflcn Page Numberis) 1.0 03/07/i9 initiai reiease n/a 1.i 03/1 9M 9 Updated component taoie 2 1.2 09/05/i9 Updated signai pm names on mechanical dfawmg 29 1.3 01/30/20 Output voltage regulation specifitalicm format cnange a VICOR
Revision History
Revision Date Description Page Number(s)
1.0 08/07/19 Initial release n/a
1.1 08/19/19 Updated component table 2
1.2 09/05/19 Updated signal pin names on mechanical drawing 29
1.3
01/30/20
Output voltage regulation specification format change 8
DCM™DC-DC Converter Rev 1.3
Page 30 of 31 01/2020
DCM2322xA5N31A2y6z
ham/WWW wcorpower corn/(ontactru: www wcorpowevcom (ustserv@vl(olgower (0m agpS@\/\(Orgower (0m VICOFx’
Contact Us: http://www.vicorpower.com/contact-us
Vicor Corporation
25 Frontage Road
Andover, MA, USA 01810
Tel: 800-735-6200
Fax: 978-475-6715
www.vicorpower.com
email
Customer Service: custserv@vicorpower.com
Technical Support: apps@vicorpower.com
©2019 – 2020 Vicor Corporation. All rights reserved. The Vicor name is a registered trademark of Vicor Corporation.
All other trademarks, product names, logos and brands are property of their respective owners.
DCM™DC-DC Converter Rev 1.3
Page 31 of 31 01/2020
DCM2322xA5N31A2y6z
Vicor’s comprehensive line of power solutions includes high density AC-DC and DC-DC modules and
accessory components, fully configurable AC-DC and DC-DC power supplies, and complete custom
power systems.
Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility is assumed by Vicor for its use. Vicor
makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication. Vicor reserves
the right to make changes to any products, specifications, and product descriptions at any time without notice. Information published by
Vicor has been checked and is believed to be accurate at the time it was printed; however, Vicor assumes no responsibility for inaccuracies.
Testing and other quality controls are used to the extent Vicor deems necessary to support Vicor’s product warranty. Except where
mandated by government requirements, testing of all parameters of each product is not necessarily performed.
Specifications are subject to change without notice.
Visit http://www.vicorpower.com/dc-dc/isolated-regulated/dcm for the latest product information.
Vicor’s Standard Terms and Conditions and Product Warranty
All sales are subject to Vicor’s Standard Terms and Conditions of Sale, and Product Warranty which are available on Vicor’s webpage
(http://www.vicorpower.com/termsconditionswarranty) or upon request.
Life Support Policy
VICOR’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE
EXPRESS PRIOR WRITTEN APPROVAL OF THE CHIEF EXECUTIVE OFFICER AND GENERAL COUNSEL OF VICOR CORPORATION. As used
herein, life support devices or systems are devices which (a) are intended for surgical implant into the body, or (b) support or sustain life and
whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to
result in a significant injury to the user. A critical component is any component in a life support device or system whose failure to perform
can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness. Per Vicor Terms
and Conditions of Sale, the user of Vicor products and components in life support applications assumes all risks of such use and indemnifies
Vicor against all liability and damages.
Intellectual Property Notice
Vicor and its subsidiaries own Intellectual Property (including issued U.S. and Foreign Patents and pending patent applications) relating to
the products described in this data sheet. No license, whether express, implied, or arising by estoppel or otherwise, to any intellectual
property rights is granted by this document. Interested parties should contact Vicor’s Intellectual Property Department.
The products described on this data sheet are protected by the following U.S. Patents Numbers:
RE40,072; 7,561,446; 7,920,391; 7,782,639; 8,427,269; 6,421,262 and other patents pending.