TLV27x-Q1 Datasheet by Texas Instruments

Supply Current. . . 550 uAIChannel T Input Noise Voltage. . . 39 nV/V‘Hi Input Bias Current... 1 pA Spec ed Temperature Range —40°C to 125°C . . . Automotive Grade Ultrasmall Packaging — 5-Pin SOT-23 (TLV271) 0 Ideal Upgrade for TLCZ7x Family descrip Ion The TLV27x takes the minimum operating supply voltage down to 2.7 V over temperature range while addtng the railrtorrail output swing feature. This makes it TL027x family for applications where railrtorratl output swings are essential. The TL bandwtdth from only 550 uA. Ltke the TLC27x, the TLV27>< ls="" fully="" specified="" for="" 57v="" and="" :5v="" supplies.="" the="" maxim="" voltage="" is="" 16="" v,="" which="" allows="" the="" devices="" to="" be="" operated="" from="" a="" variety="" of="" rechargeabl="" to="" :135="" v).="" the="" cmos="" inputs="" enable="" use="" in="" highrimpedance="" sensor="" interfaces,="" with="" the="" iowe="" an="" attractive="" alternattve="" forthe="" tlc27x="" tn="" batteryrpowered="" applications.="" the="" 2.7vv="" operation="" makes="" tt="" compattple="" with="" lirlon="" powered="" systems="" and="" the="" oper="" of="" many="" micropower="" mtcrocontrollers="" available="" today="" includtng="" texas="" instruments="" selection="" of="" signal="" amplifier="" productst="" rail="" device="" vdd="" (w="" (:5)="" '31:?="" i"a="" mm="" film”="" (vs/l="" shutdown="" t0-="" rail="" tlv27x="" 2="" 7—16="" 500="" 550="" 1="" 3="" 2="" 4="" 7="" o="" tlc27x="" 3—16="" 1100="" g75="" 1="" 1="" 7="" 36="" 7="" 7="" tlv237x="" 2="" 7—16="" 500="" 550="" 1="" 3="" 2="" 4="" ves="" iio="" tlc227x="" 4—16="" 300="" 1100="" 1="" 22="" 36="" 7="" o="" tlv246x="" 27—6="" 150="" 550="" 1300="" 6="" 4="" 1="" 6="" ves="" iio="" tlv247x="" 27—6="" 250="" 600="" 2="" 2="" s="" 1="" 5="" ves="" iio="" tlv244x="" 2="" 7—10="" 300="" 725="" 1="" 1="" s="" 1="" 4="" 7="" o="" t="" typical="" values="" measured="" at="" 5="" v,="" 25°c="" please="" be="" aware="" that="" an="" lmporiant="" nettee="" concernlng="" avattamttty,="" standard="" warranty,="" and="" texas="" instruments="" semtconductor="" products="" and="" dtsclatmers="" thereto="" appears="" at="" the="" end="" at="" this="" at="" m.="" m.="" copyrlght="" e="" pialmclloll="" nm="" n="" u="" current="" a:="" m‘yu="" prodvcb="" mntormmspetl="" unansputnmmut="" m:="" m="" “ian..."="" mtexas="" instruments="" post="" office="" eox="" 555m="" -="" dallas="" texas="" 75255="">
TLV271-Q1, TLV272-Q1, TLV274-Q1
FAMILY OF 550-µA/Ch 3-MHz RAIL-TO-RAIL OUTPUT
OPERATIONAL AMPLIFIERS
SGLS275A − OCTOBER 2004 − REVISED JUNE 2008
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DQualified for Automotive Applications
DRail-To-Rail Output
DWide Bandwidth ...3 MHz
DHigh Slew Rate ...2 .4 V/µs
DSupply Voltage Range ...2.7 V to 16 V
DSupply Current . . . 550 µA/Channel
DInput Noise Voltage . . . 39 nV/√Hz
DInput Bias Current...1 pA
DSpecified Temperature Range
−40°C to 125°C . . . Automotive Grade
DUltrasmall Packaging
− 5-Pin SOT-23 (TLV271)
DIdeal Upgrade for TLC27x Family
description
The TLV27x takes the minimum operating supply voltage down to 2.7 V over the extended automotive
temperature range while adding the rail-to-rail output swing feature. This makes it an ideal alternative to the
TLC27x family for applications where rail-to-rail output swings are essential. The TLV27x also provides 3-MHz
bandwidth from only 550 µA.
Like the TLC27x, the TLV27x is fully specified for 5-V and ±5-V supplies. The maximum recommended supply
voltage is 16 V, which allows the devices to be operated from a variety of rechargeable cells (±8 V supplies down
to ±1.35 V).
The CMOS inputs enable use in high-impedance sensor interfaces, with the lower voltage operation making
an attractive alternative for the TLC27x in battery-powered applications.
The 2.7-V operation makes it compatible with Li-Ion powered systems and the operating supply voltage range
of many micropower microcontrollers available today including Texas Instruments MSP430.
SELECTION OF SIGNAL AMPLIFIER PRODUCTS†
DEVICE VDD (V) VIO
(µV)
Iq/Ch
(µA) IIB (pA) GBW
(MHz)
SR
(V/µs) SHUTDOWN
RAIL-
TO-
RAIL
SINGLES/DUALS/QUADS
TLV27x 2.7−16 500 550 1 3 2.4 — O S/D/Q
TLC27x 3−16 1100 675 1 1.7 3.6 — — S/D/Q
TLV237x 2.7−16 500 550 1 3 2.4 Yes I/O S/D/Q
TLC227x 4−16 300 1100 1 2.2 3.6 — O D/Q
TLV246x 2.7−6 150 550 1300 6.4 1.6 Yes I/O S/D/Q
TLV247x 2.7−6 250 600 2 2.8 1.5 Yes I/O S/D/Q
TLV244x 2.7−10 300 725 1 1.8 1.4 — O D/Q
†Typical values measured at 5 V, 25°C
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 2008 Texas Instruments Incorporated
Operational Amplifier
+
−
NUMBER OF PACKAGE TVPES‘ UNIVERSAL See me EVM Se‘ecuon Gums SMALL OUTL|NE SMALL OUTL|NE *9 TEXAS INSTRUMENTS
TLV271-Q1, TLV272-Q1, TLV274-Q1
FAMILY OF 550-µA/Ch 3-MHz RAIL-TO-RAIL OUTPUT
OPERATIONAL AMPLIFIERS
SGLS275A − OCTOBER 2004 − REVISED JUNE 2008
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
FAMILY PACKAGE TABLE{
DEVICE
NUMBER OF PACKAGE TYPES}UNIVERSAL
DEVICE
NUMBER
OF
CHANNELS SOIC SOT-23 TSSOP MSOP§
UNIVERSAL
EVM BOARD
TLV271 1 8 5 — —
See the EVM
TLV272 2 8 — — 8
See
the
EVM
Selection Guide
TLV274 4 14 — 14 —
Selection
Guide
(SLOU060)
†For the most current package and ordering information, see the Package Option Addendum at
the end of this document, or see the TI web site at http://www.ti.com.
‡Package drawings, thermal data, and symbolization are available at
http://www.ti.com/packaging.
§Product Preview
TLV271 AVAILABLE OPTIONS
VMAX AT
PACKAGED DEVICES
TA
VIOMAX AT
25
°
C
SMALL OUTLINE SOT-23
TA
25°C
SMALL
OUTLINE
(D) (DBV) SYMBOL
−40°C to 125°C5 mV TLV271QDRQ1 TLV271QDBVRQ1 271Q
TLV272 AVAILABLE OPTIONS
VMAX AT
PACKAGED DEVICES
TA
VIOMAX AT
25
°
C
SMALL OUTLINE MSOP
TA
25°C
SMALL
OUTLINE
(D) (DGK) SYMBOL
−40°C to 125°C5 mV TLV272QDRQ1 TLV272QDGKRQ1†
†Product Preview
TLV274 AVAILABLE OPTIONS
PACKAGED DEVICES
TAVIOMAX AT 25°CSMALL OUTLINE
(D)
TSSOP
(PW)
−40°C to 125°C5 mV TLV274QDRQ1 TLV274QPWRQ1
|:‘ 3 El: .0 II I ED ID I: El: :El |N+|:37 4:|IN— GNDEEA 5]] 'er272 'er274 D on DGK PACKAGE D on PW PACKA (TOP VIEW) {TOP VIEW) 0 1OUTEI: 1 a 32! V99 1OUTEE ‘ 14]] 1|Nr|:|: 7 :El 20UT 1IN7EE 13 j] 1IN+EE e j] 2W7 GNDEI: 4 5 j] 2\N+ “MEI: '2 1' VDDEE 4 11 :El 2IN+EE 5 m j] 2min: s}% s 3] onTE 7 E I! NC — No mtema‘ connecuon (1) SOT-23 may or may nm be mdmated fl . D 2 a | ‘ a \Q} 3 o ‘ L/ K) ...1'“ f Molded Dal Bevel Edges I 'U TEXAS INSTRUMENTS POST OFFICE aox 555m - DALLAS IEXAS 75255
TLV271-Q1, TLV272-Q1, TLV274-Q1
FAMILY OF 550-µA/Ch 3-MHz RAIL-TO-RAIL OUTPUT
OPERATIONAL AMPLIFIERS
SGLS275A − OCTOBER 2004 − REVISED JUNE 2008
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV27x PACKAGE PINOUTS(1)
3
2
4
5
(TOP VIEW)
1
OUT
GND
IN+
VDD
IN −
TLV271
DBV PACKAGE
1
2
3
4
8
7
6
5
NC
IN−
IN+
GND
NC
VDD
OUT
NC
TLV271
D PACKAGE
(TOP VIEW)
1
2
3
4
8
7
6
5
1OUT
1IN−
1IN+
GND
VDD
2OUT
2IN−
2IN+
TLV272
D OR DGK PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1OUT
1IN−
1IN+
VDD
2IN+
2IN−
2OUT
4OUT
4IN−
4IN+
GND
3IN+
3IN−
3OUT
(TOP VIEW)
TLV274
D OR PW PACKAGE
NC − No internal connection
(1) SOT−23 may or may not be indicated
TYPICAL PIN 1 INDICATORS
Printed or
Molded Dot Bevel Edges
Pin 1
Molded ”U” Shape
Pin 1
Stripe
Pin 1 Pin 1
*9 TEXAS INSTRUMENTS
TLV271-Q1, TLV272-Q1, TLV274-Q1
FAMILY OF 550-µA/Ch 3-MHz RAIL-TO-RAIL OUTPUT
OPERATIONAL AMPLIFIERS
SGLS275A − OCTOBER 2004 − REVISED JUNE 2008
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VDD (see Note 1) 16.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Differential input voltage, VID ±VDD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (see Note 1) −0.2 V to VDD + 0.2 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input current range, II ±10 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output current range, IO ±100 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, TA −40°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum junction temperature, TJ 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg −65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values, except differential voltages, are with respect to GND.
DISSIPATION RATING TABLE
PACKAGE θJC
(°C/W)
θJA
(°C/W)
TA ≤ 25°C
POWER RATING
TA = 25°C
POWER RATING
D (8) 38.3 176 710 mW 396 mW
D (14) 26.9 122.3 1022 mW 531 mW
DBV (5) 55 324.1 385 mW 201 mW
DGK (8) 54.23 259.96 481 mW 250 mW
PW (14) 29.3 173.6 720 mW 374 mW
recommended operating conditions
MIN MAX UNIT
Supply voltage V
Single supply 2.7 16
V
Supply voltage, VDD Split supply ±1.35 ±8V
Common-mode input voltage range, VICR 0 VDD−1.35 V
Operating free-air temperature, TAQ-suffix −40 125 °C
vlc : n (a vDD—Lasv, vlc : n (a vDD—Lasv, vlc : u to VDD—LSEV, Largerstgnal amerenua: voltage VOW, : VDD/Z V90 5 v, v‘C : Von/2 V0 van/2, R5 *5 TEXAS INSTRUMENTS
TLV271-Q1, TLV272-Q1, TLV274-Q1
FAMILY OF 550-µA/Ch 3-MHz RAIL-TO-RAIL OUTPUT
OPERATIONAL AMPLIFIERS
SGLS275A − OCTOBER 2004 − REVISED JUNE 2008
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, VDD = 2.7 V, 5 V, and 15 V (unless
otherwise noted)
dc performance
PARAMETER TEST CONDITIONS TA†MIN TYP MAX UNIT
V
Input offset voltage
V V /2
V V /2
25°C 0.5 5
mV
VIO Input offset voltage VIC = VDD/2,
RL=10kΩ
VO = VDD/2,
RS=50Ω
Full range 7mV
αVIO Offset voltage drift RL = 10 kΩ,
R
S =
50
Ω
25°C 2 µV/°C
VI
C
= 0 to VDD−1.35V,
V27V
25°C 53 70
VIC
=
0
to
VDD 1
.
35V
,
RS = 50 ΩVDD = 2.7 V Full range 54
CMRR
Common mode rejection ratio
VI
C
= 0 to VDD−1.35V,
V5V
25°C 58 80
dB
CMRR Common-mode rejection ratio
VIC
=
0
to
VDD 1
.
35V
,
RS = 50 ΩVDD = 5 V Full range 57 dB
VI
C
= 0 to VDD−1.35V,
V15 V
25°C 67 85
VIC
=
0
to
VDD 1
.
35V
,
RS = 50 ΩVDD = 15 V Full range 66
V27V
25°C 95 106
VDD = 2.7 V Full range 76
A
Lar
g
e-si
g
nal differential volta
g
e V
O(
PP
)
= VDD/2,
V5V
25°C 80 110
dB
AVD
Large signal
differential
voltage
amplification
VO(PP)
=
VDD/2
,
RL = 10 kΩVDD = 5 V Full range 82 dB
V15 V
25°C 77 115
VDD = 15 V Full range 79
†Full range is − 40°C to 125°C. If not specified, full range is −40°C to 125°C.
input characteristics
PARAMETER TEST CONDITIONS TAMIN TYP MAX UNIT
I
Input offset current
25°C 1 60
pA
IIO Input offset current VDD = 15 V, VI
C
= VDD/2, 125°C 1000 pA
I
Input bias current
VDD
=
15
V
,
VIC
=
VDD/2
,
VO = VDD/2, RS = 50 Ω25°C 1 60
pA
IIB Input bias current
ODD ,S
125°C 1000 pA
ri(d) Differential input resistance 25°C 1000 GΩ
CIC Common-mode input capacitance f = 21 kHz 25°C 8 pF
*9 TEXAS INSTRUMENTS
TLV271-Q1, TLV272-Q1, TLV274-Q1
FAMILY OF 550-µA/Ch 3-MHz RAIL-TO-RAIL OUTPUT
OPERATIONAL AMPLIFIERS
SGLS275A − OCTOBER 2004 − REVISED JUNE 2008
6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, VDD = 2.7 V, 5 V, and 15 V (unless
otherwise noted)
output characteristics
PARAMETER TEST CONDITIONS TA†MIN TYP MAX UNIT
V27V
25°C 2.55 2.58
VDD = 2.7 V Full range 2.48
V V /2 I 1mA
V5V
25°C 4.9 4.93
VIC = VDD/2, IOH = −1 mA VDD = 5 V Full range 4.85
V15 V
25°C 14.92 14.96
V
High level output voltage
VDD = 15 V Full range 14.9
V
VOH High-level output voltage
V27V
25°C 1.88 2.1 V
VDD = 2.7 V Full range 1.42
V V /2 I 5mA
V5V
25°C 4.58 4.68
VIC = VDD/2, IOH = −5 mA VDD = 5 V Full range 4.44
V15 V
25°C 14.7 14.8
VDD = 15 V Full range 14.6
V27V
25°C 0.1 0.15
VDD = 2.7 V Full range 0.22
V V /2 I 1mA
V5V
25°C 0.05 0.1
VIC = VDD/2, IOL = 1 mA VDD = 5 V Full range 0.15
V15 V
25°C 0.05 0.08
V
Low level output voltage
VDD = 15 V Full range 0.1
V
VOL Low-level output voltage
V27V
25°C 0.5 0.7 V
VDD = 2.7 V Full range 1.15
V V /2 I 5mA
V5V
25°C 0.28 0.4
VIC = VDD/2, IOL = 5 mA VDD = 5 V Full range 0.54
V15 V
25°C 0.19 0.3
VDD = 15 V Full range 0.35
V=05Vfrom rail V =27V
Positive rail 25°C 4
VO = 0.5 V from rail, VDD = 2.7 V Negative rail 25°C 5
I
Output current
V=05Vfrom rail V =5V
Positive rail 25°C 7
mA
IOOutput current VO = 0.5 V from rail, VDD = 5 V Negative rail 25°C 8 mA
V=05Vfrom rail V =15V
Positive rail 25°C 13
VO = 0.5 V from rail, VDD = 15 V Negative rail 25°C 12
†Full range is − 40°C to 125°C. If not specified, full range is −40°C to 125°C.
‡Depending on package dissipation rating
om.” NW”. M.MM.M.\ Supply vmtage machon rauo vDD : 2.7 v to 15 v‘ ch : Von/2 Vow-q : Von/2 vnn : 27 v‘ VON-'12,: vDye v. Vnn : 5 v, :5 v. VOW, : VDD/Z v. {P TEXAS INSTRUMENTS
TLV271-Q1, TLV272-Q1, TLV274-Q1
FAMILY OF 550-µA/Ch 3-MHz RAIL-TO-RAIL OUTPUT
OPERATIONAL AMPLIFIERS
SGLS275A − OCTOBER 2004 − REVISED JUNE 2008
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, VDD = 2.7 V, 5 V, and 15 V (unless
otherwise noted) (continued)
power supply
PARAMETER TEST CONDITIONS TA†MIN TYP MAX UNIT
VDD = 2.7 V 25°C 470 560
I
Supply current (per channel)
V=V /2
VDD = 5 V 25°C 550 660
µA
IDD Supply current (per channel) VO = VDD/2
V=15V
25°C 750 900 µA
VDD = 15 V Full range 1200
PSRR
Suppl
y
volta
g
e rejection ratio VDD = 2.7 V to 15 V, VI
C
= VDD /2, 25°C 70 80
dB
PSRR
Supply
voltage
rejection
ratio
(∆VDD /∆VIO)
VDD
=
2
.
7
V
to
15
V
,
No load
VIC
=
VDD /2
,
Full range 65 dB
†Full range is − 40°C to 125°C. If not specified, full range is −40°C to 125°C.
dynamic performance
PARAMETER TEST CONDITIONS TA†MIN TYP MAX UNIT
UGBW
Unity gain bandwidth
R2kΩC10 pF
VDD = 2.7 V 25°C 2.4
MHz
UGBW Unity gain bandwidth RL = 2 kΩ, CL = 10 pF VDD = 5 V to 15 V 25°C 3 MHz
V27V
25°C1.4 2.1
V/ s
VDD = 2.7 V Full range 1V/µs
SR
Slew rate at unity gain
V
O(
PP
)
= VDD/2,
V5V
25°C1.4 2.4
V/ s
SR Slew rate at unity gain
VO(PP)
=
VDD/2
,
CL = 50 pF, RL = 10 kΩ,VDD = 5 V Full range 1.2 V/µs
V15 V
25°C1.9 2.1
V/ s
VDD = 15 V Full range 1.4 V/µs
φmPhase margin RL = 2 kΩCL = 10 pF 25°C 65 °
Gain margin RL = 2 kΩCL = 10 pF 25°C 18 dB
t
Settling time
VDD = 2.7 V,
V(STEP)PP = 1 V, AV = −1,
CL = 10 pF, RL = 2 kΩ
0.1%
25°C
2.9
s
tsSettling time VDD = 5 V, 15 V,
V(STEP)PP = 1 V, AV = −1,
CL = 47 pF, RL = 2 kΩ
0.1%
25°C
2
µs
†Full range is − 40°C to 125°C. If not specified, full range is −40°C to 125°C.
noise/distortion performance
PARAMETER TEST CONDITIONS TAMIN TYP MAX UNIT
VDD
=
2.7 V,
AV = 1 0.02%
V
DD =
2
.
7
V
,
VO(PP) = VDD/2 V, AV = 10 25°C0.05%
THD N
Total harmonic distortion plus noise
VO(PP)
VDD/2
V,
RL = 2 kΩ, f = 10 kHz AV = 100
25 C
0.18%
THD + N Total harmonic distortion plus noise
VDD
=
5V,±5V,
AV = 1 0.02%
V
DD =
5
V
,
±5
V
,
VO(PP) = VDD/2 V, AV = 10 25°C0.09%
VO(PP)
VDD/2
V,
RL = 2 kΩ, f = 10K AV = 100
25 C
0.5%
V
Equivalent input noise voltage
f = 1 kHz
25°C
39
nV/√Hz
VnEquivalent input noise voltage f = 10 kHz 25°C35 nV/
√
Hz
InEquivalent input noise current f = 1 kHz 25°C 0.6 fA /√Hz
*9 TEXAS INSTRUMENTS
TLV271-Q1, TLV272-Q1, TLV274-Q1
FAMILY OF 550-µA/Ch 3-MHz RAIL-TO-RAIL OUTPUT
OPERATIONAL AMPLIFIERS
SGLS275A − OCTOBER 2004 − REVISED JUNE 2008
8POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
CMRR Common-mode rejection ratio vs Frequency 1
Input bias and offset current vs Free-air temperature 2
VOL Low-level output voltage vs Low-level output current 3, 5, 7
VOH High-level output voltage vs High-level output current 4, 6, 8
VO(PP) Peak-to-peak output voltage vs Frequency 9
IDD Supply current vs Supply voltage 10
PSRR Power supply rejection ratio vs Frequency 11
AVD Differential voltage gain & phase vs Frequency 12
Gain-bandwidth product vs Free-air temperature 13
SR
Slew rate
vs Supply voltage 14
SR Slew rate vs Free-air temperature 15
φmPhase margin vs Capacitive load 16
VnEquivalent input noise voltage vs Frequency 17
Voltage-follower large-signal pulse response 18, 19
Voltage-follower small-signal pulse response 20
Inverting large-signal response 21, 22
Inverting small-signal response 23
Crosstalk vs Frequency 24
cmnn . Commommme Repclmn Rana . an a E S S S E E TA \\\ / , \HHHH 1— mummy . Hz Figure 1 *5 TEXAS INSTRUMENTS POST o;
TLV271-Q1, TLV272-Q1, TLV274-Q1
FAMILY OF 550-µA/Ch 3-MHz RAIL-TO-RAIL OUTPUT
OPERATIONAL AMPLIFIERS
SGLS275A − OCTOBER 2004 − REVISED JUNE 2008
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 1
0
20
40
60
80
100
120
10 100 1 k 10 k 100 k 1 M
COMMON-MODE REJECTION RATIO
vs
FREQUENCY
f − Frequency − Hz
CMRR − Common-Mode Rejection Ratio − dB
VDD = 5 V, 10 V
VDD = 2.7 V
Figure 2
−50
0
50
100
150
200
250
300
−40 −25 −10 5 20 35 50 65 80 95 110 125
VDD = 2.7 V, 5 V and 10 V
VIC = VDD/2
TA − Free-Air Temperature − °C
INPUT BIAS AND OFFSET CURRENT
vs
FREE-AIR TEMPERATURE
− Input Bias and Offset Current − pA
IIB IIO
Figure 3
0.00
0.40
0.80
1.20
1.60
2.00
2.40
2.80
0 2 4 6 8 10 12 14 16 18 20 22 24
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
IOL − Low-Level Output Current − mA
VDD = 2.7 V
OL
V − Low-Level Output Voltage − V
TA = 25 °C
TA = 125 °C
TA = 70 °C
TA = 0 °C
TA = 40 °C
Figure 4
0.00
0.40
0.80
1.20
1.60
2.00
2.40
2.80
0123456789101112
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
IOH − High-Level Output Current − mA
VOH − High-Level Output Voltage − V
VDD = 2.7 V
TA = 125°C
TA = 70°C
TA = 25°C
TA = 0°C
TA =−40°C
Figure 5
0.00
0.50
1.00
1.50
2.00
2.50
3.00
3.50
4.00
4.50
5.00
0 5 10 15 20 25 30 35 40 45 50 55 60 65 70
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
IOL − Low-Level Output Current − mA
VDD = 5 V
OL
V − Low-Level Output Voltage − V
TA = 125 °C
TA = 70 °C
TA = 25 °C
TA = 0 °C
TA = −40 °C
Figure 6
0.00
0.50
1.00
1.50
2.00
2.50
3.00
3.50
4.00
4.50
5.00
0 5 10 15 20 25 30 35 40 45
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
IOH − High-Level Output Current − mA
VOH − High-Level Output Voltage − V
VCC = 5 V
TA = −40°C
TA = 0°C
TA = 25°C
TA = 70°C
TA = 125°C
Figure 7
0
2
4
6
8
10
0 20 40 60 80 100 120
TA =125°C
TA =70°C
TA =25°C
TA =0°C
TA =−40°C
VDD = 10 V
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
IOL − Low-Level Output Current − mA
OL
V − Low-Level Output Voltage − V
Figure 8
0
2
4
6
8
10
020 40 60 80 100 120
VDD = 10 V
TA = −40°C
TA = 0°C
TA = 25°C
TA = 70°C
TA = 125°C
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
IOH − High-Level Output Current − mA
VOH − High-Level Output Voltage − V
Figure 9
0
1
2
3
4
5
6
7
8
9
10
11
10 100 1 k 10 k 100 k 1 M 10 M
PEAK-TO-PEAK OUTPUT VOLTAGE
vs
FREQUENCY
f − Frequency − Hz
− Peak-to-Peak Output Voltage − V
VO(PP)
AV = −10
RL = 2 kΩ
CL = 10 pF
TA = 25°C
THD = 5%
VDD = 10 V
VDD = 5 V
VDD = 2.7 V
I on Asupwy Cunemg u r 2 3 o 5 5 7 a a rumzrzwm vm, _ Supp‘y Volmg: _ v Figure IO Figure 11 :u 25 zu rs m as A," A nurmnrm mug. an." A GHWPAGam Bandwmh Pmfluc cu m mu m wk ruaer IUM ouzsmsza «. Frequency _ Hz 1. . FnerA Figure 12 Fig 5n A Slew rm. 4 m; mare Ma u 5 2o 35 5m 55 an 95‘10125 m we _ FmerAw Temnemlule _ c cL _ camcmv: Load - nF *9 TEXAS INSTRUMENTS 10 POST OFFICE aox 555m - DALLAS IEXAS 75255
TLV271-Q1, TLV272-Q1, TLV274-Q1
FAMILY OF 550-µA/Ch 3-MHz RAIL-TO-RAIL OUTPUT
OPERATIONAL AMPLIFIERS
SGLS275A − OCTOBER 2004 − REVISED JUNE 2008
10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 10
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
VDD − Supply Voltage − V
DD
I Supply Current − mA/ch−
AV = 1
VIC = VDD / 2 TA = 125°C
TA = 70°C
TA = 25°C
TA = 0°C
TA = −40°C
Figure 11
0
20
40
60
80
100
120
10 100 1 k 10 k 100 k 1 M
VDD = 5 V, 10 V
TA = 25°C
VDD = 2.7 V
POWER SUPPLY REJECTION RATIO
vs
FREQUENCY
f − Frequency − Hz
PSRR − Power Supply Rejection Ratio − dB
Figure 12
−40
−20
0
20
40
60
80
100
120
10 100 1 k 10 k 100 k 1 M 10 M
−180
−135
−90
−45
0
45
90
135
180
DIFFERENTIAL VOLTAGE GAIN AND PHASE
vs
FREQUENCY
f − Frequency − Hz
− Differential Voltage Gain − dB
Phase − °
VDD=5 V
RL=2 kΩ
CL=10 pF
TA=25°C
AVD
Phase
Gain
Figure 13
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
−40 −25 −10 5 20 35 50 65 80 95 110 125
GAIN BANDWIDTH PRODUCT
vs
FREE-AIR TEMPERATURE
GBWP −Gain Bandwidth Product − MHz
TA − Free-Air Temperature − °C
VDD = 10 V
VDD = 2.7 V
VDD = 5 V
Figure 14
0.0
0.5
1.0
1.5
2.0
2.5
3.0
2.5 4.5 6.5 8.5 10.5 12.5 14.5
SLEW RATE
vs
SUPPLY VOLTAGE
SR − Slew Rate − V/
VCC − Supply Voltage −V
AV = 1
RL = 10 kΩ
CL = 50 pF
TA = 25°C
SR−
SR+
sµ
Figure 15
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
−40 −25 −10 5 20 35 50 65 80 95 110 125
SLEW RATE
vs
FREE-AIR TEMPERATURE
TA − Free-Air Temperature − °C
SR+
SR−
SR − Slew Rate − V/
VDD = 5 V
AV = 1
RL = 10 kΩ
CL = 50 pF
VI = 3 V
sµ
Figure 16
0
10
20
30
40
50
60
70
80
90
100
10 100 1000
PHASE MARGIN
vs
CAPACITIVE LOAD
CL − Capacitive Load − pF
VDD = 5 V
RL= 2 kΩ
TA = 25°C
AV = Open Loop
Phase Margin − °
Rnull = 100
Rnull = 0
Rnull = 50
*5 TEXAS INSTRUMENTS
TLV271-Q1, TLV272-Q1, TLV274-Q1
FAMILY OF 550-µA/Ch 3-MHz RAIL-TO-RAIL OUTPUT
OPERATIONAL AMPLIFIERS
SGLS275A − OCTOBER 2004 − REVISED JUNE 2008
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 17
0
10
20
30
40
50
60
70
80
90
100
10 100 1 k 10 k 100 k
EQUIVALENT INPUT NOISE VOLTAGE
vs
FREQUENCY
f − Frequency − Hz
nV/ Hz− Equivalent Input Noise Voltage −Vn
VDD = 2.7, 5, 10 V
TA = 25°C
Figure 18
0
1
2
3
4
024681012141618
0
1
2
3
VI
t − Time − µs
VDD = 5 V
AV = 1
RL = 2 kΩ
CL = 10 pF
VI = 3 VPP
TA = 25°C
VI− Input Voltage − V
VO
V
O− Output Voltage − V
VOLTAGE-FOLLOWER LARGE-SIGNAL
PULSE RESPONSE
Figure 19
0
2
4
6
8
0246810 12 14 16 18
6
4
2
0
VI
t − Time − µs
VDD = 10 V
AV = 1
RL = 2 kΩ
CL = 10 pF
VI = 6 VPP
TA = 25°C
VI− Input Voltage − V
VO
V
O− Output Voltage − V
VOLTAGE-FOLLOWER LARGE-SIGNAL
PULSE RESPONSE
Figure 20
0.00
0.04
0.08
0.12
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
0.00
0.04
0.08
0.12
VI
t − Time − µs
VDD = 5 V
AV = 1
RL = 2 kΩ
CL = 10 pF
VI = 100 mVPP
TA = 25°C
VI− Input Voltage − mV
VO
V
O− Output Voltage − mV
VOLTAGE-FOLLOWER SMALL-SIGNAL
PULSE RESPONSE
Figure 21
246810 12 14 16
VI
t − Time − µs
VDD = 5 V
AV = 1
RL = 2 kΩ
CL = 10 pF
VI = 3 VPP
TA = 25°C
VI− Input Voltage − V
VO
V
O− Output Voltage − V
4
3
2
1
0
0
1
2
3
INVERTING LARGE-SIGNAL RESPONSE
20
Figure 22
0
2
4
6
8
0246810121416
6
4
2
0
t − Time − µs
INVERTING LARGE-SIGNAL RESPONSE
VDD = 10 V
AV = VI = −1
RL = 2 kΩ
CL = 10 pF
TA = 25°C
VO
− Output Voltage − VVO
VI
− Input Voltage − VVI
v A :an Mug. 4 v uu5 005 mm v0 4 Ompm Voltage 4 v uuus‘u‘sznzszuzsxwas 1.11m.” Figure 2: *9 TEXAS INSTRUMENTS POST OFFICE aox 555m - DALLAS IEXAS 7
TLV271-Q1, TLV272-Q1, TLV274-Q1
FAMILY OF 550-µA/Ch 3-MHz RAIL-TO-RAIL OUTPUT
OPERATIONAL AMPLIFIERS
SGLS275A − OCTOBER 2004 − REVISED JUNE 2008
12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 23
0.00
0.05
0.10
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
0.00
0.05
0.10
INVERTING SMALL-SIGNAL RESPONSE
VDD = 5 V
AV = VI = −1
RL = 2 kΩ
CL = 10 pF
VI = 100 mVpp
TA = 25°CVO
− Output Voltage − VVO
VI
− Input Voltage − VVI
t − Time − µs
Figure 24
−140
−120
−100
−80
−60
−40
−20
0
10 100 1 k 10 k 100 k
CROSSTALK
vs
FREQUENCY
f − Frequency − Hz
VDD = 2.7, 5, & 15 V
VI = 1 VDD/2
AV = 1
RL = 2 kΩ
TA = 25°C
Crosstalk − dB
Crosstalk
APPLICATION INFORMATION
driving a capacitive load
When the amplifier is configured in this manner, capacitive loading directly on the output decreases the device’s
phase margin leading to high frequency ringing or oscillations. Therefore, for capacitive loads of greater than
10 pF, it is recommended that a resistor be placed in series (RNULL) with the output of the amplifier, as shown
in Figure 25. A minimum value of 20 Ω should work well for most applications.
CLOAD
RF
Input
Output
RGRNULL
+
−
VDD/2
Figure 25. Driving a Capacitive Load
A \n A ‘1 \o ‘1. 21: RI C. ’7 I if 2:! R6 *5 TEXAS INSTRUMENTS POST OFFICE aox 555m - DALLAS IEX
TLV271-Q1, TLV272-Q1, TLV274-Q1
FAMILY OF 550-µA/Ch 3-MHz RAIL-TO-RAIL OUTPUT
OPERATIONAL AMPLIFIERS
SGLS275A − OCTOBER 2004 − REVISED JUNE 2008
13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
offset voltage
The output offset voltage (VOO) is the sum of the input offset voltage (VIO) and both input bias currents (IIB) times
the corresponding gains. The following schematic and formula can be used to calculate the output offset
voltage:
VOO +VIOǒ1)ǒRF
RGǓǓ"IIB)RSǒ1)ǒRF
RGǓǓ"IIB– RF
+
−
VI
+
RG
RS
RF
IIB−
VO
IIB+
Figure 26. Output Offset Voltage Model
general configurations
When receiving low-level signals, limiting the bandwidth of the incoming signals into the system is often
required. The simplest way to accomplish this is to place an RC filter at the noninverting terminal of the amplifier
(see Figure 27).
VI
VO
C1
+
−
RGRF
R1
f–3dB +1
2pR1C1
VO
VI+ǒ1)
RF
RGǓǒ1
1)sR1C1Ǔ
VDD/2
Figure 27. Single-Pole Low-Pass Filter
If even more attenuation is needed, a multiple pole filter is required. The Sallen-Key filter can be used for this
task. For the best results, the amplifier should have a bandwidth that is 8 to 10 times the filter frequency
bandwidth. Failure to do this can result in phase shift of the amplifier.
VI
C2
R2R1
C1
RF
RG
R1 = R2 = R
C1 = C2 = C
Q = Peaking Factor
(Butterworth Q = 0.707)
(
=1
Q
2 − )
RG
RF
_
+
f–3dB +1
2pRC
VDD/2
Figure 28. 2-Pole Low-Pass Sallen-Key Filter
*9 TEXAS INSTRUMENTS
TLV271-Q1, TLV272-Q1, TLV274-Q1
FAMILY OF 550-µA/Ch 3-MHz RAIL-TO-RAIL OUTPUT
OPERATIONAL AMPLIFIERS
SGLS275A − OCTOBER 2004 − REVISED JUNE 2008
14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
circuit layout considerations
To achieve the levels of high performance of the TLV27x, follow proper printed-circuit board design techniques.
A general set of guidelines is given in the following.
DGround planes—It is highly recommended that a ground plane be used on the board to provide all
components with a low inductive ground connection. However, in the areas of the amplifier inputs and
output, the ground plane can be removed to minimize the stray capacitance.
DProper power supply decoupling—Use a 6.8-µF tantalum capacitor in parallel with a 0.1-µF ceramic
capacitor on each supply terminal. It may be possible to share the tantalum among several amplifiers
depending on the application, but a 0.1-µF ceramic capacitor should always be used on the supply terminal
of every amplifier. In addition, the 0.1-µF capacitor should be placed as close as possible to the supply
terminal. As this distance increases, the inductance in the connecting trace makes the capacitor less
effective. The designer should strive for distances of less than 0.1 inches between the device power
terminals and the ceramic capacitors.
DSockets—Sockets can be used but are not recommended. The additional lead inductance in the socket pins
will often lead to stability problems. Surface-mount packages soldered directly to the printed-circuit board
is the best implementation.
DShort trace runs/compact part placements—Optimum high performance is achieved when stray series
inductance has been minimized. To realize this, the circuit layout should be made as compact as possible,
thereby minimizing the length of all trace runs. Particular attention should be paid to the inverting input of
the amplifier. Its length should be kept as short as possible. This helps to minimize stray capacitance at the
input of the amplifier.
DSurface-mount passive components—Using surface-mount passive components is recommended for high
performance amplifier circuits for several reasons. First, because of the extremely low lead inductance of
surface-mount components, the problem with stray series inductance is greatly reduced. Second, the small
size of surface-mount components naturally leads to a more compact layout thereby minimizing both stray
inductance and capacitance. If leaded components are used, it is recommended that the lead lengths be
kept as short as possible.
w 9 w w \ LDIP‘PacI‘mge‘ L“ = 1506‘: Low-K Tesl PCB a“ = 1946ch J MSOP Package Low-K Tesl PCB so c Package 9“ = ZED-”CM i LawK Tesl PCB 94. =1wcrw \ \ \ \ \ \\ \ \ \ , 501-23 Par: 99 \ \ Law-K Yest PCE \\§ 9” = 24“ch \ *5 TEXAS INSTRUMENTS
TLV271-Q1, TLV272-Q1, TLV274-Q1
FAMILY OF 550-µA/Ch 3-MHz RAIL-TO-RAIL OUTPUT
OPERATIONAL AMPLIFIERS
SGLS275A − OCTOBER 2004 − REVISED JUNE 2008
15
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
general power dissipation considerations
For a given θJA, the maximum power dissipation is shown in Figure 29 and is calculated by the following formula:
PD+ǒTMAX–TA
qJA Ǔ
Where:
PD= Maximum power dissipation of TLV27x IC (watts)
TMAX = Absolute maximum junction temperature (150°C)
TA= Free-ambient air temperature (°C)
θJA = θJC + θCA
θJC = Thermal coefficient from junction to case
θCA = Thermal coefficient from case to ambient air (°C/W)
1
0.75
0.5
0
−55 −40 −25 −10 5
Maximum Power Dissipation − W
1.25
1.5
MAXIMUM POWER DISSIPATION
vs
FREE-AIR TEMPERATURE
1.75
20 35 50
0.25
TA − Free-Air Temperature − °C
2
65 80 95 110 125
MSOP Package
Low-K Test PCB
θJA = 260°C/W
TJ = 150°C
PDIP Package
Low-K Test PCB
θJA = 104°C/W
SOIC Package
Low-K Test PCB
θJA = 176°C/W
SOT-23 Package
Low-K Test PCB
θJA = 324°C/W
NOTE A: Results are with no air flow and using JEDEC Standard Low-K test PCB.
Figure 29. Maximum Power Dissipation vs Free-Air Temperature
0 I19 IN+ 4. D D IN— 4‘ G ‘1’» L . s s K 'DvacE:amp,nv27x,mgh\/ad.OP AMP,NJF,INT ga 15 ' amp,1|v,27x,h1ghvaa operanonal ampl1l1er“macromodel“ gem 0 ' submrcun updaled usmg Mode‘ Ednor release 91 an 05/15/00 155 10 ' a114 4o Mode‘ E01101 15 an OrCAD product. hl1m 90 ' 11 11 ' connechons. nonrmvemng mpul J2 12 ' Invemng mpm r2 6 ' posmve power supp‘y m1 3 ' neganve power supply m2 3 ' ompm 701 e ' m2 7 51mm ampJ‘v27x7hlgthd 1 2 3 4 5 rp 3 ' rss 10 c1 11 12 457 455—15 1m 9 c2 6 7 5 00005—12 V1: 3 ass 10 99 1,1431E—12 ve 54 dc 5 53 Gy vhm 7 de 54 5 Gy mp 91 cflp 9o 91 dx v1n 0 cfln 92 9o dx ,mode1 dx tip 4 3 dx ,mode1 dy egnd 99 o poly(2) (3,0) (4.0) 0 5 .5 ,mde1 1x1 lb 7 99 1700/15)th vc ve \Ap v1n o ,mde1 1x2 175.0256 -1E31E31EOE6 ,enas —1aoEs *1} TEXAS INSTRUMENTS 12051 omcg aox 555m - DALLAS. IEXAS 75255 11 1216,272E- 6 10 99 6.8696E-9 dc 1.3371E—6 vl1m 1K 10 1x1 10 1x2 100.00E3 01.455153 01.455153 1o 10 15051153 14953156 dc 0 dc 75905 dc 75905 dc 0 dc 14.200 dc 14.200 000015—15) 0.00E-1E Rs:
TLV271-Q1, TLV272-Q1, TLV274-Q1
FAMILY OF 550-µA/Ch 3-MHz RAIL-TO-RAIL OUTPUT
OPERATIONAL AMPLIFIERS
SGLS275A − OCTOBER 2004 − REVISED JUNE 2008
16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
macromodel information
Macromodel information provided was derived using Microsim PartsRelease 9.1, the model generation
software used with Microsim PSpice. The Boyle macromodel (see Note 2) and subcircuit in Figure 30 are
generated using TLV27x typical electrical and operating characteristics at TA = 25°C. Using this information,
output simulations of the following key parameters can be generated to a tolerance of 20% (in most cases):
DMaximum positive output voltage swing
DMaximum negative output voltage swing
DSlew rate
DQuiescent power dissipation
DInput bias current
DOpen-loop voltage amplification
DUnity-gain frequency
DCommon-mode rejection ratio
DPhase margin
DDC output resistance
DAC output resistance
DShort-circuit output current limit
NOTE 2: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Integrated Circuit Operational Amplifiers,” IEEE Journal
of Solid-State Circuits, SC-9, 353 (1974).
*DEVICE=amp_tlv27x_highVdd,OP AMP,NJF,INT
* amp_tlv_27x_highVdd operational amplifier ”macromodel”
* subcircuit updated using Model Editor release 9.1 on 05/15/00
* at 14:40 Model Editor is an OrCAD product.
*
* connections: non-inverting input
* | inverting input
* | | positive power supply
* | | | negative power supply
* | | | | output
* | | | | |
.subckt amp_tlv27x_highVdd 1 2 3 4 5
*c1 11 12 457.48E−15
c2 6 7 5.0000E−12
css 10 99 1.1431E−12
dc 5 53 dy
de 54 5 dy
dlp 90 91 dx
dln 92 90 dx
dp 4 3 dx
egnd 99 0 poly(2) (3,0) (4,0) 0 .5 .5
fb 7 99 poly(5) vb vc ve vlp vln 0
176.02E6 −1E3 1E3 180E6
−180E6
ga 6 0 11 12 16.272E−6
gcm 0 6 10 99 6.8698E−9
iss 10 4 dc 1.3371E−6
hlim 90 0 vlim 1K
j1 11 2 10 jx1
J2 12 1 10 jx2
r2 6 9 100.00E3
rd1 3 11 61.456E3
rd2 3 12 61.456E3
ro1 8 5 10
ro2 7 99 10
rp 3 4 150.51E3
rss 10 99 149.58E6
vb 9 0 dc 0
vc 3 53 dc .78905
ve 54 4 dc .78905
vlim 7 8 dc 0
vlp 91 0 dc 14.200
vln 0 92 dc 14.200
.model dx D(Is=800.00E−18)
.model dy D(Is=800.00E−18 Rs=1m Cjo=10p)
.model jx1 NJF(Is=500.00E−15 Beta=198.03E−6 Vto=−1)
.model jx2 NJF(Is=500.00E−15 Beta=198.03E−6 Vto=−1)
.ends
IN− G
D
S
D
S
G
rp
IN+
rd1 rd2 rss egnd fb ro2
ro1
vlim
OUT
ga
ioffgcm
vb
c1
dc
iss
dp
GND
VDD
css
c2
ve de
dlp dln
vlnhlimvlp
10
4
1
11 12
3
53
54
96
8
5
7
91 90 92
vc
99
+
+
+
+
+
+
+
−
−
−
−
−−
−
−+
r2
2
Figure 30. Boyle Macromodel and Subcircuit
PSpice and Parts are trademarks of MicroSim Corporation.
I TEXAS INSTRUMENTS Samples Samples Samples Samples Sample: Sample: Samples Samples
PACKAGE OPTION ADDENDUM
www.ti.com 10-Dec-2020
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead finish/
Ball material
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
TLV271QDBVRQ1 ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 271Q
TLV271QDRG4Q1 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 T271Q1
TLV271QDRQ1 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 T271Q1
TLV272QDRG4Q1 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 T272Q1
TLV272QDRQ1 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 T272Q1
TLV274QDRG4Q1 ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 TLV274Q1
TLV274QDRQ1 ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 TLV274Q1
TLV274QPWRG4Q1 ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 TLV274Q
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
I TEXAS INSTRUMENTS
PACKAGE OPTION ADDENDUM
www.ti.com 10-Dec-2020
Addendum-Page 2
(6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TLV271-Q1, TLV272-Q1, TLV274-Q1 :
•Catalog: TLV271, TLV272, TLV274
NOTE: Qualified Version Definitions:
•Catalog - TI's standard catalog product
l TEXAS INSTRUMENTS REEL DIMENSIONS TAPE DIMENSIONS ’ I+K0 '«PI» Reel Diame|er AD Dimension deSIgned Io accommodate me componem wIdIh E0 Dimension deSIgned Io eecommodaIe me componenI Iengm KO Dlmenslun desIgned to accommodate me componem Ihlckness 7 w OvereII wmm OHhe earner cape i p1 Pitch between successwe cavIIy cemers f T Reel Width (W1) QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE O O O D O O D O SprockeIHoles ,,,,,,,,,,, ‘ User Direcllon 0' Feed Pockel Quadrams
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TLV271QDBVRQ1 SOT-23 DBV 5 3000 180.0 9.0 3.15 3.2 1.4 4.0 8.0 Q3
TLV274QPWRG4Q1 TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 16-Feb-2022
Pack Materials-Page 1
l TEXAS INSTRUMENTS TAPE AND REEL BOX DIMENSIONS
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TLV271QDBVRQ1 SOT-23 DBV 5 3000 182.0 182.0 20.0
TLV274QPWRG4Q1 TSSOP PW 14 2000 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 16-Feb-2022
Pack Materials-Page 2
www.ti.com
PACKAGE OUTLINE
C
0.22
0.08 TYP
0.25
3.0
2.6
2X 0.95
1.9
1.45
0.90
0.15
0.00 TYP
5X 0.5
0.3
0.6
0.3 TYP
8
0 TYP
1.9
A
3.05
2.75
B
1.75
1.45
(1.1)
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
4214839/F 06/2021
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Refernce JEDEC MO-178.
4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.25 mm per side.
0.2 C A B
1
34
5
2
INDEX AREA
PIN 1
GAGE PLANE
SEATING PLANE
0.1 C
SCALE 4.000
www.ti.com
EXAMPLE BOARD LAYOUT
0.07 MAX
ARROUND 0.07 MIN
ARROUND
5X (1.1)
5X (0.6)
(2.6)
(1.9)
2X (0.95)
(R0.05) TYP
4214839/F 06/2021
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
NOTES: (continued)
5. Publication IPC-7351 may have alternate designs.
6. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
SYMM
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
PKG
1
34
5
2
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
SOLDER MASK
DEFINED
EXPOSED METAL
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
EXPOSED METAL
www.ti.com
EXAMPLE STENCIL DESIGN
(2.6)
(1.9)
2X(0.95)
5X (1.1)
5X (0.6)
(R0.05) TYP
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
4214839/F 06/2021
NOTES: (continued)
7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
8. Board assembly site may have different recommendations for stencil design.
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
SYMM
PKG
1
34
5
2
MECHANICAL DATA D U1 4)} 0 (3'4) DLASHC SMALL 0U ¥N¥ 4040047 5/M 06/1‘ NO'ES, A AH Hnec' dimensmrs c'e m 'mc'ves ['nflhmeter5> B Th5 drawer ‘5 subje», ,0 change mm: Home, A Body \cngth docs rm mac mod Hoar, p'omswons, (xv gmc bms Mom mm warmers, or gm buns sha‘ nm exceed 3005 (015) eam swce @ Body mm does 101 meme 11mm fish. E Rdererce JEDEC MS 012 mam AB, nter‘ec: flash sfu‘ not exceed 0017 (043) each swde {If TEXAS INSTRUMENTS www.1i.com
LAND PATTERN DATA D (R7PDSOmGl4) PLASTlC SMALL OUTLINE Example Board Layout Sterlazlogpeulyngs (Mole c) —— <—14x0,55 -hhheb&&t="" tmedddifi§n%="" 5.40="" 5,40="" @eeeeeej="" rfihfl§eflhj="" —=""> ——l 2x1,27 Example Non Soldermask Delined Pad Example Pad Geometry (See Note c) F Example l / Solder Mask Opening 7 0 07 f (See Note E) All Armlnd ,/ tzllmss/E oa/lz NOTES: A. All linear dimensions are in millimeters. a, Tnis drawan is subject to cnonae wl'lhuul notice. c. Publlcutl’on chs7351 is recommended tor alternate desl’gns. D. Laser ctming apertures w‘lth trapezoidal walls and also roundlng comers wlll otter better paste release. Customers should contact their board assembly site for stencil design recommendations, Reter tc ch—7525 lor otner stencil recommendations. E. Customers snoola contact their ooard looricotion site lor solder musk tolerances between ond oroond signol oods. {I} Tums INSTRUMENTS www.li.com
MECHANICAL DATA "7’7 : 3‘ AST‘C SMAH CJ’ N7 HHHHHHH . . ‘7,4’ 44*, A f;—‘ NO'ES' A AH Hnec' dimensmrs c'e m m'\\me(ers Dwmens'amnq cnd tu‘erc'vcmg per ASME w 5M 1994, Tm drawer ‘5 subje», ,o "hangs wnrau: Home, Budy \evvgih ‘ues m W" Le mom Hush, pyuws‘m Ur guts Ms M exceed 0,15 each m & Rudy wde does NM Wands \Mer end flair \Mefiead 'Wclsh shaH um exceed 0‘75 each S‘de E Fa‘s WM" JEDEC M07153 MUM "\u>h, main: bus, 01 guie buns shuH {if TEXAS INSTRUMENTS www.ci.com
PW (RiPDsoicM) LAND PATTERN DATA PLASTHC SMALL OUTLINE Example Board Layout (Male 0) —>| ‘,——12x0 65 HHHHHHHi 5,60 HHHHHHHHi l“ l l l Example Non So‘dermask Defined Pad 4 x 1,60 / H l <—0,07 y/="" ah="" around="" pad="" seamelry="" (see="" nale="" c)="" solder="" mask="" opening="" (see="" note="" e)="" stencil="" 0="" en'ln="" s="" (notepd)="" ‘3="" 14x0="" 30="" h="" '«,lzxo="" 65="" ~hhhhhh~="" 5,60="" hhhhhhh—="" example="" example="" 421128472/6="" 08/15="" notes:="" ah="" h‘lneor="" dimensions="" one="" in="" rnihll'rneters.="" tn‘ls="" dvowing="" is="" subject="" lp="" change="" wltnoul="" nallee.="" publl'cotlon="" hpcjssh="" is="" recommended="" lar="" allemale="" deslgns.="" laser="" cutllng="" apertures="" wch="" tropexoidm="" walls="" and="" also="" raund‘lna="" comers="" wlll="" we!="" better="" pasle="" release="" customers="" show="" contact="" their="" board="" assembly="" sl’te="" (ov="" stenci‘="" design="" recommendations.="" reler="" to="" ”50—7525="" lur="" other="" stencl‘="" recommendotluns="" customers="" shou‘d="" contact="" their="" board="" hoercot'lon="" shte="" (or="" solder="" musk="" tolerances="" between="" and="" around="" s'lgnol="" pods.="" *1?="" tums="" instruments="" www.ti.com="">
‘J
www.ti.com
PACKAGE OUTLINE
C
.228-.244 TYP
[5.80-6.19]
.069 MAX
[1.75]
6X .050
[1.27]
8X .012-.020
[0.31-0.51]
2X
.150
[3.81]
.005-.010 TYP
[0.13-0.25]
0 - 8 .004-.010
[0.11-0.25]
.010
[0.25]
.016-.050
[0.41-1.27]
4X (0 -15 )
A
.189-.197
[4.81-5.00]
NOTE 3
B .150-.157
[3.81-3.98]
NOTE 4
4X (0 -15 )
(.041)
[1.04]
SOIC - 1.75 mm max heightD0008A
SMALL OUTLINE INTEGRATED CIRCUIT
4214825/C 02/2019
NOTES:
1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.
Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed .006 [0.15] per side.
4. This dimension does not include interlead flash.
5. Reference JEDEC registration MS-012, variation AA.
18
.010 [0.25] C A B
5
4
PIN 1 ID AREA
SEATING PLANE
.004 [0.1] C
SEE DETAIL A
DETAIL A
TYPICAL
SCALE 2.800
Yl“‘+
www.ti.com
EXAMPLE BOARD LAYOUT
.0028 MAX
[0.07]
ALL AROUND
.0028 MIN
[0.07]
ALL AROUND
(.213)
[5.4]
6X (.050 )
[1.27]
8X (.061 )
[1.55]
8X (.024)
[0.6]
(R.002 ) TYP
[0.05]
SOIC - 1.75 mm max heightD0008A
SMALL OUTLINE INTEGRATED CIRCUIT
4214825/C 02/2019
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
METAL SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
EXPOSED
METAL
OPENING
SOLDER MASK METAL UNDER
SOLDER MASK
SOLDER MASK
DEFINED
EXPOSED
METAL
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:8X
SYMM
1
45
8
SEE
DETAILS
SYMM
www.ti.com
EXAMPLE STENCIL DESIGN
8X (.061 )
[1.55]
8X (.024)
[0.6]
6X (.050 )
[1.27] (.213)
[5.4]
(R.002 ) TYP
[0.05]
SOIC - 1.75 mm max heightD0008A
SMALL OUTLINE INTEGRATED CIRCUIT
4214825/C 02/2019
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
SOLDER PASTE EXAMPLE
BASED ON .005 INCH [0.125 MM] THICK STENCIL
SCALE:8X
SYMM
SYMM
1
45
8
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