ICS501 Datasheet by Renesas Electronics Corporation

RENESAS 400 MF
DATASHEET
LOCO™ PLL CLOCK MULTIPLIER ICS501
IDT™ / ICS™
LOCO™ PLL CLOCK MULTIPLIER 1
ICS501 REV S 20170331
Description
The ICS501 LOCOTM is the most cost effective way to
generate a high-quality, high-frequency clock output from a
lower frequency crystal or clock input. The name LOCO
stands for Low Cost Oscillator, as it is designed to replace
crystal oscillators in most electronic systems. Using
Phase-Locked Loop (PLL) techniques, the device uses a
standard fundamental mode, inexpensive crystal to
produce output clocks up to 160 MHz.
Stored in the chip’s ROM is the ability to generate nine
different multiplication factors, allowing one chip to output
many common frequencies (see table on page 2).
The device also has an output enable pin which tri-states
the clock output when the OE pin is taken low.
This product is intended for clock generation. It has low
output jitter (variation in the output period), but input to
output skew and jitter are not defined or guaranteed. For
applications which require defined input to output skew, use
the ICS570B.
Features
•Packaged as 8-pin SOIC, MSOP, or die
•RoHS 5 (green) or RoHS 6 (green and lead free)
compliant packaging
•IDT’s lowest cost PLL clock
•Zero ppm multiplication error
•Input crystal frequency of 5 - 27 MHz
•Input clock frequency of 2 - 50 MHz
•Output clock frequencies up to 160 MHz
•Extremely low jitter of 25 ps (one sigma)
•Compatible with all popular CPUs
•Duty cycle of 45/55 up to 160 MHz
•Nine selectable frequencies
•Operating voltage of 3.3 V or 5.0 V
•Tri-state output for board level testing
•25 mA drive capability at TTL levels
•Ideal for oscillator replacement
•Industrial temperature version available
•Advanced, low-power CMOS process
Block Diagram
CLK
PLL Clock
Multiplier
Circuitry
and ROM
Crystal or
Clock input
GND OE
VDD
Crystal
Oscillator
S1:0
X1/ICLK
X2
Optional crystal capacitors
2
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ICS501
LOCO™ PLL CLOCK MULTIPLIER CLOCK MULTIPLIER
IDT™ / ICS™
LOCO™ PLL CLOCK MULTIPLIER 2
ICS501 REV S 20170331
Pin Assignment Clock Output Table
0 = connect directly to ground
1 = connect directly to VDD
M = leave unconnected (floating)
Common Output Frequency Examples (MHz)
Pin Descriptions
X1/ICLK
VDD
GND
OE
S1
S0
CLK
X21
2
3
4
8
7
6
5
8 Pin (150 mil) SOIC
S1 S0 CLK Minimum Input
0 0 4X input per page 5
0 M 5.3125X input 20 MHz
0 1 5X input per page 5
M 0 6.25X input 4 MHz
M M 2X input per page 5
M 1 3.125X input 8 MHz
1 0 6X input per page 5
1 M 3X input per page 5
1 1 8X input per page 5
Output 20 24 30 32 33.33 37.5 40 48 50 60 62.5
Input 10 12 10 16 16.66 12 10 12 16.66 10 20
Selection (S1, S0) M, M M, M 1, M M, M M, M M, 1 0, 0 0, 0 1, M 1, 0 M, 1
Output 64 66.66 72 75 80 83.33 90 100 106.25 120 125
Input 16 16.66 12 12 10 16.66 15 20 20 15 20
Selection (S1, S0) 0, 0 0, 0 1, 0 M, 0 1, 1 0, 1 1, 0 0, 1 0, M 1, 1 M, 0
Pin
Number
Pin
Name
Pin
Type
Pin Description
1 XI/ICLK Input Crystal connection or clock input.
2 VDD Power Connect to +3.3 V or +5 V.
3 GND Power Connect to ground.
4 S1 Tri-level Iinput Select 1 for output clock. Connect to GND or VDD or float.
5 CLK Output Clock output per table above.
6 S0 Tri-level Input Select 0 for output clock. Connect to GND or VDD or float.
7 OE Input Output enable. Tri-states CLK output when low. Internal pull-up.
8 X2 Output Crystal connection. Leave unconnected for clock input.
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ICS501
LOCO™ PLL CLOCK MULTIPLIER CLOCK MULTIPLIER
IDT™ / ICS™
LOCO™ PLL CLOCK MULTIPLIER 3
ICS501 REV S 20170331
External Components
Decoupling Capacitor
As with any high-performance mixed-signal IC, the ICS501
must be isolated from system power supply noise to perform
optimally.
A decoupling capacitor of 0.01µF must be connected
between VDD and the GND. It must be connected close to
the ICS501 to minimize lead inductance. No external power
supply filtering is required for the ICS501.
Series Termination Resistor
A 33 terminating resistor can be used next to the CLK pin
for trace lengths over one inch.
Crystal Load Capacitors
The total on-chip capacitance is approximately 12 pF. A
parallel resonant, fundamental mode crystal should be
used. The device crystal connections should include pads
for small capacitors from X1 to ground and from X2 to
ground. These capacitors are used to adjust the stray
capacitance of the board to match the nominally required
crystal load capacitance. Because load capacitance can
only be increased in this trimming process, it is important to
keep stray capacitance to a minimum by using very short
PCB traces (and no vias) between the crystal and device.
Crystal capacitors, if needed, must be connected from each
of the pins X1 and X2 to ground.
The value (in pF) of these crystal caps should equal (CL -12
pF)*2. In this equation, CL= crystal load capacitance in pF.
Example: For a crystal with a 16 pF load capacitance, each
crystal capacitor would be 8 pF [(16-12) x 2 = 8].
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS501. These ratings, which are
standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these
or any other conditions above those indicated in the operational sections of the specifications is not implied.
Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical
parameters are guaranteed only over the recommended operating temperature range.
Recommended Operation Conditions
Item Rating
Supply Voltage, VDD 7 V
All Inputs and Outputs -0.5 V to VDD+0.5 V
Ambient Operating Temperature -40 to +85C
Storage Temperature -65 to +150C
Soldering Temperature 260C
Parameter Min. Typ. Max. Units
Ambient Operating Temperature (commercial) 0 +70 C
Ambient Operating Temperature (industrial) -40 85 C
Power Supply Voltage (measured in respect to GND) +3.0 +5.25 V
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ICS501
LOCO™ PLL CLOCK MULTIPLIER CLOCK MULTIPLIER
IDT™ / ICS™
LOCO™ PLL CLOCK MULTIPLIER 4
ICS501 REV S 20170331
DC Electrical Characteristics
VDD=5.0 V ±5% , Ambient temperature -40 to +85C, unless stated otherwise
Parameter Symbol Conditions Min. Typ. Max. Units
Operating Voltage VDD 3.0 5.25 V
Input High Voltage, ICLK only VIH ICLK (pin 1) (VDD/2)+1 V
Input Low Voltage, ICLK only VIL ICLK (pin 1) (VDD/2)-1 V
Input High Voltage VIH OE (pin 7) 2.0 V
Input Low Voltage VIL OE (pin 7) 0.8 V
Input High Voltage VIH S0, S1 VDD-0.5 V
Input Low Voltage VIL S0, S1 0.5 V
Output High Voltage VOH IOH = -25 mA 2.4 V
Output Low Voltage VOL IOL = 25 mA 0.4 V
IDD Operating Supply Current, 20 No load, 100M 20 mA
Short Circuit Current CLK output +70 mA
On-Chip Pull-up Resistor Pin 7 270 k
Input Capacitance, S1, S0, and OE Pins 4, 6, 7 4 pF
Nominal Output Impedance 20
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ICS501
LOCO™ PLL CLOCK MULTIPLIER CLOCK MULTIPLIER
IDT™ / ICS™
LOCO™ PLL CLOCK MULTIPLIER 5
ICS501 REV S 20170331
AC Electrical Characteristics
VDD = 5.0 V ±5%, Ambient Temperature -40 to +85 C, unless stated otherwise
Note 1: Measured with 15 pF load.
Thermal Characteristics for 8SOIC
Thermal Characteristics for 8MSOP
Parameter Symbol Conditions Min. Typ. Max. Units
Input Frequency, crystal input FIN 527MHz
Input Frequency, clock input FIN 250MHz
Output Frequency, VDD = 4.75 to 5.25 V FOUT 0C to +70C13 160MHz
-40C to +85C 13 140 MHz
Output Frequency, VDD = 3.0 to 3.6 V FOUT 0C to +70C13 100MHz
-40C to +85C13 90MHz
Output Clock Rise Time tOR 0.8 to 2.0 V, Note 1 1 ns
Output Clock Fall Time tOF 2.0 to 8.0 V, Note 1 1 ns
Output Clock Duty Cycle tOD 1.5 V, up to
160 MHz
45 49-51 55 %
PLL Bandwidth 10 kHz
Output Enable Time, OE high to output
on
50 ns
Output Disable Time, OE low to tri-state 50 ns
Absolute Clock Period Jitter tja Deviation from
mean
+70 ps
One Sigma Clock Period Jitter tjs 25 ps
Parameter Symbol Conditions Min. Typ. Max. Units
Thermal Resistance Junction to
Ambient
JA Still air 150 C/W
JA 1 m/s air flow 140 C/W
JA 3 m/s air flow 120 C/W
Thermal Resistance Junction to Case JC 40 C/W
Thermal Resistance Junction to Top
of Case
JT Still air 20 C/W
Parameter Symbol Conditions Min. Typ. Max. Units
Thermal Resistance Junction to
Ambient
JA Still air 95 C/W
Thermal Resistance Junction to Case JC 48 C/W
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ICS501
LOCO™ PLL CLOCK MULTIPLIER CLOCK MULTIPLIER
IDT™ / ICS™
LOCO™ PLL CLOCK MULTIPLIER 6
ICS501 REV S 20170331
Package Outline and Package Dimensions (8-pin MSOP, 3.00 mm Body)
Package dimensions are kept current with JEDEC Publication No. 95
INDEX
AREA
1 2
8
D
E1 E
SEATING
PLANE
A
1
A
A
2
e
- C -
b
aaa C
c
L
*For reference only. Controlling dimensions in mm.
Millimeters Inches*
Symbol Min Max Min Max
A--1.10--0.043
A1 0 0.15 0 0.006
A2 0.79 0.97 0.031 0.038
b 0.22 0.38 0.008 0.015
C 0.08 0.23 0.003 0.009
D 3.00 BASIC 0.118 BASIC
E 4.90 BASIC 0.193 BASIC
E1 3.00 BASIC 0.118 BASIC
e 0.65 Basic 0.0256 Basic
L 0.40 0.80 0.016 0.032
0808
aaa - 0.10 - 0.004
ICS501
LOCO™ PLL CLOCK MULTIPLIER CLOCK MULTIPLIER
IDT™ / ICS™
LOCO™ PLL CLOCK MULTIPLIER 7
ICS501 REV S 20170331
Package Outline and Package Dimensions (8-pin SOIC, 150 Mil. Narrow Body)
Package dimensions are kept current with JEDEC Publication No. 95
INDEX
AREA
1 2
8
D
E
SEATING
PLANE
A1
A
e
- C -
B
.10 (.004) C
C
L
H
h x 45
*For reference only. Controlling dimensions in mm.
Millimeters Inches*
Symbol Min Max Min Max
A 1.35 1.75 .0532 .0688
A1 0.10 0.25 .0040 .0098
B 0.33 0.51 .013 .020
C 0.19 0.25 .0075 .0098
D 4.80 5.00 .1890 .1968
E 3.80 4.00 .1497 .1574
e 1.27 BASIC 0.050 BASIC
H 5.80 6.20 .2284 .2440
h 0.25 0.50 .010 .020
L 0.40 1.27 .016 .050
0808
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ICS501
LOCO™ PLL CLOCK MULTIPLIER CLOCK MULTIPLIER
IDT™ / ICS™
LOCO™ PLL CLOCK MULTIPLIER 8
ICS501 REV S 20170331
Ordering Information
"LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant.
While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT) assumes no responsibility
for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses
are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range,
high reliability, or other extraordinary environmental requirements are not recommended without additional processing by IDT. IDT reserves the right to
change any circuitry or specifications without notice. IDT does not authorize or warrant any IDT product for use in life support devices or critical medical
instruments.
Part / Order Number Marking Shipping Packaging Package Temperature
501MLF 501MLF Tubes 8-pin SOIC 0 to +70 C
501MLFT 501MLF Tape and Reel 8-pin SOIC 0 to +70 C
501MILF 501MILF Tubes 8-pin SOIC -40 to +85C
501MILFT 501MILF Tape and Reel 8-pin SOIC -40 to +85C
501GLF 01GL Tubes 8-pin MSOP 0 to +70 C
501GLFT 01GL Tape and Reel 8-pin MSOP 0 to +70 C
501GILF 1GIL Tubes 8-pin MSOP -40 to +85C
501GILFT 1GIL Tape and Reel 8-pin MSOP -40 to +85C
501-DWF - Die on uncut, probed wafers 0 to +70 C
501-DPK - Tested die in waffle pack 0 to +70 C
501E-DPK - Tested die in waffle pack 0 to +70 C
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ICS501
LOCO™ PLL CLOCK MULTIPLIER CLOCK MULTIPLIER
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