SN74LVC2G17 Datasheet by Texas Instruments

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SN74LVC2G17
SCES381N JANUARY 2002REVISED JANUARY 2015
SN74LVC2G17 Dual Schmitt-Trigger Buffer
1 Features 3 Description
This dual Schmitt-Trigger buffer is designed for 1.65-
1 Schmitt-Trigger inputs provide hysteresis V to 5.5-V VCC operation.
Available in the Texas Instruments The SN74LVC2G17 device contains two buffers and
NanoFree™ Package performs the Boolean function Y = A. The device
Supports 5-V VCC Operation functions as two independent buffers, but because of
Inputs Accept Voltages to 5.5 V Schmitt action, it may have different input threshold
Max tpd of 5.4 ns at 3.3 V levels for positive-going (VT+) and negative-going
(VT–) signals.
Low Power Consumption, 10-μA Max ICC NanoFree™ package technology is a major
±24-mA Output Drive at 3.3 V breakthrough in IC packaging concepts, using the die
Typical VOLP (Output Ground Bounce) as the package.
< 0.8 V at VCC = 3.3 V, TA= 25°C This device is fully specified for partial-power-down
Typical VOHV (Output VOH Undershoot) applications using Ioff. The Ioff circuitry disables the
> 2 V at VCC = 3.3 V, TA= 25°C outputs, preventing damaging current backflow
• Ioff Supports Live Insertion, Partial-Power-Down through the device when it is powered down.
Mode Operation and Back-Drive Protection
Latch-Up Performance Exceeds 100 mA Device Information(1)
Per JESD 78, Class II PART NUMBER PACKAGE (PIN) BODY SIZE
ESD Protection Exceeds JESD 22 SOT-23 (6) 2.90 mm × 1.60 mm
SC70 (6) 2.00 mm × 1.25 mm
2000-V Human-Body Model
SN74LVC2G17 SON (6) 1.45 mm × 1.00 mm
1000-V Charged-Device Model
SON (6) 1.00 mm × 1.00 mm
2 Applications DSBGA (6) 1.41 mm × 0.91 mm
AV Receivers (1) For all available packages, see the orderable addendum at
the end of the data sheet.
Audio Docks: Portable
Blu-ray Players and Home Theater
MP3 Players/Recorders
Personal Digital Assistants (PDAs)
Power: Telecom/Server AC/DC Supply: Single
Controller: Analog and Digital
Solid State Drives (SSDs): Client and Enterprise
TVs: LCD/Digital and High-Definition (HDTVs)
Tablets: Enterprise
Video Analytics: Server
Wireless Headsets, Keyboards, and Mice
4 Simplified Schematic
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
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SCES381N JANUARY 2002REVISED JANUARY 2015
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Table of Contents
1 Features.................................................................. 19 Detailed Description.............................................. 8
9.1 Overview ................................................................... 8
2 Applications ........................................................... 19.2 Functional Block Diagram......................................... 8
3 Description ............................................................. 19.3 Feature Description................................................... 8
4 Simplified Schematic............................................. 19.4 Device Functional Modes.......................................... 8
5 Revision History..................................................... 210 Application and Implementation.......................... 9
6 Pin Configuration and Functions......................... 310.1 Application Information .......................................... 9
7 Specifications......................................................... 410.2 Typical Power Button Circuit .................................. 9
7.1 Absolute Maximum Ratings ...................................... 411 Power Supply Recommendations ..................... 10
7.2 ESD Ratings.............................................................. 412 Layout................................................................... 10
7.3 Recommended Operating Conditions....................... 412.1 Layout Guidelines ................................................. 10
7.4 Thermal Information.................................................. 512.2 Layout Example .................................................... 11
7.5 Electrical Characteristics .......................................... 513 Device and Documentation Support ................. 12
7.6 Switching Characteristics, –40°C to 85°C ................ 613.1 Trademarks........................................................... 12
7.7 Switching Characteristics, –40°C to 125°C .............. 613.2 Electrostatic Discharge Caution............................ 12
7.8 Operating Characteristics.......................................... 613.3 Glossary................................................................ 12
7.9 Typical Characteristics.............................................. 614 Mechanical, Packaging, and Orderable
8 Parameter Measurement Information .................. 7Information ........................................................... 12
5 Revision History
Changes from Revision M (November 2013) to Revision N Page
Added Applications,Device Information table, Pin Functions table, ESD Ratings table, Thermal Information table,
Typical Characteristics,Feature Description section, Device Functional Modes,Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section.................................................................................................. 1
Changes from Revision L (September 2013) to Revision M Page
Updated document formatting. ............................................................................................................................................... 1
Changed MAX operating temperature to 125°C in Recommended Operating Conditions table. ......................................... 4
Changes from Revision K (July 2012) to Revision L Page
Updated document to new TI data sheet format.................................................................................................................... 1
Added ESD warning. ............................................................................................................................................................ 12
Changes from Revision J (June 2012) to Revision K Page
Updated pin out graphic. ........................................................................................................................................................ 3
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1A
GND
2A
1Y
VCC
2Y
1A
GND
2A
1Y
VCC
2Y
DRY PACKAGE
(TOP VIEW)
DSF PACKAGE
(TOP VIEW)
1
2
34
5
61
2
34
5
6
1
2
34
5
6
1A
GND
2A
1Y
VCC
2Y
YZP PACKAGE
(BOTTOM VIEW)
1A
GND
2A
1Y
VCC
2Y
DCK PACKAGE
(TOP VIEW)
1
2
34
5
6
1A
2A
1Y
VCC
2Y
DBV PACKAGE
(TOP VIEW)
1
2
34
5
6
GND
SN74LVC2G17
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6 Pin Configuration and Functions
Pin Functions
PIN TYPE DESCRIPTION
NAME NO.
1A 1 I Input 1
1Y 6 O Output 1
2A 3 I Input 2
2Y 4 O Output 2
GND 2 Ground
VCC 5 Power Pin
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7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VCC Supply voltage range –0.5 6.5 V
VIInput voltage range(2) –0.5 6.5 V
VOVoltage range applied to any output in the high-impedance or power-off state(2) –0.5 6.5 V
VOVoltage range applied to any output in the high or low state(2)(3) –0.5 VCC + 0.5 V
IIK Input clamp current VI< 0 –50 mA
IOK Output clamp current VO< 0 –50 mA
IOContinuous output current ±50 mA
Continuous current through VCC or GND ±100 mA
TJJunction temperature under bias 150 °C
Tstg Storage temperature range –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The value of VCC is provided in the Recommended Operating Conditions table.
7.2 ESD Ratings
VALUE UNIT
Human-Body Model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(2) 2000 V
VESD (1) Charged-Device Model (CDM), per JEDEC specification JESD22-C101, all 1000 V
pins(3)
(1) Electrostatic discharge (ESD) to measure device sensitivity and immunity to damage caused by assembly line electrostatic discharges in
to the device.
(2) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(3) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VCC Supply voltage Operating 1.65 5.5 V
VIInput voltage 0 5.5 V
VOOutput voltage 0 VCC V
VCC = 1.65 V –4
VCC = 2.3 V –8
IOH High-level output current –16 mA
VCC = 3 V –24
VCC = 4.5 V –32
VCC = 1.65 V 4
VCC = 2.3 V 8
IOL Low-level output current 16 mA
VCC = 3 V 24
VCC = 4.5 V 32
TAOperating free-air temperature –40 125 °C
(1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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7.4 Thermal Information
SN74LVC2G17
THERMAL METRIC(1) DBV DCK YZP DRY DSF UNIT
6 PINS
RθJA Junction-to-ambient thermal resistance(2) 165 259 123 234 300 °C/W
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) The package thermal impedance is calculated in accordance with JESD 51-7.
7.5 Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
–40°C to 85°C –40°C to 125°C
PARAMETER TEST CONDITIONS VCC UNIT
MIN TYP(1) MAX MIN TYP(1) MAX
1.65 V 0.7 1.4 0.7 1.4
2.3 V 1.0 1.7 1.0 1.7
VT+
Positive-going 3 V 1.3 2.0 1.3 2.0 V
input threshold
voltage 4.5 V 1.9 3.1 1.9 3.1
5.5 V 2.2 3.7 2.2 3.7
1.65 V 0.3 0.7 0.3 0.7
2.3 V 0.4 1 0.4 1.0
VT–
Negative-going 3 V 0.8 1.3 0.8 1.3 V
input threshold
voltage 4.5 V 1.1 2 1.1 2.0
5.5 V 1.4 2.5 1.4 2.5
1.65 V 0.3 0.8 0.3 0.8
2.3 V 0.4 0.9 0.35 0.9
ΔVT
Hysteresis 3 V 0.4 1.1 0.4 1.1 V
(VT+ – VT–)4.5 V 0.6 1.3 0.6 1.3
5.5 V 0.7 1.4 0.7 1.4
IOH = –100 μA 1.65 V to 5.5 V VCC – 0.1 VCC – 0.1
IOH = –4 mA 1.65 V 1.2 1.2
IOH = –8 mA 2.3 V 1.9 1.9
VOH V
IOH = –16 mA 2.4 2.4
3 V
IOH = –24 mA 2.3 2.3
IOH = –32 mA 4.5 V 3.8 3.8
IOL = 100 μA 1.65 V to 5.5 V 0.1 0.1
IOL = 4 mA 1.65 V 0.45 0.45
IOL = 8 mA 2.3 V 0.3 0.3
VOL V
IOL = 16 mA 0.4 0.4
3 V
IOL = 24 mA 0.55 0.55
IOL = 32 mA 4.5 V 0.55 0.55
IIA input VI= 5.5 V or GND 0 to 5.5 V ±5 ±5 μA
Ioff VIor VO= 5.5 V 0 ±10 ±10 μA
ICC VI= 5.5 V or GND, IO= 0 1.65 V to 5.5 V 10 10 μA
One input at VCC – 0.6 V,
ΔICC 3 V to 5.5 V 500 500 μA
Other inputs at VCC or GND
CiVI= VCC or GND 3.3 V 4 4 pF
(1) All typical values are at VCC = 3.3 V, TA= 25°C.
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2
4
6
8
10
12
14
0 50 100 150 200 250 300
CL– Load Capacitance – pF
VCC = 3 V,
TA= 25°C
One Output Switching
t Propagation Delay Time ns
pd
2
4
6
8
10
0 50 100 150 200 250 300
CL– Load Capacitance – pF
t Propagation Delay Time ns
pd
VCC = 3 V,
TA= 25°C
One Output Switching
SN74LVC2G17
SCES381N JANUARY 2002REVISED JANUARY 2015
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7.6 Switching Characteristics, –40°C to 85°C
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 3)
–40°C to 85°C
FROM TO VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V VCC = 5 V
PARAMETER UNIT
(INPUT) (OUTPUT) ± 0.15 V ± 0.2 V ± 0.3 V ± 0.5 V
MIN MAX MIN MAX MIN MAX MIN MAX
tpd A Y 3.9 9.3 1.9 5.7 2.2 5.4 1.5 4.3 ns
7.7 Switching Characteristics, –40°C to 125°C
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 3)
–40°C to 125°C
FROM TO VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V VCC = 5 V
PARAMETER UNIT
(INPUT) (OUTPUT) ± 0.15 V ± 0.2 V ± 0.3 V ± 0.5 V
MIN MAX MIN MAX MIN MAX MIN MAX
tpd A Y 3.9 9.8 1.9 6.2 2.2 5.9 1.5 4.8 ns
7.8 Operating Characteristics
TA= 25°C
VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V VCC = 5 V
PARAMETER TEST CONDITIONS UNIT
TYP TYP TYP TYP
Cpd Power dissipation capacitance f = 10 MHz 17 18 19 21 pF
7.9 Typical Characteristics
Figure 1. Propagation Delay (Low to High Transition) Figure 2. Propagation Delay (High to Low Transition)
vs Load Capacitance vs Load Capacitance
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8 Parameter Measurement Information
Figure 3. Load Circuit and Voltage Waveforms
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9 Detailed Description
9.1 Overview
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the
package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
9.2 Functional Block Diagram
9.3 Feature Description
1.65 V to 5.5 V operating voltage range
Allows down voltage translation
5 V to 3.3 V
5 V or 3.3 V to 1.8 V
Inputs accept voltages to 5.5 V
5-V tolerance on input pin
• Ioff feature
Allows voltage on the inputs and outputs when VCC is 0 V
Able to reduce leakage when VCC is 0 V
Schmitt-Trigger Input can improve the noise immunity capability
9.4 Device Functional Modes
INPUT OUTPUT
A Y
H H
L L
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D
Q
QCLR
PRE
CLK
GND
VCC
3 V
MCU
GND
2Y
1A
2A
1Y
3 V
SN74LVC1G74
SN74LVC2G17
3 V
VCC
SN74LVC2G17
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10 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
The SN74LVC2G17 device contains two buffers and performs the Boolean function Y = A. The device functions
as two independent buffers, but because of Schmitt action, it may have different input threshold levels for
positive-going (VT+) and negative-going (VT–) signals.
10.2 Typical Power Button Circuit
Figure 4. Device Power Button Circuit
10.2.1 Design Requirements
This device uses CMOS technology and has balanced output drive. Care should be taken to avoid bus
contention because it can drive currents that would exceed maximum limits. Outputs can be combined to
produce higher drive but the high drive will also create faster edges into light loads so routing and load conditions
should be considered to prevent ringing.
10.2.2 Detailed Design Procedure
1. Recommended Input Conditions:
For rise time and fall time specifications, see (Δt/ΔV) in Recommended Operating Conditions table.
For specified high and low levels, see (VIH and VIL)inRecommended Operating Conditions table.
Inputs are overvoltage tolerant allowing them to go as high as 5.5 V at any valid VCC.
2. Recommend Output Conditions:
Load currents should not exceed 50 mA per output and 100 mA total for the part.
Series resistors on the output may be used if the user desires to slow the output edge signal or limit the
output current.
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–100
–80
–60
–40
–20
0
20
40
60
–1 –0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
TA= 25°C, VCC = 3 V,
VIH = 3 V, VIL = 0 V,
All Outputs Switching
VOH – V
IOH mA
VOL – V
–20
0
20
40
60
80
100
–0.2 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
TA= 25°C, VCC = 3 V,
VIH = 3 V, VIL = 0 V,
All Outputs Switching
IOL mA
SN74LVC2G17
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Typical Power Button Circuit (continued)
10.2.3 Application Curves
Figure 6. Output Current Drive
Figure 5. Output Current Drive vs LOW-level Output Voltage
vs HIGH-level Output Voltage
11 Power Supply Recommendations
The power supply can be any voltage between the MIN and MAX supply voltage rating located in the
Recommended Operating Conditions table.
Each VCC terminal should have a good bypass capacitor to prevent power disturbance. For devices with a single
supply, a 0.1 μF capacitor is recommended. If there are multiple VCC terminals then 0.01 μF or 0.022 μF
capacitors are recommended for each power terminal. It is ok to parallel multiple bypass capacitors to reject
different frequencies of noise. Multiple bypass capacitors may be paralleled to reject different frequencies of
noise. The bypass capacitor should be installed as close to the power terminal as possible for the best results.
12 Layout
12.1 Layout Guidelines
When using multiple bit logic devices, inputs should not float. In many cases, functions or parts of functions of
digital logic devices are unused. Some examples are when only two inputs of a triple-input AND gate are used,
or when only 3 of the 4-buffer gates are used. Such input pins should not be left unconnected because the
undefined voltages at the outside connections result in undefined operational states.
Specified in Figure 7 are rules that must be observed under all circumstances. All unused inputs of digital logic
devices must be connected to a high or low bias to prevent them from floating. The logic level that should be
applied to any particular unused input depends on the function of the device. Generally they will be tied to GND
or VCC, whichever makes more sense or is more convenient.
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VCC
Unused Input
Input
Output Output
Input
Unused Input
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12.2 Layout Example
Figure 7. Layout Diagram
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13 Device and Documentation Support
13.1 Trademarks
NanoFree is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
13.2 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
13.3 Glossary
SLYZ022 TI Glossary.
This glossary lists and explains terms, acronyms and definitions.
14 Mechanical, Packaging, and Orderable Information
The following pages include mechanical packaging and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser based versions of this data sheet, refer to the left hand navigation.
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PACKAGE OPTION ADDENDUM
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Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead finish/
Ball material
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
SN74LVC2G17DBVR ACTIVE SOT-23 DBV 6 3000 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 125 (C175, C17F, C17K,
C17R)
SN74LVC2G17DBVT ACTIVE SOT-23 DBV 6 250 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 125 (C175, C17F, C17K,
C17R)
SN74LVC2G17DBVTG4 ACTIVE SOT-23 DBV 6 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 (C17F, C17R)
SN74LVC2G17DCK3 ACTIVE SC70 DCK 6 3000 RoHS &
Non-Green SNBI Level-1-260C-UNLIM -40 to 85 (C7F, C7Z)
SN74LVC2G17DCKR ACTIVE SC70 DCK 6 3000 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 125 (C75, C7F, C7J, C7
K, C7R)
SN74LVC2G17DCKRE4 ACTIVE SC70 DCK 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 C75
SN74LVC2G17DCKRG4 ACTIVE SC70 DCK 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 C75
SN74LVC2G17DCKT ACTIVE SC70 DCK 6 250 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 125 (C75, C7F, C7J, C7
K, C7R)
SN74LVC2G17DCKTE4 ACTIVE SC70 DCK 6 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 C75
SN74LVC2G17DCKTG4 ACTIVE SC70 DCK 6 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 C75
SN74LVC2G17DRYR ACTIVE SON DRY 6 5000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 C7
SN74LVC2G17DSF2 ACTIVE SON DSF 6 5000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 C7
SN74LVC2G17DSFR ACTIVE SON DSF 6 5000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 C7
SN74LVC2G17YZPR ACTIVE DSBGA YZP 6 3000 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 85 (C77, C7N)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
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Addendum-Page 2
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN74LVC2G17 :
Automotive: SN74LVC2G17-Q1
Enhanced Product: SN74LVC2G17-EP
NOTE: Qualified Version Definitions:
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
Enhanced Product - Supports Defense, Aerospace and Medical Applications
l TEXAS INSTRUMENTS REEL DIMENSIONS TAPE DIMENSIONS Reel Dlameter Cavtty AD Dimension destgned to accommodate the component wmth Eu Dimension destgned to accommodate the componenl tengtn K0 Dtmenston destgned to accommodate the component thickness 7 w Ovevau with at the earner tape i Pt Pttch between successtve cavtty cemers i T ReelWidIh(W1) QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE C) O O O C) O O O ispmcketHutes —> User Dtrecllnn 0' Feed \1/ Pockel Quadrams
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
SN74LVC2G17DBVR SOT-23 DBV 6 3000 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3
SN74LVC2G17DBVR SOT-23 DBV 6 3000 178.0 9.2 3.3 3.23 1.55 4.0 8.0 Q3
SN74LVC2G17DBVR SOT-23 DBV 6 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
SN74LVC2G17DBVT SOT-23 DBV 6 250 178.0 9.2 3.3 3.23 1.55 4.0 8.0 Q3
SN74LVC2G17DBVT SOT-23 DBV 6 250 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3
SN74LVC2G17DBVTG4 SOT-23 DBV 6 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
SN74LVC2G17DCKR SC70 DCK 6 3000 180.0 8.4 2.41 2.41 1.2 4.0 8.0 Q3
SN74LVC2G17DCKR SC70 DCK 6 3000 178.0 9.0 2.4 2.5 1.2 4.0 8.0 Q3
SN74LVC2G17DCKR SC70 DCK 6 3000 178.0 9.0 2.4 2.5 1.2 4.0 8.0 Q3
SN74LVC2G17DCKR SC70 DCK 6 3000 178.0 9.2 2.4 2.4 1.22 4.0 8.0 Q3
SN74LVC2G17DCKRG4 SC70 DCK 6 3000 178.0 9.2 2.4 2.4 1.22 4.0 8.0 Q3
SN74LVC2G17DCKT SC70 DCK 6 250 180.0 8.4 2.41 2.41 1.2 4.0 8.0 Q3
SN74LVC2G17DCKT SC70 DCK 6 250 178.0 9.0 2.4 2.5 1.2 4.0 8.0 Q3
SN74LVC2G17DCKT SC70 DCK 6 250 178.0 9.2 2.4 2.4 1.22 4.0 8.0 Q3
SN74LVC2G17DCKTG4 SC70 DCK 6 250 178.0 9.2 2.4 2.4 1.22 4.0 8.0 Q3
SN74LVC2G17DRYR SON DRY 6 5000 180.0 9.5 1.15 1.6 0.75 4.0 8.0 Q1
SN74LVC2G17DSF2 SON DSF 6 5000 180.0 9.5 1.16 1.16 0.5 4.0 8.0 Q3
SN74LVC2G17DSFR SON DSF 6 5000 180.0 9.5 1.16 1.16 0.5 4.0 8.0 Q2
PACKAGE MATERIALS INFORMATION
www.ti.com 27-Oct-2021
Pack Materials-Page 1
l TEXAS INSTRUMENTS TAPE AND REEL BOX DIMENSIONS
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
SN74LVC2G17YZPR DSBGA YZP 6 3000 178.0 9.2 1.02 1.52 0.63 4.0 8.0 Q1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN74LVC2G17DBVR SOT-23 DBV 6 3000 202.0 201.0 28.0
SN74LVC2G17DBVR SOT-23 DBV 6 3000 180.0 180.0 18.0
SN74LVC2G17DBVR SOT-23 DBV 6 3000 180.0 180.0 18.0
SN74LVC2G17DBVT SOT-23 DBV 6 250 180.0 180.0 18.0
SN74LVC2G17DBVT SOT-23 DBV 6 250 202.0 201.0 28.0
SN74LVC2G17DBVTG4 SOT-23 DBV 6 250 180.0 180.0 18.0
SN74LVC2G17DCKR SC70 DCK 6 3000 202.0 201.0 28.0
SN74LVC2G17DCKR SC70 DCK 6 3000 180.0 180.0 18.0
SN74LVC2G17DCKR SC70 DCK 6 3000 180.0 180.0 18.0
SN74LVC2G17DCKR SC70 DCK 6 3000 180.0 180.0 18.0
SN74LVC2G17DCKRG4 SC70 DCK 6 3000 180.0 180.0 18.0
SN74LVC2G17DCKT SC70 DCK 6 250 202.0 201.0 28.0
SN74LVC2G17DCKT SC70 DCK 6 250 180.0 180.0 18.0
SN74LVC2G17DCKT SC70 DCK 6 250 180.0 180.0 18.0
SN74LVC2G17DCKTG4 SC70 DCK 6 250 180.0 180.0 18.0
SN74LVC2G17DRYR SON DRY 6 5000 184.0 184.0 19.0
PACKAGE MATERIALS INFORMATION
www.ti.com 27-Oct-2021
Pack Materials-Page 2
l TEXAS INSTRUMENTS
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN74LVC2G17DSF2 SON DSF 6 5000 184.0 184.0 19.0
SN74LVC2G17DSFR SON DSF 6 5000 184.0 184.0 19.0
SN74LVC2G17YZPR DSBGA YZP 6 3000 220.0 220.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 27-Oct-2021
Pack Materials-Page 3
MECHANICAL DATA DCK (R-PDSO-GS) PLASTIC SMALL-OUTLINE PACKAGE E 18’) 6 4 7 H Fl H ‘fi «40 1233 \ ’i’ To enugemane Seanng Mane Pm 1/ ' ‘ ' ‘ ‘ maexArea Wm H m} j; / ‘ u / Um "4L 1—]; f Scamg Mane \\ \ / 31 409555574/8 U‘ /200/ , m m hmeters AH \mec' mmens‘mrs Tm drawmq \s sumsc: 0 change wmu: nome Body mmensmns do nut mc‘ude mom flcsh m aroms'm Mom Has» and pruvuswon W m exceed 015 :2r m FuHs an JFDFC M07763 vunuhcn AB NO'FS Umm> INSrRUMEm-s www.1i.com
LAND PATTERN DATA 7PJSOiC6> PLASTC SMALL OU’LME NOTES' maop> Exc'm‘e Boc'd Luyum stem Openings Based or a stencfl hickncss uf 127mm (005mm) * 1* :E /23\\der Musk Cpen‘wg “ 2m Geometry M \meur dimensmns are m m'flhrvete's Th's drawqu is sweat (a chc'vge mm: 'vuhce Custume's shoud p‘uce a new 01 We cvcmt buurd (abr'cahun c'awmg rm :0 uHer the ce'fle' smder musk defined and, ”Jbficuhon \PC77351 is reco'n'nended (Dr uHernme designs Laser cumrg opc'mvcs mm "apczmda wuHs and mo rouncmq corners wm am bcncr aosxc recuscv mstomcrs show can thew Guard assemwy sue for gene design recommencnmons Exomme sxercu deswgw basec on a 50% vo‘umemc bad My paste M‘cr m M4523 var other new rccowmcwdatnrs. ' hams Q‘ INSTRUMENTS www.li.com
3: fig,
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PACKAGE OUTLINE
C
0.22
0.08 TYP
0.25
3.0
2.6
2X 0.95
1.45 MAX
0.15
0.00 TYP
6X 0.50
0.25
0.6
0.3 TYP
8
0 TYP
1.9
A
3.05
2.75
B
1.75
1.45
(1.1)
SOT-23 - 1.45 mm max heightDBV0006A
SMALL OUTLINE TRANSISTOR
4214840/C 06/2021
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Body dimensions do not include mold flash or protrusion. Mold flash and protrusion shall not exceed 0.25 per side.
4. Leads 1,2,3 may be wider than leads 4,5,6 for package orientation.
5. Refernce JEDEC MO-178.
0.2 C A B
1
34
5
2
INDEX AREA
PIN 1
6
GAGE PLANE
SEATING PLANE
0.1 C
SCALE 4.000
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EXAMPLE BOARD LAYOUT
0.07 MAX
ARROUND 0.07 MIN
ARROUND
6X (1.1)
6X (0.6)
(2.6)
2X (0.95)
(R0.05) TYP
4214840/C 06/2021
SOT-23 - 1.45 mm max heightDBV0006A
SMALL OUTLINE TRANSISTOR
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
SYMM
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
PKG
1
34
5
2
6
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
SOLDER MASK
DEFINED
EXPOSED METAL
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
EXPOSED METAL
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EXAMPLE STENCIL DESIGN
(2.6)
2X(0.95)
6X (1.1)
6X (0.6)
(R0.05) TYP
SOT-23 - 1.45 mm max heightDBV0006A
SMALL OUTLINE TRANSISTOR
4214840/C 06/2021
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
SYMM
PKG
1
34
5
2
6
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PACKAGE OUTLINE
C
0.5 MAX
0.19
0.15
1
TYP
0.5 TYP
6X 0.25
0.21
0.5
TYP
B E A
D
4219524/A 06/2014
DSBGA - 0.5 mm max heightYZP0006
DIE SIZE BALL GRID ARRAY
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. NanoFreeTM package configuration.
NanoFree Is a trademark of Texas Instruments.
BALL A1
CORNER
SEATING PLANE
BALL TYP 0.05 C
B
A
12
0.015 C A B
SYMM
SYMM
C
SCALE 9.000
D: Max =
E: Max =
1.418 mm, Min =
0.918 mm, Min =
1.357 mm
0.857 mm
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EXAMPLE BOARD LAYOUT
6X ( )0.225 (0.5) TYP
(0.5) TYP
()
METAL
0.225 0.05 MAX
SOLDER MASK
OPENING
METAL
UNDER
MASK
()
SOLDER MASK
OPENING
0.225
0.05 MIN
4219524/A 06/2014
DSBGA - 0.5 mm max heightYZP0006
DIE SIZE BALL GRID ARRAY
NOTES: (continued)
4. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints.
For more information, see Texas Instruments literature number SBVA017 (www.ti.com/lit/sbva017).
SYMM
SYMM
LAND PATTERN EXAMPLE
SCALE:40X
12
A
B
C
NON-SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
NOT TO SCALE
SOLDER MASK
DEFINED
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EXAMPLE STENCIL DESIGN
(0.5)
TYP
(0.5) TYP
6X ( 0.25) (R ) TYP0.05
METAL
TYP
4219524/A 06/2014
DSBGA - 0.5 mm max heightYZP0006
DIE SIZE BALL GRID ARRAY
NOTES: (continued)
5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.
SYMM
SYMM
SOLDER PASTE EXAMPLE
BASED ON 0.1 mm THICK STENCIL
SCALE:40X
12
A
B
C
I TEXAS INSTRUMENTS
GENERIC PACKAGE VIEW
Images above are just a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.
DRY 6 USON - 0.6 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
4207181/G
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PACKAGE OUTLINE
C
6X 0.25
0.15
4X
0.5
5X 0.35
0.25
2X
1
0.6 MAX
0.05
0.00
3X 0.6
0.4
0.3
B1.05
0.95 A
1.5
1.4
(0.05) TYP (0.127) TYP
4222894/A 01/2018
USON - 0.6 mm max heightDRY0006A
PLASTIC SMALL OUTLINE - NO LEAD
PIN 1 INDEX AREA
SEATING PLANE
0.08 C
1
34
6
(OPTIONAL)
PIN 1 ID
0.1 C A B
0.05 C
SYMM
SYMM
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
SCALE 8.500
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EXAMPLE BOARD LAYOUT
0.05 MIN
ALL AROUND
0.05 MAX
ALL AROUND
5X (0.3)
6X (0.2)
4X (0.5)
(0.6)
(R0.05) TYP
(0.35)
4222894/A 01/2018
USON - 0.6 mm max heightDRY0006A
PLASTIC SMALL OUTLINE - NO LEAD
SYMM
1
34
6
SYMM
LAND PATTERN EXAMPLE
1:1 RATIO WITH PKG SOLDER PADS
EXPOSED METAL SHOWN
SCALE:40X
NOTES: (continued)
3. For more information, see QFN/SON PCB application report in literature No. SLUA271 (www.ti.com/lit/slua271).
METAL
SOLDER MASK
OPENING
SOLDER MASK DETAILS
NON SOLDER MASK
DEFINED
EXPOSED
METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
SOLDER MASK
DEFINED
(PREFERRED)
EXPOSED
METAL
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EXAMPLE STENCIL DESIGN
5X (0.3)
6X (0.2)
4X (0.5)
(0.6)
(R0.05) TYP
(0.35)
4222894/A 01/2018
USON - 0.6 mm max heightDRY0006A
PLASTIC SMALL OUTLINE - NO LEAD
NOTES: (continued)
4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
SOLDER PASTE EXAMPLE
BASED ON 0.075 - 0.1 mm THICK STENCIL
SCALE:40X
SYMM
1
34
6
SYMM
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PACKAGE OUTLINE
C
6X 0.22
0.12
6X 0.45
0.35
2X
0.7 4X
0.35
0.4 MAX
0.05
0.00
B1.05
0.95 A
1.05
0.95
(0.11) TYP
(0.1)
PIN 1 ID
4220597/B 06/2022
X2SON - 0.4 mm max heightDSF0006A
PLASTIC SMALL OUTLINE - NO LEAD
PIN 1 INDEX AREA
SEATING PLANE
0.05 C
1
34
6
0.07 C B A
0.05 C
SYMM
SYMM
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Reference JEDEC registration MO-287, variation X2AAF.
SCALE 10.000
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EXAMPLE BOARD LAYOUT
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
6X (0.6)
6X (0.17)
4X (0.35)
(0.8)
(R0.05) TYP
X2SON - 0.4 mm max heightDSF0006A
PLASTIC SMALL OUTLINE - NO LEAD
4220597/B 06/2022
SOLDER MASK
OPENING
SOLDER MASK
OPENING
NOTES: (continued)
4. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271).
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:40X
SYMM
SYMM
1
34
6
EXPOSED METAL
METAL
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
EXPOSED METAL
METAL UNDER
SOLDER MASK
SOLDER MASK
DEFINED
““‘+“‘w‘
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EXAMPLE STENCIL DESIGN
6X (0.6)
6X (0.15)
4X (0.35)
(0.8)
(R0.05) TYP
X2SON - 0.4 mm max heightDSF0006A
PLASTIC SMALL OUTLINE - NO LEAD
4220597/B 06/2022
4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
SOLDER PASTE EXAMPLE
BASED ON 0.09 mm THICK STENCIL
PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE
SCALE:40X
SYMM
SYMM
1
34
6
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