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ADUM1200,01 Datasheet by Analog Devices Inc.
ANALOG
DEVICES
Dual-Channel Digital Isolators
Data Sheet ADuM1200/ADuM1201
Rev. K Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
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Tel: 781.329.4700 ©2004–2016 Analog Devices, Inc. All rights reserved.
Technical Support www.analog.com
FEATURES
Narrow body, RoHS-compliant, SOIC 8-lead package
Low power operation
5 V operation
1.1 mA per channel maximum at 0 Mbps to 2 Mbps
3.7 mA per channel maximum at 10 Mbps
8.2 mA per channel maximum at 25 Mbps
3 V operation
0.8 mA per channel maximum at 0 Mbps to 2 Mbps
2.2 mA per channel maximum at 10 Mbps
4.8 mA per channel maximum at 25 Mbps
Bidirectional communication
3 V/5 V level translation
High temperature operation: 125°C
High data rate: dc to 25 Mbps (NRZ)
Precise timing characteristics
3 ns maximum pulse width distortion
3 ns maximum channel-to-channel matching
High common-mode transient immunity: >25 kV/μs
Safety and regulatory approvals
UL recognition
2500 V rms for 1 minute per UL 1577
CSA Component Acceptance Notice 5A
VDE Certificate of Conformity
DIN V VDE V 0884-10 (VDE V 0884-10): 2006-12
VIORM = 560 V peak
Qualified for automotive applications
APPLICATIONS
Size-critical multichannel isolation
SPI interface/data converter isolation
RS-232/RS-422/RS-485 transceiver isolation
Digital field bus isolation
Hybrid electric vehicles, battery monitor, and motor drive
GENERAL DESCRIPTION
The ADuM1200/ADuM12011 are dual-channel digital isolators
based on the Analog Devices, Inc., iCoupler® technology.
Combining high speed CMOS and monolithic transformer
technologies, these isolation components provide outstanding
performance characteristics superior to alternatives, such as
optocouplers.
By avoiding the use of LEDs and photodiodes, iCoupler devices
remove the design difficulties commonly associated with opto-
couplers.
The typical optocoupler concerns regarding uncertain current
transfer ratios, nonlinear transfer functions, and temperature and
lifetime effects are eliminated with the simple iCoupler digital
interfaces and stable performance characteristics. The need for
external drivers and other discrete components is eliminated
with these iCoupler products. Furthermore, iCoupler devices
consume one-tenth to one-sixth the power of optocouplers at
comparable signal data rates.
The ADuM1200/ADuM1201 isolators provide two independent
isolation channels in a variety of channel configurations and
data rates (see the Ordering Guide). Both devices operate with
the supply voltage on either side ranging from 2.7 V to 5.5 V,
providing compatibility with lower voltage systems as well as
enabling a voltage translation functionality across the isolation
barrier. In addition, the ADuM1200/ADuM1201 provide low
pulse width distortion (<3 ns for CR grade) and tight channel-
to-channel matching (<3 ns for CR grade). Unlike other
optocoupler alternatives, the ADuM1200/ADuM1201 isolators
have a patented refresh feature that ensures dc correctness in
the absence of input logic transitions and during power-
up/power-down conditions.
The ADuM1200W and ADuM1201W are automotive grade
versions qualified for 125°C operation. See the Automotive
Products section for more information.
FUNCTIONAL BLOCK DIAGRAMS
ENCODE DECODE
ENCODE DECODE
V
DD1
V
IA
V
IB
G
ND
1
V
DD2
V
OA
V
OB
GND
2
1
2
3
4
8
7
6
5
04642-001
Figure 1. ADuM1200 Functional Block Diagram
ENCODE DECODE
DECODE ENCODE
V
DD1
V
OA
V
IB
G
ND
1
V
DD2
V
IA
V
OB
GND
2
1
2
3
4
8
7
6
5
04642-002
Figure 2. ADuM1201 Functional Block Diagram
1 Protected by U.S. Patents 5,952,849; 6,873,065; 6,903,578; and 7,075,329.
ADuM1200/ADuM1201 Data Sheet
Rev. K | Page 2 of 28
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagrams ............................................................. 1
Revision History ............................................................................... 3
Specifications ..................................................................................... 4
Electrical Characteristics—5 V, 105°C Operation ................... 4
Electrical Characteristics—3 V, 105°C Operation ................... 6
Electrical Characteristics—Mixed 5 V/3 V or 3 V/5 V, 105°C
Operation ....................................................................................... 8
Electrical Characteristics—5 V, 125°C Operation ................. 11
Electrical Characteristics—3 V, 125°C Operation ................. 13
Electrical Characteristics—Mixed 5 V/3 V, 125°C Operation
....................................................................................................... 15
Electrical Characteristics—Mixed 3 V/5 V, 125°C Operation
....................................................................................................... 17
Package Characteristics ............................................................. 19
Regulatory Information ............................................................. 19
Insulation and Safety-Related Specifications .......................... 19
DIN V VDE V 0884-10 (VDE V 0884-10): 2006-12
Insulation Characteristics ......................................................... 20
Recommended Operating Conditions .................................... 20
Absolute Maximum Ratings ......................................................... 21
ESD Caution................................................................................ 21
Pin Configurations and Function Descriptions ......................... 22
Typical Performance Characteristics ........................................... 23
Applications Information .............................................................. 24
PCB Layout ................................................................................. 24
Propagation Delay-Related Parameters ................................... 24
DC Correctness and Magnetic Field Immunity........................... 24
Power Consumption .................................................................. 25
Insulation Lifetime ..................................................................... 25
Outline Dimensions ....................................................................... 27
Ordering Guide .......................................................................... 27
Automotive Products ................................................................. 28
Data Sheet ADuM1200/ADuM1201
Rev. K | Page 3 of 28
REVISION HISTORY
9/2016—Rev. J to Rev. K
Changes to Endnote 1 and Endnote 2, Table 9 ............................ 19
5/2015—Rev. I to Rev. J
Changes to Table 9 .......................................................................... 19
Change to Tracking Resistance (Comparative Tracking Index)
Parameter and Isolation Group Parameter, Table 10 .................. 20
3/2012—Rev. H to Rev. I
Created Hyperlink for Safety and Regulatory Approvals
Entry in Features Section ................................................................. 1
Change to General Description Section ......................................... 1
Change to PCB Layout Section ..................................................... 24
Moved Automotive Products Section ........................................... 28
1/2009—Rev. G to Rev. H
Changes to Table 5, Switching Specifications Parameter ........... 13
Changes to Table 6, Switching Specifications Parameter ........... 15
Changes to Table 7, Switching Specifications Parameter ........... 17
9/2008—Rev. F to Rev. G
Changes to Table 9 .......................................................................... 19
Changes to Table 13 ........................................................................ 21
Changes to Ordering Guide ........................................................... 27
3/2008—Rev. E to Rev. F
Changes to Features Section ............................................................ 1
Changes to Applications Section ..................................................... 1
Added Table 4 .................................................................................. 11
Added Table 5 .................................................................................. 13
Added Table 6 .................................................................................. 15
Added Table 7 .................................................................................. 17
Changes to Table 12 ........................................................................ 20
Changes to Table 13 ........................................................................ 21
Added Automotive Products Section ........................................... 26
Changes to Ordering Guide ........................................................... 27
11/2007—Rev. D to Rev. E
Changes to Note 1 ............................................................................. 1
Added ADuM1200/ADuM1201AR Change vs. Temperature
Parameter ........................................................................................... 3
Added ADuM1200/ADuM1201AR Change vs. Temperature
Parameter ........................................................................................... 5
Added ADuM1200/ADuM1201AR Change vs. Temperature
Parameter ........................................................................................... 8
8/2007—Rev. C to Rev. D
Updated VDE Certification Throughout ....................................... 1
Changes to Features, Note 1, Figure 1, and Figure 2 .................... 1
Changes to Table 3 ............................................................................ 7
Changes to Regulatory Information Section ............................... 10
Added Table 10 ................................................................................ 12
Added Insulation Lifetime Section ............................................... 16
Updated Outline Dimensions........................................................ 18
Changes to Ordering Guide ........................................................... 18
2/2006—Rev. B to Rev. C
Updated Format ................................................................. Universal
Added Note 1 ..................................................................................... 1
Changes to Absolute Maximum Ratings...................................... 12
Changes to DC Correctness and Magnetic Field
Immunity Section............................................................................ 15
9/2004—Rev. A to Rev. B
Changes to Table 5 .......................................................................... 10
6/2004—Rev. 0 to Rev. A
Changes to Format ............................................................. Universal
Changes to General Description ..................................................... 1
Changes to Electrical Characteristics—5 V Operation ................ 3
Changes to Electrical Characteristics—3 V Operation ................ 5
Changes to Electrical Characteristics—Mixed 5 V/3 V or
3 V/5 V Operation ............................................................................ 7
4/2004—Revision 0: Initial Version
Table L
ADuM1200/ADuM1201 Data Sheet
Rev. K | Page 4 of 28
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS—5 V, 105°C OPERATION
All voltages are relative to the respective ground; 4.5 V ≤ VDD1 ≤ 5.5 V, 4.5 V ≤ VDD2 ≤ 5.5 V; all minimum/maximum specifications apply
over the entire recommended operating range, unless otherwise noted; all typical specifications are at TA = 25°C, VDD1 = VDD2 = 5 V; this
does not apply to the ADuM1200W and ADuM1201W automotive grade products.
Table 1.
Parameter
Symbol
Min
Typ
Max
Unit
Test Conditions/Comments
DC SPECIFICATIONS
Input Supply Current per Channel, Quiescent IDDI (Q) 0.50 0.60 mA
Output Supply Current per Channel, Quiescent IDDO (Q) 0.19 0.25 mA
ADuM1200 Total Supply Current, Two Channels1
DC to 2 Mbps
VDD1 Supply Current IDD1 (Q) 1.1 1.4 mA DC to 1 MHz logic signal freq.
VDD2 Supply Current IDD2 (Q) 0.5 0.8 mA DC to 1 MHz logic signal freq.
10 Mbps (BR and CR Grades Only)
VDD1 Supply Current IDD1 (10) 4.3 5.5 mA 5 MHz logic signal freq.
V
DD2
Supply Current
I
DD2 (10)
1.3
2.0
mA
5 MHz logic signal freq.
25 Mbps (CR Grade Only)
VDD1 Supply Current IDD1 (25) 10 13 mA 12.5 MHz logic signal freq.
VDD2 Supply Current IDD2 (25) 2.8 3.4 mA 12.5 MHz logic signal freq.
ADuM1201 Total Supply Current, Two Channels1
DC to 2 Mbps
VDD1 Supply Current IDD1 (Q) 0.8 1.1 mA DC to 1 MHz logic signal freq.
VDD2 Supply Current IDD2 (Q) 0.8 1.1 mA DC to 1 MHz logic signal freq.
10 Mbps (BR and CR Grades Only)
VDD1 Supply Current IDD1 (10) 2.8 3.5 mA 5 MHz logic signal freq.
VDD2 Supply Current IDD2 (10) 2.8 3.5 mA 5 MHz logic signal freq.
25 Mbps (CR Grade Only)
VDD1 Supply Current IDD1 (25) 6.3 8.0 mA 12.5 MHz logic signal freq.
VDD2 Supply Current IDD2 (25) 6.3 8.0 mA 12.5 MHz logic signal freq.
For All Models
Input Currents
I
IA
, I
IB
−10
+0.01
+10
µA
0 V ≤ V
IA
, V
IB
≤ (V
DD1
or V
DD2
)
Logic High Input Threshold VIH 0.7 (VDD1 or VDD2) V
Logic Low Input Threshold
V
IL
0.3 (V
DD1
or V
DD2
)
V
Logic High Output Voltages VOAH, VOBH (VDD1 or VDD2) − 0.1 5.0 V IOx = −20 µA, VIx = VIxH
(VDD1 or VDD2) − 0.5 4.8 V IOx = −4 mA, VIx = VIxH
Logic Low Output Voltages VOAL, VOBL 0.0 0.1 V IOx = 20 µA, VIx = VIxL
0.04 0.1 V IOx = 400 µA, VIx = VIxL
0.2 0.4 V IOx = 4 mA, VIx = VIxL
SWITCHING SPECIFICATIONS
ADuM1200/ADuM1201AR CL = 15 pF, CMOS signal levels
Minimum Pulse Width2 PW 1000 ns
Maximum Data Rate
3
1
Mbps
Propagation Delay
4
t
PHL
, t
PLH
50
150
ns
Pulse Width Distortion, |tPLH − tPHL|4 PWD 40 ns
Change vs. Temperature 11 ps/°C
Propagation Delay Skew5 tPSK 100 ns
Channel-to-Channel Matching6 tPSKCD/tPSKOD 50 ns
Output Rise/Fall Time (10% to 90%) tR/tF 10 ns
Data Sheet ADuM1200/ADuM1201
Rev. K | Page 5 of 28
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
ADuM1200/ADuM1201BR
Minimum Pulse Width2 PW 100 ns
Maximum Data Rate3 10 Mbps
Propagation Delay4 tPHL, tPLH 20 50 ns
Pulse Width Distortion, |tPLH − tPHL|4 PWD 3 ns
Change vs. Temperature 5 ps/°C
Propagation Delay Skew5 tPSK 15 ns
Channel-to-Channel Matching 3
Codirectional Channels6 tPSKCD ns
Opposing Directional Channels6 tPSKOD 15 ns
Output Rise/Fall Time (10% to 90%) tR/tF 2.5 ns
ADuM1200/ADuM1201CR
Minimum Pulse Width2 PW 20 40 ns
Maximum Data Rate3 25 50 Mbps
Propagation Delay4 tPHL, tPLH 20 45 ns
Pulse Width Distortion, |tPLH − tPHL|4 PWD 3 ns
Change vs. Temperature 5 ps/°C
Propagation Delay Skew5 tPSK 15 ns
Channel-to-Channel Matching 3 ns
Codirectional Channels6 tPSKCD
Opposing Directional Channels6 tPSKOD 15 ns
Output Rise/Fall Time (10% to 90%)
t
R
/t
F
2.5
ns
For All Models
Common-Mode Transient Immunity
Logic High Output7 |CMH| 25 35 kV/µs
V
Ix
= V
DD1
or V
DD2
, V
CM
=
1000 V, transient
magnitude = 800 V
Logic Low Output7 |CML| 25 35 kV/µs VIx = 0 V, VCM = 1000 V,
transient magnitude = 800 V
Refresh Rate fr 1.2 Mbps
Dynamic Supply Current per Channel8
Input IDDI (D) 0.19 mA/
Mbps
Output IDDO (D) 0.05 mA/
Mbps
1 The supply current values are for both channels combined when running at identical data rates. Output supply current values are specified with no output load
present. The supply current associated with an individual channel operating at a given data rate can be calculated as described in the Power Consumption section. See
Figure 6 through Figure 8 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See Figure 9 through Figure 11
for total VDD1 and VDD2 supply currents as a function of data rate for ADuM1200 and ADuM1201 channel configurations.
2 The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed.
3 The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed.
4 tPHL propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. tPLH propagation delay is
measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal.
5 tPSK is the magnitude of the worst-case difference in tPHL and/or tPLH that is measured between units at the same operating temperature, supply voltages, and output
load within the recommended operating conditions.
6 Codirectional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of
the isolation barrier. Opposing directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with
inputs on opposing sides of the isolation barrier.
7 CMH is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD2. CML is the maximum common-mode voltage slew rate
that can be sustained while maintaining VO < 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient
magnitude is the range over which the common mode is slewed.
8 Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in the signal data rate. See Figure 6 through Figure 8 for
information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See the Power Consumption section for guidance on
calculating per-channel supply current for a given data rate.
Table 2‘
ADuM1200/ADuM1201 Data Sheet
Rev. K | Page 6 of 28
ELECTRICAL CHARACTERISTICS—3 V, 105°C OPERATION
All voltages are relative to the respective ground; 2.7 V ≤ VDD1 ≤ 3.6 V, 2.7 V ≤ VDD2 ≤ 3.6 V; all minimum/maximum specifications apply
over the entire recommended operating range, unless otherwise noted; all typical specifications are at TA = 25°C, VDD1 = VDD2 = 3.0 V; this
does not apply to ADuM1200W and ADuM1201W automotive grade products.
Table 2.
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
DC SPECIFICATIONS
Input Supply Current per Channel, Quiescent IDDI (Q) 0.26 0.35 mA
Output Supply Current per Channel, Quiescent IDDO (Q) 0.11 0.20 mA
ADuM1200 Total Supply Current, Two
Channels1
DC to 2 Mbps
VDD1 Supply Current IDD1 (Q) 0.6 1.0 mA DC to 1 MHz logic signal freq.
VDD2 Supply Current IDD2 (Q) 0.2 0.6 mA DC to 1 MHz logic signal freq.
10 Mbps (BR and CR Grades Only)
VDD1 Supply Current IDD1 (10) 2.2 3.4 mA 5 MHz logic signal freq.
VDD2 Supply Current IDD2 (10) 0.7 1.1 mA 5 MHz logic signal freq.
25 Mbps (CR Grade Only)
VDD1 Supply Current IDD1 (25) 5.2 7.7 mA 12.5 MHz logic signal freq.
VDD2 Supply Current IDD2 (25) 1.5 2.0 mA 12.5 MHz logic signal freq.
ADuM1201 Total Supply Current, Two
Channels1
DC to 2 Mbps
VDD1 Supply Current IDD1 (Q) 0.4 0.8 mA DC to 1 MHz logic signal freq.
VDD2 Supply Current IDD2 (Q) 0.4 0.8 mA DC to 1 MHz logic signal freq.
10 Mbps (BR and CR Grades Only)
VDD1 Supply Current IDD1 (10) 1.5 2.2 mA 5 MHz logic signal freq.
VDD2 Supply Current IDD2 (10) 1.5 2.2 mA 5 MHz logic signal freq.
25 Mbps (CR Grade Only)
VDD1 Supply Current IDD1 (25) 3.4 4.8 mA 12.5 MHz logic signal freq.
VDD2 Supply Current IDD2 (25) 3.4 4.8 mA 12.5 MHz logic signal freq.
For All Models
Input Currents IIA, IIB −10 +0.01 +10 µA 0 V ≤ VIA, VIB ≤ (VDD1 or VDD2)
Logic High Input Threshold VIH 0.7 (VDD1 or VDD2) V
Logic Low Input Threshold VIL 0.3 (VDD1 or VDD2)
Logic High Output Voltages VOAH, VOBH (VDD1 or VDD2) − 0.1 3.0 V IOx = −20 µA, VIx = VIxH
(VDD1 or VDD2) − 0.5 2.8 V IOx = −4 mA, VIx = VIxH
Logic Low Output Voltages VOAL, VOBL 0.0 0.1 V IOx = 20 µA, VIx = VIxL
0.04 0.1 V IOx = 400 µA, VIx = VIxL
0.2
0.4
V
I
Ox
= 4 mA, V
Ix
= V
IxL
SWITCHING SPECIFICATIONS
ADuM1200/ADuM1201AR CL = 15 pF, CMOS signal levels
Minimum Pulse Width2 PW 1000 ns
Maximum Data Rate3 1 Mbps
Propagation Delay4 tPHL, tPLH 50 150 ns
Pulse Width Distortion, |tPLH − tPHL|4 PWD 40 ns
Change vs. Temperature 11 ps/°C
Propagation Delay Skew
5
t
PSK
100
ns
Channel-to-Channel Matching
6
t
PSKCD
/t
PSKOD
50
ns
Output Rise/Fall Time (10% to 90%)
t
R
/t
F
10
ns
Data Sheet ADuM1200/ADuM1201
Rev. K | Page 7 of 28
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
ADuM1200/ADuM1201BR CL = 15 pF, CMOS signal levels
Minimum Pulse Width2 PW 100 ns
Maximum Data Rate3 10 Mbps
Propagation Delay4 tPHL, tPLH 20 60 ns
Pulse Width Distortion, |tPLH − tPHL|4 PWD 3 ns
Change vs. Temperature 5 ps/°C
Propagation Delay Skew5 tPSK 22 ns
Channel-to-Channel Matching
Codirectional Channels6 tPSKCD 3 ns
Opposing Directional Channels6 tPSKOD 22 ns
Output Rise/Fall Time (10% to 90%) tR/tF 3.0 ns
ADuM1200/ADuM1201CR
Minimum Pulse Width2 PW 20 40 ns
Maximum Data Rate3 25 50 Mbps
Propagation Delay4 tPHL, tPLH 20 55 ns
Pulse Width Distortion, |tPLH − tPHL|4 PWD 3 ns
Change vs. Temperature 5 ps/°C
Propagation Delay Skew5 tPSK 16 ns
Channel-to-Channel Matching
Codirectional Channels6 tPSKCD 3 ns
Opposing Directional Channels6 tPSKOD 16 ns
Output Rise/Fall Time (10% to 90%)
t
R
/t
F
3.0
ns
For All Models
Common-Mode Transient Immunity
Logic High Output7 |CMH| 25 35 kV/µs
V
Ix
= V
DD1
or V
DD2
, V
CM
= 1000 V,
transient magnitude = 800 V
Logic Low Output7 |CML| 25 35 kV/µs
V
Ix
= 0 V, V
CM
= 1000 V,
transient magnitude = 800 V
Refresh Rate fr 1.1 Mbps
Dynamic Supply Current per Channel8
Input IDDI (D) 0.10 mA/
Mbps
Output IDDO (D) 0.03 mA/
Mbps
1 The supply current values are for both channels combined when running at identical data rates. Output supply current values are specified with no output load
present. The supply current associated with an individual channel operating at a given data rate can be calculated as described in the Power Consumption section. See
Figure 6 through Figure 8 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See Figure 9 through Figure 11
for total VDD1 and VDD2 supply currents as a function of data rate for ADuM1200 and ADuM1201 channel configurations.
2 The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed.
3 The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed.
4 tPHL propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. tPLH propagation delay is
measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal.
5 tPSK is the magnitude of the worst-case difference in tPHL and/or tPLH that is measured between units at the same operating temperature, supply voltages, and output
load within the recommended operating conditions.
6 Codirectional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of
the isolation barrier. Opposing directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with
inputs on opposing sides of the isolation barrier.
7 CMH is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD2. CML is the maximum common-mode voltage slew rate
that can be sustained while maintaining VO < 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient
magnitude is the range over which the common mode is slewed.
8 Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in the signal data rate. See Figure 6 through Figure 8 for
information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See the Power Consumption section for guidance on
calculating per-channel supply current for a given data rate.
ADuM1200/ADuM1201 Data Sheet
Rev. K | Page 8 of 28
ELECTRICAL CHARACTERISTICS—MIXED 5 V/3 V OR 3 V/5 V, 105°C OPERATION
All voltages are relative to the respective ground; 5 V/3 V operation: 4.5 V ≤ VDD1 ≤ 5.5 V, 2.7 V ≤ VDD2 ≤ 3.6 V. 3 V/5 V operation:
2.7 V ≤ VDD1 ≤ 3.6 V, 4.5 V ≤ VDD2 ≤ 5.5 V; all minimum/maximum specifications apply over the entire recommended operating range,
unless otherwise noted; all typical specifications are at TA = 25°C; VDD1 = 3.0 V, VDD2 = 5.0 V; or VDD1 = 5.0 V, VDD2 = 3.0 V; this does not
apply to ADuM1200W and ADuM1201W automotive grade products.
Table 3.
Parameter Symbol Min Typ Max Unit Test Conditions /Comments
DC SPECIFICATIONS
Input Supply Current per Channel,
Quiescent
IDDI (Q)
5 V/3 V Operation 0.50 0.6 mA
3 V/5 V Operation 0.26 0.35 mA
Output Supply Current per Channel,
Quiescent
IDDO (Q)
5 V/3 V Operation 0.11 0.20 mA
3 V/5 V Operation 0.19 0.25 mA
ADuM1200 Total Supply Current,
Two Channels1
DC to 2 Mbps
V
DD1
Supply Current
I
DD1 (Q)
5 V/3 V Operation
1.1
1.4
mA
DC to 1 MHz logic signal freq.
3 V/5 V Operation 0.6 1.0 mA DC to 1 MHz logic signal freq.
VDD2 Supply Current IDD2 (Q)
5 V/3 V Operation 0.2 0.6 mA DC to 1 MHz logic signal freq.
3 V/5 V Operation 0.5 0.8 mA DC to 1 MHz logic signal freq.
10 Mbps (BR and CR Grades Only)
VDD1 Supply Current IDD1 (10)
5 V/3 V Operation 4.3 5.5 mA 5 MHz logic signal freq.
3 V/5 V Operation 2.2 3.4 mA 5 MHz logic signal freq.
VDD2 Supply Current IDD2 (10)
5 V/3 V Operation 0.7 1.1 mA 5 MHz logic signal freq.
3 V/5 V Operation 1.3 2.0 mA 5 MHz logic signal freq.
25 Mbps (CR Grade Only)
VDD1 Supply Current IDD1 (25)
5 V/3 V Operation 10 13 mA 12.5 MHz logic signal freq.
3 V/5 V Operation 5.2 7.7 mA 12.5 MHz logic signal freq.
VDD2 Supply Current IDD2 (25)
5 V/3 V Operation 1.5 2.0 mA 12.5 MHz logic signal freq.
3 V/5 V Operation 2.8 3.4 mA 12.5 MHz logic signal freq.
ADuM1201 Total Supply Current,
Two Channels1
DC to 2 Mbps
VDD1 Supply Current IDD1 (Q)
5 V/3 V Operation 0.8 1.1 mA DC to 1 MHz logic signal freq.
3 V/5 V Operation 0.4 0.8 mA DC to 1 MHz logic signal freq.
VDD2 Supply Current IDD2 (Q)
5 V/3 V Operation 0.4 0.8 mA DC to 1 MHz logic signal freq.
3 V/5 V Operation 0.8 1.1 mA DC to 1 MHz logic signal freq.
10 Mbps (BR and CR Grades Only)
VDD1 Supply Current IDD1 (10)
5 V/3 V Operation 2.8 3.5 mA 5 MHz logic signal freq.
3 V/5 V Operation 1.5 2.2 mA 5 MHz logic signal freq.
VDD2 Supply Current IDD2 (10)
5 V/3 V Operation 1.5 2.2 mA 5 MHz logic signal freq.
3 V/5 V Operation 2.8 3.5 mA 5 MHz logic signal freq.
Data Sheet ADuM1200/ADuM1201
Rev. K | Page 9 of 28
Parameter Symbol Min Typ Max Unit Test Conditions /Comments
25 Mbps (CR Grade Only)
VDD1 Supply Current IDD1 (25)
5 V/3 V Operation 6.3 8.0 mA 12.5 MHz logic signal freq.
3 V/5 V Operation 3.4 4.8 mA 12.5 MHz logic signal freq.
VDD2 Supply Current IDD2 (25)
5 V/3 V Operation 3.4 4.8 mA 12.5 MHz logic signal freq.
3 V/5 V Operation 6.3 8.0 mA 12.5 MHz logic signal freq.
For All Models
Input Currents IIA, IIB −10 +0.01 +10 µA 0 V ≤ VIA, VIB ≤ (VDD1 or VDD2)
Logic High Input Threshold VIH 0.7 (VDD1 or VDD2) V
Logic Low Input Threshold VIL 0.3 (VDD1 or VDD2) V
Logic High Output Voltages VOAH, VOBH (VDD1 or VDD2) − 0.1 VDD1 or VDD2 V IOx = −20 µA, VIx = VIxH
(VDD1 or VDD2) − 0.5 (VDD1 or VDD2) − 0.2 V IOx = −4 mA, VIx = VIxH
Logic Low Output Voltages VOAL, VOBL 0.0 0.1 V IOx = 20 µA, VIx = VIxL
0.04 0.1 V IOx = 400 µA, VIx = VIxL
0.2 0.4 V IOx = 4 mA, VIx = VIxL
SWITCHING SPECIFICATIONS
ADuM1200/ADuM1201AR CL = 15 pF, CMOS signal levels
Minimum Pulse Width2 PW 1000 ns
Maximum Data Rate3 1 Mbps
Propagation Delay4 tPHL, tPLH 50 150 ns
Pulse Width Distortion, |tPLH − tPHL|4 PWD 40 ns
Change vs. Temperature 11 ps/°C
Propagation Delay Skew5 tPSK 50 ns
Channel-to-Channel Matching6 tPSKCD/tPSKOD 50 ns
Output Rise/Fall Time (10% to 90%) tR/tF 10 ns
ADuM1200/ADuM1201BR CL = 15 pF, CMOS signal levels
Minimum Pulse Width2 PW 100 ns
Maximum Data Rate3 10 Mbps
Propagation Delay4 tPHL, tPLH 15 55 ns
Pulse Width Distortion, |tPLH − tPHL|4 PWD 3 ns
Change vs. Temperature 5 ps/°C
Propagation Delay Skew5 tPSK 22 ns
Channel-to-Channel Matching
Codirectional Channels6 tPSKCD 3 ns
Opposing Directional Channels6 tPSKOD 22 ns
Output Rise/Fall Time (10% to 90%) tR/tF
5 V/3 V Operation 3.0 ns
3 V/5 V Operation 2.5 ns
ADuM1200/ADuM1201CR CL = 15 pF, CMOS signal levels
Minimum Pulse Width2
PW
20
40
ns
Maximum Data Rate3 25 50 Mbps
Propagation Delay4 tPHL, tPLH 20 50 ns
Pulse Width Distortion, |tPLH − tPHL|4 PWD 3 ns
Change vs. Temperature 5 ps/°C
Propagation Delay Skew5 tPSK 15 ns
Channel-to-Channel Matching
Codirectional Channels6 tPSKCD 3 ns
Opposing Directional Channels6 tPSKOD 15 ns
Output Rise/Fall Time (10% to 90%) tR/tF
5 V/3 V Operation 3.0 ns
3 V/5 V Operation 2.5 ns
ADuM1200/ADuM1201 Data Sheet
Rev. K | Page 10 of 28
Parameter Symbol Min Typ Max Unit Test Conditions /Comments
For All Models
Common-Mode Transient Immunity
Logic High Output7 |CMH| 25 35 kV/µs VIx = VDD1 or VDD2, VCM = 1000 V,
transient magnitude = 800 V
Logic Low Output7 |CML| 25 35 kV/µs VIx = 0 V, VCM = 1000 V,
transient magnitude = 800 V
Refresh Rate fr
5 V/3 V Operation 1.2 Mbps
3 V/5 V Operation 1.1 Mbps
Input Dynamic Supply Current
per Channel8
IDDI (D)
5 V/3 V Operation 0.19 mA/
Mbps
3 V/5 V Operation 0.10 mA/
Mbps
Output Dynamic Supply Current per
Channel8
IDDO (D)
5 V/3 V Operation 0.03
mA/
Mbps
3 V/5 V Operation 0.05
mA/
Mbps
1 The supply current values are for both channels combined when running at identical data rates. Output supply current values are specified with no output load
present. The supply current associated with an individual channel operating at a given data rate can be calculated as described in the Power Consumption section. See
Figure 6 through Figure 8 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See Figure 9 through Figure 11
for total VDD1 and VDD2 supply currents as a function of data rate for ADuM1200 and ADuM1201 channel configurations.
2 The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed.
3 The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed.
4 tPHL propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. tPLH propagation delay is
measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal.
5 tPSK is the magnitude of the worst-case difference in tPHL and/or tPLH that is measured between units at the same operating temperature, supply voltages, and output
load within the recommended operating conditions.
6 Codirectional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of
the isolation barrier. Opposing directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with
inputs on opposing sides of the isolation barrier.
7 CMH is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD2. CML is the maximum common-mode voltage slew rate
that can be sustained while maintaining VO < 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient
magnitude is the range over which the common mode is slewed.
8 Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in the signal data rate. See Figure 6 through Figure 8 for
information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See the Power Consumption section for guidance on
calculating per-channel supply current for a given data rate.
Table 4‘
Data Sheet ADuM1200/ADuM1201
Rev. K | Page 11 of 28
ELECTRICAL CHARACTERISTICS—5 V, 125°C OPERATION
All voltages are relative to the respective ground; 4.5 V ≤ VDD1 ≤ 5.5 V, 4.5 V ≤ VDD2 ≤ 5.5 V; all minimum/maximum specifications apply
over the entire recommended operating range, unless otherwise noted; all typical specifications are at TA = 25°C, VDD1 = VDD2 = 5 V; this
applies to ADuM1200W and ADuM1201W automotive grade products.
Table 4.
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
DC SPECIFICATIONS
Input Supply Current per Channel,
Quiescent
IDDI (Q) 0.50 0.60 mA
Output Supply Current per Channel,
Quiescent
IDDO (Q) 0.19 0.25 mA
ADuM1200W, Total Supply Current,
Two Channels1
DC to 2 Mbps
VDD1 Supply Current IDD1 (Q) 1.1 1.4 mA DC to 1 MHz logic signal freq.
VDD2 Supply Current IDD2 (Q) 0.5 0.8 mA DC to 1 MHz logic signal freq.
10 Mbps (TRZ and URZ Grades Only)
VDD1 Supply Current IDD1 (10) 4.3 5.5 mA 5 MHz logic signal freq.
VDD2 Supply Current IDD2 (10) 1.3 2.0 mA 5 MHz logic signal freq.
25 Mbps (URZ Grade Only)
V
DD1
Supply Current
I
DD1 (25)
10
13
mA
12.5 MHz logic signal freq.
VDD2 Supply Current IDD2 (25) 2.8 3.4 mA 12.5 MHz logic signal freq.
ADuM1201W, Total Supply Current,
Two Channels1
DC to 2 Mbps
VDD1 Supply Current IDD1 (Q) 0.8 1.1 mA DC to 1 MHz logic signal freq.
VDD2 Supply Current IDD2 (Q) 0.8 1.1 mA DC to 1 MHz logic signal freq.
10 Mbps (TRZ and URZ Grades Only)
VDD1 Supply Current IDD1 (10) 2.8 3.5 mA 5 MHz logic signal freq.
VDD2 Supply Current IDD2 (10) 2.8 3.5 mA 5 MHz logic signal freq.
25 Mbps (URZ Grade Only)
VDD1 Supply Current IDD1 (25) 6.3 8.0 mA 12.5 MHz logic signal freq.
VDD2 Supply Current IDD2 (25) 6.3 8.0 mA 12.5 MHz logic signal freq.
For All Models
Input Currents IIA, IIB −10 +0.01 +10 µA 0 V ≤ VIA, VIB ≤ (VDD1 or VDD2)
Logic High Input Threshold VIH 0.7 (VDD1 or VDD2) V
Logic Low Input Threshold VIL 0.3 (VDD1 or VDD2) V
Logic High Output Voltages VOAH, VOBH (VDD1 or VDD2) − 0.1 5.0 V IOx = −20 µA, VIx = VIxH
(V
DD1
or V
DD2
) − 0.5
4.8
V
I
Ox
= −4 mA, V
Ix
= V
IxH
Logic Low Output Voltages VOAL, VOBL 0.0 0.1 V IOx = 20 µA, VIx = VIxL
0.04
0.1
V
I
Ox
= 400 µA, V
Ix
= V
IxL
0.2 0.4 V IOx = 4 mA, VIx = VIxL
SWITCHING SPECIFICATIONS
ADuM1200/ADuM1201WSRZ CL = 15 pF, CMOS signal levels
Minimum Pulse Width2 PW 1000 ns
Maximum Data Rate3 1 Mbps
Propagation Delay4 tPHL, tPLH 20 150 ns
Pulse Width Distortion, |tPLH − tPHL|4 PWD 40 ns
Propagation Delay Skew
5
t
PSK
100
ns
Channel-to-Channel Matching6 tPSKCD/tPSKOD 50 ns
Output Rise/Fall Time (10% to 90%) tR/tF 2.5 ns
ADuM1200/ADuM1201 Data Sheet
Rev. K | Page 12 of 28
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
ADuM1200/ADuM1201WTRZ CL = 15 pF, CMOS signal levels
Minimum Pulse Width2 PW 100 ns
Maximum Data Rate3 10 Mbps
Propagation Delay4 tPHL, tPLH 20 50 ns
Pulse Width Distortion, |tPLH − tPHL|4 PWD 3 ns
Change vs. Temperature 5 ps/°C
Propagation Delay Skew5 tPSK 15 ns
Channel-to-Channel Matching
Codirectional Channels6 tPSKCD 3 ns
Opposing Directional Channels6 tPSKOD 15 ns
Output Rise/Fall Time (10% to 90%) tR/tF 2.5 ns
ADuM1200/ADuM1201WURZ CL = 15 pF, CMOS signal levels
Minimum Pulse Width2 PW 20 40 ns
Maximum Data Rate3 25 50 Mbps
Propagation Delay4 tPHL, tPLH 20 45 ns
Pulse Width Distortion, |tPLH − tPHL|4 PWD 3 ns
Change vs. Temperature 5 ps/°C
Propagation Delay Skew5 tPSK 15 ns
Channel-to-Channel Matching
Codirectional Channels6 tPSKCD 3 ns
Opposing Directional Channels6 tPSKOD 15 ns
Output Rise/Fall Time (10% to 90%)
t
R
/t
F
2.5
ns
For All Models
Common-Mode Transient Immunity
Logic High Output7 |CMH| 25 35 kV/µs
V
Ix
= V
DD1
, V
DD2
, V
CM
= 1000 V,
transient magnitude = 800 V
Logic Low Output7 |CML| 25 35 kV/µs
V
Ix
= 0 V, V
CM
= 1000 V,
transient magnitude = 800 V
Refresh Rate fr 1.2 Mbps
Dynamic Supply Current per Channel8
Input IDDI (D) 0.19 mA/
Mbps
Output IDDO (D) 0.05 mA/
Mbps
1 The supply current values are for both channels combined when running at identical data rates. Output supply current values are specified with no output load
present. The supply current associated with an individual channel operating at a given data rate can be calculated as described in the Power Consumption section. See
Figure 6 through Figure 8 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See Figure 9 through Figure 11
for total IDD1 and IDD2 supply currents as a function of data rate for ADuM1200W and ADuM1201W channel configurations.
2 The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed.
3 The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed.
4 tPHL propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. tPLH propagation delay is
measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal.
5 tPSK is the magnitude of the worst-case difference in tPHL and/or tPLH that is measured between units at the same operating temperature, supply voltages, and output
load within the recommended operating conditions.
6 Codirectional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of
the isolation barrier. Opposing directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with
inputs on opposing sides of the isolation barrier.
7 CMH is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD2. CML is the maximum common-mode voltage slew rate
that can be sustained while maintaining VO < 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient
magnitude is the range over which the common mode is slewed.
8 Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in the signal data rate. See Figure 6 through Figure 8 for
information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See the Power Consumption section for guidance on
calculating per-channel supply current for a given data rate.
Table 5‘
Data Sheet ADuM1200/ADuM1201
Rev. K | Page 13 of 28
ELECTRICAL CHARACTERISTICS—3 V, 125°C OPERATION
All voltages are relative to the respective ground; 3.0 V ≤ VDD1 ≤ 3.6 V, 3.0 V ≤ VDD2 ≤ 3.6 V. All minimum/maximum specifications apply
over the entire recommended operating range, unless otherwise noted; all typical specifications are at TA = 25°C, VDD1 = VDD2 = 3.0 V;
this applies to ADuM1200W and ADuM1201W automotive grade products.
Table 5.
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
DC SPECIFICATIONS
Input Supply Current per Channel,
Quiescent
IDDI (Q) 0.26 0.35 mA
Output Supply Current per Channel, Quiescent IDDO (Q) 0.11 0.20 mA
ADuM1200W, Total Supply Current,
Two Channels1
DC to 2 Mbps
VDD1 Supply Current IDD1 (Q) 0.6 1.0 mA DC to 1 MHz logic signal freq.
VDD2 Supply Current IDD2 (Q) 0.2 0.6 mA DC to 1 MHz logic signal freq.
10 Mbps (TRZ and URZ Grades Only)
VDD1 Supply Current IDD1 (10) 2.2 3.4 mA 5 MHz logic signal freq.
V
DD2
Supply Current
I
DD2 (10)
0.7
1.1
mA
5 MHz logic signal freq.
25 Mbps (URZ Grade Only)
V
DD1
Supply Current
I
DD1 (25)
5.2
7.7
mA
12.5 MHz logic signal freq.
VDD2 Supply Current IDD2 (25) 1.5 2.0 mA 12.5 MHz logic signal freq.
ADuM1201W, Total Supply Current,
Two Channels1
DC to 2 Mbps
VDD1 Supply Current IDD1 (Q) 0.4 0.8 mA DC to 1 MHz logic signal freq.
VDD2 Supply Current IDD2 (Q) 0.4 0.8 mA DC to 1 MHz logic signal freq.
10 Mbps (TRZ and URZ Grades Only)
VDD1 Supply Current IDD1 (10) 1.5 2.2 mA 5 MHz logic signal freq.
VDD2 Supply Current IDD2 (10) 1.5 2.2 mA 5 MHz logic signal freq.
25 Mbps (URZ Grade Only)
VDD1 Supply Current IDD1 (25) 3.4 4.8 mA 12.5 MHz logic signal freq.
VDD2 Supply Current IDD2 (25) 3.4 4.8 mA 12.5 MHz logic signal freq.
For All Models
Input Currents IIA, IIB −10 +0.01 +10 µA 0 V ≤ VIA, VIB ≤ (VDD1 or VDD2)
Logic High Input Threshold VIH 0.7 (VDD1 or VDD2) V
Logic Low Input Threshold
V
IL
0.3 (V
DD1
or V
DD2
)
Logic High Output Voltages
V
OAH
, V
OBH
(V
DD1
or V
DD2
) − 0.1
3.0
V
I
Ox
= −20 µA, V
Ix
= V
IxH
(V
DD1
or V
DD2
) − 0.5
2.8
V
I
Ox
= −4 mA, V
Ix
= V
IxH
Logic Low Output Voltages VOAL, VOBL 0.0 0.1 V IOx = 20 µA, VIx = VIxL
0.04 0.1 V IOx = 400 µA, VIx = VIxL
0.2 0.4 V IOx = 4 mA, VIx = VIxL
SWITCHING SPECIFICATIONS
ADuM1200/ADuM1201WSRZ CL = 15 pF, CMOS signal levels
Minimum Pulse Width2 PW 1000 ns
Maximum Data Rate3 1 Mbps
Propagation Delay
4
t
PHL
, t
PLH
20
150
ns
Pulse Width Distortion, |tPLH − tPHL|4 PWD 40 ns
Propagation Delay Skew5 tPSK 100 ns
Channel-to-Channel Matching6 tPSKCD/tPSKOD 50 ns
Output Rise/Fall Time (10% to 90%) tR/tF 3 ns
ADuM1200/ADuM1201 Data Sheet
Rev. K | Page 14 of 28
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
ADuM1200/ADuM1201WTRZ CL = 15 pF, CMOS signal levels
Minimum Pulse Width2 PW 100 ns
Maximum Data Rate3 10 Mbps
Propagation Delay4 tPHL, tPLH 20 60 ns
Pulse Width Distortion, |tPLH − tPHL|4 PWD 3 ns
Change vs. Temperature
5
ps/°C
Propagation Delay Skew5 tPSK 22 ns
Channel-to-Channel Matching
Codirectional Channels6 tPSKCD 3 ns
Opposing Directional Channels6 tPSKOD 22 ns
Output Rise/Fall Time (10% to 90%) tR/tF 3.0 ns
ADuM1200/ADuM1201WCR CL = 15 pF, CMOS signal levels
Minimum Pulse Width2 PW 20 40 ns
Maximum Data Rate3 25 50 Mbps
Propagation Delay4 tPHL, tPLH 20 55 ns
Pulse Width Distortion, |tPLH − tPHL|4 PWD 3 ns
Change vs. Temperature 5 ps/°C
Propagation Delay Skew5 tPSK 16 ns
Channel-to-Channel Matching
Codirectional Channels6 tPSKCD 3 ns
Opposing Directional Channels6 tPSKOD 16 ns
Output Rise/Fall Time (10% to 90%) tR/tF 3.0 ns
For All Models
Common-Mode Transient Immunity
Logic High Output7 |CMH| 25 35 kV/µs VIx = VDD1, VDD2, VCM = 1000 V,
transient magnitude = 800 V
Logic Low Output7 |CML| 25 35 kV/µs VIx = 0 V, VCM = 1000 V,
transient magnitude = 800 V
Refresh Rate fr 1.1 Mbps
Dynamic Supply Current per Channel8
Input IDDI (D) 0.10 mA/
Mbps
Output IDDO (D) 0.03 mA/
Mbps
1 The supply current values are for both channels combined when running at identical data rates. Output supply current values are specified with no output load
present. The supply current associated with an individual channel operating at a given data rate can be calculated as described in the Power Consumption section. See
Figure 6 through Figure 8 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See Figure 9 through Figure 11
for total IDD1 and IDD2 supply currents as a function of data rate for ADuM1200W and ADuM1201W channel configurations.
2 The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed.
3 The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed.
4 tPHL propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. tPLH propagation delay is
measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal.
5 tPSK is the magnitude of the worst-case difference in tPHL and/or tPLH that is measured between units at the same operating temperature, supply voltages, and output
load within the recommended operating conditions.
6 Codirectional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of
the isolation barrier. Opposing directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with
inputs on opposing sides of the isolation barrier.
7 CMH is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD2. CML is the maximum common-mode voltage slew rate
that can be sustained while maintaining VO < 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient
magnitude is the range over which the common mode is slewed.
8 Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in the signal data rate. See Figure 6 through Figure 8 for
information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See the Power Consumption section for guidance on
calculating per-channel supply current for a given data rate.
Table 6‘
Data Sheet ADuM1200/ADuM1201
Rev. K | Page 15 of 28
ELECTRICAL CHARACTERISTICS—MIXED 5 V/3 V, 125°C OPERATION
All voltages are relative to the respective ground; 5 V/3 V operation: 4.5 V ≤ VDD1 ≤ 5.5 V, 3.0 V ≤ VDD2 ≤ 3.6 V. 3 V/5 V operation; all
minimum/maximum specifications apply over the entire recommended operating range, unless otherwise noted; all typical specifications
are at TA = 25°C; VDD1 = 5.0 V, VDD2 = 3.0 V; this applies to ADuM1200W and ADuM1201W automotive grade products.
Table 6.
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
DC SPECIFICATIONS
Input Supply Current per Channel,
Quiescent
IDDI (Q) 0.50 0.6 mA
Output Supply Current per Channel,
Quiescent
IDDO (Q) 0.11 0.20 mA
ADuM1200W, Total Supply Current,
Two Channels1
DC to 2 Mbps
VDD1 Supply Current IDD1 (Q) 1.1 1.4 mA DC to 1 MHz logic signal freq.
VDD2 Supply Current IDD2 (Q) 0.2 0.6 mA DC to 1 MHz logic signal freq.
10 Mbps (TRZ and URZ Grades Only)
VDD1 Supply Current IDD1 (10) 4.3 5.5 mA 5 MHz logic signal freq.
V
DD2
Supply Current
I
DD2 (10)
0.7
1.1
mA
5 MHz logic signal freq.
25 Mbps (URZ Grade Only)
V
DD1
Supply Current
I
DD1 (25)
10
13
mA
12.5 MHz logic signal freq.
VDD2 Supply Current IDD2 (25) 1.5 2.0 mA 12.5 MHz logic signal freq.
ADuM1201W, Total Supply Current,
Two Channels1
DC to 2 Mbps
VDD1 Supply Current IDD1 (Q) 0.8 1.1 mA DC to 1 MHz logic signal freq.
VDD2 Supply Current IDD2 (Q) 0.4 0.8 mA DC to 1 MHz logic signal freq.
10 Mbps (TRZ and URZ Grades Only)
VDD1 Supply Current IDD1 (10) 2.8 3.5 mA 5 MHz logic signal freq.
VDD2 Supply Current IDD2 (10) 1.5 2.2 mA 5 MHz logic signal freq.
25 Mbps (URZ Grade Only)
VDD1 Supply Current IDD1 (25) 6.3 8.0 mA 12.5 MHz logic signal freq.
VDD2 Supply Current IDD2 (25) 3.4 4.8 mA 12.5 MHz logic signal freq.
For All Models
Input Currents IIA, IIB −10 +0.01 +10 µA 0 V ≤ VIA, VIB ≤ (VDD1 or VDD2)
Logic High Input Threshold VIH 0.7 (VDD1 or VDD2) V
Logic Low Input Threshold
V
IL
0.3 (V
DD1
or V
DD2
)
V
Logic High Output Voltages
V
OAH
, V
OBH
(V
DD1
or V
DD2
) − 0.1
V
DD1
or V
DD2
V
I
Ox
= −20 µA, V
Ix
= V
IxH
(V
DD1
or V
DD2
) − 0.5
(V
DD1
or V
DD2
) − 0.2
V
I
Ox
= −4 mA, V
Ix
= V
IxH
Logic Low Output Voltages VOAL, VOBL 0.0 0.1 V IOx = 20 µA, VIx = VIxL
0.04 0.1 V IOx = 400 µA, VIx = VIxL
0.2 0.4 V IOx = 4 mA, VIx = VIxL
SWITCHING SPECIFICATIONS
ADuM1200/ADuM1201WSRZ CL = 15 pF, CMOS signal levels
Minimum Pulse Width2 PW 1000 ns
Maximum Data Rate3 1 Mbps
Propagation Delay
4
t
PHL
, t
PLH
15
150
ns
Pulse Width Distortion, |tPLH − tPHL|4 PWD 40 ns
Propagation Delay Skew5 tPSK 50 ns
Channel-to-Channel Matching6 tPSKCD/ tPSKOD 50 ns
Output Rise/Fall Time (10% to 90%) tR/tF 3 ns
ADuM1200/ADuM1201 Data Sheet
Rev. K | Page 16 of 28
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
ADuM1200/ADuM1201WTRZ CL = 15 pF, CMOS signal levels
Minimum Pulse Width2 PW 100 ns
Maximum Data Rate3 10 Mbps
Propagation Delay4 tPHL, tPLH 15 55 ns
Pulse Width Distortion, |tPLH − tPHL|4 PWD 3 ns
Change vs. Temperature 5 ps/°C
Propagation Delay Skew5 tPSK 22 ns
Channel-to-Channel Matching
Codirectional Channels6 tPSKCD 3 ns
Opposing Directional Channels6 tPSKOD 22 ns
Output Rise/Fall Time (10% to 90%)
t
R
/t
F
3.0
ns
ADuM1200/ADuM1201WURZ CL = 15 pF, CMOS signal levels
Minimum Pulse Width2 PW 20 40 ns
Maximum Data Rate3 25 50 Mbps
Propagation Delay4 tPHL, tPLH 20 50 ns
Pulse Width Distortion, |tPLH − tPHL|4 PWD 3 ns
Change vs. Temperature 5 ps/°C
Propagation Delay Skew5 tPSK 15 ns
Channel-to-Channel Matching
Codirectional Channels6
t
PSKCD
3
ns
Opposing Directional Channels6 tPSKOD 15 ns
Output Rise/Fall Time (10% to 90%) tR/tF 3.0 ns
For All Models
Common-Mode Transient Immunity
Logic High Output7 |CMH| 25 35 kV/µs VIx = VDD1, VDD2, VCM = 1000 V,
transient magnitude = 800 V
Logic Low Output7 |CML| 25 35 kV/µs VIx = VDD1, VDD2, VCM = 1000 V,
transient magnitude = 800 V
Refresh Rate fr 1.2 Mbps
Dynamic Supply Current per
Channel8
Input IDDI (D) 0.19 mA/
Mbps
Output IDDO (D) 0.03 mA/
Mbps
1 The supply current values are for both channels combined when running at identical data rates. Output supply current values are specified with no output load
present. The supply current associated with an individual channel operating at a given data rate can be calculated as described in the Power Consumption section. See
Figure 6 through Figure 8 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See Figure 9 through Figure 11
for total IDD1 and IDD2 supply currents as a function of data rate for ADuM1200W and ADuM1201W channel configurations.
2 The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed.
3 The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed.
4 tPHL propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. tPLH propagation delay is
measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal.
5 tPSK is the magnitude of the worst-case difference in tPHL and/or tPLH that is measured between units at the same operating temperature, supply voltages, and output
load within the recommended operating conditions.
6 Codirectional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of
the isolation barrier. Opposing directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with
inputs on opposing sides of the isolation barrier.
7 CMH is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD2. CML is the maximum common-mode voltage slew rate
that can be sustained while maintaining VO < 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient
magnitude is the range over which the common mode is slewed.
8 Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in the signal data rate. See Figure 6 through Figure 8 for
information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See the Power Consumption section for guidance on
calculating per-channel supply current for a given data rate.
Table 7‘
Data Sheet ADuM1200/ADuM1201
Rev. K | Page 17 of 28
ELECTRICAL CHARACTERISTICS—MIXED 3 V/5 V, 125°C OPERATION
All voltages are relative to the respective ground; 3.0 V ≤ VDD1 ≤ 3.6 V, 4.5 V ≤ VDD2 ≤ 5.5 V; all minimum/maximum specifications apply
over the entire recommended operating range, unless otherwise noted; all typical specifications are at TA = 25°C; VDD1 = 3.0 V, VDD2 = 5.0 V;
this applies to ADuM1200W and ADuM1201W automotive grade products.
Table 7.
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
DC SPECIFICATIONS
Input Supply Current per Channel,
Quiescent
IDDI (Q) 0.26 0.35 mA
Output Supply Current per Channel,
Quiescent
IDDO (Q) 0.19 0.25 mA
ADuM1200W, Total Supply Current,
Two Channels1
DC to 2 Mbps
VDD1 Supply Current IDD1 (Q) 0.6 1.0 mA DC to 1 MHz logic signal freq.
VDD2 Supply Current IDD2 (Q) 0.5 0.8 mA DC to 1 MHz logic signal freq.
10 Mbps (TRZ and URZ Grades Only)
VDD1 Supply Current IDD1 (10) 2.2 3.4 mA 5 MHz logic signal freq.
V
DD2
Supply Current
I
DD2 (10)
1.3
2.0
mA
5 MHz logic signal freq.
25 Mbps (URZ Grade Only)
V
DD1
Supply Current
I
DD1 (25)
5.2
7.7
mA
12.5 MHz logic signal freq.
VDD2 Supply Current IDD2 (25) 2.8 3.4 mA 12.5 MHz logic signal freq.
ADuM1201W, Total Supply Current,
Two Channels1
DC to 2 Mbps
VDD1 Supply Current IDD1 (Q) 0.4 0.8 mA DC to 1 MHz logic signal freq.
VDD2 Supply Current IDD2 (Q) 0.8 1.1 mA DC to 1 MHz logic signal freq.
10 Mbps (TRZ and URZ Grades Only)
VDD1 Supply Current IDD1 (10) 1.5 2.2 mA 5 MHz logic signal freq.
VDD2 Supply Current IDD2 (10) 2.8 3.5 mA 5 MHz logic signal freq.
25 Mbps (URZ Grade Only)
VDD1 Supply Current IDD1 (25) 3.4 4.8 mA 12.5 MHz logic signal freq.
VDD2 Supply Current IDD2 (25) 6.3 8.0 mA 12.5 MHz logic signal freq.
For All Models
Input Currents IIA, IIB −10 +0.01 +10 µA 0 V ≤ VIA, VIB ≤ (VDD1 or VDD2)
Logic High Input Threshold VIH 0.7 (VDD1 or VDD2) V
Logic Low Input Threshold
V
IL
0.3 (V
DD1
or V
DD2
)
V
Logic High Output Voltages
V
OAH
, V
OBH
(V
DD1
or V
DD2
) − 0.1
V
DD1
or V
DD2
V
I
Ox
= −20 µA, V
Ix
= V
IxH
(V
DD1
or V
DD2
) − 0.5
(V
DD1
or V
DD2
) − 0.2
V
I
Ox
= −4 mA, V
Ix
= V
IxH
Logic Low Output Voltages VOAL, VOBL 0.0 0.1 V IOx = 20 µA, VIx = VIxL
0.04 0.1 V IOx = 400 µA, VIx = VIxL
0.2 0.4 V IOx = 4 mA, VIx = VIxL
SWITCHING SPECIFICATIONS
ADuM1200/ADuM1201WSRZ CL = 15 pF, CMOS signal levels
Minimum Pulse Width2 PW 1000 ns
Maximum Data Rate3 1 Mbps
Propagation Delay
4
t
PHL
, t
PLH
15
150
ns
Pulse Width Distortion, |tPLH − tPHL|4 PWD 40 ns
Propagation Delay Skew5 tPSK 50 ns
Channel-to-Channel Matching6 tPSKCD/
tPSKOD
50 ns
Output Rise/Fall Time (10% to 90%) tR/tF 3 ns
ADuM1200/ADuM1201 Data Sheet
Rev. K | Page 18 of 28
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
ADuM1200/ADuM1201WTRZ CL = 15 pF, CMOS signal levels
Minimum Pulse Width2 PW 100 ns
Maximum Data Rate3 10 Mbps
Propagation Delay4 tPHL, tPLH 15 55 ns
Pulse Width Distortion, |tPLH − tPHL|4 PWD 3 ns
Change vs. Temperature
5
ps/°C
Propagation Delay Skew5 tPSK 22 ns
Channel-to-Channel Matching
Codirectional Channels6 tPSKCD 3 ns
Opposing Directional Channels6 tPSKOD 22 ns
Output Rise/Fall Time (10% to 90%) tR/tF 2.5 ns
ADuM1200/ADuM1201WURZ CL = 15 pF, CMOS signal levels
Minimum Pulse Width2 PW 20 40 ns
Maximum Data Rate3 25 50 Mbps
Propagation Delay4 tPHL, tPLH 20 50 ns
Pulse Width Distortion, |tPLH − tPHL|4 PWD 3 ns
Change vs. Temperature 5 ps/°C
Propagation Delay Skew5 tPSK 15 ns
Channel-to-Channel Matching
Codirectional Channels6 tPSKCD 3 ns
Opposing Directional Channels6 tPSKOD 15 ns
Output Rise/Fall Time (10% to 90%) tR/tF 2.5 ns
For All Models
Common-Mode Transient Immunity
Logic High Output7 |CMH| 25 35 kV/µs VIx = VDD1, VDD2, VCM = 1000 V,
transient magnitude = 800 V
Logic Low Output7 |CML| 25 35 kV/µs VIx = 0 V, VCM = 1000 V,
transient magnitude = 800 V
Refresh Rate fr 1.1 Mbps
Input Dynamic Supply Current
per Channel8
IDDI (D) 0.10 mA/
Mbps
Output Dynamic Supply Current
per Channel8
IDDO (D) 0.05 mA/
Mbps
1 The supply current values are for both channels combined when running at identical data rates. Output supply current values are specified with no output load
present. The supply current associated with an individual channel operating at a given data rate can be calculated as described in the Power Consumption section. See
Figure 6 through Figure 8 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See Figure 9 through Figure 11
for total IDD1 and IDD2 supply currents as a function of data rate for ADuM1200W and ADuM1201W channel configurations.
2 The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed.
3 The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed.
4 tPHL propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. tPLH propagation delay is
measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal.
5 tPSK is the magnitude of the worst-case difference in tPHL and/or tPLH that is measured between units at the same operating temperature, supply voltages, and output
load within the recommended operating conditions.
6 Codirectional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of
the isolation barrier. Opposing directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with
inputs on opposing sides of the isolation barrier.
7 CMH is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD2. CML is the maximum common-mode voltage slew rate
that can be sustained while maintaining VO < 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient
magnitude is the range over which the common mode is slewed.
8 Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in the signal data rate. See Figure 6 through Figure 8 for
information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See the Power Consumption section for guidance on
calculating per-channel supply current for a given data rate.
Data Sheet ADuM1200/ADuM1201
Rev. K | Page 19 of 28
PACKAGE CHARACTERISTICS
Table 8.
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
Resistance (Input-to-Output)
1
R
I-O
10
12
Ω
Capacitance (Input-to-Output)1 CI-O 1.0 pF f = 1 MHz
Input Capacitance CI 4.0 pF
IC Junction-to-Case Thermal Resistance, Side 1 θJCI 46 °C/W Thermocouple located at
center of package underside
IC Junction-to-Case Thermal Resistance, Side 2 θJCO 41 °C/W
1 The device is considered a 2-terminal device; Pin 1, Pin, 2, Pin 3, and Pin 4 are shorted together, and Pin 5, Pin 6, Pin 7, and Pin 8 are shorted together.
REGULATORY INFORMATION
The ADuM1200/ADuM1201 and ADuM1200W/ADuM1201W are approved by the organizations listed in Table 9; refer to Table 14 and
the Insulation Lifetime section for details regarding recommended maximum working voltages for specific cross-isolation waveforms and
insulation levels.
Table 9.
UL CSA CQC VDE
Recognized Under 1577
Component Recognition
Program1
Approved under CSA Component
Acceptance Notice 5A
Approved under
CQC11-471543-2012
Certified according to
DIN V VDE V 0884-10
(VDE V 0884-10): 2006-122
Single/Basic 2500 V rms
Isolation Voltage
Basic insulation per CSA 60950-1-03 and IEC
60950-1, 400 V rms (566 peak) maximum
working voltage
Basic insulation per
GB4943.1-2011
Reinforced insulation,
560 V peak
Functional insulation per CSA 60950-1-03 and
IEC 60950-1, 800 V rms (1131 V peak)
maximum working voltage
Basic insulation, 400 V rms
(588 V peak) maximum
working voltage, tropical
climate, altitude ≤ 5000 m
File E214100 File 205078 File CQC14001114901 File 2471900-4880-0001
1 In accordance with UL 1577, each ADuM1200, ADuM1201, ADuM1200W, and ADuM1201W is proof tested by applying an insulation test voltage ≥ 3000 V rms for 1 sec
(current leakage detection limit = 5 µA).
2 In accordance with DIN V VDE V 0884-10, each ADuM1200, ADuM1201, ADuM1200W, and ADuM1201W is proof tested by applying an insulation test voltage ≥ 1050 V
peak for 1 sec (partial discharge detection limit = 5 pC). The * and/or & marking branded on the component designates DIN V VDE V 0884-10 approval.
INSULATION AND SAFETY-RELATED SPECIFICATIONS
Table 10.
Parameter Symbol Value Unit Conditions
Rated Dielectric Insulation Voltage 2500 V rms 1 minute duration
Minimum External Air Gap (Clearance) L(I01) 4.90 min mm Measured from input terminals to output terminals,
shortest distance through air
Minimum External Tracking (Creepage) L(I02) 4.01 min mm Measured from input terminals to output terminals,
shortest distance path along body
Minimum Internal Gap (Internal Clearance) 0.017 min mm Insulation distance through insulation
Tracking Resistance (Comparative Tracking Index) CTI >400 V DIN IEC 112/VDE 0303 Part 1
Isolation Group II Material Group (DIN VDE 0110, 1/89, Table 1)
Table 11.
ADuM1200/ADuM1201 Data Sheet
Rev. K | Page 20 of 28
DIN V VDE V 0884-10 (VDE V 0884-10): 2006-12 INSULATION CHARACTERISTICS
This isolator is suitable for reinforced isolation only within the safety limit data. Maintenance of the safety data is ensured by protective
circuits. Note that the asterisk (*) marking on the package denotes DIN V VDE V 0884-10 approval for a 560 V peak working voltage.
Table 11.
Description Conditions Symbol Characteristic Unit
Installation Classification per DIN VDE 0110
For Rated Mains Voltage ≤ 150 V rms I to IV
For Rated Mains Voltage ≤ 300 V rms I to III
For Rated Mains Voltage ≤ 400 V rms I to II
Climatic Classification 40/105/21
Pollution Degree per DIN VDE 0110, Table 1 2
Maximum Working Insulation Voltage VIORM 560 V peak
Input-to-Output Test Voltage, Method B1 VIORM × 1.875 = VPR, 100% production test,
tm = 1 second, partial discharge < 5 pC
VPR 1050 V peak
Input-to-Output Test Voltage, Method A VIORM × 1.6 = VPR, tm = 60 seconds,
partial discharge < 5 pC
VPR
After Environmental Tests Subgroup 1 896 V peak
After Input and/or Safety Test Subgroup 2
and Subgroup 3
VIORM × 1.2 = VPR, tm = 60 seconds,
partial discharge < 5 pC
672 V peak
Highest Allowable Overvoltage Transient overvoltage, tTR = 10 seconds VTR 4000 V peak
Safety-Limiting Values
Maximum value allowed in the event of a failure
(see Figure 3)
Case Temperature TS 150 °C
Side 1 Current IS1 160 mA
Side 2 Current IS2 170 mA
Insulation Resistance at TS VIO = 500 V RS >109 Ω
CASE TEMPERATURE (°C)
SAFETY-LIMITING CURRENT (mA)
0
0
200
180
100
80
60
40
20
50 100 150 200
SIDE #1 SIDE #2
04642-003
120
140
160
Figure 3. Thermal Derating Curve, Dependence of Safety-Limiting Values
on Case Temperature per DIN V VDE V 0884-10
RECOMMENDED OPERATING CONDITIONS
Table 12.
Parameter Rating
Operating Temperature (TA)1 −40°C to +105°C
Operating Temperature (TA)2 −40°C to +125°C
Supply Voltages (VDD1, VDD2)1, 3 2.7 V to 5.5 V
Supply Voltages (VDD1, VDD2)2, 3 3.0 V to 5.5 V
Input Signal Rise and Fall Times 1.0 ms
1 Does not apply to ADuM1200W and ADuM1201W automotive grade
products.
2 Applies to ADuM1200W and ADuM1201W automotive grade products.
3 All voltages are relative to the respective ground. See the DC Correctness and
Magnetic Field Immunity section for information on immunity to external
magnetic fields.
ESD CAUTION
Table 14. Maximum Continuous Working Volmge
A
M
ESD [electrosmic discharge) sensitive deviu.
Chavged dams: and mum boards can dwxchavge
wmhom daemon Mmaugh ms pmdun fealmes
paxemed or pvopnexary pvmemon cwwmy, damage
may cum on dewces sumened m hm energy ESD
Therefare, pvopev ESD premmions shou‘d be Kaken m
avmd pevfolmance degvadamm 0! loss umnmunamy
Data Sheet ADuM1200/ADuM1201
Rev. K | Page 21 of 28
ABSOLUTE MAXIMUM RATINGS
Ambient temperature = 25°C, unless otherwise noted.
Table 13.
Parameter Rating
Storage Temperature (TST) −55°C to +150°C
Ambient Operating Temperature (TA)1 −40°C to +105°C
Ambient Operating Temperature (TA)2 −40°C to +125°C
Supply Voltages (VDD1, VDD2)3 −0.5 V to +7.0 V
Input Voltages (VIA, VIB)3, 4 −0.5 V to VDDI + 0.5 V
Output Voltages (VOA, VOB)3, 4 −0.5 V to VDDO + 0.5 V
Average Output Current per Pin (I
O
)
5
−11 mA to +11 mA
Common-Mode Transients (CML, CMH)6 −100 kV/µs to +100 kV/µs
1 Does not apply to ADuM1200W and ADuM1201W automotive grade
products.
2 Applies to ADuM1200W and ADuM1201W automotive grade products.
3 All voltages are relative to the respective ground.
4 VDDI and VDDO refer to the supply voltages on the input and output sides of a
given channel, respectively.
5 See Figure 3 for maximum rated current values for various temperatures.
6 Refers to common-mode transients across the insulation barrier.
Common-mode transients exceeding the absolute maximum ratings
can cause latch-up or permanent damage.
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
ESD CAUTION
Table 14. Maximum Continuous Working Voltage1
Parameter Max Unit Constraint
AC Voltage, Bipolar Waveform 565 V peak 50-year minimum lifetime
AC Voltage, Unipolar Waveform
Functional Insulation 1131 V peak Maximum approved working voltage per IEC 60950-1
Basic Insulation 560 V peak Maximum approved working voltage per IEC 60950-1 and VDE V 0884-10
DC Voltage
Functional Insulation 1131 V peak Maximum approved working voltage per IEC 60950-1
Basic Insulation 560 V peak Maximum approved working voltage per IEC 60950-1 and VDE V 0884-10
1 Refers to continuous voltage magnitude imposed across the isolation barrier. See the Insulation Lifetime section for more details.
_I=I=I:J
_|=|=|:L
333
EEK
ADuM1200/ADuM1201 Data Sheet
Rev. K | Page 22 of 28
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
1 8
2 7
3 6
4 5
TOP VIEW
(Not to Scale)
ADuM1200
0
4642-004
V
DD1
V
IA
V
IB
GND
1
V
DD2
V
OA
V
OB
GND
2
04642-005
1 8
2 7
3 6
4 5
TOP VIEW
(Not to Scale)
ADuM1201
VDD1
VOA
VIB
GND1
VDD2
VIA
VOB
GND2
Figure 4. ADuM1200 Pin Configuration Figure 5. ADuM1201 Pin Configuration
Table 15. ADuM1200 Pin Function Descriptions
Pin
No. Mnemonic Description
1 VDD1 Supply Voltage for Isolator Side 1.
2 VIA Logic Input A.
3 VIB Logic Input B.
4 GND1 Ground 1. Ground Reference for Isolator Side 1.
5 GND2 Ground 2. Ground Reference for Isolator Side 2.
6 VOB Logic Output B.
7 VOA Logic Output A.
8 VDD2 Supply Voltage for Isolator Side 2.
Table 16. ADuM1201 Pin Function Descriptions
Pin
No. Mnemonic Description
1 VDD1 Supply Voltage for Isolator Side 1.
2 VOA Logic Output A.
3 VIB Logic Input B.
4 GND1 Ground 1. Ground Reference for Isolator Side 1.
5 GND2 Ground 2. Ground Reference for Isolator Side 2.
6 VOB Logic Output B.
7 VIA Logic Input A.
8 VDD2 Supply Voltage for Isolator Side 2.
Table 17. ADuM1200 Truth Table (Positive Logic)
VIA Input VIB Input VDD1 State VDD2 State VOA Output VOB Output Notes
H H Powered Powered H H
L L Powered Powered L L
H L Powered Powered H L
L H Powered Powered L H
X X Unpowered Powered H H Outputs return to the input state within
1 μs of VDDI power restoration.
X X Powered Unpowered Indeterminate Indeterminate Outputs return to the input state within
1 μs of VDDO power restoration.
Table 18. ADuM1201 Truth Table (Positive Logic)
VIA Input VIB Input VDD1 State VDD2 State VOA Output VOB Output Notes
H H Powered Powered H H
L L Powered Powered L L
H L Powered Powered H L
L H Powered Powered L H
X X Unpowered Powered Indeterminate H Outputs return to the input state within
1 μs of VDDI power restoration.
X X Powered Unpowered H Indeterminate Outputs return to the input state within
1 μs of VDDO power restoration.
W
M
5v
5v
5v
:w
5v
:v
Data Sheet ADuM1200/ADuM1201
Rev. K | Page 23 of 28
TYPICAL PERFORMANCE CHARACTERISTICS
04642-006
DATA RATE (Mbps)
CURRENT/CHANNEL (mA)
0
0
6
2
8
10
10 20 30
5V 3V
4
Figure 6. Typical Input Supply Current per Channel vs. Data Rate
for 5 V and 3 V Operation
04642-007
DATA RATE (Mbps)
CURRENT/CHANNEL (mA)
0
0
3
2
1
4
10 20 30
5V
3V
Figure 7. Typical Output Supply Current per Channel vs. Data Rate
for 5 V and 3 V Operation (No Output Load)
04642-008
DATA RATE (Mbps)
CURRENT/CHANNEL (mA)
0
0
3
2
1
4
10 20 30
5V
3V
Figure 8. Typical Output Supply Current per Channel vs. Data Rate
for 5 V and 3 V Operation (15 pF Output Load)
04642-009
DATA RATE (Mbps)
CURRENT (mA)
0
0
15
10
5
20
10 20 30
5V
3V
Figure 9. Typical ADuM1200 VDD1 Supply Current vs. Data Rate
for 5 V and 3 V Operation
04642-010
DATA RATE (Mbps)
CURRENT (mA)
0
0
3
2
1
4
10 20 30
5V 3V
Figure 10. Typical ADuM1200 VDD2 Supply Current vs. Data Rate
for 5 V and 3 V Operation
04642-011
DATA RATE (Mbps)
CURRENT (mA)
0
0
6
2
8
10
10 20 30
5V
3V
4
Figure 11. Typical ADuM1201 VDD1 or VDD2 Supply Current vs. Data Rate
for 5 V and 3 V Operation
ADuM1200/ADuM1201 Data Sheet
Rev. K | Page 24 of 28
APPLICATIONS INFORMATION
PCB LAYOUT
The ADuM1200/ADuM1201 digital isolators require no external
interface circuitry for the logic interfaces. Power supply bypassing
is strongly recommended at the input and output supply pins.
The capacitor value must be between 0.01 μF and 0.1 μF.
The total lead length between both ends of the capacitor and
the input power supply pin must not exceed 20 mm.
See the AN-1109 Application Note for board layout guidelines.
PROPAGATION DELAY-RELATED PARAMETERS
Propagation delay is a parameter that describes the time it takes
a logic signal to propagate through a component. The propagation
delay to a logic low output can differ from the propagation delay
to a logic high output.
INPUT (
V
Ix
)
OUTPUT (V
Ox
)
t
PLH
t
PHL
50%
50%
04642-012
Figure 12. Propagation Delay Parameters
Pulse width distortion is the maximum difference between
these two propagation delay values and is an indication of
how accurately the timing of the input signal is preserved.
Channel-to-channel matching refers to the maximum amount
that the propagation delay differs between channels within a
single ADuM1200/ADuM1201 component.
Propagation delay skew refers to the maximum amount that
the propagation delay differs between multiple ADuM1200/
ADuM1201 components operating under the same conditions.
DC CORRECTNESS AND MAGNETIC FIELD IMMUNITY
Positive and negative logic transitions at the isolator input send
narrow (~1 ns) pulses to the decoder via the transformer. The
decoder is bistable and is therefore either set or reset by the pulses,
indicating input logic transitions. In the absence of logic transitions
of more than ~1 μs at the input, a periodic set of refresh pulses
indicative of the correct input state is sent to ensure dc correctness
at the output. If the decoder receives no internal pulses for more
than about 5 μs, the input side is assumed to be unpowered or
nonfunctional, in which case the isolator output is forced to a
default state (see Table 17 and Table 18) by the watchdog timer
circuit.
The ADuM1200/ADuM1201 are extremely immune to external
magnetic fields. The limitation on the magnetic field immunity
of the ADuM1200/ADuM1201 is set by the condition in which
induced voltage in the receiving coil of the transformer is suf-
ficiently large enough to either falsely set or reset the decoder.
The following analysis defines the conditions under which this
can occur.
The 3 V operating condition of the ADuM1200/ADuM1201 is
examined because it represents the most susceptible mode of
operation.
The pulses at the transformer output have an amplitude greater
than 1.0 V. The decoder has a sensing threshold at about 0.5 V,
therefore establishing a 0.5 V margin in which induced voltages
can be tolerated. The voltage induced across the receiving coil is
given by
V = (−dβ/dt)Σ∏rn2; n = 1, 2, … , N
where:
β is the magnetic flux density (gauss).
N is the number of turns in the receiving coil.
rn is the radius of the nth turn in the receiving coil (cm).
Given the geometry of the receiving coil in the ADuM1200/
ADuM1201 and an imposed requirement that the induced
voltage be 50% at most of the 0.5 V margin at the decoder, a
maximum allowable magnetic field is calculated, as shown in
Figure 13.
MAGNETIC FIELD FREQUENCY (Hz)
100
MAXIMUM ALLOWABLE MAGNETIC FLUX
DENSITY (kgauss)
0.001 1M
10
0.01
1k 10k 10M
0.1
1
100M100k
04642-013
Figure 13. Maximum Allowable External Magnetic Flux Density
For example, at a magnetic field frequency of 1 MHz, the
maximum allowable magnetic field of 0.2 kgauss induces a
voltage of 0.25 V at the receiving coil. This is about 50% of the
sensing threshold and does not cause a faulty output transition.
Similarly, if such an event occurs during a transmitted pulse (and
has the worst-case polarity), it reduces the received pulse from
>1.0 V to 0.75 V—still well above the 0.5 V sensing threshold of
the decoder.
The preceding magnetic flux density values correspond to
specific current magnitudes at given distances away from the
ADuM1200/ADuM1201 transformers. Figure 14 expresses these
allowable current magnitudes as a function of frequency for
selected distances. As seen, the ADuM1200/ADuM1201 are
extremely immune and can be affected only by extremely large
currents operating very close to the component at a high frequency.
For the 1 MHz example, place a 0.5 kA current 5 mm away from
the ADuM1200/ADuM1201 to affect the operation of the
component.
Data Sheet ADuM1200/ADuM1201
Rev. K | Page 25 of 28
MAGNETIC FIELD FREQUENCY (Hz)
MAXIMUM ALLOWABLE CURRENT (kA)
1000
100
10
1
0.1
0.011k 10k 100M
100k 1M 10M
DISTANCE = 5mm
DISTANCE = 1m
DISTANCE = 100mm
04642-014
Figure 14. Maximum Allowable Current for Various
Current-to-ADuM1200/ADuM1201 Spacings
Note that, at combinations of strong magnetic fields and high
frequencies, any loops formed by PCB traces can induce suffi-
ciently large error voltages to trigger the threshold of succeeding
circuitry. Take care in the layout of such traces to avoid this
possibility.
POWER CONSUMPTION
The supply current at a given channel of the ADuM1200/
ADuM1201 isolator is a function of the supply voltage, the data
rate of the channel, and the output load of the channel.
For each input channel, the supply current is given by
IDDI = IDDI (Q) f ≤ 0.5fr
IDDI = IDDI (D) × (2f − fr) + IDDI (Q) f > 0.5fr
For each output channel, the supply current is given by
IDDO = IDDO (Q) f ≤ 0.5fr
IDDO = (IDDO (D) + (0.5 × 10−3) × CLVDDO) × (2f − fr) + IDDO (Q)
f > 0.5fr
where:
IDDI (D), IDDO (D) are the input and output dynamic supply currents
per channel (mA/Mbps).
CL is the output load capacitance (pF).
VDDO is the output supply voltage (V).
f is the input logic signal frequency (MHz, half of the input data
rate, NRZ signaling).
fr is the input stage refresh rate (Mbps).
IDDI (Q), IDDO (Q) are the specified input and output quiescent
supply currents (mA).
To calculate the total IDD1 and IDD2 supply currents, the supply
currents for each input and output channel corresponding to
IDD1 and IDD2 are calculated and totaled. Figure 6 and Figure 7
provide per-channel supply currents as a function of data rate
for an unloaded output condition. Figure 8 provides per-
channel supply current as a function of data rate for a 15 pF
output condition. Figure 9 through Figure 11 provide total
VDD1 and VDD2 supply current as a function of data rate for
ADuM1200 and ADuM1201 channel configurations.
INSULATION LIFETIME
All insulation structures eventually break down when subjected
to voltage stress over a sufficiently long period. The rate of insu-
lation degradation is dependent on the characteristics of the voltage
waveform applied across the insulation. In addition to the testing
performed by the regulatory agencies, Analog Devices carries
out an extensive set of evaluations to determine the lifetime of
the insulation structure within the ADuM1200/ADuM1201.
Analog Devices performs accelerated life testing using voltage
levels higher than the rated continuous working voltage. Accel-
eration factors for several operating conditions are determined.
These factors allow calculation of the time to failure at the actual
working voltage. The values shown in Table 14 summarize the
peak voltage for 50 years of service life for a bipolar ac operating
condition and the maximum CSA/VDE approved working volt-
ages. In many cases, the approved working voltage is higher than
the 50-year service life voltage. Operation at these high working
voltages can lead to shortened insulation life in some cases.
The insulation lifetime of the ADuM1200/ADuM1201 depends
on the voltage waveform type imposed across the isolation barrier.
The iCoupler insulation structure degrades at different rates
depending on whether the waveform is bipolar ac, unipolar ac,
or dc. Figure 15, Figure 16, and Figure 17 illustrate these different
isolation voltage waveforms, respectively.
Bipolar ac voltage is the most stringent environment. The goal
of a 50-year operating lifetime under the ac bipolar condition
determines the Analog Devices recommended maximum
working voltage.
In the case of unipolar ac or dc voltage, the stress on the insu-
lation is significantly lower, which allows operation at higher
working voltages yet still achieves a 50-year service life. The
working voltages listed in Table 14 can be applied while main-
taining the 50-year minimum lifetime provided the voltage
conforms to either the unipolar ac or dc voltage cases. Any cross-
insulation voltage waveform that does not conform to Figure 16
or Figure 17 is to be treated as a bipolar ac waveform, and the
peak voltage is to be limited to the 50-year lifetime voltage value
listed in Table 14.
Note that the voltage presented in Figure 16 is shown as sinu-
soidal for illustration purposes only. It is meant to represent any
voltage waveform varying between 0 V and some limiting value.
The limiting value can be positive or negative, but the voltage
cannot cross 0 V.
0V
RATED PEAK VOLTAGE
04642-021
Figure 15. Bipolar AC Waveform
ADuM1200/ADuM1201 Data Sheet
Rev. K | Page 26 of 28
0V
RATED PEAK VOLTAGE
04642-022
Figure 16. Unipolar AC Waveform
0V
RATED PEAK VOLTAGE
04642-023
Figure 17. DC Waveform
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Data Sheet ADuM1200/ADuM1201
Rev. K | Page 27 of 28
OUTLINE DIMENSIONS
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-012-AA
012407-A
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
0.50 (0.0196)
0.25 (0.0099) 45°
8°
0°
1.75 (0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
4
1
85
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
6.20 (0.2441)
5.80 (0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
Figure 18. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body (R-8)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model1, 2
Number
of Inputs,
VDD1 Side
Number
of Inputs,
VDD2 Side
Maximum
Data Rate
(Mbps)
Maximum
Propagation
Delay, 5 V (ns)
Maximum
Pulse Width
Distortion (ns)
Temperature
Range
Package
Option3
ADuM1200AR 2 0 1 150 40 −40°C to +105°C R-8
ADuM1200ARZ 2 0 1 150 40 −40°C to +105°C R-8
ADuM1200ARZ-RL7 2 0 1 150 40 −40°C to +105°C R-8
ADuM1200BR 2 0 10 50 3 −40°C to +105°C R-8
ADuM1200BRZ 2 0 10 50 3 −40°C to +105°C R-8
ADuM1200BRZ-RL7 2 0 10 50 3 −40°C to +105°C R-8
ADuM1200CR 2 0 25 45 3 −40°C to +105°C R-8
ADuM1200CRZ 2 0 25 45 3 −40°C to +105°C R-8
ADuM1200CRZ-RL7 2 0 25 45 3 −40°C to +105°C R-8
ADuM1200WSRZ 2 0 1 150 40 −40°C to +125°C R-8
ADuM1200WSRZ-RL7 2 0 1 150 40 −40°C to +125°C R-8
ADuM1200WTRZ 2 0 10 50 3 −40°C to +125°C R-8
ADuM1200WTRZ-RL7 2 0 10 50 3 −40°C to +125°C R-8
ADuM1200WURZ 2 0 25 45 3 −40°C to +125°C R-8
ADuM1200WURZ-RL7 2 0 25 45 3 −40°C to +125°C R-8
ADuM1201AR 1 1 1 150 40 −40°C to +105°C R-8
ADuM1201AR-RL7 1 1 1 150 40 −40°C to +105°C R-8
ADuM1201ARZ 1 1 1 150 40 −40°C to +105°C R-8
ADuM1201ARZ-RL7 1 1 1 150 40 −40°C to +105°C R-8
ADuM1201BR 1 1 10 50 3 −40°C to +105°C R-8
ADuM1201BR-RL7 1 1 10 50 3 −40°C to +105°C R-8
ADuM1201BRZ 1 1 10 50 3 −40°C to +105°C R-8
ADuM1201BRZ-RL7 1 1 10 50 3 −40°C to +105°C R-8
ADuM1201CR 1 1 25 45 3 −40°C to +105°C R-8
ADuM1201CRZ 1 1 25 45 3 −40°C to +105°C R-8
ADuM1201CRZ-RL7 1 1 25 45 3 −40°C to +105°C R-8
monnm 5 Analug nuim, Inn All "gm; Itsevvedv Tvidemivks and
ANALOG
DEVICES
www.3nalug.com
ADuM1200/ADuM1201 Data Sheet
Rev. K | Page 28 of 28
Model1, 2
Number
of Inputs,
VDD1 Side
Number
of Inputs,
VDD2 Side
Maximum
Data Rate
(Mbps)
Maximum
Propagation
Delay, 5 V (ns)
Maximum
Pulse Width
Distortion (ns)
Temperature
Range
Package
Option3
ADuM1201WSRZ 1 1 1 150 40 −40°C to +125°C R-8
ADuM1201WSRZ-RL7
1
1
1
150
40
−40°C to +125°C
R-8
ADuM1201WTRZ 1 1 10 50 3 −40°C to +125°C R-8
ADuM1201WTRZ-RL7 1 1 10 50 3 −40°C to +125°C R-8
ADuM1201WURZ 1 1 25 45 3 −40°C to +125°C R-8
ADuM1201WURZ-RL7 1 1 25 45 3 −40°C to +125°C R-8
1 Z = RoHS Compliant Part.
2 W = Qualified for Automotive Applications.
3 R-8 = 8-lead narrow-body SOIC_N.
AUTOMOTIVE PRODUCTS
The ADuM1200W/ADuM1201W models are available with controlled manufacturing to support the quality and reliability requirements
of automotive applications. Note that these automotive models may have specifications that differ from the commercial models; therefore,
designers should review the Specifications section of this data sheet carefully. Only the automotive grade products shown are available for
use in automotive applications. Contact your local Analog Devices account representative for specific product ordering information and
to obtain the specific Automotive Reliability reports for these models.
©2004–2016 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D04642-0-9/16(K)
