RT6210 Datasheet by Richtek USA Inc.

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RT6210

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Features



0.8V Feedback Reference Voltage with ±±

±±

±1.5%

Accuracy



Wide Input Voltage Range : 5.2V to 80V



Output Current : 500mA



Integrated N-MOSFETs



Current-Mode Control



Fixed Switching Frequency : 350kHz



Programmable Output Voltage : 0.8V to 72V



Low < 3μμ

μμ

μA Shutdown Quiescent Current



Up to 92% Efficiency



Pulse-Skipping Mode for Light-Load Efficiency



Programmable Soft-Start Time



Cycle-by-Cycle Current Limit Protection



Input Under-Voltage Lockout, Output Under-Voltage

and Thermal Shutdown Protection

General Description

The RT6210 is a 80V, 500mA, 350kHz, high-efficiency,

synchronous step-down DC-DC converter with an input-

voltage range of 5.2V to 80V and a programmable output-

voltage range of 0.8V to 72V. It features current-mode

control to simplify external compensation and to optimize

transient response with a wide range of inductors and output

capacitors. High efficiency can be achieved through

integrated N-MOSFETs, and pulse-skipping mode at light

loads. With EN pin, power-up sequence can be more

flexible and shutdown quiescent current can be reduced

to < 3μA.

The RT6210 features cycle-by-cycle current limit for over-

current protection against short-circuit outputs, and user-

programmable soft-start time to prevent inrush current

during startup. It also includes input under-voltage lockout,

output under-voltage, and thermal shutdown protection to

provide safe and smooth operation in all operating

conditions.

The RT6210 is available in the SOP-8 (Exposed pad)

package.

500mA, 80V, 350kHz Synchronous Step-Down Converter

Applications

4-20mA Loop-Powered Sensors

OBD-II Port Power Supplies

Low-Power Standby or Bias Voltage Supplies

Industrial Process Control, Metering, and Security

Systems

High-Voltage LDO Replacement

Telecommunications Systems

Commercial Vehicle Power Supplies

General Purpose Wide Input Voltage Regulation

Simplified Application Circuit

RT6210

GND

VIN BOOT L1

CBOOT

COUT

SW VOUT

VIN

CIN

Enable R1

COMP

CSS CP

CFF

Efficiency vs. Output Current

100

0 0.1 0.2 0.3 0.4 0.5

Output Current (A)

Efficiency (%)

VOUT = 12V

VIN = 24V

VIN = 36V

VIN = 48V

VIN = 60V

VIN = 80V

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Functional Pin Description

Pin No. Pin Name Pin Function

1 BOOT

Bootstrap capacitor connection node for high-side gate driver. Connect a 0.1F

ceramic capacitor from BOOT to SW to power the internal gate driver.

2 VIN Supply voltage input, 5.2V to 80V. Bypass VIN to GND with a large high-quality

capacitor.

3 SW Switch node for output inductor connection.

4, 9

(Exposed Pad) GND

Power ground. The exposed pad must be connected to GND and well soldered

to the input and output capacitors and a large PCB copper area for maximum

power dissipation.

5 FB

Feedback voltage input. Connect FB to the midpoint of the external feedback

resistor divider to sense the output voltage. The device regulates the FB voltage

at 0.8V (typical) Feedback Reference Voltage.

6 COMP

Compensation node for the compensation of the regulation control loop.

Connect a series RC network from COMP to GND. In some cases, another

capacitor from COMP to GND may be required.

7 EN

Enable control input. A logic High (VEN > 1.3V) enables the device, and a logic

Low (VEN < 0.875V) shuts down the device, reducing the supply current to 3A

or below. Connect EN pin to VIN pin with a 100k pull-up resistor for automatic

startup.

8 SS

Soft-start capacitor connection node. Connect an external capacitor from SS to

GND to set the soft-start time. Do not leave SS pin unconnected. A capacitor of

capacitance from 10nF to 100nF is recommended, which can set the soft-start

time from 1.33ms to 13.3ms, accordingly.

Marking Information

Note :

Richtek products are :

 RoHS compliant and compatible with the current require-

ments of IPC/JEDEC J-STD-020.

 Suitable for use in SnPb or Pb-free soldering processes.

Ordering Information

Pin Configuration

(TOP VIEW)

SOP-8 (Exposed Pad)

BOOT

VIN

GND

COMP

GND

RT6210

Package Type

SP : SOP-8 (Exposed Pad-Option 2)

Lead Plating System

G : Green (Halogen Free and Pb Free)

RT6210

GSPYMDNN

RT6210GSP : Product Number

YMDNN : Date Code

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Functional Block Diagram

Operation

The RT6210 is a synchronous step-down converter,

integrated with both high-side (HS) and low-side (LS)

MOSFETs to reduce external component count and a gate

driver with dead-time control logic to prevent shoot-through

condition from happening. The RT6210 also features

constant frequency and peak current-mode control with

slope compensation. During PWM operation, output

voltage is regulated down, and is sensed from the FB pin

to be compared with an internal 0.8V reference voltage

VREF. In normal operation, the high-side N-MOSFET is

turned on when an S-R latch is set by the rising edge of

an internal oscillator output as the PWM clock, and is

turned off when the S-R latch is reset by the output of a

(high-side) current comparator, which compares the high-

side sensed current signal with the current signal related

to the COMP voltage. While the high-side N-MOSFET is

turned off, the low-side N-MOSFET will be turned on. If

the output voltage is not established, the high-side power

switch will be turned on again and another cycle begins.

Pulse Skipping Operation

At very light-load condition, the RT6210 provides pulse

skipping technique to decrease switching loss for better

efficiency. When load current decreases, the FB voltage

VFB will increase slightly. With VFB 1% higher than VREF,

the COMP voltage will be clamped at a minimum value

and the converter will enter into pulse skipping mode. When

the converter operates in pulse skipping mode, the internal

oscillator will be stopped, which makes the switching period

being extended. In pulse skipping mode, as the load

current decreases, VFB will be discharged more slowly,

which in turn will extend the switching period even more.

Error Amplifier

The RT6210 adopts a transconductance amplifier as the

error amplifier. The error amplifier of a typical 970μA/V

transconductance (gm) compares the feedback voltage

VFB with the lower one of the soft-start voltage or the

internal reference voltage VREF, 0.8V. As VFB drops due

to the load current increase, the output voltage of the error

-UV

Comparator

Oscillator

0.4V

Internal

Regulator

Shutdown

Comparator

BOOT

VIN

GND

COMP

HS Switch

Current

Comparator

-EA

0.8V

Gate Driver

with Dead

Time Control

1.2V

Slope

Compensation

LS Switch

Current

Comparator

UVLO

Logic &

Clamp

Control

BOOT

UVLO

Current

Sense

Current

Sense

6µA

Protection

Thermal

Shutdown

1µA

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amplifier will go up so that the device will supply more

inductor current to match the load current. The frequency

compensation components, such as the series resistor

and capacitor, and an optional capacitor, are placed between

the COMP pin and ground.

Oscillator

The internal oscillator frequency is set to a typical 350kHz

as a fixed frequency for PWM operation.

Slope Compensation

In order to prevent sub-harmonic oscillations that may

occur over all specified load and line conditions when

operating at duty cycle higher than 50%, the RT6210

features an internal slope compensation, which adds a

compensating slope signal to the sensed current signal

to support applications with duty cycle up to 93%.

Internal Regulator

When the VIN is plugged in, the internal regulator will

generate a low voltage to drive internal control circuitry

and to supply the bootstrap power for the high-side gate

driver.

Chip Enable

The RT6210 provides an EN pin, as an external chip enable

control, to enable or disable the device. When VIN is higher

than the input under-voltage lockout threshold (VUVLO) with

the EN voltage (VEN) higher than 1.3V, the converter will

be turned on. When VEN is lower than 0.875V, the converter

will enter into shutdown mode, during which the supply

current can be even reduced to 3μA or below.

External Soft-Start

The RT6210 provides external soft-start feature to reduce

input inrush current. The soft-start time can be programmed

by selecting the value of the capacitor CSS connected from

the SS pin to GND. An internal current source ISS (typically,

6μA) charges the external capacitor CSS to build a soft-

start ramp voltage. The feedback voltage VFB will be

compared with the soft-start ramp voltage during soft-start

time. For the RT6210, the external capacitor CSS is

required, and for soft-start control, the SS pin should never

be left unconnected, and it is not recommended to be

connected to an external voltage source. The soft-start

time depends on CSS capacitance; for example, a 0.1μF

capacitor for programming soft-start time will result in

18.333ms (typ.) soft-start time.

Output Under-Voltage Protection (UVP) with Hiccup

Mode

The RT6210 provides under-voltage protection with hiccup

mode. When the feedback voltage VFB drops below under-

voltage protection threshold VTH-UVP, half of the feedback

reference voltage VREF, the UVP function will be triggered

to turn off the high-side MOSFET immediately. The

converter will attempt auto-recovery soft-start after under-

voltage condition has occurred for a period of time. Once

the under-voltage condition is removed, the converter will

resume switching and be back to normal operation.

Current Limit Protection

The RT6210 provides cycle-by-cycle current limit

protection against over-load or short-circuited condition.

When the peak inductor current reaches the current limit,

the high-side MOSFET will be turned off immediately with

no violating minimum on-time tON_MIN requirement to

prevent the device from operating in an over-current

condition.

Thermal Shutdown

The RT6210 provides over-temperature protection (OTP)

function to prevent the chip from damaging due to over-

heating. The over-temperature protection function will shut

down the switching operation when the junction

temperature exceeds 165°C. Once the over-temperature

condition is removed, the converter will resume switching

and be back to normal operation.

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Electrical Characteristics

(VIN = 12V, TA = 25°C, unless otherwise specified)

Absolute Maximum Ratings (Note 1)

 VIN (Note 5) ----------------------------------------------------------------------------------------------------------- −0.3V to 90V

 SW

DC ----------------------------------------------------------------------------------------------------------------------- −0.3V to (VIN + 0.3V)

<200ns ----------------------------------------------------------------------------------------------------------------- −5V to (VIN + 4V)

 EN Pin ------------------------------------------------------------------------------------------------------------------ −0.3V to 90V

 BOOT to SW, VBOOT − VSW --------------------------------------------------------------------------------------- −0.3V to 6V

 Other Pins ------------------------------------------------------------------------------------------------------------- −0.3V to 6V

 Power Dissipation, PD @ TA = 25°C

SOP-8 (Exposed Pad) --------------------------------------------------------------------------------------------- 3.44W

 Package Thermal Resistance (Note 2)

SOP-8 (Exposed Pad), θJA --------------------------------------------------------------------------------------- 29°C/W

SOP-8 (Exposed Pad), θJC --------------------------------------------------------------------------------------- 2°C/W

 Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------- 260°C

 Junction Temperature ----------------------------------------------------------------------------------------------- 150°C

 Storage Temperature Range --------------------------------------------------------------------------------------- −65°C to 150°C

 ESD Susceptibility (Note 3)

HBM (Human Body Model) --------------------------------------------------------------------------------------- 2kV

Parameter Symbol Test Conditions Min Typ Max Unit

Supply Current

Shutdown Supply Current ISHDN

VEN = 0V -- 0.5 3 A

VEN = 0V, VIN = 80V -- 20 --

Quiescent Supply Current IQ V

EN = 3V, VFB = 0.9V -- 0.6 -- mA

Reference

Feedback Reference Voltage VREF 5V  VIN  80V 0.788 0.8 0.812 V

Enable and UVLO

Input Under-Voltage Lockout

Threshold VUVLO V

IN rising 4 4.6 5.2 V

Input Under-Voltage Lockout

Hysteresis VUVLO_HYS 150 300 450 mV

EN Input Threshold

Voltage

Rising VTH_EN 1.1 1.2 1.3 V

Hysteresis VTH_EN_HYS Falling 25 -- 225 mV

Recommended Operating Conditions (Note 4)

Supply Input Voltage ------------------------------------------------------------------------------------------------ 5.2V to 80V

Ambient Temperature Range -------------------------------------------------------------------------------------- −40°C to 85°C

Junction Temperature Range -------------------------------------------------------------------------------------- −40°C to 125°C

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Parameter Symbol Test Conditions Min Typ Max Unit

Error Amplifier

Error Amplifier Transconductance gm_EA IC = 10A -- 970 -- A/V

Error Amplifier Source/Sink Current -- 160 -- A

COMP to Current Sense

Transconductance gm_CS -- 0.9 -- A/V

Internal MOSFET

High-Side Switch On-Resistance

RDS(ON)_H1 -- 660 850

m

RDS(ON)_H2 V

IN = 80V -- 930 --

Low-Side Switch On-Resistance RDS(ON)_L -- 330 500 m

Switching

Oscillation Frequency fOSC1 -- 350 -- kHz

Short-Circuit Oscillation Frequency fOSC2 V

FB = 0V -- 100 -- kHz

Maximum Duty Cycle DMAX V

FB = 0.7V -- 93 -- %

Minimum On-Time tON_MIN -- 90 -- ns

Soft-Start

Soft-Start Current ISS V

SS = 0V -- 6 -- A

Protection Function

High-Side Switch Leakage Current VEN = 0V, VSW = 0V -- 0 10 A

High-Side Switch Current Limit ILIM_HS Minimum duty cycle 600 860 -- mA

Under-Voltage Protection Threshold VTH_UVP After soft-start, with respect

to VFB -- 50 -- %

Thermal Shutdown TSD -- 165 -- C

Note 1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.

These are stress ratings only, and functional operation of the device at these or any other conditions beyond those

indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating

conditions may affect device reliability.

Note 2. θJA is measured under natural convection (still air) at TA = 25°C with the component mounted on a high effective-

thermal-conductivity four-layer test board on a JEDEC 51-7 thermal measurement standard. θJC is measured at the

exposed pad of the package.

Note 3. Devices are ESD sensitive. Handling precaution is recommended.

Note 4. The device is not guaranteed to function outside its operating conditions.

Note 5. When VIN is beyond the recommended operating voltage (80V) and within the absolute maximum voltage (90V), the

conducting current through SW pin has to be less than 0.5A to avoid instant damage to the devices.

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Typical Application Circuit

RT6210

GND

VIN BOOT L1

100nF

CBOOT

COUT

SW VOUT

VIN

CIN

Enable

COMP

0.1µF

CSS CP

CFF*

3.3V

D1*

DBOOT*

* : Optional

RBOOT

RS*

CS*

0

Table 1. Suggested component selections for the application of 500mA load current for some common

output voltages

VOUT (V) R1 (k) R2 (k) L1 (H) COUT (F) RC (k) CC (nF) CP (pF)

1 2.49 10 22 20 4.02 6.8 NC

1.2 4.99 10 22 20 4.99 6.8 NC

1.8 12.4 10 33 20 6.98 6.8 NC

2.5 21 10 33 20 10 6.8 NC

3.3 30.9 10 47 20 16 6.8 68

5 52.3 10 100 20 24 6.8 47

9 102 10 150 20 34.9 6.8 47

(Note) 140 10 220 20 34.9 6.8 47

Note : For VIN < 17V & VOUT = 12V application, the snubber components need to be added (RS = 3.9Ω, CS = 1nF)

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Typical Operating Characteristics

Output Voltage vs. Output Current

3.10

3.14

3.18

3.22

3.26

3.30

3.34

3.38

3.42

3.46

3.50

50 100 150 200 250 300 350 400 450 500

Output Current (mA)

Output Voltage (V)

VOUT = 3.3V

VIN = 60V

VIN = 48V

VIN = 36V

VIN = 24V

VIN = 12V

VIN = 5V

Efficiency vs. Output Current

100

0 0.1 0.2 0.3 0.4 0.5

Output Current (A)

Efficiency (%)

VOUT = 12V

VIN = 24V

VIN = 36V

VIN = 48V

VIN = 60V

VIN = 80V

Efficiency vs. Input Voltage

100

10 15 20 25 30 35 40 45 50 55 60 65 70 75 80

Input Voltage (V)

Efficiency (%)

VOUT = 5V, IOUT = 500mA

Efficiency vs. Output Current

100

0 0.1 0.2 0.3 0.4 0.5

Output Current (A)

Efficiency (%)

VOUT = 3.3V

VIN = 5.2V

VIN = 12V

VIN = 24V

VIN = 36V

VIN = 48V

VIN = 60V

Efficiency vs. Output Current

100

0 0.1 0.2 0.3 0.4 0.5

Output Current (A)

Efficiency (%)

VOUT = 5V

VIN = 12V

VIN = 24V

VIN = 36V

VIN = 48V

VIN = 60V

VIN = 80V

Output Voltage vs. Input Voltage

4.90

4.92

4.94

4.96

4.98

5.00

5.02

5.04

5.06

5.08

5.10

10 15 20 25 30 35 40 45 50 55 60 65 70 75 80

Input Voltage (V)

Output Voltage (V)

VOUT = 5V, IOUT = 500mA

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Feedback Voltage vs. Input Voltage

0.7990

0.7994

0.7998

0.8002

0.8006

0.8010

0.8014

0.8018

5 101520253035404550556065707580

Input Voltage (V)

Feedback Voltage (V)

Upper SW Current Limit vs. Temperature

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

-50 -25 0 25 50 75 100 125

Temperature (°C)

Upper SW Current Limit (A)

VIN = 80V, VOUT = 5V

Upper SW Current Limit vs. Input Voltage

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

10 15 20 25 30 35 40 45 50 55 60 65 70 75 80

Input Voltage (V)

Upper SW Current Limit (A)

VOUT = 5V

Oscillation Frequency vs. Temperature

340

345

350

355

360

365

370

375

380

-50 -25 0 25 50 75 100 125

Temperature (°C)

Oscillation Frequency (kHz) 1

VOUT = 5V, IOUT = 500mA

Oscillation Frequency vs. Input Voltage

340

345

350

355

360

365

370

375

380

10 15 20 25 30 35 40 45 50 55 60 65 70 75 80

Input Voltage (V)

Oscillation Frequency (kHz) 1

VOUT = 5V, IOUT = 500mA

Feedback Voltage vs. Temperature

0.780

0.785

0.790

0.795

0.800

0.805

0.810

0.815

0.820

-50 -25 0 25 50 75 100 125

Temperature (°C)

Feedback Voltage (V)

VIN = 60V

VIN = 50V

VIN = 5V

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Supply Current vs. Input Voltage

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

2.0

5 101520253035404550556065707580

Input Voltage (V)

Supply Current (mA

)

VOUT = 5V, VEN = high

Supply Current vs. Temperature

0.0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.0

-50 -25 0 25 50 75 100 125

Temperature (°C)

Supply Current (mA

)

VIN = 12V, VOUT = 5V, VEN = high

Shutdown Current vs. Input Voltage

5 101520253035404550556065707580

Input Voltage (V)

Shutdown Current (μA) 1

VEN = 0V

Shutdown Current vs. Temperature

0.0

0.5

1.0

1.5

2.0

2.5

3.0

-50 -25 0 25 50 75 100 125

Temperature (°C)

Shutdown Current (μA) 1

VIN = 12V, VEN = 0V

Time (40μs/Div)

Output Ripple Voltage

VOUT

(20mV/Div)

I_Inductor

(100mA/Div)

VIN = 60V, VOUT = 3.3V, IOUT = 10mA

VSW

(30V/Div)

Time (2μs/Div)

Output Ripple Voltage

VOUT

(10mV/Div)

VSW

(40V/Div)

I_Inductor

(500mA/Div)

VIN = 80V, VOUT = 12V, IOUT = 250mA

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Time (4ms/Div)

Power Off from EN

VOUT

(6V/Div)

VEN

(2V/Div)

IOUT

(500mA/Div)

VIN = 80V, VOUT = 12V, IOUT = 500mA

Time (10ms/Div)

Power On from EN

VOUT

(6V/Div)

VEN

(2V/Div)

IOUT

(500mA/Div)

VIN = 80V, VOUT = 12V, IOUT = 500mA

Time (10ms/Div)

Power On from VIN

VOUT

(6V/Div)

VIN

(40V/Div)

VIN = 80V, VOUT = 12V, IOUT = 500mA

I_Inductor

(500mA/Div)

Time (100ms/Div)

Power Off from VIN

VOUT

(6V/Div)

VIN

(40V/Div)

VIN = 80V, VOUT = 12V, IOUT = 500mA

I_Inductor

(500mA/Div)

Time (2μs/Div)

Output Ripple Voltage

VOUT

(10mV/Div)

VSW

(40V/Div)

I_Inductor

(500mA/Div)

VIN = 80V, VOUT = 12V, IOUT = 500mA

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Application Information

Output Voltage Setting

The output voltage can be adjusted by setting the feedback

resistors R1 and R2, as Figure 1. Choose a 10kΩ resistor

for R2 and calculate R1 by using the equation below :

OUT FB R1

VV(1 + )



where VFB is the feedback voltage (typically equal to VREF)

Figure 1. Output Voltage Setting by a Resistive Voltage

Divider

RT6210

GND

VOUT

Chip Enable Operation

The RT6210 provides enable/disable control through the

EN pin. The chip remains in shutdown mode by pulling

the EN pin below Logic-Low threshold (0.875V). During

the shutdown mode, the RT6210 disables most of the

logic circuitry to lower the quiescent current. When VEN

rises above Logic-High threshold (VTH_EN 1.3V), the

RT6210 will begin initialization for a new soft-start cycle.

If the EN pin is floating, VEN will be pulled Low by a 1μA

current drawn from the EN pin. Connecting a 1kΩ to 100kΩ

pull-up resistor is recommended. An external MOSFET

can be added to implement a logic-controlled enable

control. Figure 2 shows the power up sequence, which is

controlled by the EN pin.

The RT6210 also provides enable control through VIN pin.

If the VEN is above Logic-High threshold first, the chip will

remain in shutdown mode until the VIN rises above VUVLO.

Figure 3 shows the power up sequence, which is controlled

by the VIN pin.

Figure 2. Power-Up Sequence Controlled by the EN Pin

VEN

VSS

VSW

VIN

VOUT

Soft-Start Normal Operation with

pulse skipping mode

UVLO

VREF

Soft-Start

Delay time

Figure 3. Power-Up Sequence Controlled by the VIN Pin

VEN

VSS

VSW

VIN

VOUT

Soft-Start Normal Operation with

pulse skipping mode

UVLO

VREF

Soft-Start

Delay time

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Soft-Start

When start-up, a large inrush may be observed for high

output voltages and output capacitances. To solve this,

the RT6210 provides an external soft-start function to

reduce input inrush current to meet various applications.

For the RT6210, the soft-start time tSS can be programmed

by selecting the value of the capacitor CSS connected

between the SS pin and GND. During the soft-start period,

an internal pull-up current source ISS (typically, 6μA)

charges the external capacitor CSS to generate a soft-

start voltage ramp, and then output voltage will follow this

voltage ramp to monotonically start up.

The soft-start time can be calculated as :





SS REF

SS SS

C V + 0.3V

t = I







where ISS = 6μA (typical), VREF is the feedback reference

voltage, and CSS is the external capacitor placed from the

SS pin to GND, where a 10nF to 100nF capacitor is

recommended to set the soft-start time from 1.833ms to

18.333ms.

Figure 4. External Soft-Start Time Setting

VOUT

VSS

tSS

1.1V

ISS

CSS

Current Limit

The RT6210 provides peak current limit function to prevent

chip damaging from short-circuited output, the VIN voltage

and SW voltage are sensed when the internal high-side

MOSFET is turned on. During this period, the VIN-SW

voltage is increasing when the inductor current is

increasing. The peak inductor current will be monitored

every switching cycle. If the current sense signal exceeds

the internal current limit, clamped by the maximum COMP

voltage, the high-side MOSFET will be turned off

immediately, while the minimum on-time tON_MIN

requirement still needs to be met, to prevent the device

from operating in an over-current condition.

In the current-limited condition, the maximum sourcing

current is fixed because the peak inductor current is

limited. When the load is further increasing and is over

the sourcing capability of the high-side switch, the output

voltage will start to drop and eventually be lower than the

under-voltage protection threshold so that the IC will enter

shutdown mode and may restart with hiccup mechanism.

Figure 5. Peak-Current Limit

ILOAD

I_inductor

VSW

VFB UV Threshold

Current Limit

tON_MIN

Under-Voltage Protection

The feedback voltage is constantly monitored for under-

voltage protection. When the feedback voltage is lower

than under-voltage protection threshold VTH-UVP, the under-

voltage protection is triggered, the high-side MOSFET will

be turned off and the low-side MOSFET is turned on to

discharge the output voltage. The under-voltage protection

is not a latched mechanism; if the under-voltage condition

remains for a period of time, the RT6210 will enter hiccup

mode. During the soft-start time, the under-voltage

protection is masked and a 5μs deglitch time is built in

the UVP circuit to prevent false transitions.

Hiccup Mode

If the under-voltage protection condition continues for a

period of time, the RT6210 will enter hiccup mode, in which

the soft-start process will be initialized without VIN being

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re-powered on. During this period of time, the SW starts

to switch since the under-voltage protection is masked

during soft-start time. When soft-start finishes, if the under-

voltage condition is removed, the converter will resume

normal operation; if the under-voltage condition, however,

still remains, that is, the FB voltage is still lower than

under-voltage threshold VTH_UVP, the under-voltage

protection will be triggered again. The cycle will repeat

until this fault condition is removed.

Output Voltage Limitation

The output voltage must be set higher than (VIN x 6.3%)

due to the limitation of the minimum on-time tON_MIN and

switching frequency. When current limiting protection is

triggered and the load current is still increasing slowly,

the output voltage will start to drop and the on-time of the

high-side MOSFET will decrease as well. When the output

voltage drops below VTH_UVP, the under-voltage protection

is triggered to turn off the internal driver to protect the

converter. If the output voltage, however, does not drop

below VTH_UVP yet when the on-time of the high-side

MOSFET has decreased to tON_MIN (~90ns), the internal

gate driver will keep switching to maintain the output

voltage, which may damage the chip under this over-current

condition.

In order to make sure the output voltage can drop below

VTH_UVP once current limiting protection is triggered, the

output voltage setting must be satisfied with the equation

below :

The output voltage at the time, when the switch has been

turned on for the minimum on-time, is

VOUT_MIN = VIN x tON x fOSC1 = 0.0315VIN

where tON_MIN = ~90ns, fOSC1 = 350kHz

The UVP is triggered when the VFB is lower than VTH_UVP,

which is 50%. That is to say VOUT_MIN should be lower

than 50% of the actual VOUT to guarantee the UVP can be

triggered under this condition.

VOUT_MIN < 0.5 x VOUT

The duty cycle limitation can be obtained.

DMIN > 0.063

For example, if the VIN = 50V, the VOUT should be set

higher than 3.15V.

External Bootstrap Diode

A 0.1μF capacitor CBOOT, where a low ESR ceramic

capacitor is typically used, is connected between the

BOOT and SW pins to provide the gate driver supply voltage

for the high-side N-MOSFET.

It is recommended to add an external bootstrap diode

from an external 3.3V supply voltage to the BOOT pin to

improve efficiency when the input voltage VIN is lower than

5.5V or duty cycle is higher than 65%. A low-cost bootstrap

diode can be used, such as IN4148 or BAT54.

Note that the external BOOT voltage must be lower than

5.5V.

Figure 6. External Bootstrap Diode

BOOT

3.3V

100nF

RT6210 CBOOT

Inductor Selection

Output inductor plays a very important role in step-down

converters because it stores energy from input power rail

and releases to output load. For better efficiency, DC

resistance (DCR) of the inductor must be minimized to

reduce copper loss. In addition, since the inductor takes

up most of the PCB space, its size also matters. Low-

profile inductors can also save board space if height

limitation exists. However, low-DCR and low-profile

inductors are usually not cost effective.

On the other hand, while larger inductance may lower

ripple current, and then power loss, rise time of the inductor

current, however, increases with inductance, which

degrades the transient responses. Therefore, the inductor

design is a trade-off among performance, size and cost.

The first thing to consider is inductor ripple current. The

inductor ripple current is recommended in the range of

20% to 40% of full-load current, and thus the inductance

can be calculated using the following equation.

IN OUT OUT

MIN

SW OUT IN

VV V

L = fkI V





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where k is the ratio of peak-to-peak ripple current to rated

output current. From above, 0.2 to 0.4 of the ratio k is

recommended.

The next thing to consider is inductor saturation current.

Choose an inductor with saturation current rating greater

than maximum inductor peak current. The peak inductor

current can be calculated using the following equation :

IN OUT OUT

LMIN SW IN

VV V

Lf V









where ΔIL is the inductor peak to peak current, and

L_PEAK OUT I

I = I + 2



Input Capacitor Selection

A high-quality ceramic capacitor of 4.7μF or greater, such

as X5R or X7R, are recommended for the input decoupling

capacitor. X5R and X7R ceramic capacitors are commonly

used in power regulator applications because the dielectric

material has less capacitance variation and more

temperature stability.

Voltage rating and current rating are the key parameters

to select an input capacitor. An input capacitor with voltage

rating 1.5 times greater than the maximum input voltage

is a conservative and safe design choice. As for current

rating, the input capacitor is used to supply the input RMS

current, which can be approximately calculated using the

following equation :

OUT OUT

IN_RMS OUT IN IN

I = I 1









It is practical to have several capacitors with low equivalent

series resistance (ESR), being paralleled to form a

capacitor bank, to meet size or height requirements, and

to be placed close to the drain of the high-side MOSFET,

which is very helpful in reducing input voltage ripple at

heavy load. Besides, the input voltage ripple is determined

by the input capacitance, which can be approximately

calculated by the following equation :

OUT(MAX) OUT OUT

IN IN SW IN IN

IVV

V = 1

Cf V V









Output Capacitor Selection

Output capacitance affects stability of the control feedback

loop, ripple voltage, and transient response. In steady state

condition, inductor ripple current flows into the output

capacitor, which results in voltage ripple. Output voltage

ripple VRIPPLE can be calculated by the following equation :

RIPPLE L OUT SW

V = I ESR + 8C f











where ΔIL is the peak-to-peak inductor current.

The output inductor and capacitor form a second-order

low-pass filter for the buck converter.

It takes a few switching cycles to respond to load transient

due to the delay from the control loop. During the load

transient, the output capacitor will supply current before

the inductor can supply current high enough to output

load. Therefore, a voltage drop, caused by the current

change onto output capacitor, and the current flowing

through ESR of the capacitor, will occur. To meet the

transient response requirement, the output capacitance

should be large enough and its ESR should be as small

as possible. The output voltage drop (ΔV) can be calculated

by the equation below :

OUT

OUT S

OUT

V = I ESR + t



  



OUT S

OUT

C > V I ESR



 

where ΔIOUT is the size of the output current transient,

and tS is the control-loop delay time. For the worst-case

scenario, from no load to full load, tS is about 1 to 3

switching cycles.

Given that a transient response requirement is 4% for 5V

output voltage VOUT, output current transient ΔIOUT is from

0A to 0.5A, ESR of the ceramic capacitor is 2mΩ, tS is 3

switching cycles for the longest delay, and switching

frequency is 350kHz, a minimum output capacitance

21.53μF can then be calculated from above.

Another factor for output voltage drop is equivalent series

inductance (ESL). A big change in load current, i.e. large

di/dt, along with the ESL of the capacitor, causes a drop

on the output voltage. A better transient performance can

be obtained by using a capacitor with low ESL. Generally,

using several capacitors connected in parallel can have

better transient performance than using a single capacitor

with the same total ESR.

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External Diode Selection

In order to reduce conduction loss, an external diode

between SW pin and GND is recommended. Since a low

forward voltage of a diode may cause low conduction loss

during OFF-time, SCHOTTKY diodes with current rating

greater than maximum inductor peak current are good

design choice for the application. During the on-time, the

diode can prevent the reverse voltage back to the input

voltage. Therefore, the voltage rating should be higher than

maximum input voltage.

Thermal Considerations

The junction temperature should never exceed the

absolute maximum junction temperature TJ(MAX), listed

under Absolute Maximum Ratings, to avoid permanent

damage to the device. The maximum allowable power

dissipation depends on the thermal resistance of the IC

package, the PCB layout, the rate of surrounding airflow,

and the difference between the junction and ambient

temperatures. The maximum power dissipation can be

calculated using the following formula :

PD(MAX) = (TJ(MAX) − TA) / θJA

where TJ(MAX) is the maximum junction temperature, TA is

the ambient temperature, and θJA is the junction-to-ambient

thermal resistance.

For continuous operation, the maximum operating junction

temperature indicated under Recommended Operating

Conditions is 125°C. The junction-to-ambient thermal

resistance, θJA, is highly package dependent. For a SOP-

8 (Exposed Pad) package, the thermal resistance, θJA, is

29°C/W on a standard JEDEC 51-7 high effective-thermal-

conductivity four-layer test board. The maximum power

dissipation at TA = 25°C can be calculated as below :

PD(MAX) = (125°C - 25°C) / (29°C/W) = 3.44W for a

SOP-8 (Exposed Pad) package.

The maximum power dissipation depends on the operating

ambient temperature for fixed TJ(MAX) and thermal

resistance, θJA. The derating curve in Figure 7 allows the

designer to see the effect of rising ambient temperature

on the maximum power dissipation.

Figure 7. Derating Curve of Maximum Power Dissipation

Layout Considerations

PCB layout is very important for high-frequency switching

converter applications. The PCB traces can radiate

excessive noise and contribute to converter instability with

improper layout. It is good design to mount power

components and route the power traces on the same layer.

If the power trace, for example, VIN trace, must be routed

to another layer, there must be enough vias on the power

trace for passing current through with less power loss.

The width of power trace is decided by the maximum

current which may go through. With wide traces and

enough vias, resistance of the entire power trace can be

reduced to minimum to improve converter performance.

Below are some other layout guidelines, which should be

considered :

Place input decoupling capacitors close to the VIN pin.

Input capacitor can provide instant current to the

converter when high-side MOSFET is turned on. It is

better to connect the input capacitors to the VIN pin

directly with a trace on the same layer.

Place an inductor close to the SW pin and the trace

between them should be wide and short. It can gain

better efficiency with minimum resistance of the SW

trace since the output current will flow through the SW

trace. It is also a good design to keep the area of SW

trace as large as possible, without affecting other paths.

The area can help dissipate the heat in the internal power

stages. However, since a large voltage and current

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

0 25 50 75 100 125

Ambient Temperature (°C)

Maximum Power Dissipation (W) 1

Four-Layer PCB

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Figure 8. PCB Layout Guide

variation usually occur on the SW trace, any sensitive

trace should be kept away from this node.

The connection point of the feedback trace on the VOUT

side should be kept away from the current path for the

VOUT trace and be close to the output capacitor, which

is closest to the inductor. The feedback trace should be

also kept away from any dirty trace, for example, a trace

with high dv/dt, di/dt, or current rating, etc., and the

total length should be kept as short as possible to

reduce the risk of noise coupling, and the signal delay.

If possible, tie the grounds of the input capacitor and

the output capacitor together as the same reference

ground.

BOOT

VIN

VOUT

GND

CIN

COUT

LDIODE

CBOOT

Resistive Voltage

Divider

Compensator

CSS

GND

Route CBOOT

to another layer

COMP

GND

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Outline Dimension

EXPOSED THERMAL PAD

(Bottom of Package)

8-Lead SOP (Exposed Pad) Plastic Package

Dimensions In Millimeters Dimensions In Inches

Symbol Min Max Min Max

A 4.801 5.004 0.189 0.197

B 3.810 4.000 0.150 0.157

C 1.346 1.753 0.053 0.069

D 0.330 0.510 0.013 0.020

F 1.194 1.346 0.047 0.053

H 0.170 0.254 0.007 0.010

I 0.000 0.152 0.000 0.006

J 5.791 6.200 0.228 0.244

M 0.406 1.270 0.016 0.050

X 2.000 2.300 0.079 0.091

Option 1 Y 2.000 2.300 0.079 0.091

X 2.100 2.500 0.083 0.098

Option 2 Y 3.000 3.500 0.118 0.138

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Richtek Technology Corporation

14F, No. 8, Tai Yuen 1st Street, Chupei City

Hsinchu, Taiwan, R.O.C.

Tel: (8863)5526789

Richtek products are sold by description only. Customers should obtain the latest relevant information and data sheets before placing orders and should verify

that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek

product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use;

nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent

or patent rights of Richtek or its subsidiaries.

Footprint Information

PABCDSxSyM

Option1 2.30 2.30

Option2 3.40 2.40 ±0.104.20 1.30 0.70 4.51PSOP-8 8 1.27 6.80

Tolerance

Footprint Dimension (mm)

Number of PinPackage

RT6210 Datasheet by Richtek USA Inc.

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