MAX3243 Datasheet by Texas Instruments

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MAX3243 3-V to 5.5-V Multichannel RS-232 Line Driver/Receiver With ±15-kV ESD
(HBM) Protection
1 Features
Operates With 3-V to 5.5-V VCC Supply
Single-Chip and Single-Supply Interface
for IBM PC/AT Serial Port
RS-232 Bus-Pin ESD Protection of
±15 kV Using Human-Body Model (HBM)
Meets or Exceeds the Requirements of
TIA/EIA-232-F and ITU V.28 Standards
Three Drivers and Five Receivers
Operates Up To 250 kbit/s
Low Active Current: 300 μA Typical
Low Standby Current: 1 μA Typical
External Capacitors: 4 × 0.1 μF
Accepts 5-V Logic Input With 3.3-V Supply
Always-Active Noninverting Receiver
Output (ROUT2B)
Operating Temperature
MAX3243C: 0°C to 70°C
MAX3243I: –40°C to 85°C
Serial-Mouse Driveability
Auto-Powerdown Feature to Disable Driver
Outputs When No Valid RS-232 Signal Is
Sensed
2 Applications
Battery-Powered Systems
Tablets
Notebooks
Laptops
Hand-Held Equipment
3 Description
The MAX3243 device consists of three line drivers,
five line receivers which is ideal for DE-9 DTE
interface. ±15-kV ESD (HBM) protection pin to pin
(serial- port connection pins, including GND). Flexible
power features saves power automatically. Special
outputs ROUT2B and INVALID are always enabled
to allow checking for ring indicator and valid RS232
input.
Device Information
PART NUMBER PACKAGE(1) BODY SIZE
MAX3243
SSOP (28) 10.29 mm × 5.30 mm
SOIC (28) 17.90 mm × 7.50 mm
TSSOP (28) 9.70 mm × 4.40 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
RX
TX
POWER
3.3 V, 5 V
DIN
ROUT
DOUT
RS232
RIN
RS232
3 3
5 5
FORCEON
FORCEOFF
STATUS
INVALID
Simplified Diagram
MAX3243
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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
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Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings........................................ 4
6.2 ESD Ratings............................................................... 4
6.3 Recommended Operating Conditions.........................4
6.4 Thermal Information....................................................5
6.5 Electrical Characteristics –– Auto Power Down..........5
6.6 Electrical Characteristics –– Driver............................. 6
6.7 Electrical Characteristics –– Receiver........................ 6
6.8 Switching Characteristics –– Auto Power Down......... 6
6.9 Switching Characteristics –– Driver............................ 7
6.10 Switching Characteristics –– Receiver......................7
6.11 Typical Characteristics.............................................. 7
7 Parameter Measurement Information............................ 8
8 Detailed Description......................................................10
8.1 Overview................................................................... 10
8.2 Functional Block Diagram......................................... 10
8.3 Feature Description...................................................11
8.4 Device Functional Modes..........................................12
9 Application and Implementation.................................. 13
9.1 Application Information............................................. 13
9.2 Typical Application.................................................... 13
9.3 Power Supply Recommendations.............................14
9.4 Layout....................................................................... 14
10 Device and Documentation Support..........................16
10.1 Receiving Notification of Documentation Updates..16
10.2 Support Resources................................................. 16
10.3 Trademarks............................................................. 16
10.4 Electrostatic Discharge Caution..............................16
10.5 Glossary..................................................................16
11 Mechanical, Packaging, and Orderable
Information.................................................................... 16
4 Revision History
Changes from Revision O (January 2015) to Revision P (October 2022) Page
Changed the Thermal Information table............................................................................................................. 5
Changed the MAX value of ICC Supply current auto-powerdown disabled from 1 mA to 1.2 mA in Electrical
Characteristics—Auto Power Down ...................................................................................................................5
Changes from Revision N (May 2009) to Revision O (January 2015) Page
Added Applications, Device Information table, Pin Functions table, ESD Ratings table, Thermal Information
table, Typical Characteristics, Feature Description section, Device Functional Modes, Application and
Implementation section, Power Supply Recommendations section, Layout section, Device and
Documentation Support section, and Mechanical, Packaging, and Orderable Information section................... 1
Deleted Ordering Information table.....................................................................................................................1
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Ifim5 INSTRUMENTS flflflflflflflflflflflflflfl UUUUUUUUUUUUUU
5 Pin Configuration and Functions
1C2+ 28 C1+
2C2– 27 V+
3V– 26 VCC
4RIN1:RIN5 25 GND
5RIN1:RIN5 24 C1–
6RIN1:RIN5 23 FORCEON
7RIN1:RIN5 22 FORCEOFF
8RIN1:RIN5 21 INVALID
9DOUT1:DOUT3 20 ROUT2B
10DOUT1:DOUT3 19 ROUT5:ROUT1
11DOUT1:DOUT3 18 ROUT5:ROUT1
12DIN3:DIN1 17 ROUT5:ROUT1
13DIN3:DIN1 16 ROUT5:ROUT1
14DIN3:DIN1 15 ROUT5:ROUT1
Not to scale
Figure 5-1. DB, DW, or PW Package
(Top View)
Table 5-1. Pin Functions
PIN TYPE DESCRIPTION
NAME NO.
C2+ 1 Positive lead of C2 capacitor
C2– 2 Negative lead of C2 capacitor
V– 3 O Negative charge pump output for storage capacitor only
RIN1:RIN5 4, 5, 6, 7, 8 I RS232 line data input (from remote RS232 system)
DOUT1:DOUT3 9, 10, 11 O RS232 line data output (to remote RS232 system)
DIN3:DIN1 12, 13, 14 I Logic data input (from UART)
ROUT5:ROUT1 15, 16, 17, 18, 19 O Logic data output (to UART)
ROUT2B 20 O Always Active non-inverting output for RIN2 (normally used for ring
indicator)
INVALID 21 O Active low output when all RIN are unpowered
FORCEOFF 22 I Low input forces DOUT1-5, ROUT1-5 high Z per Section 8.4
FORCEON 23 I High forces drivers on. Low is automatic mode per Section 8.4
C1– 24 Negative lead on C1 capacitor
GND 25 — Ground
VCC 26 Supply Voltage, Connect to 3V to 5.5V power supply
V+ 27 O Positive charge pump output for storage capacitor only
C1+ 28 Positive lead of C1 capacitor
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN MAX UNIT
VCC Supply voltage range(2) –0.3 6 V
V+ Positive output supply voltage range(2) –0.3 7 V
V– Negative output supply voltage range(2) 0.3 –7 V
V+ – V– Supply voltage difference(2) 13 V
VIInput voltage range Driver, FORCEOFF, FORCEON –0.3 6 V
Receiver –25 25
VOOutput voltage range Driver –13.2 13.2 V
Receiver, INVALID –0.3 VCC + 0.3
TJOperating virtual junction temperature 150 °C
Tstg Storage temperature range –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Section 6.3 is not implied.
Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to network GND.
6.2 ESD Ratings
MAX UNIT
V(ESD) Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001
RIN , DOUT, and GND pins (1) 15000
V
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001
All other pins(1) 3000
Charged device model (CDM), per JEDEC specification JESD22-C101,
all pins(2) 1000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
(1) (See Figure 9-1)
MIN NOM MAX UNIT
VCC Supply voltage VCC = 3.3 V 3 3.3 3.6 V
VCC = 5 V 4.5 5 5.5
VIH Driver and control high-level input voltage DIN, FORCEOFF,
FORCEON
VCC = 3.3 V 2 5.5 V
VCC = 5 V 2.4 5.5
VIL Driver and control low-level input voltage DIN, FORCEOFF, FORCEON 0 0.8 V
VIDriver and control input voltage DIN, FORCEOFF, FORCEON 0 5.5 V
VIReceiver input voltage –25 25 V
TAOperating free-air temperature MAX3243C 0 70 °C
MAX3243I –40 85
(1) Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
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6.4 Thermal Information
THERMAL METRIC(1) DB DW PW UNIT
16 PINS 16 PINS 16 PINS
RθJA Junction-to-ambient thermal resistance 76.1 59.0 70.3 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 35.8 28.8 21.0 °C/W
RθJB Junction-to-board thermal resistance 37.4 30.3 29.2 °C/W
ψJT Junction-to-top characterization parameter 7.4 7.8 1.3 °C/W
ψJB Junction-to-board characterization parameter 37.0 30.0 28.8 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A N/A °C/W
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report (SPRA953).
6.5 Electrical Characteristics –– Auto Power Down
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)(1) (see Figure 9-1)
PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT
ICC
Supply current
Auto-powerdown
disabled
No load, FORCEOFF and FORCEON at VCC. TA = 25°C
For DB and PW package 0.3 1.2 mA
Supply current
Auto-powerdown
disabled
No load, FORCEOFF and FORCEON at VCC. TA = 25°C
For DW package 0.3 1 mA
Supply current
Powered off No load, FORCEOFF at GND. TA = 25°C 1 10
μA
Supply current
Auto-powerdown
enabled
No load, FORCEOFF at VCC, FORCEON at GND,
All RIN are open or grounded, All DIN are grounded. TA =
25°C
1 10
IIInput leakage current
of FORCEOFF, FORCEON VI = VCC or VI at GND ±0.01 ±1 μA
VIT+
Receiver input threshold
for INVALID high-level output
voltage
FORCEON = GND,
FORCEOFF = VCC
2.7 V
VIT–
Receiver input threshold
for INVALID high-level output
voltage
FORCEON = GND,
FORCEOFF = VCC
–2.7 V
VT
Receiver input threshold
for INVALID low-level output
voltage
FORCEON = GND,
FORCEOFF = VCC
–0.3 0.3 V
VOH
INVALID high-level output
voltage
IOH = -1 mA, FORCEON = GND,
FORCEOFF = VCC
VCC – 0.6 V
VOL INVALID low-level output voltage IOL = 1.6 mA, FORCEON = GND,
FORCEOFF = VCC
0.4 V
(1) Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
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6.6 Electrical Characteristics –– Driver
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)(1) (see Figure 9-1)
PARAMETER TEST CONDITIONS MIN TYP(2) MAX UNIT
VOH High-level output voltage All DOUT at RL = 3 kΩ to GND 5 5.4 V
VOL Low-level output voltage All DOUT at RL = 3 kΩ to GND –5 –5.4 V
VO
Output voltage
(mouse driveability)
DIN1 = DIN2 = GND, DIN3 = VCC, 3-kΩ to GND at DOUT3,
DOUT1 = DOUT2 = 2.5 mA ±5 V
IIH High-level input current VI = VCC ±0.01 ±1 μA
IIL Low-level input current VI at GND ±0.01 ±1 μA
Vhys Input hysteresis ±1 V
IOS Short-circuit output current(3) VCC = 3.6 V, VO = 0 V ±35 ±60 mA
VCC = 5.5 V, VO = 0 V
roOutput resistance VCC, V+, and V– = 0 V, VO = ±2 V 300 10M
Ioff Output leakage current FORCEOFF = GND, VO = ±12 V, VCC = 3 to 3.6 V ±25 μA
VO = ±10 V, VCC = 4.5 to 5.5 V ±25
(1) Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
(2) All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
(3) Short-circuit durations should be controlled to prevent exceeding the device absolute power dissipation ratings, and not more than one
output should be shorted at a time.
6.7 Electrical Characteristics –– Receiver
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)(1) (see Figure 9-1)
PARAMETER TEST CONDITIONS MIN TYP(2) MAX UNIT
VOH High-level output voltage IOH = –1 mA VCC – 0.6 VCC – 0.1 V
VOL Low-level output voltage IOH = 1.6 mA 0.4 V
VIT+ Positive-going input threshold voltage VCC = 3.3 V 1.6 2.4 V
VCC = 5 V 1.9 2.4
VIT– Negative-going input threshold voltage VCC = 3.3 V 0.6 1.1 V
VCC = 5 V 0.8 1.4
Vhys Input hysteresis (VIT+ – VIT–) 0.5 V
Ioff Output leakage current (except ROUT2B) FORCEOFF = 0 V ±0.05 ±10 μA
rIInput resistance VI = ±3 V or ±25 V 3 5 7
(1) Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
(2) All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
6.8 Switching Characteristics –– Auto Power Down
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 7-5)
PARAMETER TEST CONDITIONS TYP(1) UNIT
tvalid Propagation delay time, low- to high-level output VCC = 5 V 1 μs
tinvalid Propagation delay time, high- to low-level output VCC = 5 V 30 μs
ten Supply enable time VCC = 5 V 100 μs
(1) All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
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6.9 Switching Characteristics –– Driver
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)(2) (see Figure 9-1)
MAX3243C, MAX3243I
PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT
Maximum data rate RL = 3 kΩ
One DOUT switching,
CL = 1000 pF
See Figure 7-1 150 250 kbit/s
tsk(p) Pulse skew(3) RL = 3 kΩ to 7 kΩ CL = 150 pF to 2500 pF
See Figure 7-3 100 ns
SR(tr) Slew rate, transition region
(see Figure 7-1)
VCC = 3.3 V,
RL = 3 kΩ to 7 kΩ
CL = 150 pF to 1000 pF 6 30 V/μs
CL = 150 pF to 2500 pF 4 30
(1) All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
(2) Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V + 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
(3) Pulse skew is defined as |tPLH – tPHL| of each channel of the same device.
6.10 Switching Characteristics –– Receiver
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)(2)
PARAMETER TEST CONDITIONS TYP(1) UNIT
tPLH Propagation delay time, low- to high-level output CL = 150 pF,
See Figure 7-3
150 ns
tPHL Propagation delay time, high- to low-level output 150 ns
ten Output enable time CL = 150 pF, RL = 3 kΩ,
See Figure 7-4
200 ns
tdis Output disable time 200 ns
tsk(p) Pulse skew(3) See Figure 7-3 50 ns
(1) All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
(2) Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
(3) Pulse skew is defined as |tPLH - tPHL| of each channel of the same device.
6.11 Typical Characteristics
VCC = 3.3 V
0
1
2
3
4
5
6
0 5 10 15 20 25 30 35
VOH (V)
Load Current (mA)
VOH
C001
Figure 6-1. DOUT VOH vs Load Current
±6
±5
±4
±3
±2
±1
0
0 5 10 15 20 25 30 35
VOL (V)
Load Current (mA)
VOL
C001
Figure 6-2. DOUT VOL vs Load Current
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7 Parameter Measurement Information
7.1
50 W
TEST CIRCUIT VOLTAGE WAVEFORMS
3 V
−3 V
3 V
3 V
0 V
3 V
Output
Input
VOL
VOH
tTLH
Generator
(see Note B) RL
3 V
FORCEOFF
RS-232
Output
tTHL
CL
(see Note A)
SR(tr) 6 V
tTHL or tTLH
NOTES: A. CLincludes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR = 250 kbit/s (MAX3243C/I) and 1 Mbit/s (MAX3243FC/I),
ZO= 50 W, 50% duty cycle, tr10 ns, tf10 ns.
Figure 7-1. Driver Slew Rate
Figure 7-2. Driver Pulse Skew
TEST CIRCUIT VOLTAGE WAVEFORMS
50 W
−3 V
3 V
Output
Input
VOL
VOH
tPHL
Generator
(see Note B)
tPLH
Output
CL
(see Note A)
3 V or 0 V
FORCEON
NOTES: A. CLincludes probe and jig capacitance.
B. The pulse generator has the following characteristics: Z
O= 50 W, 50% duty cycle, tr10 ns, tf10 ns.
3 V
FORCEOFF
1.5 V 1.5 V
50% 50%
Figure 7-3. Receiver Propagation Delay Times
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TEST CIRCUIT
50 W
Generator
(see Note B)
3 V or 0 V
3 V or 0 V
FORCEON
FORCEOFF
NOTES: A. CLincludes probe and jig capacitance.
B. The pulse generator has the following characteristics: Z
O= 50 W, 50% duty cycle, tr10 ns, tf10 ns.
C. tPLZ and tPHZ are the same as tdis.
D. tPZL and tPZH are the same as ten.
RL
S1
VCC GND
CL
(see Note A)
Output
VOLTAGE WAVEFORMS
Output
VOL
VOH
tPZH
(S1 at GND)
3 V
0 V
0.3 V
Output
Input
0.3 V
1.5 V 1.5 V
50%
tPHZ
(S1 at GND)
tPLZ
(S1 at VCC)
50%
tPZL
(S1 at VCC)
Figure 7-4. Receiver Enable and Disable Times
TEST CIRCUIT VOLTAGE WAVEFORMS
50 W
3 V
2.7 V
−2.7 V
INVALID
Output
Receiver
Input
Generator
(see Note B)
FORCEOFF
tvalid
ROUT
FORCEON
Auto-
powerdown INVALID
DOUT
0 V
0 V
−3 V
DIN
CL= 30 pF
(see Note A)
VCC
0 V
2.7 V
−2.7 V
0.3 V
−0.3 V
0 V
Valid RS-232 Level, INVALID High
Indeterminate
Indeterminate
If Signal Remains Within This Region
For More Than 30 ms, INVALID Is Low (see Note C)
Valid RS-232 Level, INVALID High
V+
0 V
V−
V+
VCC
ten
V−
NOTES: A. CLincludes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR = 5 kbit/s, Z
O= 50 W, 50% duty cycle, tr10 ns, tf10 ns.
C. Auto-powerdown disables drivers and reduces supply current to 1 mA.
50% VCC 50% VCC
2.7 V
−2.7 V
0.3 V
0.3 V
tinvalid
Supply
Voltages
Figure 7-5. INVALID Propagation Delay Times and Supply Enabling Time
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8 Detailed Description
8.1 Overview
The MAX3243 device consists of three line drivers, five line receivers, and a dual charge-pump circuit with
±15-kV ESD (HBM) protection pin to pin (serial- port connection pins, including GND). The device meets the
requirements of TIA/EIA-232-F and provides the electrical interface between an asynchronous communication
controller and the serial-port connector. This combination of drivers and receivers matches that needed for the
typical serial port used in an IBM PC/AT, or compatible. The charge pump and four small external capacitors
allow operation from a single 3-V to 5.5-V supply. In addition, the device includes an always-active noninverting
output (ROUT2B), which allows applications using the ring indicator to transmit data while the device is powered
down. Flexible control options for power management are available. when the serial port is inactive. The
auto-power-down feature functions when FORCEON is low and FORCEOFF is high. During this mode of
operation, if the device does not sense a valid RS-232 signal, the driver outputs are disabled. If FORCEOFF
is set low, both drivers and receivers (except ROUT2B) are shut off, and the supply current is reduced to 1
µA. Disconnecting the serial port or turning off the peripheral drivers causes the auto-powerdown condition to
occur. Auto-powerdown can be disabled when FORCEON and FORCEOFF are high and should be done when
driving a serial mouse. With auto-powerdown enabled, the device is activated automatically when a valid signal
is applied to any receiver input. The INVALID output is used to notify the user if an RS-232 signal is present at
any receiver input. INVALID is high (valid data) if any receiver input voltage is greater than 2.7 V or less than
–2.7 V or has been between –0.3 V and 0.3 V for less than 30 µs. INVALID is low (invalid data) if all receiver
input voltages are between –0.3 V and 0.3 V for more than 30 µs.
8.2 Functional Block Diagram
DIN3
DIN2
DIN1
DOUT3
DOUT2
DOUT1
Auto-powerdown INVALID
RIN1
RIN2
RIN3
RIN4
RIN5
FORCEOFF
FORCEON
ROUT1
ROUT2B
ROUT2
ROUT3
ROUT4
ROUT5
14
13
12
22
23
19
20
18
17
16
15
9
10
11
21
4
5
6
7
8
5 k
5 k
5 k
5 k
5 k
W
W
W
W
W
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8.3 Feature Description
8.3.1 Auto-Power-Down
Auto-Power-Down can be used to automatically save power when the receivers are unconnected or connected
to a powered down remote RS232 port. FORCEON being high will override Auto power down and the drivers will
be active. FORCEOFF being low will override FORCEON and will power down all outputs except for ROUT2B
and INVALID.
8.3.2 Charge Pump
The charge pump increases, inverts, and regulates voltage at V+ and V– pins and requires four external
capacitors.
8.3.3 RS232 Driver
Three drivers interface standard logic level to RS232 levels. All DIN inputs must be valid high or low.
8.3.4 RS232 Receiver
Five receivers interface RS232 levels to standard logic levels. An open input will result in a high output on ROUT.
Each RIN input includes an internal standard RS232 load.
8.3.5 ROUT2B Receiver
ROUT2B is an always-active noninverting output of RIN2 input, which allows applications using the ring indicator
to transmit data while the device is powered down.
8.3.6 Invalid Input Detection
The INVALID output goes active low when all RIN inputs are unpowered. The INVALID output goes inactive high
when any RIN input is connected to an active RS232 voltage level.
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8.4 Device Functional Modes
Table 8-1. Each Driver(1)
INPUTS OUTPUT
DRIVER STATUS
DIN FORCEON FORCEOFF VALID RIN
RS-232 LEVEL DOUT
X X L X Z Powered off
L H H X H Normal operation with
auto-powerdown disabled
H H H X L
L L H YES H Normal operation with
auto-powerdown enabled
H L H YES L
X L H NO Z Power off by
auto-powerdown feature
(1) H = high level, L = low level, X = irrelevant, Z = high impedance, YES = any RIN valid, NO = all RIN invalid
Table 8-2. Each Receiver(1)
INPUTS OUTPUTS RECEIVER STATUS
RIN FORCEON FORCEOFF ROUT
X X L Z Powered off
L X H H
Normal operationH X H L
Open X H H
(1) H = high level, L = low level, X = irrelevant, Z = high impedance (off), Open = input disconnected or connected driver off
Table 8-3. INVALID and ROUT2B Outputs(1)
INPUTS OUTPUTS
OUTPUT STATUS
VALID RIN
RS-232 LEVEL RIN2 FORCEON FORCEOFF INVALID ROUT2B
YES L X X H L Always Active
YES H X X H H
YES OPEN X X H L Always Active
NO OPEN X X L L
(1) H = high level, L = low level, X = irrelevant, Z = high impedance (off),
OPEN = input disconnected or connected driver off, YES = any RIN valid, NO = all RIN invalid
MAX3243
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I TEXAS INSTRUMENTS
9 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
9.1 Application Information
It is recommended to add capacitors as shown in Figure 9-1.
9.2 Typical Application
ROUT and DIN connect to UART or general purpose logic lines. RIN and DOUT lines connect to a RS232
connector or cable.
RIN4
DOUT2
DOUT3
ROUT1
FORCEOFF
RIN5
INVALID
ROUT2
DOUT1 ROUT2B
DIN3
DIN2
ROUT3
ROUT4
DIN1 ROUT5
C4 +
+
C3(1)
VCC
C2+
C2− C1
C1+
GND
V−
C1−
FORCEON
C2
+
CBYPASS
= 0.1 mF
V+
+
+
RIN1
RIN2
RIN3
RS-232 Inputs
Logic Outputs
Logic Inputs
RS-232 Outputs
VCC C1 C2, C3, and C4
3.3 V ±0.3 V
5 V ±0.5 V
3 V to 5.5 V
0.1 mF
0.047 mF
0.1 mF
0.1 mF
0.33 mF
0.47 mF
(1) C3 can be connected to V
CC or GND.
NOTES: A. Resistor values shown are nominal.
B. Nonpolarized ceramic capacitors are acceptable. If polarized tantalum
or electrolytic capacitors are used, they should be connected as
shown.
VCC vs CAPACITOR VALUES
Auto-
powerdown
1
2
4
5
6
7
8
9
10
11
12
13
14
3
28
27
26
25
24
23
22
21
20
19
18
17
16
15
5 kW
5 kW
5 kW
5 kW
5 kW
Figure 9-1. Typical Operating Circuit and Capacitor Values
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MAX3243
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I TEXAS INSTRUMENTS
9.2.1 Design Requirements
• VCC minimum is 3 V and maximum is 5.5V.
Maximum recommended bit rate is 250 kbit/s.
9.2.2 Detailed Design Procedure
All DIN, FORCEOFF and FORCEON inputs must be connected to valid low or high logic levels.
Select capacitor values based on VCC level for best performance.
9.2.3 Application Curves
VCC= 3.3 V
±9
±8
±7
±6
±5
±4
±3
±2
±1
0
1
2
3
4
5
6
01234567
Voltage (V)
Time (s)
DIN
DOUT to RIN
ROUT
C001
Figure 9-2. Driver to Receiver Loopback Timing Waveform
9.3 Power Supply Recommendations
VCC should be between 3 V and 5.5 V. Charge pump capacitors should be chosen using table in Figure 9-1.
9.4 Layout
9.4.1 Layout Guidelines
Keep the external capacitor traces short. This is more important on C1 and C2 nodes that have the fastest rise
and fall times.
In the Layout Example diagram, only critical layout sections are shown. Input and output traces will vary in shape
and size depending on the customer application. FORCEON and FORCEOFF should be pulled up to VCC or
GND via a pullup resistor, depending on which configuration the user desires upon power-up.
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TEXAS INSTRUMENTS + + + +
9.4.2 Layout Example
VCC
Ground
Ground 26
25
27
24
23
22
21
28
C2
C4 0.1 Fμ
C2+
C2-
V-
RIN1
RIN2
RIN3
RIN4
RIN5
C1+
V+
VCC
GND
C1-
FORCEON
FORCEOFF
INVALID
DOUT1
DOUT2
DOUT3
DIN3
DIN2
DIN1
3
4
2
5
6
7
1
10
11
9
12
13
14
8
19
18
20
17
16
15
ROUT2B
ROUT1
ROUT2
ROUT3
ROUT4
ROUT5
C3
Ground
C1
Figure 9-3. Layout Diagram
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MAX3243
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l TEXAS INSTRUMENTS
10 Device and Documentation Support
10.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
10.2 Support Resources
TI E2E support forums are an engineer's go-to source for fast, verified answers and design help straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
10.3 Trademarks
IBM and PC/AT are trademarks of IBM.
TI E2E is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
10.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
10.5 Glossary
TI Glossary This glossary lists and explains terms, acronyms, and definitions.
11 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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{I} TEXAS INSTRUMENTS
PACKAGE OPTION ADDENDUM
www.ti.com 15-Jan-2023
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead finish/
Ball material
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
MAX3243CDB LIFEBUY SSOP DB 28 50 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 MAX3243C
MAX3243CDBG4 LIFEBUY SSOP DB 28 50 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 MAX3243C
MAX3243CDBR ACTIVE SSOP DB 28 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 MAX3243C Samples
MAX3243CDBRE4 ACTIVE SSOP DB 28 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 MAX3243C Samples
MAX3243CDBRG4 ACTIVE SSOP DB 28 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 MAX3243C Samples
MAX3243CDW LIFEBUY SOIC DW 28 20 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 MAX3243C
MAX3243CDWE4 LIFEBUY SOIC DW 28 20 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 MAX3243C
MAX3243CDWR ACTIVE SOIC DW 28 1000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 MAX3243C Samples
MAX3243CDWRG4 ACTIVE SOIC DW 28 1000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 MAX3243C Samples
MAX3243CPW LIFEBUY TSSOP PW 28 50 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 MA3243C
MAX3243CPWE4 LIFEBUY TSSOP PW 28 50 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 MA3243C
MAX3243CPWR ACTIVE TSSOP PW 28 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 MA3243C Samples
MAX3243CPWRG4 ACTIVE TSSOP PW 28 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 MA3243C Samples
MAX3243IDB LIFEBUY SSOP DB 28 50 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 MAX3243I
MAX3243IDBG4 LIFEBUY SSOP DB 28 50 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 MAX3243I
MAX3243IDBR ACTIVE SSOP DB 28 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 MAX3243I Samples
MAX3243IDW ACTIVE SOIC DW 28 20 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 MAX3243I Samples
MAX3243IDWR ACTIVE SOIC DW 28 1000 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 85 MAX3243I Samples
MAX3243IPW LIFEBUY TSSOP PW 28 50 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 MB3243I
MAX3243IPWR ACTIVE TSSOP PW 28 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 MB3243I Samples
MAX3243IPWRE4 ACTIVE TSSOP PW 28 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 MB3243I Samples
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
Addendum-Page 1
TEXAS INSTRUMENTS
PACKAGE OPTION ADDENDUM
www.ti.com 15-Jan-2023
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF MAX3243 :
Enhanced Product : MAX3243-EP
NOTE: Qualified Version Definitions:
Enhanced Product - Supports Defense, Aerospace and Medical Applications
Addendum-Page 2
I TEXAS INSTRUMENTS 5:. V.’
PACKAGE MATERIALS INFORMATION
www.ti.com 16-Jan-2023
TAPE AND REEL INFORMATION
Reel Width (W1)
REEL DIMENSIONS
A0
B0
K0
W
Dimension designed to accommodate the component length
Dimension designed to accommodate the component thickness
Overall width of the carrier tape
Pitch between successive cavity centers
Dimension designed to accommodate the component width
TAPE DIMENSIONS
K0 P1
B0 W
A0
Cavity
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Pocket Quadrants
Sprocket Holes
Q1 Q1Q2 Q2
Q3 Q3Q4 Q4 User Direction of Feed
P1
Reel
Diameter
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
MAX3243CDBR SSOP DB 28 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1
MAX3243CDWR SOIC DW 28 1000 330.0 32.4 11.35 18.67 3.1 16.0 32.0 Q1
MAX3243CPWR TSSOP PW 28 2000 330.0 16.4 6.9 10.2 1.8 12.0 16.0 Q1
MAX3243IDBR SSOP DB 28 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1
MAX3243IDWR SOIC DW 28 1000 330.0 32.4 11.35 18.67 3.1 16.0 32.0 Q1
MAX3243IPWR TSSOP PW 28 2000 330.0 16.4 6.9 10.2 1.8 12.0 16.0 Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com 16-Jan-2023
TAPE AND REEL BOX DIMENSIONS
Width (mm)
W
L
H
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
MAX3243CDBR SSOP DB 28 2000 356.0 356.0 35.0
MAX3243CDWR SOIC DW 28 1000 350.0 350.0 66.0
MAX3243CPWR TSSOP PW 28 2000 356.0 356.0 35.0
MAX3243IDBR SSOP DB 28 2000 356.0 356.0 35.0
MAX3243IDWR SOIC DW 28 1000 350.0 350.0 66.0
MAX3243IPWR TSSOP PW 28 2000 356.0 356.0 35.0
Pack Materials-Page 2
I TEXAS INSTRUMENTS
PACKAGE MATERIALS INFORMATION
www.ti.com 16-Jan-2023
TUBE
L - Tube length
T - Tube
height
W - Tube
width
B - Alignment groove width
*All dimensions are nominal
Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm)
MAX3243CDB DB SSOP 28 50 530 10.5 4000 4.1
MAX3243CDBG4 DB SSOP 28 50 530 10.5 4000 4.1
MAX3243CDW DW SOIC 28 20 506.98 12.7 4826 6.6
MAX3243CDWE4 DW SOIC 28 20 506.98 12.7 4826 6.6
MAX3243CPW PW TSSOP 28 50 530 10.2 3600 3.5
MAX3243CPW PW TSSOP 28 50 530 10.2 3600 3.5
MAX3243CPWE4 PW TSSOP 28 50 530 10.2 3600 3.5
MAX3243CPWE4 PW TSSOP 28 50 530 10.2 3600 3.5
MAX3243IDB DB SSOP 28 50 530 10.5 4000 4.1
MAX3243IDBG4 DB SSOP 28 50 530 10.5 4000 4.1
MAX3243IDW DW SOIC 28 20 506.98 12.7 4826 6.6
MAX3243IPW PW TSSOP 28 50 530 10.2 3600 3.5
MAX3243IPW PW TSSOP 28 50 530 10.2 3600 3.5
Pack Materials-Page 3
i , s % E2333: I-III EEEEEEE
www.ti.com
PACKAGE OUTLINE
C
26X 0.65
2X
8.45
28X 0.38
0.22
8.2
7.4 TYP
SEATING
PLANE
0.05 MIN
0.25
GAGE PLANE
0 -8
2 MAX
B5.6
5.0
NOTE 4
A
10.5
9.9
NOTE 3
0.95
0.55
(0.15) TYP
SSOP - 2 mm max heightDB0028A
SMALL OUTLINE PACKAGE
4214853/B 03/2018
1
14 15
28
0.15 C A B
PIN 1 INDEX AREA
SEE DETAIL A
0.1 C
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.
5. Reference JEDEC registration MO-150.
A 15
DETAIL A
TYPICAL
SCALE 1.500
gag—Eggi 1?:
www.ti.com
EXAMPLE BOARD LAYOUT
0.07 MAX
ALL AROUND 0.07 MIN
ALL AROUND
28X (1.85)
28X (0.45)
26X (0.65)
(7)
(R0.05) TYP
SSOP - 2 mm max heightDB0028A
SMALL OUTLINE PACKAGE
4214853/B 03/2018
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 10X
SYMM
SYMM
1
14 15
28
15.000
METAL
SOLDER MASK
OPENING METAL UNDER
SOLDER MASK SOLDER MASK
OPENING
EXPOSED METAL
EXPOSED METAL
SOLDER MASK DETAILS
NON-SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK
DEFINED
@5ng wfiwmfifimgi Lit
www.ti.com
EXAMPLE STENCIL DESIGN
28X (1.85)
28X (0.45)
26X (0.65)
(7)
(R0.05) TYP
SSOP - 2 mm max heightDB0028A
SMALL OUTLINE PACKAGE
4214853/B 03/2018
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE: 10X
SYMM
SYMM
1
14 15
28
MECHANICAL DATA DW <><7‘):>807628> JLASHC SMALL 0U ¥N¥ H __ f , _—> HHHHHHHHHHHHH‘fi \ H‘HHHHHHHHHHHHH; ><_,;_,r>4 NOTES: AH Hnec' dimensmr: c'e m ‘mmes (mammaers) D'ws'nmng md tu‘ermc'mq per ASME w 5M 1994, TH: drawmq \s suaject :0 change wan: nohce. Body dimensmns ca nut inc‘ude mom flcsh ur mum" rut m exceed 0035 (055) FaHs wan JEDEC M8701} venom AE. {if TEXAS INSTRUMENTS wwvmi .com
LAND PATTERN DATA DW (RiPD807028) PLASTIC SMALL OUTLTNE Examp‘e Board Leyom (We 9) 28x1.27 me we Non Solder Mask Define Pad ‘\ \ STenen Openin s (We D) g — — 0.6 So‘der Mask Opening / | (No‘e E) 2,0 , ‘ k I Pad Geometry (Note c) 0,07 All Aw \— 420920276/F 03/13 NOTES: A, NI Hneur dimensions are in meetersr B. This druw'mg 'ws subjed m Change without nonce. c, Reler To IPC7351 for a‘ternule board design, a, Laser cumng aperlures nun (rdpezor'ddl waHs and a‘so rounding corners mu ouer bener pasle release, Cuslomers shou‘d comm Their board assembly sue for s‘encil design recommendations, Reler To IPcr7525 E, Cuswmers should Contact their board fubricah'un site lor so‘der musk lu‘erances between and around s'uylul pods, {I} TEXAS INSTRUMENTS www.ti.com
MECHANICAL DATA 737": 3‘ AST‘C SMAH CV" N7 A A V A V V V A 4 <7 r‘="" ‘="" 9%="" ‘="" ‘="" h—h="" 1="" l_="" ‘i="" lj‘%l="" no'es'="" a="" ah="" hnec'="" dimensmrs="" tm="" drawer="" ‘5="" sums="" budy="" \evvgih="" cues="" m="" m="" exceed="" 0,15="" each="" m="" &="" rudy="" wde="" does="" nm="" wands="" \mer="" end="" flair="" \mefiead="" 'wclsh="" shah="" um="" exceed="" 0‘75="" each="" s‘de="" e="" fa‘="" 3="" wm"="" m07153="" m="" m'\\me(ers="" dwmens'amnq="" cnd="" tu‘erc'vcmg="" per="" asme="" w="" 5m="" 1994,="" hangs="" wnrau:="" home,="" ca="" mom="" hush,="" pyuws‘m="" ur="" guts="" um="" mum="" i‘m,="" :jvuluauus,="" ov="" gule="" buns="" shuh="" {if="" texas="" instruments="" www.ci.com="">
LAND PATTERN DATA PW (Reposoeczs) PLASTiC SMALL OUTLINE Example Board Layout *‘ |~— 26x0,65 *HHHHHHHHHHHHHH |:l Iii I: I: I: I: I: I: I: I: I: I: Example Non Soldermusk Defined Pad \ . Example ider Musk Opening :(See Note E) .\_- «8’ , Pad Geometry Stencil Openin s Based on a stencil ickness of .127mm (,oosincn), zanoas ”i l" mu HHHHHHHHHHHHHHJ 5.60 HHHHHHHHHHHHHH 26x0.55 fll l— 421i 284*6/6 OS/i 5 All iineur dimensions are in millimeters. This drawing is subject to change without notice. NOTES: Publication iPCi735i is recommended for alternate design. Laser cutting apertures with trapezoidal walls and also ruunding corners will offer better paste release. Customers should contact their board assembly site for stencil design recommendations. Refer to iPC—7525 for other stencil recommendations. E. Customers shuuid Contact their board fabrication site for solder musk tolerances between and nruund signal pads. {I} Tums INSTRUMENTS www.ti.com
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