TS2012 Datasheet by STMicroelectronics

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This is information on a product in full production.
July 2013 DocID14236 Rev 2 1/29
TS2012
Filter-free stereo 2x2.8 W class D audio power amplifier
Datasheet - production data
Features
Operating range from VCC = 2.5 V to 5.5 V
Standby mode active low
Output power per channel: 1.35 W @ 5 V or
0.68 W @ 3.6 V into 8 Ω with 1 % THD+N max
Output power per channel: 2.2 W @ 5 V into
4 Ω with 1 % THD+N max
Four gains can be selected: 6, 12, 18, 24 dB
Low current consumption
PSRR: 70 dB typ @ 217 Hz with 6 dB gain
Fast startup phase: 1 ms
Thermal shutdown protection
QFN20 4x4 mm lead-free package
Applications
Cellular phone
PDA
Flat panel TV
Description
The TS2012 is a fully differential, class D, power
amplifier stereo. It is able to drive up to 1.35 W
into an 8 Ω load at 5 V per channel. It achieves
outstanding efficiency compared to typical class
AB audio amps.
The device has four different gain settings utilizing
two discrete pins: G0 and G1.
Pop and click reduction circuitry provides low
on/off switch noise while allowing the device to
start within 1 ms.
Two standby pins (active low) allow each channel
to be switched off independently.
The TS2012 is available in a QFN20 4x4 mm
package.
Gain
Select PWM
H
Bridge
LIN +
LIN -
G0
G1
AV
LOUT+
LOUT-
CC
PV
CC
PV
CC
STBY L
STBY R
Gain
Select PWM
H
Bridge
RIN -
RIN + ROUT+
ROUT-
Oscillator
Standby
Control
300k
300k
300k
300k
AGND
PGND
PGND
1
2
34
5
7
8
9
11
12 13
14
15
16
17
18
19
20
TS2012 - QFN20 (4x4 mm)
G1 G0
Lout+
PVCC
PGND
PVCC
Rout+
PGND
NC
STBYL
STBYR
AVCC
Lin+
Lin-
AGND
Rin-
Lout-
NC
Rout-
Rin+
1
2
4
3
5
67
8910
11
12
13
14
15
161718
1920
G1 G0
Lout+
PVCC
PGND
PVCC
Rout+
PGND
NC
STBYL
STBYR
AVCC
Lin+
Lin-
AGND
Rin-
Lout-
NC
Rout-
Rin+
1
2
4
3
5
67
8910
11
12
13
14
15
161718
1920
Pin connections (top view)
Block diagram
www.st.com
Contents TS2012
2/29 DocID14236 Rev 2
Contents
1 Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 3
2 Typical application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.1 Electrical characteristic tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.2 Electrical characteristic curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.1 Differential configuration principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.2 Gain settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.3 Common mode feedback loop limitations . . . . . . . . . . . . . . . . . . . . . . . . 21
4.4 Low frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.5 Decoupling of the circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.6 Wakeup time (twu) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4.7 Shutdown time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4.8 Consumption in shutdown mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4.9 Single-ended input configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.10 Output filter considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5.1 QFN20 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
6 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
DocID14236 Rev 2 3/29
TS2012 Absolute maximum ratings and operating conditions
29
1 Absolute maximum ratings and operating conditions
Table 1. Absolute maximum ratings
Symbol Parameter Value Unit
VCC Supply voltage (1)
1. All voltage values are measured with respect to the ground pin.
6
V
ViInput voltage (2)
2. The magnitude of the input signal must never exceed VCC + 0.3 V / GND - 0.3 V.
GND to VCC
Toper Operating free air temperature range -40 to + 85
°CTstg Storage temperature -65 to +150
TjMaximum junction temperature 150
Rthja Thermal resistance junction to ambient (3)
3. The device is protected in case of over temperature by a thermal shutdown active @ 150 °C.
100 °C/W
PdPower dissipation Internally limited(4)
4. Exceeding the power derating curves over a long period causes abnormal operation.
ESD
HBM: human body model(5)
5. Human body model: 100 pF discharged through a 1.5 kΩ resistor between two pins of the device, done for
all couples of pin combinations with other pins floating.
2kV
MM: machine model(6)
6. Machine model: a 200 pF cap is charged to the specified voltage, then discharged directly between two
pins of the device with no external series resistor (internal resistor < 5 Ω), done for all couples of pin
combinations with other pins floating.
200 V
Latch-up Latch-up immunity 200 mA
VSTBY Standby pin voltage maximum voltage GND to VCC V
Lead temperature (soldering, 10 s) 260 °C
Absolute maximum ratings and operating conditions TS2012
4/29 DocID14236 Rev 2
Table 2. Operating conditions
Symbol Parameter Value Unit
VCC Supply voltage 2.5 to 5.5
V
VIInput voltage range GND to VCC
Vic Input common mode voltage(1)
1. I Voo I 40 mV max with all differential gains except 24 dB. For 24 dB gain, input decoupling caps are
mandatory.
GND+0.5V to VCC-0.9V
VSTBY
Standby voltage input (2)
Device ON
Device in STANDBY(3)
2. Without any signal on VSTBY, the device is in standby (internal 300 kΩ ± 20 % pull-down resistor).
3. Minimum current consumption is obtained when VSTBY = GND.
1.4 VSTBY VCC
GND VSTBY 0.4
RLLoad resistor 4 Ω
VIH GO, G1 - high level input voltage(4)
4. Between G0, G1pins and GND, there is an internal 300kΩ (±20 %) pull-down resistor. When pins are
floating, the gain is 6 dB. In full standby (left and right channels OFF), these resistors are disconnected
(HiZ input).
1.4 VIH VCC
V
VIL GO, G1 - low level input voltage GND VIL 0.4
Rthja Thermal resistance junction to ambient(5)
5. With 4-layer PCB.
40 °C/W
DocID14236 Rev 2 5/29
TS2012 Typical application
29
2 Typical application
Figure 1. Typical application schematics
VCC
CsL
TS2012
15 H
μ
2 F
μ
2 F
μ
15 H
μ
30 H
μ
1 F
μ
1 F
μ
30 H
μ
Load
4 LC Output Filter 8 LC Output Filter
ΩΩ
Gain
Select
Gain
Select
Standby
Control
PWM
H
Bridge
PWM
H
Bridge
Oscillator
LIN +
LIN -
RIN -
RIN +
G0
G1
STBY L
STBY R
AVAGND
PGND
PGND
LOUT+
LOUT-
CC
PV
CC
PV
CC
ROUT+
ROUT-
Left speaker
Right speaker
Cin
Cin
Left IN+
Input capacitors
are optional
Left IN-
Differential
Left Input
Cin
Cin
Right IN+
Right IN-
Differential
Right Input
Standby Control
VCC CsR
VCC
Cs
100nF
VCC
CsL
TS2012
Gain
Select
Gain
Select
Standby
Control
PWM
H
Bridge
PWM
H
Bridge
Oscillator
LIN +
LIN -
RIN -
RIN +
G0
G1
STBY L
STBY R
AVAGND
PGND
PGND
LOUT+
LOUT-
CC
PV
CC
PV
CC
ROUT+
ROUT-
Cin
Cin
Left IN+
Input capacitors
are optional
Left IN-
Differential
Left Input
Cin
Cin
Right IN+
Right IN-
Differential
Right Input
Gain Select
Standby Control
VCC CsR
1 F
VCC
Cs
100nF
LC Output Filter
LC Output Filter Load
Control
Gain Select
Control
μ
1 F
μ
1 F
μ
1 F
μ
Typical application TS2012
6/29 DocID14236 Rev 2
Table 3. External component descriptions
Components Functional description
CS, CSL, CSR Supply capacitor that provides power supply filtering.
Cin
Input coupling capacitors (optional) that block the DC voltage at the amplifier input
terminal. The capacitors also form a high pass filter with Zin
(Fcl = 1 / (2 x π x Zin x Cin)).
Table 4. Pin descriptions
Pin number Pin name Pin description
1 G1 Gain select pin (MSB)
2 Lout+ Left channel positive output
3 PVCC Power supply
4 PGND Power ground
5 Lout- Left channel negative output
6 NC No internal connection
7 STBYL Standby pin (active low) for left channel output
8 STBYR Standby pin (active low) for right channel output
9 AVCC Analog supply
10 NC No internal connection
11 Rout- Right channel negative output
12 PGND Power ground
13 PVCC Power supply
14 Rout+ Right channel positive output
15 G0 Gain select pin (LSB)
16 Rin+ Right channel positive differential input
17 Rin- Right channel negative differential input
18 AGND Analog ground
19 Lin- Left channel negative differential input
20 Lin+ Left channel positive differential input
Thermal pad Connect the thermal pad of the QFN package to PCB ground
DocID14236 Rev 2 7/29
TS2012 Electrical characteristics
29
3 Electrical characteristics
3.1 Electrical characteristic tables
Table 5. VCC = +5 V, GND = 0 V, Vic = 2.5 V, Tamb = 25 °C
(unless otherwise specified)
Symbol Parameters and test conditions Min. Typ. Max. Unit
ICC
Supply current
No input signal, no load, both channels 58mA
ISTBY
Standby current
No input signal, VSTBY = GND 0.2 2 µA
Voo
Output offset voltage
Floating inputs, G = 6dB, RL = 8Ω25 mV
Po
Output power
THD + N = 1 % max, f = 1 kHz, RL = 4 Ω
THD + N = 1 % max, f = 1 kHz, RL = 8 Ω
THD + N = 10 % max, f = 1 kHz, RL = 4 Ω
THD + N = 10 % max, f = 1 kHz, RL = 8 Ω
2.2
1.35
2.8
1.65
W
THD + N Total harmonic distortion + noise
Po = 0.8 W, G = 6 dB, f =1 kHz, RL = 8 Ω0.07
%
Efficiency
Efficiency per channel
Po = 2.2 W, RL = 4 Ω +15 µH
Po = 1.25 W, RL = 8 Ω+15 µH
81
89
PSRR
Power supply rejection ratio with inputs grounded
Cin = 1 µF (1), f = 217 Hz, RL = 8 Ω, Gain = 6 dB,
Vripple = 200 mVpp
70
dB
Crosstalk Channel separation
Po = 0.9 W, G = 6 dB, f = 1 kHz, RL = 8 Ω90
CMRR
Common mode rejection ratio
Cin = 1 µF, f = 217 Hz, RL = 8 Ω, Gain = 6 dB,
ΔVICM = 200 mVpp
70
Gain
Gain value
G1 = G0 = VIL
G1 = VIL & G0 = VIH
G1 = VIH & G0 = VIL
G1 = G0 = VIH
5.5
11.5
17.5
23.5
6
12
18
24
6.5
12.5
18.5
24.5
Zin
Single ended input impedance
All gains, referred to ground 24 30 36 kΩ
FPWM Pulse width modulator base frequency 190 280 370 kHz
SNR Signal to noise ratio (A-weighting)
Po = 1.3 W, G = 6 dB, RL = 8 Ω99 dB
tWU Wakeup time 1 3
ms
tSTBY Standby time 1
Electrical characteristics TS2012
8/29 DocID14236 Rev 2
VN
Output voltage noise f = 20 Hz to 20 kHz, RL=8 Ω
Unweighted (filterless, G = 6 dB)
A-weighted (filterless, G = 6 dB)
Unweighted (with LC output filter, G = 6 dB)
A-weighted (with LC output filter, G = 6 dB)
Unweighted (filterless, G = 24 dB)
A-weighted (filterless, G = 24 dB)
Unweighted (with LC output filter, G = 24 dB)
A-weighted (with LC output filter, G = 24 dB)
63
35
60
35
115
72
109
71
µVRMS
1. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the superimposed sinus signal to VCC @ f = 217 Hz.
Table 5. VCC = +5 V, GND = 0 V, Vic = 2.5 V, Tamb = 25 °C
(unless otherwise specified) (continued)
Symbol Parameters and test conditions Min. Typ. Max. Unit
DocID14236 Rev 2 9/29
TS2012 Electrical characteristics
29
Table 6. VCC = +3.6 V, GND = 0 V, Vic = 1.8 V, Tamb = 25 °C
(unless otherwise specified)
Symbol Parameter Min. Typ. Max. Unit
ICC
Supply current
No input signal, no load, both channels 3.3 6.5 mA
ISTBY Standby current
No input signal, VSTBY = GND 0.2 2 µA
Voo
Output offset voltage
Floating inputs, G = 6dB, RL = 8Ω25 mV
Po
Output power
THD + N = 1 % max, f = 1 kHz, RL = 4 Ω
THD + N = 1 % max, f = 1 kHz, RL = 8 Ω
THD + N = 10 % max, f = 1 kHz, RL = 4 Ω
THD + N = 10 % max, f = 1 kHz, RL = 8 Ω
1.15
0.68
1.3
0.9
W
THD + N Total harmonic distortion + noise
Po = 0.4 W, G = 6 dB, f =1 kHz, RL = 8 Ω0.05
%
Efficiency
Efficiency per channel
Po = 1.15 W, RL = 4 Ω +15 µH
Po = 0.68 W, RL = 8 Ω +15 µH
80
88
PSRR
Power supply rejection ratio with inputs grounded
Cin= 1 µF (1), f = 217 Hz, RL = 8 Ω, Gain = 6 dB,
Vripple = 200 mVpp
70
dB
Crosstalk Channel separation
Po = 0.5 W, G = 6 dB, f =1 kHz, RL = 8 Ω90
CMRR
Common mode rejection ratio
Cin = 1 µF, f = 217 Hz, RL = 8 Ω, Gain = 6 dB,
ΔVICM = 200 mVpp
70
Gain
Gain value
G1 = G0 = VIL
G1 = VIL & G0 = VIH
G1 = VIH & G0 = VIL
G1 = G0 = VIH
5.5
11.5
17.5
23.5
6
12
18
24
6.5
12.5
18.5
24.5
Zin
Single ended input impedance
All gains, referred to ground 24 30 36 kΩ
FPWM Pulse width modulator base frequency 190 280 370 kHz
SNR Signal to noise ratio (A-weighting)
Po = 0.65 W, G = 6 dB, RL = 8 Ω96 dB
tWU Wakeup time 1 3
ms
tSTBY Standby time 1
Electrical characteristics TS2012
10/29 DocID14236 Rev 2
VN
Output voltage noise f = 20 Hz to 20 kHz, RL= 4 Ω
Unweighted (filterless, G = 6 dB)
A-weighted (filterless, G = 6 dB)
Unweighted (with LC output filter, G = 6 dB)
A-weighted (with LC output filter, G = 6 dB)
Unweighted (filterless, G = 24 dB)
A-weighted (filterless, G = 24 dB)
Unweighted (with LC output filter, G = 24 dB)
A-weighted (with LC output filter, G = 24 dB)
58
34
55
34
111
70
105
69
µVRMS
1. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the superimposed sinus signal to VCC @ f = 217 Hz.
Table 6. VCC = +3.6 V, GND = 0 V, Vic = 1.8 V, Tamb = 25 °C
(unless otherwise specified) (continued)
Symbol Parameter Min. Typ. Max. Unit
DocID14236 Rev 2 11/29
TS2012 Electrical characteristics
29
Table 7. VCC = +2.5V, GND = 0V, Vic=1.25V, Tamb = 25°C
(unless otherwise specified)
Symbol Parameter Min. Typ. Max. Unit
ICC
Supply current
No input signal, no load, both channels 2.8 4 mA
ISTBY
Standby current
No input signal, VSTBY = GND 0.2 2 µA
Voo
Output offset voltage
Floating inputs, G = 6dB, RL = 8Ω25 mV
Po
Output power
THD + N = 1 % max, f = 1 kHz, RL = 4 Ω
THD + N = 1 % max, f = 1 kHz, RL = 8 Ω
THD + N = 10 % max, f = 1 kHz, RL = 4 Ω
THD + N = 10 % max, f = 1 kHz, RL = 8 Ω
0.53
0.32
0.75
0.45
W
THD + N Total harmonic distortion + noise
Po = 0.2 W, G = 6 dB, f =1 kHz, RL = 8 Ω0.04
%
Efficiency
Efficiency per channel
Po = 0.53 W, RL = 4 Ω +15 µH
Po = 0.32 W, RL = 8 Ω+15 µH
80
88
PSRR
Power supply rejection ratio with inputs grounded
Cin = 1 µF (1), f = 217 Hz, RL = 8 Ω, Gain = 6 dB,
Vripple = 200 mVpp
70
dB
Crosstalk Channel separation
Po = 0.2 W, G = 6 dB, f = 1 kHz, RL = 8 Ω90
CMRR
Common mode rejection ratio
Cin = 1 µF, f = 217 Hz, RL = 8 Ω, Gain = 6 dB,
ΔVICM = 200 mVpp
70
Gain
Gain value
G1 = G0 = VIL
G1 = VIL & G0 = VIH
G1 = VIH & G0 = VIL
G1 = G0 = VIH
5.5
11.5
17.5
23.5
6
12
18
24
6.5
12.5
18.5
24.5
Zin
Single ended input impedance
All gains, referred to ground 24 30 36 kΩ
FPWM Pulse width modulator base frequency 190 280 370 kHz
SNR Signal to noise ratio (A-weighting)
Po = 0.3 W, G = 6 dB, RL = 8 Ω93 dB
tWU Wakeup time 1 3
ms
tSTBY Standby time 1
Electrical characteristics TS2012
12/29 DocID14236 Rev 2
3.2 Electrical characteristic curves
The graphs shown in this section use the following abbreviations:
RL+ 15 µH or 30 µH = pure resistor + very low series resistance inductor
Filter = LC output filter (1 µF + 30 µH for 4 Ω and 0.5 µF + 60 µH for 8 Ω)
All measurements are made with CSL = CSR = 1 µF and CS = 100 nF (see Figure 2), except
for the PSRR where CSL,R is removed (see Figure 3).
Figure 2. Test diagram for measurements
VN
Output voltage noise f = 20 Hz to 20 kHz, RL = 8 Ω
Unweighted (filterless, G = 6 dB)
A-weighted (filterless, G = 6 dB)
Unweighted (with LC output filter, G = 6 dB)
A-weighted (with LC output filter, G = 6 dB)
Unweighted (filterless, G = 24 dB)
A-weighted (filterless, G = 24 dB)
Unweighted (with LC output filter, G = 24 dB)
A-weighted (with LC output filter, G = 24 dB)
57
34
54
33
110
71
104
69
µVRMS
1. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the superimposed sinus signal to VCC @ f = 217 Hz.
Table 7. VCC = +2.5V, GND = 0V, Vic=1.25V, Tamb = 25°C
(unless otherwise specified) (continued)
Symbol Parameter Min. Typ. Max. Unit
Vcc
Cin
Cin
(CsR)
1/2 TS2012
C
100nF
In+
In-
15 H or 30 H
μμ
or
LC Filter
Out+
Out-
1 F
μ
Ω
4 or 8
RL
5th order
50kHz
low-pass filter
Audio Measurement
Bandwith < 30kHz
GND
GND GND
S
CsL
DocID14236 Rev 2 13/29
TS2012 Electrical characteristics
29
Figure 3. Test diagram for PSRR measurements
Table 8. Index of graphics
Description Figure
Current consumption vs. power supply voltage Figure 4
Current consumption vs. standby voltage Figure 5
Efficiency vs. output power Figure 6 - Figure 9
Output power vs. power supply voltage Figure 10, Figure 11
PSRR vs. common mode input voltage Figure 12
PSRR vs. frequency Figure 13
CMRR vs. common mode input voltage Figure 14
CMRR vs. frequency Figure 15
Gain vs. frequency Figure 16, Figure 17
THD+N vs. output power Figure 18 - Figure 25
THD+N vs. frequency Figure 26 - Figure 37
Crosstalk vs. frequency Figure 38 - Figure 41
Power derating curves Figure 42
Startup and shutdown time Figure 43, Figure 44
VCC
Cin
Cin
1/2 TS2012
Cs
100nF
In+
In-
15 H or 30 H
μμ
or
LC Filter
Out+
Out-
Ω
4 or 8
RL
5th order
50kHz
low-pass filter
RMS Selective Measurement
Bandwith =1% of Fmeas
GND
GND
GND
1 F
μ
1 F
μ
GND
5th order
50kHz
low-pass filter
reference
20Hz to 20kHz
Vripple Vcc
Electrical characteristics TS2012
14/29 DocID14236 Rev 2
Figure 4. Current consumption vs. power
supply voltage
Figure 5. Current consumption vs. standby
voltage (one channel)
2.5 3.0 3.5 4.0 4.5 5.0 5.5
0
1
2
3
4
5
6
One channel ON
Both channels ON
T
AMB
=25°C
No Loads
Current Consumption (mA)
Power Supply Voltage (V)
012345
0.0
0.5
1.0
1.5
2.0
2.5
V
CC
=3.6V
V
CC
=5V
No Load
T
AMB
=25°C
V
CC
=2.5V
Current Consumption (mA)
Standby Voltage (V)
Figure 6. Efficiency vs. output power (i) Figure 7. Efficiency vs. output power (ii)
0.0 0.1 0.2 0.3 0.4 0.5
0
20
40
60
80
100
0
25
50
75
100
125
Vcc=2.5V
RL=4
Ω
+
15
μ
H
F=1kHz
THD+N
1%
Power
Dissipation
Efficiency
Efficiency (%)
Output Power (W)
Power Dissipation (mW)
0.0 0.5 1.0 1.5 2.0
0
20
40
60
80
100
0
100
200
300
400
500
Vcc=5V
RL=4
Ω
+
15
μ
H
F=1kHz
THD+N
1%
Power
Dissipation
Efficiency
Efficiency (%)
Output Power (W)
Power Dissipation (mW)
Figure 8. Efficiency vs. output power (iii) Figure 9. Efficiency vs. output power (iv)
0.00 0.05 0.10 0.15 0.20 0.25 0.30
0
20
40
60
80
100
0
10
20
30
40
50
Vcc=2.5V
RL=8
Ω
+
15
μ
H
F=1kHz
THD+N
1%
Power
Dissipation
Efficiency
Efficiency (%)
Output Power (W)
Power Dissipation (mW)
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4
0
20
40
60
80
100
0
40
80
120
160
200
Vcc=5V
RL=8
Ω
+
15
μ
H
F=1kHz
THD+N
1%
Power
Dissipation
Efficiency
Efficiency (%)
Output Power (W)
Power Dissipation (mW)
DocID14236 Rev 2 15/29
TS2012 Electrical characteristics
29
Figure 10. Output power vs. power supply
voltage (i)
Figure 11. Output power vs. power supply
voltage (ii)
2.5 3.0 3.5 4.0 4.5 5.0 5.5
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
THD+N=10%
RL = 4
Ω
+
15
μ
H
F = 1kHz
BW < 30kHz
Tamb = 25
°
C
THD+N=1%
Output Power (W)
Power Supply Voltage (V)
2.53.03.54.04.55.05.5
0.0
0.4
0.8
1.2
1.6
2.0
THD+N=10%
RL = 8
Ω
+
15
μ
H
F = 1kHz
BW < 30kHz
Tamb = 25
°
C
THD+N=1%
Output Power (W)
Power Supply Voltage (V)
Figure 12. PSRR vs. common mode input
voltage
Figure 13. PSRR vs. frequency
0.00.51.01.52.02.53.03.54.04.55.0
-80
-70
-60
-50
-40
-30
-20
-10
0
Gain=6dB
Gain=24dB
Vcc=3V
Vcc=2.5V Vcc=5V
Vripple = 200mVpp, F = 217Hz
RL
4
Ω
+
15
μ
H, Tamb = 25
°
C
PSRR(dB)
Common Mode Input Voltage (V)
100 1k 10k
-80
-70
-60
-50
-40
-30
-20
-10
0
Gain=24dB
Inputs grounded, Vripple = 200mVpp
RL
4
Ω
+
15
μ
H, Cin=1
μ
F, Tamb=25
°
C
Vcc = 2.5, 3.6, 5V
20k
20
Gain=6dB
PSRR (dB)
Frequency (Hz)
Figure 14. CMRR vs. common mode input
voltage
Figure 15. CMRR vs. frequency
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
-80
-70
-60
-50
-40
-30
-20
-10
0
Gain=6dB
Gain=24dB Vcc=3V
Vcc=2.5V
Vcc=5V
Δ
Vicm=200mVpp, F = 217Hz
RL
4
Ω
+
15
μ
H, Tamb = 25
°
C
CMRR(dB)
Common Mode Input Voltage (V)
100 1k 10k
-80
-70
-60
-50
-40
-30
-20
-10
0
Gain=24dB
ΔVicm=200mVpp, Vcc = 2.5, 3.6, 5V
RL 4Ω + 15μH, Cin=1μF, Tamb=25°C
20k
20
Gain=6dB
CMRR (dB)
Frequency (Hz)
Electrical characteristics TS2012
16/29 DocID14236 Rev 2
Figure 16. Gain vs. frequency (i) Figure 17. Gain vs. frequency (ii)
100 1k 10k
0
2
4
6
8
RL=4
Ω
+30
μ
H
RL=4
Ω
+15
μ
H
RL=8
Ω
+30
μ
H
RL=8
Ω
+15
μ
H
no load
Gain = 6dB
Vin = 500mV
Cin = 4.7
μ
F
T
AMB
= 25
°
C
Gain (dB)
Frequency (Hz)
20 20k
100 1k 10k
18
20
22
24
26
RL=4
Ω
+30
μ
H
RL=4
Ω
+15
μ
H
RL=8
Ω
+30
μ
H
RL=8
Ω
+15
μ
H
no load
Gain = 24dB
Vin = 5mV
Cin = 4.7
μ
F
T
AMB
= 25
°
C
Gain (dB)
Frequency (Hz)
20 20k
Figure 18. THD+N vs. output power (i) Figure 19. THD+N vs. output power (ii)
1E-3 0.01 0.1 1
0.1
1
10
3
Vcc=3.6V
Vcc=5V
Vcc=2.5V
RL = 4
Ω
+ 15
μ
H
F = 1kHz
G = 6dB
BW < 30kHz
Tamb = 25
°
C
THD + N (%)
Output Power (W)
1E-3 0.01 0.1 1
0.1
1
10
3
Vcc=3.6V
Vcc=5V
Vcc=2.5V
RL = 4
Ω
+ 30
μ
H
F = 1kHz
G = 6dB
BW < 30kHz
Tamb = 25
°
C
THD + N (%)
Output Power (W)
Figure 20. THD+N vs. output power (iii) Figure 21. THD+N vs. output power (iv)
1E-3 0.01 0.1 1
0.1
1
10
2
Vcc=5V
Vcc=2.5V
Vcc=3.6V
RL = 8
Ω
+ 15
μ
H
F = 1kHz
G = 6dB
BW < 30kHz
Tamb = 25
°
C
THD + N (%)
Output Power (W)
1E-3 0.01 0.1 1
0.1
1
10
2
Vcc=5V
Vcc=2.5V
Vcc=3.6V
RL = 8Ω + 30μH
F = 1kHz
G = 6dB
BW < 30kHz
Tamb = 25°C
THD + N (%)
Output Power (W)
DocID14236 Rev 2 17/29
TS2012 Electrical characteristics
29
Figure 22. THD+N vs. output power (v) Figure 23. THD+N vs. output power (vi)
1E-3 0.01 0.1 1
0.01
0.1
1
10
3
Vcc=3.6V
Vcc=5V
Vcc=2.5V
RL = 4
Ω
+ 15
μ
H
F = 100Hz
G = 6dB
BW < 30kHz
Tamb = 25
°
C
THD + N (%)
Output Power (W)
1E-3 0.01 0.1 1
0.01
0.1
1
10
3
Vcc=3.6V
Vcc=5V
Vcc=2.5V
RL = 4
Ω
+ 30
μ
H
F = 100Hz
G = 6dB
BW < 30kHz
Tamb = 25
°
C
THD + N (%)
Output Power (W)
Figure 24. THD+N vs. output power (vii) Figure 25. THD+N vs. output power (viii)
1E-3 0.01 0.1 1
0.01
0.1
1
10
2
Vcc=5V
Vcc=2.5V
Vcc=3.6V
RL = 8
Ω
+ 15
μ
H
F = 100Hz
G = 6dB
BW < 30kHz
Tamb = 25
°
C
THD + N (%)
Output Power (W)
1E-3 0.01 0.1 1
0.01
0.1
1
10
2
Vcc=5V
Vcc=2.5V
Vcc=3.6V
RL = 8
Ω
+ 30
μ
H
F = 100Hz
G = 6dB
BW < 30kHz
Tamb = 25
°
C
THD + N (%)
Output Power (W)
Figure 26. THD+N vs. frequency (i) Figure 27. THD+N vs. frequency (ii)
100 1000 10000
0.01
0.1
1
10
Po=0.2W
Po=0.4W
RL=4
Ω
+ 15
μ
H
G=6dB
BW < 30kHz
Vcc=2.5V
Tamb = 25
°
C
20k20
THD + N (%)
Frequency (Hz)
100 1000 10000
0.01
0.1
1
10
Po=0.2W
Po=0.4W
RL=4
Ω
+ 30
μ
H
G=6dB
BW < 30kHz
Vcc=2.5V
Tamb = 25
°
C
20k20
THD + N (%)
Frequency (Hz)
RL:E » 15
Electrical characteristics TS2012
18/29 DocID14236 Rev 2
Figure 28. THD+N vs. frequency (iii) Figure 29. THD+N vs. frequency (iv)
100 1000 10000
0.01
0.1
1
10
Po=0.1W
Po=0.2W
RL=8
Ω
+ 15
μ
H
G=6dB
BW < 30kHz
Vcc=2.5V
Tamb = 25
°
C
20k20
THD + N (%)
Frequency (Hz)
100 1000 10000
0.01
0.1
1
10
Po=0.1W
Po=0.2W
RL=8
Ω
+ 30
μ
H
G=6dB
BW < 30kHz
Vcc=2.5V
Tamb = 25
°
C
20k20
THD + N (%)
Frequency (Hz)
Figure 30. THD+N vs. frequency (v) Figure 31. THD+N vs. frequency (vi)
100 1000 10000
0.01
0.1
1
10
Po=0.45W
Po=0.9W
RL=4
Ω
+ 15
μ
H
G=6dB
BW < 30kHz
Vcc=3.6V
Tamb = 25
°
C
20k20
THD + N (%)
Frequency (Hz)
100 1000 10000
0.01
0.1
1
10
Po=0.45W
Po=0.9W
RL=4
Ω
+ 30
μ
H
G=6dB
BW < 30kHz
Vcc=3.6V
Tamb = 25
°
C
20k20
THD + N (%)
Frequency (Hz)
Figure 32. THD+N vs. frequency (vii) Figure 33. THD+N vs. frequency (viii)
100 1000 10000
0.01
0.1
1
10
Po=0.25W
Po=0.5W
RL=8
Ω
+ 15
μ
H
G=6dB
BW < 30kHz
Vcc=3.6V
Tamb = 25
°
C
20k20
THD + N (%)
Frequency (Hz)
100 1000 10000
0.01
0.1
1
10
Po=0.25W
Po=0.5W
RL=8
Ω
+ 30
μ
H
G=6dB
BW < 30kHz
Vcc=3.6V
Tamb = 25
°
C
20k20
THD + N (%)
Frequency (Hz)
DocID14236 Rev 2 19/29
TS2012 Electrical characteristics
29
Figure 34. THD+N vs. frequency (ix) Figure 35. THD+N vs. frequency (x)
100 1000 10000
0.01
0.1
1
10
Po=0.75W
Po=1.5W
RL=4
Ω
+ 15
μ
H
G=6dB
BW < 30kHz
Vcc=5V
Tamb = 25
°
C
20k20
THD + N (%)
Frequency (Hz)
100 1000 10000
0.01
0.1
1
10
Po=0.75W
Po=1.5W
RL=4
Ω
+ 30
μ
H
G=6dB
BW < 30kHz
Vcc=5V
Tamb = 25
°
C
20k20
THD + N (%)
Frequency (Hz)
Figure 36. THD+N vs. frequency (xi) Figure 37. THD+N vs. frequency (xii)
100 1000 10000
0.01
0.1
1
10
Po=0.45W
Po=0.9W
RL=8
Ω
+ 15
μ
H
G=6dB
BW < 30kHz
Vcc=5V
Tamb = 25
°
C
20k20
THD + N (%)
Frequency (Hz)
100 1000 10000
0.01
0.1
1
10
Po=0.45W
Po=0.9W
RL=8
Ω
+ 30
μ
H
G=6dB
BW < 30kHz
Vcc=5V
Tamb = 25
°
C
20k20
THD + N (%)
Frequency (Hz)
Figure 38. Crosstalk vs. frequency (i) Figure 39. Crosstalk vs. frequency (ii)
100 1k 10k
-120
-100
-80
-60
-40
-20
0
R -> L
L -> R
Vcc=2.5, 3.6, 5V
RL=4
Ω
+30
μ
H
Gain = 6dB
T
AMB
= 25
°
C
Crosstalk (dB)
Frequency (Hz)
20 20k
100 1k 10k
-120
-100
-80
-60
-40
-20
0
R -> L
L -> R
Vcc=2.5, 3.6, 5V
RL=8
Ω
+30
μ
H
Gain = 6dB
T
AMB
= 25
°
C
Crosstalk (dB)
Frequency (Hz)
20 20k
I EMSDV 25“an mummy : smsnv n smsnw NanL
Electrical characteristics TS2012
20/29 DocID14236 Rev 2
Figure 40. Crosstalk vs. frequency (iii) Figure 41. Crosstalk vs. frequency (iv)
100 1k 10k
-120
-100
-80
-60
-40
-20
0
R -> L
L -> R
Vcc = 2.5, 3.6, 5V
RL = 4
Ω
+30
μ
H
Gain = 24dB
T
AMB
= 25
°
C
Crosstalk (dB)
Frequency (Hz)
20 20k
100 1k 10k
-120
-100
-80
-60
-40
-20
0
R -> L
L -> R
Vcc=2.5, 3.6, 5V
RL=8
Ω
+30
μ
H
Gain = 24dB
T
AMB
= 25
°
C
Crosstalk (dB)
Frequency (Hz)
20 20k
Figure 42. Power derating curves Figure 43. Startup and shutdown phase (i)
Figure 44. Startup and shutdown phase (ii)
0 25 50 75 100 125 150
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
No Heat sink
With 4-layer PCB
QFN20 Package Power Dissipation (W)
Ambient Temperature (
°
C)
DocID14236 Rev 2 21/29
TS2012 Application information
29
4 Application information
4.1 Differential configuration principle
The TS2012 is a monolithic fully-differential input/output class D power amplifier. The
TS2012 also includes a common-mode feedback loop that controls the output bias value to
average it at VCC/2 for any DC common mode input voltage. This allows the device to
always have a maximum output voltage swing, and by consequence, maximize the output
power. Moreover, as the load is connected differentially compared with a single-ended
topology, the output is four times higher for the same power supply voltage.
The advantages of a full-differential amplifier are:
High PSRR (power supply rejection ratio)
High common mode noise rejection
Virtually zero pop without additional circuitry, giving a faster startup time compared with
conventional single-ended input amplifiers
Easier interfacing with differential output audio DAC
No input coupling capacitors required thanks to common mode feedback loop
4.2 Gain settings
In the flat region of the frequency-response curve (no input coupling capacitor or internal
feedback loop + load effect), the differential gain can be set to 6, 12 18, or 24 dB depending
on the logic level of the G0 and G1 pins, as shown in Table 9.
Note: Between pins G0, G1 and GND there is an internal 300 k
Ω
(±20 %) resistor. When the pins
are floating, the gain is 6 dB. In full standby (left and right channels OFF), these resistors are
disconnected (HiZ input).
4.3 Common mode feedback loop limitations
The common mode feedback loop allows the output DC bias voltage to be averaged at
VCC/2 for any DC common mode bias input voltage.
Due to the Vic limitation of the input stage (see Table 2: Operating conditions), the common
mode feedback loop can fulfill its role only within the defined range.
Table 9. Gain settings with G0 and G1 pins
G1 G0 Gain (dB) Gain (V/V)
0062
01124
10188
1 1 24 16
Application information TS2012
22/29 DocID14236 Rev 2
4.4 Low frequency response
If a low frequency bandwidth limitation is required, it is possible to use input coupling
capacitors. In the low frequency region, the input coupling capacitor, Cin, starts to have an
effect. Cin, with the input impedance Zin, forms a first order, high-pass filter with a -3 dB cut-
off frequency (see Table 5 to Table 7) as shown in Equation 1:
Equation 1
So, for a desired cut-off frequency, FCL, Cin is calculated as shown in Equation 2:
Equation 2
with FCL in Hz, Zin in Ω and Cin in F.
The input impedance Zin is typically 30 kΩ for the whole power supply voltage range. There
is also a tolerance around the typical value (see Table 5 to Table 7). The maximum and
minimum tolerance of the FCL can be calculated using Equation 3 and Equation 4
respectively.
Equation 3
Equation 4
4.5 Decoupling of the circuit
Power supply capacitors, referred to as CS, CSL, and CSR are needed to correctly bypass
the TS2012.
The TS2012 has a typical switching frequency of 280 kHz and an output fall and rise time of
about 5 ns. Due to these very fast transients, careful decoupling is mandatory.
A 1 µF ceramic capacitor between each PVCC and PGND and also between AVCC and
AGND is enough, but they must be located very close to the TS2012 in order to avoid any
extra parasitic inductance created by a long track wire. Parasitic loop inductance, in relation
to di/dt, introduces overvoltage that decreases the global efficiency of the device and may
also cause a TS2012 breakdown if the parasitic inductance is too high.
In addition, even if a ceramic capacitor has an adequate high frequency ESR value, its
current capability is also important. A 0603 size is a good compromise, particularly when a
4 Ω load is used.
FCL
1
2πZin Cin
⋅⋅ ⋅
--------------------------------------------=
Cin
1
2πZin FCL
⋅⋅ ⋅
----------------------------------------------=
DocID14236 Rev 2 23/29
TS2012 Application information
29
Another important parameter is the rated voltage of the capacitor. A 1 µF/6.3 V capacitor
used at 5 V, loses about 50 % of its value. With a power supply voltage of 5 V, the
decoupling value, instead of 1 µF, could be reduced to 0.5 µF. As CS has particular influence
on the THD+N in the medium to high frequency region, this capacitor variation becomes
decisive. In addition, less decoupling means higher overshoots which can be problematic if
they reach the power supply AMR value (6 V).
4.6 Wakeup time (twu)
When standby is released to set the device ON, there is typically a delay of 1 ms. The
TS2012 has an internal digital delay that mutes the outputs and releases them after this
delay time to avoid any pop noise.
Note: The gain increases smoothly (see Figure 44) from the mute to the gain selected by the G1
and G0 pin (Section 4.2).
4.7 Shutdown time
When the standby command is set, the time required to set the output stage to high
impedance and to put the internal circuitry in shutdown mode, is typically 1 ms. This time is
used to decrease the gain and avoid any pop noise during shutdown.
Note: The gain decreases smoothly until the outputs are muted (see Figure 44).
4.8 Consumption in shutdown mode
Between the shutdown pin and GND there is an internal 300 kΩ20 %) resistor. This
resistor forces the TS2012 to be in shutdown when the shutdown input is left floating.
However, this resistor also introduces additional shutdown power consumption if the
shutdown pin voltage is not 0 V.
For example, with a 0.4 V shutdown voltage pin, the following typical and maximum values
respectively for each shutdown pin must be added to the standby current specified in
Table 5 to Table 7: 0.4 V/300 kΩ = 1.3 µA and 0.4 V/240 kΩ = 1.66 µA. This current is
provided by the external control device for standby pins.
f9 $9
Application information TS2012
24/29 DocID14236 Rev 2
4.9 Single-ended input configuration
It is possible to use the TS2012 in a single-ended input configuration. However, input
coupling capacitors are mandatory in this configuration. The schematic diagram in Figure 45
shows a typical single-ended input application.
Figure 45. Typical application for single-ended input configuration
4.10 Output filter considerations
The TS2012 is designed to operate without an output filter. However, due to very sharp
transients on the TS2012 output, EMI radiated emissions may cause some standard
compliance issues.
These EMI standard compliance issues can appear if the distance between the TS2012
outputs and the loudspeaker terminal are long (typically more than 50 mm or 100 mm, in
both directions, to the speaker terminals). As the PCB layout and internal equipment device
are different for each configuration, it is difficult to provide a one-size-fits-all solution.
However, to decrease the probability of EMI issues, the following simple rules should be
followed:
Reduce as much as possible the distance between the TS2012 output pins and the
speaker terminals.
Use a ground plane for “shielding” sensitive wires.
Place, as close as possible to the TS2012 and in series with each output, a ferrite bead
with a minimum rated current of 2.5 A and an impedance greater than 50 Ω at
frequencies above 30 MHz. If, after testing, these ferrite beads are not necessary,
replace them by a short-circuit.
Allow extra footprint to place, if necessary, a capacitor to short perturbations to ground
(see Figure 46).
VCC
CsL
TS2012
Gain
Select
Gain
Select
Standby
Control
PWM
H
Bridge
PWM
H
Bridge
Oscillator
LIN +
LIN -
RIN -
RIN +
G0
G1
STBY L
STBY R
AVAGND
PGND
PGND
LOUT+
LOUT-
CC
PV
CC
PV
CC
ROUT+
ROUT-
Left speaker
Right speaker
Cin
Cin
Left Input
Cin
Cin
Right Input
Standby Control
VCC CsR
VCC
Cs
100nF
Gain Select
Control
1 F
μ
1 F
μ
DocID14236 Rev 2 25/29
TS2012 Application information
29
Figure 46. Ferrite chip bead placement
If the distance between the TS2012 output and the speaker terminals is too long, it is
possible to have low frequency EMI issues due to the fact that the typical operating
frequency is 280 kHz. In this configuration, it is necessary to place the output filter shown in
Figure 1: Typical application schematics as close as possible to the TS2012.
to speaker
about 100pF
gnd
Ferrite chip bead
From output
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Package information TS2012
26/29 DocID14236 Rev 2
5 Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
5.1 QFN20 package information
The QFN20 package has an exposed pad E2 x D2. For enhanced thermal performance, the
exposed pad must be soldered to a copper area on the PCB, acting as a heatsink. This
copper area can be electrically connected to pin 4, 12, 18 (PGND, AGND) or left floating.
Figure 47. QFN20 package mechanical drawing
‘ kfimmm \_L.I D UDDDH gags a W_WDDEDD
DocID14236 Rev 2 27/29
TS2012 Package information
29
Figure 48. QFN20 footprint recommendation
Table 10. QFN20 package mechanical data
Ref
Dimensions in mm Dimensions in inches
Min Typ Max Min Typ Max
A 0.8 0.9 1 0.031 0.035 0.039
A1 0.02 0.05 0.001 0.002
A2 0.65 1 0.026 0.039
A3 0.25 0.010
b 0.18 0.23 0.3 0.007 0.009 0.012
D 3.85 4 4.15 0.152 0.157 0.163
D2 2.6 0.102
E 3.85 4 4.15 0.152 0.157 0.163
E2 2.6 0.102
e 0.45 0.5 0.55 0.018 0.020 0.022
L 0.3 0.4 0.5 0.012 0.016 0.020
ddd 0.08 0.003
Table 11. QFN20 footprint data
Ref. Dimensions in mm Dimensions in inches
A
4.55 0.179
B
C 0.50 0.020
D 0.35 0.014
E 0.65 0.026
F 2.45 0.096
G 0.40 0.016
Ordering information TS2012
28/29 DocID14236 Rev 2
6 Ordering information
7 Revision history
Table 12. Order code
Part number Temperature range Package Packaging Marking
TS2012IQT -40 °C to +85 °C QFN20 Tape and reel K012
Table 13. Document revision history
Date Revision Changes
17-Dec-2007 1 First release.
17-Jul-2013 2
Small text changes throughout document.
Updated titles of Figure 6 to Figure 11 and Figure 16 to Figure 44
Table 10: QFN20 package mechanical data: added package
mechanical dimensions in inches.
Added Table 11: QFN20 footprint data
Table 12: Order code; updated “Marking”
DocID14236 Rev 2 29/29
TS2012
29
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