SIP32510DT-T1-GE3 Datasheet by Vishay Siliconix

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SiP32510
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S20-0528-Rev. E, 06-Jul-2020 1Document Number: 63577
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1.2 V to 5.5 V, Slew Rate Controlled Load Switch in TSOT23-6
DESCRIPTION
SiP32510 is a slew rate controlled load switches designed
for 1.2 V to 5.5 V operation.
The switch element is of n-channel device that provides low
RON of 44 m typically over a wide range of input.
SiP32510 has low switch on-resistance starting at 1.5 V
input supply. It features a controlled soft on slew rate
of typical 1.6 ms that limits the inrush current for designs
of heavy capacitive load and minimizes the resulting voltage
droop at the power rails. With a typical turn on delay of
0.4 ms, the total turn on time is typically 2 ms.
The SiP32510 features a low voltage control logic interface
(on / off interface) that can interface with low voltage control
signals without extra level shifting circuit.
The SiP32510 has exceptionally low shutdown current and
provides reverse blocking to prevent high current flowing
into the power source.
SiP32510 integrates a switch off output discharge circuit.
SiP32510 is available in TSOT23-6 package.
FEATURES
1.2 V to 5.5 V operation voltage range
•Flat low R
ON down to 1.5 V
44 m typical from 1.8 V to 5 V
Slew rate controlled turn-on: 1.6 ms at 3.3 V
• Low quiescent current < 1 µA when disabled
10.5 µA typical at VIN = 1.2 V
Reverse current blocking when switch is off, with
guaranteed less than 2 µA leakage
Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
APPLICATIONS
PDAs / smart phones
Ultrabook and notebook computer
•Tablet devices
Portable media players
Digital camera
GPS navigation devices
Data storage devices
Optical, industrial, medical, and healthcare devices
• Peripherals
Office automation
•Networking
TYPICAL APPLICATION CIRCUIT
Fig. 1 - SiP32510 Typical Application Circuit
Note
-GE3 denotes halogen-free and RoHS-compliant
Available
ORDERING INFORMATION
TEMPERATURE RANGE PACKAGE MARKING PART NUMBER
-40 °C to +85 °C TSOT23-6 LF SiP32510DT-T1-GE3
SiP32510
IN VOUT
OUT
VIN
GND
GND
GND
EN
EN
C
4.7 µF
IN C
0.1 µF
OUT
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Notes
a. Device mounted with all leads and power pad soldered or welded to PC board, see PCB layout
b. Derate 6.66 mW/°C above TA = 25 °C, see PCB layout
c. TA = 25 °C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating/conditions for extended periods may affect device reliability.
ABSOLUTE MAXIMUM RATINGS
PARAMETER LIMIT UNIT
Supply input voltage (VIN) -0.3 to 6
VEnable input voltage (VEN) -0.3 to 6
Output voltage (VOUT)-0.3 to 6
Maximum continuous switch current (Imax.) c3
AMaximum repetitive pulsed current (1 ms, 10 % duty cycle) c6
Maximum non-repetitive pulsed current (100 µs, EN = active) c12
ESD rating (HBM) > 4 kV
ESD rating (CDM) 1.5
Junction temperature (TJ) -40 to +150 °C
Thermal resistance (JA) a150 °C/W
Power dissipation (PD) a, b 833 mW
RECOMMENDED OPERATING RANGE
PARAMETER LIMIT UNIT
Input voltage range (VIN) 1.2 to 5.5 V
Operating junction temperature range (TJ) -40 to +125 °C
SPECIFICATIONS
PARAMETER SYMBOL
TEST CONDITIONS UNLESS SPECIFIED
VIN = 5 V, TA = -40 °C to +85 °C
(typical values are at TA = 25 °C)
LIMITS
-40 °C to +85 °C UNIT
MIN. a TYP.
bMAX. a
Operating voltage cVIN 1.2 - 5.5 V
Quiescent current IQ
VIN = 1.2 V, EN = active - 10.5 17
µA
VIN = 1.8 V, EN = active - 21 30
VIN = 2.5 V, EN = active - 34 50
VIN = 3.6 V, EN = active - 54 90
VIN = 4.3 V, EN = active - 68 110
VIN = 5 V, EN = active - 105 180
Off supply current IQ(off) EN = inactive, OUT = open - - 1
Off switch current IDS(off) EN = inactive, OUT = GND - - 1
Reverse blocking current IRB VOUT = 5 V, VIN = 0 V, VEN = inactive - - 10
On-resistance RDS(on)
VIN = 1.8 V, IL = 100 mA, TA = 25 °C - 45 53
m
VIN = 2.5 V, IL = 100 mA, TA = 25 °C - 44 52
VIN = 3.6 V, IL = 100 mA, TA = 25 °C - 44 52
VIN = 4.3 V, IL = 100 mA, TA = 25 °C - 44 52
VIN = 5 V, IL = 100 mA, TA = 25 °C - 46 52
On-resistance temp. coefficient TCRDS - 3570 - ppm/°C
EN input low voltage cVIL
VIN = 1.2 V - - 0.3
V
VIN = 1.8 V - - 0.4 d
VIN = 2.5 V - - 0.5 d
VIN = 3.6 V - - 0.6 d
VIN = 4.3 V - - 0.7 d
VIN = 5 V - - 0.8 d
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SiP32510
www.vishay.com Vishay Siliconix
S20-0528-Rev. E, 06-Jul-2020 3Document Number: 63577
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Notes
a. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum
b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing
c. For VIN outside this range consult typical EN threshold curve
d. Not tested, guaranteed by design
e. Not tested, guaranteed by correlation test with 10 , 0.1 µF load
TIMING WAVEFORMS
Fig. 2
PIN CONFIGURATION
Fig. 3 - TSOT23-6 Package
EN input high voltage cVIH
VIN = 1.2 V 0.9 d--
V
VIN = 1.8 V 1.2 d--
VIN = 2.5 V 1.4 d--
VIN = 3.6 V 1.6 d--
VIN = 4.3 V 1.7 d--
VIN = 5 V 1.8 - -
EN input leakage ISINK VEN = 5.5 V -1 - 1 µA
Output pulldown resistance RPD EN = inactive, TA = 25 °C - 217 280
Switch turn-on response time dtON_RESP VIN = 3.3 V, TA = 25 °C - 20 200 µs
Output turn-on delay time
(50 % EN to 10 % out) td(on)
VIN = 3.3 V, RLOAD= 10 ,
CLOAD = 0.1 µF, TA = 25 °C
-0.4-
ms
Output turn-on rise time
(10 % out) to 90 % out) tr1.3 1.6 2.2
Output turn-off delay time
(50 % EN to 90 % out) td(off) - - 0.001
Output turn-on time
(50 % EN to 95 % out) et(on) VIN = 3.3 V, RLOAD = 10 ,
CLOAD = 100 µF, TA = 25 °C 1.2 - 3
SPECIFICATIONS
PARAMETER SYMBOL
TEST CONDITIONS UNLESS SPECIFIED
VIN = 5 V, TA = -40 °C to +85 °C
(typical values are at TA = 25 °C)
LIMITS
-40 °C to +85 °C UNIT
MIN. a TYP.
bMAX. a
1
2
3
6
5
4
Top View
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BLOCK DIAGRAM
Fig. 4 - Functional Block Diagram
PIN DESCRIPTION
PIN NUMBER NAME FUNCTION
1, 2 OUT These are output pins of the switch
3 EN Enable input
4 GND Ground connection
5, 6 IN These are input pins of the switch
Control
Logic
Turn On
Slew Rate Control
Reverse
Blocking
Charge
Pump
GND
EN
OUT
IN
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TYPICAL CHARACTERISTICS (internally regulated, 25 °C, unless otherwise noted)
Fig. 5 - Quiescent Current vs. Input Voltage
Fig. 6 - Off Supply Current vs. Input Voltage
Fig. 7 - Off Switch Current vs. Input Voltage
Fig. 8 - Quiescent Current vs. Temperature
Fig. 9 - Off Supply Current vs. Temperature
Fig. 10 - Off Switch Current vs. Temperature
0
20
40
60
80
100
120
140
1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
I
Q
- Quiescent Current (µA)
V
IN
(V)
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
I
Q(OFF)
- Off Supply Current (nA)
V
IN
(V)
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
I
DS(off)
- Off Switch Current (nA)
V
IN
(V)
0
20
40
60
80
100
120
- 40 - 20 0 20 40 60 80 100
IQ - Quiescent Current (µA)
Temperature (°C)
V
IN
= 5 V
V
IN
= 3.6 V
VIN = 1.2 V
0.001
0.01
0.1
1
10
100
1000
- 40 - 20 0 20 40 60 80 100
IIQ(OFF) - Off Supply Current (nA)
Temperature (°C)
VIN = 1.2 V
VIN = 3.6 V
VIN = 5 V
0.001
0.01
0.1
1
10
100
1000
- 40 - 20 0 20 40 60 80 100
I
DS(off)
- Off Switch Current (nA)
Temperature (°C)
V
= 5 V
V
IN
= 3.6 V
V
IN
= 1.2 V
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TYPICAL CHARACTERISTICS (internally regulated, 25 °C, unless otherwise noted)
Fig. 11 - On-Resistance vs. Input Voltage
Fig. 12 - Output Pulldown Resistance vs. Input Voltage
Fig. 13 - On-Resistance vs. Temperature
Fig. 14 - Output Pulldown Resistance vs. Temperature
Fig. 15 - Reverse Blocking Current vs. Output Voltage
Fig. 16 - Rise Time vs. Temperature
40
42
44
46
48
50
52
54
56
58
60
1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
R
DS
- On-Resistance (mΩ)
V
IN
(V)
I
O
= 2.0 A
I
O
= 2.5 A
I
O
= 1.5 A
I
O
= 1.0 A
I
O
= 0.1 A
0
100
200
300
400
500
600
700
800
1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
RPD - Output Pulldown Resistance (Ω)
VIN (V)
VOUT
= VIN
35
40
45
50
55
60
- 40 - 20 0 20 40 60 80 100
RDS - On-Resistance (mΩ)
Temperature (°C)
IO = 0.1 A
VIN = 5 V
205
210
215
220
225
230
235
- 40 - 20 0 20 40 60 80 100
RPD - Output Pulldown Resistance (Ω)
Temperature (°C)
VOUT = VIN = 5 V
- 12
- 10
- 8
- 6
- 4
- 2
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
I
IN
- Input Current (nA)
V
OUT
(V)
V
IN
= 0V
1.50
1.60
1.70
1.80
1.90
2.00
2.10
2.20
2.30
2.40
2.50
- 40 - 20 0 20 40 60 80 100
t
r
- Rise Time (ms)
Temperature (°C)
V
IN
= 5 V
C
L
= 0.1 µF
R
L
= 10 Ω
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TYPICAL CHARACTERISTICS (internally regulated, 25 °C, unless otherwise noted)
Fig. 17 - Turn-On Delay Time vs. Temperature Fig. 18 - Turn-Off Delay Time vs. Temperature
Fig. 19 - EN Threshold Voltage vs. Input Voltage
0
0.1
0.2
0.3
0.4
0.5
0.6
- 40 - 20 0 20 40 60 80 100
td(on) - Turn-On Delay Time (ms)
Temperature (°C)
VIN = 5 V
CL = 0.1 µF
R
L
= 10
0.06
0.08
0.10
0.12
0.14
0.16
0.18
0.20
- 40 - 20 0 20 40 60 80 100
td(off) - Turn-Off Delay Time (µs)
Temperature (°C)
VIN = 5 V
CL = 0.1 µF
RL = 10 Ω
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
11.522.533.544.555.5
EN Threshold Voltage (V)
VIN (V)
VIH
VIL
a 2 V/Div. 2 WW. 2 msIDiv 2 V/Div. 2 NDiv. 2 uleiv K/ EN \ \ \ \ E ‘ \ , ‘ i . \ : ‘ 2 V/DiV. 0.2 ”Div. 1 msIDiv 2 VlDiVV 0.2 AIDiVv 2 uleiv 5.. g } t 2 wow. 2 ,2 msIDlv v, son us pawenclechsuggenfivlshayoom www.vishay.cam/doc791000
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TYPICAL WAVEFORMS
Fig. 20 - Typical Turn-On Delay, Rise Time
COUT = 0.1 μF, CIN = 4.7 μF, IOUT = 1.5 A
Fig. 21 - Typical Turn-On Delay, Rise Time
COUT = 0.1 μF, CIN = 4.7 μF, ROUT = 10
Fig. 22 - Typical Turn-On Delay, Rise Time
COUT = 200 μF, CIN = 4.7 μF, IOUT = 1.5 A
Fig. 23 - Typical Fall Time
COUT = 0.1 μF, CIN = 4.7 μF, IOUT = 1.5 A
Fig. 24 - Typical Fall Time
COUT = 0.1 μF, CIN = 4.7 μF, ROUT = 10
Fig. 25 - Typical Fall Time
COUT = 200 μF, CIN = 4.7 μF, IOUT = 1.5 A
2 V/Div, 2 A/Div, 2 ms/Div
EN
5Vout
3.6Vout
1.5Vout
Iout for 5Vout
Iout for 3.6Vout
Iout for 1.5Vout
2 V/Div, 0.2 A/Div, 2 ms/Div
EN
5Vout
3.6Vout
1.5Vout
Iout for 5Vout
Iout for 3.6Vout
Iout for 1.5Vout
2 V/Div, 2 A/Div, 2 ms/Div
EN
5Vout
3.6Vout
1.5Vout
Iout for 5Vout
Iout for 3.6Vout
Iout for 1.5Vout
2 V/Div, 2 A/Div, 2 s/Div
EN
5Vout
3.6Vout
1.5Vout
Iout for 5Vout
Iout for 3.6Vout
Iout for 1.5Vout
2 V/Div, 0.2 A/Div, 2 s/Div
EN
5Vout
3.6Vout
1.5Vout
Iout for 5Vout
Iout for 3.6Vout
Iout for 1.5Vout
2 V/Div, 2 A/Div, 500 s /Div
EN
5Vout
3.6Vout
1.5Vout
Iout for 5Vout
Iout for 3.6Vout
Iout for 1.5Vout
V.,W.w..__;rfi 2 wow. 02 Now, 2 ".wa 2 VIEW, :22 mm, 2 mslmv 2 wow. 2 now, 2 msIDlv v. zon us 2 wow. n.2 . 1 mlelv 2 vlmv, :22 mm. 2 msmlv pawenclechsuggen®wshayoom www.vishay.cam/doc791000
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Fig. 26 - Typical Turn-On Delay, Rise Time
COUT = 200 μF, CIN = 4.7 μF, ROUT = 10
Fig. 27 - Typical Turn-On Delay, Rise Time
COUT = 100 μF, CIN = 4.7 μF, IOUT = 1.5 A
Fig. 28 - Typical Turn-On Delay, Rise Time
COUT = 100 μF, CIN = 4.7 μF, ROUT = 10
Fig. 29 - Typical Fall Time
COUT = 200 μF, CIN = 4.7 μF, ROUT = 10
Fig. 30 - Typical Fall Time
COUT = 100 μF, CIN = 4.7 μF, IOUT = 1.5 A
Fig. 31 - Typical Turn-On Delay, Fall Time
COUT = 100 μF, CIN = 4.7 μF, ROUT = 10
2 V/Div, 0.2 A/Div, 2 ms/Div
EN
5Vout
3.6Vout
1.5Vout
Iout for 5Vout
Iout for 3.6Vout
Iout for 1.5Vout
2 V/Div, 2 A/Div, 2 ms/Div
EN
5Vout
3.6Vout
1.5Vout
Iout for 5Vout
Iout for 3.6Vout
Iout for 1.5Vout
2 V/Div, 0.2 A/Div, 1 ms/Div
EN
5Vout
3.6Vout
1.5Vout
Iout for 5Vout
Iout for 3.6Vout
Iout for 1.5Vout
2 V/Div, 0.2 A/Div, 2 ms/Div
EN
5Vout
3.6Vout
1.5Vout
Iout for 5Vout
Iout for 3.6Vout
Iout for 1.5Vout
2 V/Div, 2 A/Div, 200 s /Div
EN
5Vout
3.6Vout
1.5Vout
Iout for 5Vout
Iout for 3.6Vout
Iout for 1.5Vout
2 V/Div, 0.2 A/Div, 2 ms/Div
EN
5Vout
3.6Vout
1.5Vout
Iout for 5Vout
Iout for 3.6Vout
Iout for 1.5Vout
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DETAILED DESCRIPTION
SiP32510 is advanced slew rate controlled high side load
switch consisted of a n-channel power switch. When the
device is enable the gate of the power switch is turned on at
a controlled rate to avoid excessive in-rush current. Once
fully on the gate to source voltage of the power switch is
biased at a constant level. The design gives a flat on
resistance throughout the operating voltages. When the
device is off, the reverse blocking circuitry prevents current
from flowing back to input if output is raised higher than
input. The reverse blocking mechanism also works in case
of no input applied.
APPLICATION INFORMATION
Input Capacitor
SiP32510 does not require input capacitor. To limit the
voltage drop on the input supply caused by transient
inrush currents, a input bypass capacitor is recommended.
A 2.2 µF ceramic capacitor placed as close to the VIN and
GND should be enough. Higher values capacitor can help to
further reduce the voltage drop. Ceramic capacitors are
recommended for their ability to withstand input current
surge from low impedance sources such as batteries in
portable devices.
Output Capacitor
While these devices work without an output capacitor,
an 0.1 µF or larger capacitor across VOUT and GND is
recommended to accommodate load transient condition. It
also helps preventing parasitic inductance from forcing VOUT
below GND when switching off. Output capacitor has
minimal affect on device’s turn on slew rate time. There is no
requirement on capacitor type and its ESR.
Enable
The EN pin is compatible with both TTL and CMOS logic
voltage levels. Enable pin voltage can be above IN once it is
within the absolute maximum rating range.
Protection Against Reverse Voltage Condition
SiP32510 contains a reverse blocking circuitry to protect the
current from going to the input from the output in case
where the output voltage is higher than the input voltage
when the main switch is off. Reverse blocking works for
input voltage as low as 0 V.
Thermal Considerations
SiP32510 is designed to maintain a constant output load
current. Due to physical limitations of the layout and
assembly of the device the maximum switch current is 3 A,
as stated in the Absolute Maximum Ratings table. However,
another limiting characteristic for the safe operating load
current is the thermal power dissipation of the package. To
obtain the highest power dissipation (and a thermal
resistance of 150 °C/W) the in and out pins of the device
should be connected to heat sinks on the printed circuit
board. All copper traces and vias for the in and out pins
should be sized adequately to carry the maximum
continuous current.
The maximum power dissipation in any application is
dependent on the maximum junction temperature,
TJ (max.) = 125 °C, the junction-to-ambient thermal
resistance for the TSOT23-6 package, J-A = 150 °C/W, and
the ambient temperature, TA, which may be formulaically
expressed as:
It then follows that, assuming an ambient temperature of
70 °C, the maximum power dissipation will be limited to
about 367 mW.
So long as the load current is below the 3 A limit, the
maximum continuous switch current becomes a function of
two things: the package power dissipation and the RDS(on) at
the ambient temperature.
As an example let us calculate the worst case maximum
load current at TA = 70 °C and 3.6 V input. The worst case
RDS(on) at 25 °C and 3.6 V input is 52 m. The RDS(on) at
70 °C can be extrapolated from this data using the following
formula:
RDS(on) (at 70 °C) = RDS(on) (at 25 °C) x (1 + TC x T)
Where TC is 3570 ppm/°C. Continuing with the calculation
we have
RDS(on) (at 70 °C) = 52 m x (1 + 0.00357 x (70 °C - 25 °C))
= 60 m
The maximum current limit is then determined by
which in this case is 2.4 A. Under the stated input voltage
condition, if the 2.4 A current limit is exceeded the internal
die temperature will rise and eventually, possibly damage
the device.
Active EN Pull Down for Reverse Blocking
When an internal circuit detects the condition of VOUT 0.8 V
higher than VIN, it will turn on the pull down circuit connected
to EN, forcing the switching off. The pull down value is about
1 k.
P (max.) TJ (max.) - TA
JA
-------------------------------------125 - TA
150
-----------------------
==
ILOAD (max.) P (max.)
RDS(on)
---------------------
IN
EN
OUT
Reverse
Blocking
Charge
Pump
Control Logic
Input Buffer
Pull Down
Circuit
Control and Drive
VOUT > VIN
Detect
When VOUT is 0.8 V above the VIN, pull down circuit
will be activated. It connects the EN to GND with a
resistance of around 1 kΩ.
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SiP32510
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Pulse Current Capability
The device is mounted on the evaluation board shown in the
PCB layout section. It is loaded with pulses of 5 A and 1 ms
for periods of 4.6 ms.
The SiP32510 can safely support 5 A pulse current
repetitively at 25 °C.
Switch Non-Repetitive Pulsed Current
The SiP32510 can withstand inrush current of up to 12 A for
100 µs at 25 °C when heavy capacitive loads are connected
and the part is already enabled.
Recommended Board Layout
For the best performance, all traces should be as short as
possible to minimize the inductance and parasitic effects.
The input and output capacitors should be kept as close
as possible to the input and output pins respectively.
Using wide traces for input, output, and GND help reducing
the case to ambient thermal impedance.
RDS(on) Measurement
As mentioned in the thermal consideration section, the
RDS(on) is an important specification for the load switch. A
proper method to measure the RDS(on) will ensure the proper
calculation of the maximum operating power the SiP32510
load switch. The Kelvin connection directly to the input /
output pin of the device is used to measure the dropout
voltage of the SiP32510. By using the Kelvin connection to
measure the dropout voltage will eliminate the measurement
error due to the voltage drop caused by the forced power
current. As illustrated in the following layout, J6 (OUT-S) is
Kelvin connection to the output of SiP32510 and J5 (IN-S) is
the Kelvin connection to the input of SiP32510. A current
meter is used to measure the output current.
RDS(on) is calculated by the following formula:
Fig. 32 - Evaluation Board Layout for TSOT23-6L
5 A
1 ms
180 mA
4.6 ms
Dropout Voltage
Output Current
= R
DS(on)
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SiP32510
www.vishay.com Vishay Siliconix
S20-0528-Rev. E, 06-Jul-2020 12 Document Number: 63577
For technical questions, contact: powerictechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package / tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?63577.
PRODUCT SUMMARY
Part number SiP32510
Description 1.2 V to 5.5 V, 44 m, 1.6 ms rise time with bidirectional off isolation, output discharge
Configuration Single
Slew rate time (s) 1600
On delay time (s) 400
Input voltage min. (V) 1.2
Input voltage max. (V) 5.5
On-resistance at input voltage min. (m)47
On-resistance at input voltage max. (m)44
Quiescent current at input voltage min. (µA) 10.5
Quiescent current at input voltage max. (µA) 105
Output discharge (yes / no) Yes
Reverse blocking (yes / no) Yes
Continuous current (A) 3
Package type TSOT23-6
Package size (W, L, H) (mm) 3.0 x 2.9 x 1.0
Status code 2
Product type Slew rate
Applications Computers, consumer, industrial, healthcare, networking, portable
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Package Information
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Revision: 01-Jul-13 1Document Number: 72821
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Thin SOT-23 : 5- and 6-Lead (Power IC only)
MILLIMETERS INCHES
DIM. MIN. NOM. MAX. MIN. NOM. MAX.
A 0.91 1.00 1.10 0.036 0.039 0.043
A1 0.00 0.05 0.10 0.000 0.002 0.004
A2 0.85 0.90 1.00 0.033 0.035 0.039
b 0.30 0.40 0.45 0.012 0.016 0.018
c 0.10 0.15 0.20 0.004 0.006 0.008
D 2.85 2.95 3.10 0.112 0.116 0.122
E 2.70 2.85 2.98 0.106 0.112 0.117
E1 1.525 1.65 1.70 0.060 0.065 0.067
e 0.95 BSC 0.0374 BSC
L 0.30 0.40 0.50 0.014 - 0.020
L1 0.60 ref. 0.024 BSC
L2 0.25 BSC 0.010 BSC
0° 4° 8° 0° 4° 8°
1 10° 12° 10° 12°
ECN: E13-1126-Rev. B, 01-Jul-13
DWG: 5926
D
A2
A1
-C-
C0.08
-A-
E1 E
-B-
e
b
C0.15 M B A
2
13
546
θ
R
R
L
(L1)
Gage plane
4x θ1
4 x θ1
c
0.17 ref
Seating plane Seating plane
e1
AL
Notes:
1. Use millimeters as the primary measurement.
2. Dimensioning and tolerances conform to ASME Y14.5M. - 1994.
3. This part is fully compliant with JEDEC MO-193.
4. Detail of Pin #1 indentifier is optional.
Pin #1
indetifier
4
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