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eGaN® FET DATASHEET EPC8004
EPC – THE LEADER IN GaN TECHNOLOGY | WWW.EPC-CO.COM | COPYRIGHT 2019 | | 1
EPC8004 – Enhancement Mode Power Transistor
VDS , 40 V
RDS(on) , 110 mΩ
ID , 4 A
EFFICIENT POWER CONVERSION
EPC8004 eGaN FETs are supplied only in
passivated die form with solder bars
Die Size: 2.1 mm x 0.85 mm
Applications
• Ultra High Speed DC-DC Conversion
• RF Envelope Tracking
• Wireless Power Transfer
• Game Console and Industrial Movement
Sensing (Lidar)
Benefits
• Ultra High Efficiency
• Ultra Low RDS(on)
• Ultra Low QG
• Ultra Small Footprint
HAL
Maximum Ratings
PARAMETER VALUE UNIT
VDS
Drain-to-Source Voltage (Continuous) 40 V
Drain-to-Source Voltage (up to 10,000 5 ms pulses at 125°C) 48
ID
Continuous (TA = 25°C, RθJA = 39°C/W) 4A
Pulsed (25°C, TPULSE = 300 µs) 7. 5
VGS
Gate-to-Source Voltage 6V
Gate-to-Source Voltage –4
TJOperating Temperature –40 to 150 °C
TSTG Storage Temperature –40 to 150
Static Characteristics (TJ= 25°C unless otherwise stated)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
BVDSS Drain-to-Source Voltage VGS = 0 V, ID = 125 µA 40 V
IDSS Drain-Source Leakage VDS = 32 V, VGS = 0 V 50 100 µA
IGSS
Gate-to-Source Forward Leakage VGS = 5 V 100 500 µA
Gate-to-Source Reverse Leakage VGS = -4 V 50 100
VGS(TH) Gate Threshold Voltage VDS = VGS, ID = 0.25 mA 0.8 1.4 2.5 V
RDS(on) Drain-Source On Resistance VGS = 5 V, ID = 0.5 A 80 110 mΩ
VSD Source-Drain Forward Voltage IS = 0.5 A, VGS = 0 V 2.2 V
Thermal Characteristics
PARAMETER TYP UNIT
R
θ
JC Thermal Resistance, Junction-to-Case 8.2
°C/WR
θ
JB Thermal Resistance, Junction-to-Board 16
R
θ
JA Thermal Resistance, Junction-to-Ambient (Note 1) 82
Specifications are with substrate connected to source where applicable.
Note 1: RθJA is determined with the device mounted on one square inch of copper pad, single layer 2 oz copper on FR4 board.
See https://epc-co.com/epc/documents/product-training/Appnote_Thermal_Performance_of_eGaN_FETs.pdf for details
G
D
S
Gallium Nitride’s exceptionally high electron mobility and low temperature coefficient allows very
low RDS(on), while its lateral device structure and majority carrier diode provide exceptionally low QG
and zero QRR. The end result is a device that can handle tasks where very high switching frequency,
and low on-time are beneficial as well as those where on-state losses dominate.