OPA1662-Q1 Datasheet by Texas Instruments

Datasheet Feedback/Errors

r.- 32, Q ‘X E I TEXAS INSTRUMENTS mu~N w

0.00001

0.0001

0.001

0.01

20 100 1k 10k 20k

Frequency (Hz)

THD+N (%)

G = 10V/V, RL = 600Ω

G = 10V/V, RL = 2kΩ

G = +1V/V, RL = 600Ω

G = +1V/V, RL = 2kΩ

G = −1V/V, RL = 600Ω

G = −1V/V, RL = 2kΩ

VOUT = 3VRMS

BW = 80kHz

G007

1 10 100 1k 10k 100k

0.1

100

0.1

100

Frequency (Hz)

Voltage Noise (nV/ Hz)

Current Noise (pA/ Hz)

Voltage Noise

Current Noise

G001

Product

Folder

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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

OPA1662-Q1

SLOS805C –JULY 2012–REVISED AUGUST 2016

OPA1662-Q1 Dual, 3.3 nV/√Hz Noise, 0.00006% THD+N, RRO, Bipolar-Input Audio

Operational Amplifier

1 Features

1• Qualified for Automotive Applications

• AEC-Q100 Qualified With the Following Results

– Device Temperature Grade 3: –40°C to 85°C

Ambient Operating Temperature Range

– Device HBM ESD Classification Level H2

– Device CDM ESD Classification Level C3B

• Low Noise: 3.3 nV/√Hz at 1 kHz

• Low Distortion: 0.00006% at 1 kHz

• Low Quiescent Current: 1.5 mA per Channel

• Slew Rate: 17 V/μs

• Wide Gain Bandwidth: 22 MHz (G = 1)

• Unity Gain Stable

• Rail-to-Rail Output

• Wide Supply Range: ±1.5 V to ±18 V,

or3Vto36V

• Small Package Sizes:

Dual: 8-Pin SOIC and VSSOP

2 Applications

• Automotive

• Car Audio

• Premium Audio

• External Audio Amplifiers

• Body Control Modules

3 Description

The OPA1662-Q1 is a dual, bipolar-input operational

amplifier which is well suited for premium audio

external amplifier applications in infotainment and

cluster systems. In audio systems, the main concern

is to ensure a clear, quality output signal which

means minimuzing any noise introduced to the signal.

The OPA1662-Q1 offers low noise density with an

ultra-low distortion of 0.00006% at 1 kHz that

maximizes the signal output. Additionally, this op amp

offers rail-to-rail output swing to within 600 mV with 2-

kΩload. The wide headroom ensures that the output

signal does not clip, and therefore preserves the

audio quality.

the OPA1662-Q1 operates over a very wide supply

range of ±1.5 V to ±18 V, or 3 V to 36 V, on only

1.5 mA of supply current per channel. The wide

supply range enables design flexibility for the device

as it can be integrated from a power amplifier driven

by the battery to being driven from an ADC to DAC

for low-power applications. Additionally, this device

also has a high-output drive capability of ±30 mA and

can act as the sole audio amplifier for low-power

applications, such as for cluster chimes.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)

OPA1662-Q1 SOIC (8) 4.90 mm × 3.91 mm

VSSOP (8) 3.00 mm × 3.00 mm

(1) For all available packages, see the orderable addendum at

the end of the data sheet.

Input Voltage Noise Density and Input Current

Noise Density vs Frequency THD+N Ratio vs Frequency

l TEXAS INSTRUMENTS

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Table of Contents

1 Features.................................................................. 1

2 Applications ........................................................... 1

3 Description ............................................................. 1

4 Revision History..................................................... 2

5 Description Continued .......................................... 3

6 Pin Configuration and Functions......................... 3

7 Specifications......................................................... 3

7.1 Absolute Maximum Ratings ...................................... 3

7.2 ESD Ratings.............................................................. 4

7.3 Recommended Operating Conditions....................... 4

7.4 Thermal Information.................................................. 4

7.5 Electrical Characteristics: VS= ±15 V....................... 4

7.6 Electrical Characteristics: VS= 5 V........................... 5

7.7 Typical Characteristics.............................................. 7

8 Detailed Description............................................ 14

8.1 Overview ................................................................. 14

8.2 Functional Block Diagram....................................... 14

8.3 Feature Description................................................. 14

8.4 Device Functional Modes........................................ 19

9 Application and Implementation ........................ 20

9.1 Application Information............................................ 20

9.2 Typical Application .................................................. 20

10 Power Supply Recommendations ..................... 22

11 Layout................................................................... 22

11.1 Layout Guidelines ................................................. 22

11.2 Layout Example .................................................... 23

11.3 Power Dissipation ................................................. 23

12 Device and Documentation Support ................. 24

12.1 Documentation Support ........................................ 24

12.2 Receiving Notification of Documentation Updates 24

12.3 Community Resources.......................................... 24

12.4 Trademarks........................................................... 24

12.5 Electrostatic Discharge Caution............................ 24

12.6 Glossary................................................................ 24

13 Mechanical, Packaging, and Orderable

Information ........................................................... 24

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision B (October 2012) to Revision C Page

• Added ESD Ratings table, Feature Description section, Device Functional Modes,Application and Implementation

section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and

Mechanical, Packaging, and Orderable Information section.................................................................................................. 1

• Removed Ordering Information table, see POA at the end of the data sheet........................................................................ 1

• Changed the Description section............................................................................................................................................ 1

Changes from Revision A (September 2012) to Revision B Page

• Changed top-side marking for OPA1662AIDRQ1 from preview to O1662Q in Ordering Information table........................... 1

• Changed Grade 1 to Grade 3 in Features.............................................................................................................................. 1

Changes from Original (July 2012) to Revision A Page

• Device going from 2-page preview to production status, full-length document included in this revision. .............................. 1

V+

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+INB

OUTA

-INA

+INA

V-

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5 Description Continued

The device also features completely independent circuitry for each of the two channels to enable low crosstalk

and freedom from interactions between each channel, even when overdriven or overloaded. This feature enables

customers to drive two different audio signals with ease of mind that the signals are not affected by each other.

The OPA1662-Q1 offers a wide bandwidth of 22 MHz and high slew rate of 17 V/µs which is applicable as a high

and low side sensing for ripple currents in SMPS devices or motor drives. As a current sensor, the OPA1662-Q1

can be used as peak current mode control, with the op amps offering stability and enabling higher bandwidth for

the system. The OPA1662-Q1 is applicable in body control modules and HEV or EV converters where motors

typically are used.

6 Pin Configuration and Functions

D and DGK Packages

8-Pin SOIC and VSSOP

Top View

Pin Functions

PIN I/O DESCRIPTION

NAME NO.

+IN A 3 I Noninverting input channel A

–IN A 2 I Inverting input channel A

+IN B 5 I Noninverting input channel B

–IN B 6 I Inverting input channel B

OUT_A 1 O Output, channel A

OUT_B 7 O Output, channel B

V– 4 — Negative (lowest) power supply

V+ 8 — Positive (highest) power supply

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) Short-circuit to VS/ 2 (ground in symmetrical dual supply setups), one amplifier per package.

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)

MIN MAX UNIT

Supply voltage, (V+) – (V–) 40 V

Input voltage (V–) – 0.5 (V+) + 0.5 V

Input current (all pins except power-supply pins) ±10 mA

Output short-circuit(2) Continuous

Operating ambient temperature –40 125 °C

Junction temperature, TJ200 °C

Storage temperature, Tstg –65 150 °C

l TEXAS INSTRUMENTS

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(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

7.2 ESD Ratings

VALUE UNIT

V(ESD) Electrostatic discharge Human-body model (HBM), per AEC Q100-002(1) ±2000 V

Charged-device model (CDM), per AEC Q100-011 ±750

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN MAX UNIT

VSSupply voltage, (V+) – (V–) 3 (±1.5) 36 (±18) V

TAOperating ambient temperature –40 125 °C

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

7.4 Thermal Information

THERMAL METRIC(1)

OPA1662-Q1

UNITD (SOIC) DGK (VSSOP)

8 PINS 8 PINS

RθJA Junction-to-ambient thermal resistance 156.3 225.4 °C/W

RθJC(top) Junction-to-case (top) thermal resistance 85.5 78.8 °C/W

RθJB Junction-to-board thermal resistance 64.9 110.5 °C/W

ψJT Junction-to-top characterization parameter 33.8 14.6 °C/W

ψJB Junction-to-board characterization parameter 64.3 108.5 °C/W

(1) Full-power bandwidth = SR / (2π× VP), where SR = slew rate.

7.5 Electrical Characteristics: VS= ±15 V

TA= 25°C, VCM = VOUT = midsupply, and RL= 2 kΩ(unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

AUDIO PERFORMANCE

THD+N Total harmonic distortion + noise G = 1, f = 1 kHz, VO= 3 VRMS

0.00006%

–124 dB

IMD Intermodulation distortion G = 1, VO= 3 VRMS

SMPTE two-tone, 4:1 (60 Hz

and 7 kHz)

0.00004%

–128 dB

DIM 30 (3-kHz square wave

and 15-kHz sine wave)

0.00004%

–128 dB

CCIF twin-tone (19 kHz and

20 kHz)

0.00004%

–128 dB

FREQUENCY RESPONSE

GBW Gain-bandwidth product G = 1 22 MHz

SR Slew rate G = –1 17 V/µs

Full power bandwidth(1) VO= 1 VP2.7 MHz

Overload recovery time G = –10 1 µs

Channel separation (dual and quad) f = 1 kHz –120 dB

NOISE

enInput voltage noise f = 20 Hz to 20 kHz 2.8 µVPP

Input voltage noise density f = 1 kHz 3.3 nV/√Hz

f = 100 Hz 5 nV/√Hz

InInput current noise density f = 1 kHz 1 pA/√Hz

f = 100 Hz 2 pA/√Hz

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Electrical Characteristics: VS= ±15 V (continued)

TA= 25°C, VCM = VOUT = midsupply, and RL= 2 kΩ(unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

(2) Specified by design and characterization.

(3) One channel at a time.

OFFSET VOLTAGE

VOS Input offset voltage VS= ±1.5 V to ±18 V ±0.5 ±1.5 mV

VS= ±1.5 V to ±18 V, TA= –40°C to 85°(2) 2 8 µV/°C

PSRR Power-supply rejection ratio VS= ±1.5 V to ±18 V 1 3 µV/V

INPUT BIAS CURRENT

IBInput bias current VCM = 0 V 600 1200 nA

IOS Input offset current VCM = 0 V ±25 ±100 nA

INPUT VOLTAGE

VCM Common-mode voltage (V–) + 0.5 (V+) – 1 V

CMRR Common-mode rejection ratio 106 114 dB

INPUT IMPEDANCE

Differential resistance 170 kΩ

Differential capacitance 2 pF

Common-mode resistance 600 kΩ

Common-mode capacitance 2.5 pF

OPEN-LOOP GAIN

AOL Open-loop voltage gain (V–) + 0.6 V ≤VO≤(V+) – 0.6 V, RL= 2 kΩ106 114 dB

OUTPUT

VOUT Output voltage RL= 2 kΩ(V–) + 0.6 (V+) – 0.6 V

IOUT Output current See Typical Characteristics mA

ZOOpen-loop output impedance See Typical Characteristics Ω

ISC Short-circuit current(3) ±50 mA

CLOAD Capacitive load drive 200 pF

POWER SUPPLY

VSSpecified voltage ±1.5 ±18 V

IQQuiescent current

(per channel)

IOUT = 0 A 1.5 1.8 mA

IOUT = 0 A, TA= –40°C to 85°(2) 2 mA

TEMPERATURE

Specified temperature –40 85 °C

7.6 Electrical Characteristics: VS= 5 V

TA= 25°C, VCM = VOUT = midsupply, and RL= 2 kΩ(unless otherwise noted)

PARAMETERTEST CONDITIONS MIN TYP MAX UNIT

AUDIO PERFORMANCE

THD+N Total harmonic distortion + noise G = 1, f = 1 kHz, VO= 3 VRMS

0.0001%

–120 dB

IMD Intermodulation distortion G = 1, VO= 3 VRMS

SMPTE two-tone, 4:1 (60 Hz

and 7 kHz)

0.00004%

–128 dB

DIM 30 (3-kHz square wave

and 15-kHz sine wave)

0.00004%

–128 dB

CCIF twin-tone (19 kHz and

20 kHz)

0.00004%

–128 dB

l TEXAS INSTRUMENTS

OPA1662-Q1

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Electrical Characteristics: VS= 5 V (continued)

TA= 25°C, VCM = VOUT = midsupply, and RL= 2 kΩ(unless otherwise noted)

PARAMETERTEST CONDITIONS MIN TYP MAX UNIT

(1) Full-power bandwidth = SR / (2π× VP), where SR = slew rate.

(2) Specified by design and characterization.

(3) One channel at a time.

FREQUENCY RESPONSE

GBW Gain-bandwidth product G = 1 20 MHz

SR Slew rate G = –1 13 V/µs

Full power bandwidth(1) VO= 1 VP2 MHz

Overload recovery time G = –10 1 µs

Channel separation (dual and quad) f = 1 kHz –120 dB

NOISE

enInput voltage noise f = 20 Hz to 20 kHz 3.3 µVPP

Input voltage noise density f = 1 kHz 3.3 nV/√Hz

f = 100 Hz 5 nV/√Hz

InInput current noise density f = 1 kHz 1 pA/√Hz

f = 100 Hz 2 pA/√Hz

OFFSET VOLTAGE

VOS Input offset voltage VS= ±1.5 V to ±18 V ±0.5 ±1.5 mV

VS= ±1.5 V to ±18 V, TA= –40°C to 85°(2) 2 8 µV/°C

PSRR Power-supply rejection ratio VS= ±1.5 V to ±18 V 1 3 µV/V

INPUT BIAS CURRENT

IBInput bias current VCM = 0 V 600 1200 nA

IOS Input offset current VCM = 0 V ±25 ±100 nA

INPUT VOLTAGE

VCM Common-mode voltage (V–) + 0.5 (V+) – 1 V

CMRR Common-mode rejection ratio 86 100 dB

INPUT IMPEDANCE

Differential resistance 170 kΩ

Differential capacitance 2 pF

Common-mode resistance 600 kΩ

Common-mode capacitance 2.5 pF

OPEN-LOOP GAIN

AOL Open-loop voltage gain (V–) + 0.6 V ≤VO≤(V+) – 0.6 V, RL= 2 kΩ90 100 dB

OUTPUT

VOUT Output voltage RL= 2 kΩ(V–) + 0.6 (V+) – 0.6 V

IOUT Output current See \mA

ZOOpen-loop output impedance See Typical Characteristics Ω

ISC Short-circuit current(3) ±40 mA

CLOAD Capacitive load drive 200 pF

POWER SUPPLY

VSSpecified voltage ±1.5 ±18 V

IQQuiescent current (per channel) IOUT = 0 A 1.4 1.7 mA

IOUT = 0 A, TA= –40°C to 85°(2) 2 mA

TEMPERATURE

Specified temperature –40 85 °C

l TEXAS INSTRUMENTS Twme (ts/aw) vauage Nmse (an 10k Suurce Resls|ance (g2)

10 100 1k 10k 100k 1M 10M 100M

−20

100

120

140

135

180

Frequency (Hz)

Gain (dB)

Phase (°)

Gain

Phase

CL = 100pF

G005

−20

1k 10k 100k 1M 10M 100M

Frequency (Hz)

Gain (dB)

Gain = −1V/V

Gain = +1V/V

Gain = +10V/V

G006

100

10k

100 1k 10k 100k 1M

Resistor Noise

OPA166x

OPA165x

Source Resistance ( )W

Voltage Noise (nV/ Hz)

2= en

2+ (inRS)2+ 4KTRS

G003

10k 100k 1M 10M

Frequency (Hz)

Output Voltage (V)

VS = ±15 V

VS = ±5 V

VS = ±1.5 V

G004

1 10 100 1k 10k 100k

0.1

100

0.1

100

Frequency (Hz)

Voltage Noise (nV/ Hz)

Current Noise (pA/ Hz)

Voltage Noise

Current Noise

G001

Time (1s/div)

Voltage Noise ( 50nV/div)

G002

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7.7 Typical Characteristics

At TA= 25°C, VS= ±15 V, and RL= 2 kΩ(unless otherwise noted)

Figure 1. Input Voltage Noise Density and Input Current

Noise Density vs Frequency

Figure 2. 0.1-Hz to 10-Hz Noise

Figure 3. Voltage Noise vs Source Resistance Figure 4. Maximum Output Voltage vs Frequency

Figure 5. Gain and Phase vs Frequency Figure 6. Closed-Loop Gain vs Frequency

l TEXAS INSTRUMENTS E E a a I I E E a a I I 001 Frequency (HZ) 001 Frequency (HZ)

0.00001

0.0001

0.001

0.01

20 100 1k 10k 20k

Frequency (Hz)

THD+N (%)

RS= 0 W

RS= 30 W

RS= 60 W

RS= 1 kW

VOUT = 3 VRMS

BW = 80 kHz

G008

OPA1662-Q1

+15V

-15V RL

RSOURCE

0.00001

0.0001

0.001

0.01

20 100 1k 10k 100k

Frequency (Hz)

THD+N (%)

RS= 0 W

RS= 30 W

RS= 60 W

RS= 1 kW

VOUT = 3 VRMS

BW = 500 kHz

G010

OPA1662-Q1

+15V

-15V RL

RSOURCE

0.00001

0.0001

0.001

0.01

20 100 1k 10k 100k

Frequency (Hz)

THD+N (%)

G = 10V/V, RL = 600Ω

G = 10V/V, RL = 2kΩ

G = +1V/V, RL = 600Ω

G = +1V/V, RL = 2kΩ

G = −1V/V, RL = 600Ω

G = −1V/V, RL = 2kΩ

VOUT = 3VRMS

BW = 500kHz

G009

0.00001

0.0001

0.001

0.01

20 100 1k 10k 100k

Frequency (Hz)

THD+N (%)

G = 10V/V, RL = 600Ω

G = 10V/V, RL = 2kΩ

G = +1V/V, RL = 600Ω

G = +1V/V, RL = 2kΩ

G = −1V/V, RL = 600Ω

G = −1V/V, RL = 2kΩ

VOUT = 1VRMS

BW = 500kHz

VS = ±2.5V

G039

0.00001

0.0001

0.001

0.01

20 100 1k 10k 20k

Frequency (Hz)

THD+N (%)

G = 10V/V, RL = 600Ω

G = 10V/V, RL = 2kΩ

G = +1V/V, RL = 600Ω

G = +1V/V, RL = 2kΩ

G = −1V/V, RL = 600Ω

G = −1V/V, RL = 2kΩ

VOUT = 3VRMS

BW = 80kHz

G007

0.00001

0.0001

0.001

0.01

20 100 1k 10k 20k

Frequency (Hz)

THD+N (%)

G = 10V/V, RL = 600Ω

G = 10V/V, RL = 2kΩ

G = +1V/V, RL = 600Ω

G = +1V/V, RL = 2kΩ

G = −1V/V, RL = 600Ω

G = −1V/V, RL = 2kΩ

VOUT = 1VRMS

BW = 80kHz

VS = ±2.5V

G038

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Product Folder Links: OPA1662-Q1

Typical Characteristics (continued)

At TA= 25°C, VS= ±15 V, and RL= 2 kΩ(unless otherwise noted)

Figure 7. THD+N Ratio vs Frequency Figure 8. THD+N Ratio vs Frequency

Figure 9. THD+N Ratio vs Frequency Figure 10. THD+N Ratio vs Frequency

Figure 11. THD+N Ratio vs Frequency Figure 12. THD+N Ratio vs Frequency

l TEXAS INSTRUMENTS om E a I E n g g 3: x 3: E 'n E l v- :5 g 3: 2 u u

Time (1 s/div)m

Voltage (25 mV/div)

VIN

VOUT

G = +1 V/V

CL= 10 pF

G015

Time (1 s/div)m

Voltage (25 mV/div)

VIN

VOUT

G = +1 V/V

CL= 10 pF

VS= 1.5 V±

G040

−160

−140

−120

−100

−80

100 1k 10k 100k

Frequency (Hz)

Crosstalk (dB)

VOUT = 3 VRMS

Gain = +1 V/V

G013

100

120

140

100 1k 10k 100k 1M 10M 100M

Frequency (Hz)

CMRR, PSRR (dB)

+PSRR

−PSRR

CMRR

G014

0.00001

0.0001

0.001

0.01

1m 10m 100m 1 10 20

Output Amplitude (Vrms)

THD+N (%)

G = 10V/V, RL = 600Ω

G = 10V/V, RL = 2kΩ

G = +1V/V, RL = 600Ω

G = +1V/V, RL = 2kΩ

G = −1V/V, RL = 600Ω

G = −1V/V, RL = 2kΩ

f = 1 kHz

BW = 80 kHz

RS = 0 Ω

G011

Output Amplitude (Vrms)

THD+N (%)

0.1 1 10 2020

1E-5

0.0001

0.001

0.01

D001

G = +1 V/V

DIM 30: 3 kHz - Square Wave, 15 kHz Sine Wave

CCIF Twin Tone: 19 kHz and 20 kHz

SMPTE: Two - Tone 4:1, 60 Hz and 7 kHz

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Typical Characteristics (continued)

At TA= 25°C, VS= ±15 V, and RL= 2 kΩ(unless otherwise noted)

Figure 13. THD+N Ratio vs Output Amplitude Figure 14. Intermodulation Distortion vs Output Amplitude

Figure 15. Channel Separation vs Frequency Figure 16. CMRR and PSRR vs Frequency

(Referred to Input)

Figure 17. Small-Signal Step Response Figure 18. Small-Signal Step Response

‘5‘ TEXAS INSTRUMENTS

Time (1 s/div)m

Voltage (250 mV/div)

G = −1 V/V

CL= 10 pF

VS= 1.5 V±

G035

VIN

VOUT

Time (1 s/div)m

Voltage (2.5 V/div)

G018

G = −1 V/V

CL= 10 pF

VIN

VOUT

Time (1 s/div)m

Voltage (2.5 V/div)

VIN

VOUT

G = +1 V/V

CL= 10 pF

RF= 1 kW

G017

Time (1 s/div)m

Voltage (250 mV/div)

VIN

VOUT

G = +1 V/V

CL= 10 pF

VS= 1.5 V±

G032

Time (1 s/div)m

Voltage (25 mV/div)

VIN

VOUT

G = −1 V/V

CL= 10 pF

G041

Time (1 s/div)m

Voltage (25 mV/div)

VIN

VOUT

G016

G = −1 V/V

CL= 10 pF

VS= 1.5 V±

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Typical Characteristics (continued)

At TA= 25°C, VS= ±15 V, and RL= 2 kΩ(unless otherwise noted)

Figure 19. Small-Signal Step Response Figure 20. Small-Signal Step Response

Figure 21. Large-Signal Step Response Figure 22. Large-Signal Step Response

Figure 23. Large-Signal Step Response Figure 24. Large-Signal Step Response

l TEXAS INSTRUMENTS Capacuance (pF) an; Capacuance (pF) 5:11 Capacuance (pF) an: § Capacuance (pF) am Capacuam (pF) am

0 1 2 3 4 5

Capacitance (pF)

Overshoot (%)

VS= 18 V±

VS= 1.5 V±

VOUT = 100 mVPP

G = +1 V/V

CL= 100 pF

G021

OPA1662-Q1

R =

I2 kW

RF= 2 kW

+15 V

-15 V

0 50 100 150 200 250 300 350 400

Capacitance (pF)

Percent Overshoot (%)

VS = ±18 V

VS = ±1.5 V

G = +1 V/V

VIN = 100 mVPP

G037

0 50 100 150 200 250 300 350 400

Capacitance (pF)

Overshoot (%)

RS= 0 W

RS= 25 W

RS= 50 W

VOUT = 100 mVPP

G = +1 V/V

VS= 1.5 V±

G034

+15 V

-15 V

OPA1662-Q1

0 50 100 150 200 250 300 350 400

Capacitance (pF)

Overshoot (%)

RS= 0 W

RS= 25 W

RS= 50 WVOUT = 100 mVPP

G = −1 V/V

VS= 1.5 V±

G033

OPA1662-Q1

R =

I2 kW

RF= 2 kW

+15 V

-15 V

0 50 100 150 200 250 300 350 400

Capacitance (pF)

Overshoot (%)

RS= 0 W

RS= 25 W

RS= 50 W

VOUT = 100 mVPP

G = +1 V/V

G019

+15 V

-15 V

OPA1662-Q1

0 50 100 150 200 250 300 350 400

Capacitance (pF)

Overshoot (%)

RS= 0 W

RS= 25 W

RS= 50 W

VOUT = 100 mVPP

G = −1 V/V

G020

OPA1662-Q1

R =

I2 kW

RF= 2 kW

+15 V

-15 V

OPA1662-Q1

www.ti.com

SLOS805C –JULY 2012–REVISED AUGUST 2016

Product Folder Links: OPA1662-Q1

Typical Characteristics (continued)

At TA= 25°C, VS= ±15 V, and RL= 2 kΩ(unless otherwise noted)

Figure 25. Small-Signal Overshoot vs Capacitive Load Figure 26. Small-Signal Overshoot vs Capacitive Load

Figure 27. Small-Signal Overshoot vs Capacitive Load Figure 28. Small-Signal Overshoot vs Capacitive Load

Figure 29. Small-Signal Overshoot vs Feedback Capacitor Figure 30. Percent Overshoot vs Capacitive Load

l TEXAS INSTRUMENTS .ﬂ—g‘é/ If; .—

1.2

1.3

1.4

1.5

1.6

1.7

1.8

−40 −15 10 35 60 85 110 135

Temperature (°C)

Supply Current (mA)

G025

0.5

1.5

2.5

0 4 8 12 16 20 24 28 32 36 40

Supply Voltage (V)

Supply Current (mA)

G026

−1000

−800

−600

−400

−200

200

400

−40 −15 10 35 60 85 110 135

Temperature (°C)

Ib and Ios Current (nA)

IOS

IBP

IBN

G023

−800

−600

−400

−200

200

−18 −14 −10 −6 −2 2 6 10 14 18

Common−Mode Voltage (V)

Ib and Ios Current (nA)

−Ib

+Ib

Ios

G024

0 50 100 150 200 250 300 350 400

Capacitance (pF)

Phase Margin (°)

VS = ±18 V

VS = ±1.5 V

G036

−1

−0.5

0.5

1.5

2.5

3.5

−40 −15 10 35 60 85 110 135

Temperature (°C)

AOL (µV)

RL = 10 kΩ

RL = 2 kΩ

RL = 600 Ω

G022

OPA1662-Q1

SLOS805C –JULY 2012–REVISED AUGUST 2016

www.ti.com

Product Folder Links: OPA1662-Q1

Typical Characteristics (continued)

At TA= 25°C, VS= ±15 V, and RL= 2 kΩ(unless otherwise noted)

Figure 31. Phase Margin vs Capacitive Load Figure 32. Open-Loop Gain vs Temperature

Figure 33. IBand IOS vs Temperature Figure 34. IBand IOS vs Common-Mode Voltage

Figure 35. Supply Current vs Temperature Figure 36. Supply Current vs Supply Voltage

l TEXAS INSTRUMENTS // / me? ompm Cunem (MN m u cm; N am mm u m

100

10 100 1k 10k 100k 1M

Frequency (Hz)

Impedance (Ω)

G030

Time (250 s/div)m

Voltage (5 V/div)

VOUT

VIN

G042

Time (0.5 s/div)m

Output Voltage (5V /div)

VIN

VOUT

G = −10 V/V

G029

Time (0.5 s/div)m

Output Voltage (5 V/div)

VIN

VOUT

G = −10 V/V

G031

−20

−15

−10

−5

20 25 30 35 40 45 50 55 60

Output Current (mA)

Output Volage Swing (V)

G028

−55 C°

−40 C°

−25 C°

0 C°

+25 C°

+85 C°

−40 −15 10 35 60 85 110 135

Temperature (°C)

Short Circuit Current (mA)

+Isc

−Isc

G027

OPA1662-Q1

www.ti.com

SLOS805C –JULY 2012–REVISED AUGUST 2016

Product Folder Links: OPA1662-Q1

Typical Characteristics (continued)

At TA= 25°C, VS= ±15 V, and RL= 2 kΩ(unless otherwise noted)

Figure 37. Short-Circuit Current vs Temperature Figure 38. Output Voltage vs Output Current

Figure 39. Positive Overload Recovery Figure 40. Negative Overload Recovery

Figure 41. Open-Loop Output Impedance vs Frequency Figure 42. No Phase Reversal

l TEXAS INSTRUMENTS R 3T1 Copyngm-zme. Texas \nslrumems \ncarpmama

IN-

Pre-Output Driver OUT

V-

V+

IN+

OPA1662-Q1

SLOS805C –JULY 2012–REVISED AUGUST 2016

www.ti.com

Product Folder Links: OPA1662-Q1

8 Detailed Description

8.1 Overview

The OPA1662-Q1 operational amplifier achieves a low 3.3 nV/√Hz noise density with an ultra-low distortion of

0.00006% at 1 kHz that makes the device suitable for audio application. This device has a wide supply range

with excellent PSRR, making it a suitable option for applications that are battery powered without regulation.

8.2 Functional Block Diagram

Figure 43. OPA1662-Q1 Simplified Schematic

8.3 Feature Description

8.3.1 Operating Voltage

The OPA1662-Q1 op amp operates from ±1.5-V to ±18-V supplies while maintaining excellent performance. The

OPA1662-Q1 can operate with as little as 3 V between the supplies and up to 36 V between the supplies.

However, some applications do not require equal positive and negative output voltage swing. With the

OPA1662‑Q1 device, power-supply voltages do not need to be equal. For example, the positive supply could be

set to 25 V with the negative supply at –5 V.

In all cases, the common-mode voltage must be maintained within the specified range. In addition, key

parameters are assured over the specified temperature of TA= –40°C to 85°C. Parameters that vary significantly

with operating voltage or temperature are shown in the Typical Characteristics.

l TEXAS INSTRUMENTS mx Vonage Nmse ("V/J— Source Resxslanoe (12)

100

10k

100 1k 10k 100k 1M

Resistor Noise

OPA166x

OPA165x

Source Resistance ( )W

Voltage Noise (nV/ Hz)

2= en

2+ (inRS)2+ 4KTRS

G003

OPA1662-Q1 Output

Input

OPA1662-Q1

www.ti.com

SLOS805C –JULY 2012–REVISED AUGUST 2016

Product Folder Links: OPA1662-Q1

Feature Description (continued)

8.3.2 Input Protection

The input terminals of the OPA1662-Q1 are protected from excessive differential voltage with back-to-back

diodes, as Figure 44 illustrates. In most circuit applications, the input protection circuitry has no consequence.

However, in low-gain or G = 1 circuits, fast ramping input signals can forward bias these diodes because the

output of the amplifier cannot respond rapidly enough to the input ramp. If the input signal is fast enough to

create this forward bias condition, the input signal current must be limited to 10 mA or less. If the input signal

current is not inherently limited, an input series resistor (RI) or a feedback resistor (RF) can be used to limit the

signal input current. This resistor degrades the low-noise performance of the OPA1662-Q1 and is examined in

Noise Performance.Figure 44 shows an example configuration when both current-limiting input and feedback

resistors are used.

Figure 44. Pulsed Operation

8.3.3 Noise Performance

Figure 45 shows the total circuit noise for varying source impedances with the op amp in a unity-gain

configuration (no feedback resistor network, and therefore no additional noise contributions).

The OPA1662-Q1 (GBW = 22 MHz, G = 1) is shown with total circuit noise calculated. The op amp itself

contributes both a voltage noise component and a current noise component. The voltage noise is commonly

modeled as a time-varying component of the offset voltage. The current noise is similarly modeled as the time-

varying component of the input bias current and reacts with the source resistance to create a voltage component

of noise. Therefore, the lowest noise op amp for a given application depends on the source impedance. For low

source impedance, current noise is negligible, and voltage noise generally dominates. The low voltage noise of

the OPA1662-Q1 op amp makes them a better choice for low source impedances of less than 1 kΩ.

The equation calculates total circuit noise, where:

• enis the voltage noise

• inis the current noise

• RSis the source impedance

• k is Boltzmann’s constant = 1.38 × 10–23 J/K

• T is the temperature in Kelvins (K)

Figure 45. Noise Performance of the OPA1662-Q1 in Unity-Gain Buffer Configuration

J Fr E i T

A)NoiseinNoninvertingGainConfiguration

B)NoiseinInvertingGainConfiguration

Noiseattheoutput:

Wheree =

S4kTRS

4kTR1

4kTR2

=thermalnoiseofRS

=thermalnoiseofR1

=thermalnoiseofR2

e =

Noiseattheoutput:

E =

21+ R2

R +R

1 S

R +R

1 S

2 22

Wheree =

S4kTRS

4kTR1

4kTR2

=thermalnoiseofRS

=thermalnoiseofR1

=thermalnoiseofR2

e =

R +R

1 S

1+ R2

e +e +

1 2

2 2

E =

2e +

2es

e +e +

1 2

2 2 es

e +

OPA1662-Q1

SLOS805C –JULY 2012–REVISED AUGUST 2016

www.ti.com

Product Folder Links: OPA1662-Q1

Feature Description (continued)

8.3.4 Basic Noise Calculations

Design of low-noise op amp circuits requires careful consideration of a variety of possible noise contributors:

noise from the signal source, noise generated in the op amp, and noise from the feedback network resistors. The

total noise of the circuit is the root-sum-square combination of all noise components.

The resistive portion of the source impedance produces thermal noise proportional to the square root of the

resistance. Figure 45 plots this equation. The source impedance is usually fixed; consequently, select the op

amp and the feedback resistors to minimize the respective contributions to the total noise.

Figure 46 illustrates both inverting and noninverting op amp circuit configurations with gain. In circuit

configurations with gain, the feedback network resistors also contribute noise. The current noise of the op amp

reacts with the feedback resistors to create additional noise components. The feedback resistor values can

generally be chosen to make these noise sources negligible. The equations for total noise are shown for both

configurations.

For the OPA1662-Q1 op amp at 1 kHz, en= 3.3 nV/√Hz.

Figure 46. Noise Calculation in Gain Configurations

8.3.5 Total Harmonic Distortion Measurements

The OPA1662-Q1 op amp has excellent distortion characteristics. THD + noise is below 0.0006% (G = 1,

VO=3VRMS, BW = 80 kHz) throughout the audio frequency range, 20 Hz to 20 kHz, with a 2-kΩload (see

Figure 7 for characteristic performance).

The distortion produced by the OPA1662-Q1 op amp is below the measurement limit of many commercially

available distortion analyzers. However, a special test circuit (such as Figure 47 shows) can be used to extend

the measurement capabilities.

l TEXAS INSTRUMENTS \N J,

OPA1662-Q1

Signal Gain = 1+

Distortion Gain = 1+

R3V = 3 V

O RMS

Generator

Output

Analyzer

Input

Audio Precision

System Two(1)

with PC Controller

SIGNAL

GAIN

DISTORTION

GAIN R1R2R3

4.99 kW

1 kW

4.99 kW

10 W

49.9 W

-1

101

549 W4.99 kW49.9 W+10 110

101

R II R

1 3

Load

OPA1662-Q1

www.ti.com

SLOS805C –JULY 2012–REVISED AUGUST 2016

Product Folder Links: OPA1662-Q1

Op amp distortion can be considered an internal error source that can be referred to the input. Figure 47 shows a

circuit that causes the op amp distortion to be gained up (see the table in Figure 47 for the distortion gain factor

for various signal gains). The addition of R3to the otherwise standard noninverting amplifier configuration alters

the feedback factor or noise gain of the circuit. The closed-loop gain is unchanged, but the feedback available for

error correction is reduced by the distortion gain factor, thus extending the resolution by the same amount. The

input signal and load applied to the op amp are the same as with conventional feedback without R3. The value of

R3must be kept small to minimize its effect on the distortion measurements.

The validity of this technique can be verified by duplicating measurements at high gain or high frequency where

the distortion is within the measurement capability of the test equipment. Measurements for this data sheet were

made with an Audio Precision System Two distortion and noise analyzer, which greatly simplifies such repetitive

measurements. The measurement technique can, however, be performed with manual distortion measurement

instruments.

8.3.6 Capacitive Loads

The dynamic characteristics of the OPA1662-Q1 have been optimized for commonly encountered gains, loads,

and operating conditions. The combination of low closed-loop gain and high capacitive loads decreases the

phase margin of the amplifier and can lead to gain peaking or oscillations. As a result, heavier capacitive loads

must be isolated from the output. The simplest way to achieve this isolation is to add a small resistor (RSequal to

50 Ω, for example) in series with the output.

This small series resistor also prevents excess power dissipation if the output of the device becomes shorted.

Figure 25 illustrates a graph of Small-Signal Overshoot vs Capacitive Load for several values of RS. Also see

Applications Bulletin: Feedback Plots Define Op Amp AC Performance for details of analysis techniques and

application circuits.

(1) For measurement bandwidth, see Figure 7 through Figure 12.

Figure 47. Distortion Test Circuit

8.3.7 Electrical Overstress

Designers often ask questions about the capability of an operational amplifier to withstand electrical overstress.

These questions tend to focus on the device inputs, but may involve the supply voltage pins or even the output

pin. Each of these different pin functions have electrical stress limits determined by the voltage breakdown

characteristics of the particular semiconductor fabrication process and specific circuits connected to the pin.

Additionally, internal electrostatic discharge (ESD) protection is built into these circuits to protect them from

accidental ESD events both before and during product assembly.

It is helpful to have a good understanding of this basic ESD circuitry and its relevance to an electrical overstress

event. Figure 48 illustrates the ESD circuits contained in the OPA1662-Q1 (indicated by the dashed line area).

The ESD protection circuitry involves several current-steering diodes connected from the input and output pins

and routed back to the internal power-supply lines, where they meet at an absorption device internal to the

operational amplifier. This protection circuitry is intended to remain inactive during normal circuit operation.

l TEXAS INSTRUMENTS

OPA1662-Q1

SLOS805C –JULY 2012–REVISED AUGUST 2016

www.ti.com

Product Folder Links: OPA1662-Q1

An ESD event produces a short duration, high-voltage pulse that is transformed into a short duration, high-

current pulse as it discharges through a semiconductor device. The ESD protection circuits are designed to

provide a current path around the operational amplifier core to prevent it from being damaged. The energy

absorbed by the protection circuitry is then dissipated as heat.

When an ESD voltage develops across two or more of the amplifier device pins, current flows through one or

more of the steering diodes. Depending on the path that the current takes, the absorption device may activate.

The absorption device internal to the OPA1662-Q1 triggers when a fast ESD voltage pulse is impressed across

the supply pins. Once triggered, it quickly activates, clamping the ESD pulse to a safe voltage level.

When the operational amplifier connects into a circuit such as that illustrated in Figure 48, the ESD protection

components are intended to remain inactive and not become involved in the application circuit operation.

However, circumstances may arise where an applied voltage exceeds the operating voltage range of a given pin.

If this condition occurs, there is a risk that some of the internal ESD protection circuits may be biased on, and

conduct current. Any such current flow occurs through steering diode paths and rarely involves the absorption

device.

Figure 48 depicts a specific example where the input voltage, VIN, exceeds the positive supply voltage (+VS) by

500 mV or more. Much of what happens in the circuit depends on the supply characteristics. If +VScan sink the

current, one of the upper input steering diodes conducts and directs current to +VS. Excessively high current

levels can flow with increasingly higher VIN. As a result, TI recommends that applications limit the input current to

10 mA.

If the supply is not capable of sinking the current, VIN may begin sourcing current to the operational amplifier, and

then take over as the source of positive supply voltage. The danger in this case is that the voltage can rise to

levels that exceed the operational amplifier absolute maximum ratings. In extreme but rare cases, the absorption

device triggers on while +VSand –VSare applied. If this event happens, a direct current path is established

between the +VSand –VSsupplies. The power dissipation of the absorption device is quickly exceeded, and the

extreme internal heating destroys the operational amplifier.

Another common question involves what happens to the amplifier if an input signal is applied to the input while

the power supplies +VSor –VSare at 0 V. Again, it depends on the supply characteristic while at 0 V, or at a

level below the input signal amplitude. If the supplies appear as high impedance, then the operational amplifier

supply current may be supplied by the input source through the current steering diodes. This state is not a

normal bias condition; the amplifier most likely will not operate normally. If the supplies are low impedance, then

the current through the steering diodes can become quite high. The current level depends on the ability of the

input source to deliver current, and any resistance in the input path.

If there is an uncertainty about the ability of the supply to absorb this current, external Zener diodes may be

added to the supply pins as shown in Figure 48.

The Zener voltage must be selected such that the diode does not turn on during normal operation. However, its

Zener voltage must be low enough so that the Zener diode conducts if the supply pin begins to rise above the

safe operating supply voltage level.

l TEXAS INSTRUMENTS

Op-Amp

Core

V(1)

-In

Out

+In

ESD Current-

Steering Diodes

Edge-Triggered ESD

Absorption Circuit

+VS

-V

-VS

OPA1662-Q1

TVS

OPA1662-Q1

www.ti.com

SLOS805C –JULY 2012–REVISED AUGUST 2016

Product Folder Links: OPA1662-Q1

(1) VIN = +VS+ 500 mV.

Figure 48. Equivalent Internal ESD Circuitry and Its Relation to a Typical Circuit Application (Single

Channel Shown)

8.4 Device Functional Modes

The OPA1662-Q1 has a single functional mode and is operational when the power-supply voltage is greater than

3 V (±1.5 V). The maximum power supply voltage for the OPA1662-Q1 is 36 V (±18 V).

I L+

OUT

Audio DAC

with Differential

Current

Outputs

PCM1794A-Q1

OPA1662-Q1

8200 pF

100 W

I L-

OUT

OPA1662-Q1

0.1 Fm

2200 pF

820 W

0.1 Fm

2700 pF

-VA

( 15 V)-

+VA

(+15 V)

680 W620 W

330 W

-VA

( 15 V)-

+VA

(+15 V)

0.1 Fm

330 W2700 pF

OPA1662-Q1

0.1 Fm

2200 pF

820 W

0.1 Fm

-VA

( 15 V)-

+VA

(+15 V) 680 W620 W

L Ch

Output

R1 R2

R3 C2

OPA1662-Q1

SLOS805C –JULY 2012–REVISED AUGUST 2016

www.ti.com

Product Folder Links: OPA1662-Q1

9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

9.1 Application Information

The OPA1662-Q1 is a unity-gain stable, precision dual op amp with very low noise. Applications with noisy or

high-impedance power supplies require decoupling capacitors close to the device pins. In most cases, 0.1-µF

capacitors are adequate. Figure 43 shows a simplified schematic of the OPA1662-Q1 (one channel shown) while

Figure 49 shows an additional application idea.

9.2 Typical Application

Figure 49. Audio DAC Current to Voltage Converter and Output Filter

l TEXAS INSTRUMENTS 1+ 2n}? Rst 2 R1// 2// 3 m ;

R R C C

2 2 3 1 2

wo = p =

Q R R R R R C

1 1

1/ / 2 / / 3 2

2 3 2

= ´

S S

1+ +

wo wo

R R C S R R C C S

R R R

2 3

1 2 2 2 3 1 2

1/ / 2 / / 3

+ +

R R

RC S R R C C S

R R R

3 1

2 3

11 2 2 2 3 1 2

1/ / 2 / / 3

æ ö

ç ÷

+ +

ç ÷

è ø

RCS1+

OPA1662-Q1

www.ti.com

SLOS805C –JULY 2012–REVISED AUGUST 2016

Product Folder Links: OPA1662-Q1

Typical Application (continued)

9.2.1 Design Requirements

Table 1 lists the design parameters for this example.

Table 1. Design Parameters

PARAMETER EXAMPLE VALUE

Supply voltage ±15 V to ±36 V

Differential input currents 0 mA to 30 mA

Resistors value tolerance 1%

Ceramic capacitor XR5 or XR7 50 V

9.2.2 Detailed Design Procedure

This circuit is designed for converting differential input current into a single ended output voltage. The resistor

values are chosen to be relatively low for minimizing the total circuit noise. The filtering capacitors are chosen to

maintain adequate bandwidth from 10 Hz to 20 kHz for audio signals.

The first stage converts the audio DAC output current into a voltage with a gain calculated by Equation 1:

where

• R = 820 Ω

• C = 2200 pF

• S is Laplace variable (1)

RC filters the audio DAC output ripple and cutoff frequency = = 80 KHz

The second differential stage transfer function is calculated by Equation 2:

(2)

The denominator of this transfer function is a quadratic equation and the

general form is calculated by Equation 3:

where

•ωo = 2πFo is the resonance frequency

• and Q is the quality factor (3)

The gain peak depends on the quality factor in Equation 4:

(4)

The resonance frequency is calculated by Equation 5:

(5)

These equations help to maintain adequate bandwidth and keep the differential gain flat so the quality factor is

from 0.7 to 1. The resonance frequency must be at least twice the desired bandwidth.

The chosen components give a quality factor of 0.89 and a resonance frequency of 53 KHz.

l TEXAS INSTRUMENTS v0 R R3 1 R1// 2// 3 RR3 D 7 R1 Teksmu ﬂ ] TEkSWD [ ' a 9 cm ka m Pk Pk .4qu .4qu m2 Wk u.) vk Vk .w .w + 01ka Pk . mm,” 3 92 v 1 ~14 v 2 un m cm mm mm, Iaqakm cm Suumv my: my.» “Mm.“ A an \ zuumv an summ' «,Lwa 300qu WW; A an \ mum» m Hun w Nlul2016 m ‘nnv , m... me Im bu °' 21'2n'59 W bn °; zz-zx-zﬁ

DC gain = R

vo R R

R R

IoutL IoutL RCS R C S R R C C S

R R R

3 1

2 3

1 1 1 2 2 2 3 1 2

1/ / 2 / / 3

= ´ ´

+ - - + + +

OPA1662-Q1

SLOS805C –JULY 2012–REVISED AUGUST 2016

www.ti.com

Product Folder Links: OPA1662-Q1

The overall transfer function is shown in Equation 6:

(6)

The and is 398 mV/mA.

The poles are at 53 KHz and 80 KHz.

9.2.3 Application Curves

CH1 = positive input current IOUTL+ = 1.5 V / 150 Ω

CH2 = negative input current IOUTL– = 1.5 V / 150 Ω

CH3 = output single-ended voltage

Figure 50. Output Voltage at 10 mApp and 10 Hz

CH1 = positive input current IOUTL+ = 1.5 V / 150 Ω

CH2 = negative input current IOUTL– = 1.5 V / 150 Ω

CH3 = output single-ended voltage

Figure 51. Output Voltage at 10 mApp and 20 KHz

10 Power Supply Recommendations

The OPA1662-Q1 is specified for operation from 3 V to 36 V (±1.5 V to 18 V) and at an ambient operating

temperature from –40°C to 85°C. Parameters that can exhibit significant variance with regard to operating

voltage or temperature are presented in Typical Characteristics.

11 Layout

11.1 Layout Guidelines

The OPA1662-Q1 is a unity-gain stable, precision dual op amp with very low noise. To realize the full operational

performance of the device, good high-frequency printed-circuit board (PCB) layout practices are required. Low-

loss, 0.1-µF bypass capacitors must be connected between each supply pin and ground as close to the device

as possible. The bypass capacitor traces must be designed for minimum inductance.

l TEXAS INSTRUMENTS

0.1 PF

GND plan

OPA1662-Q1

www.ti.com

SLOS805C –JULY 2012–REVISED AUGUST 2016

Product Folder Links: OPA1662-Q1

11.2 Layout Example

Figure 52. Layout Recommendation

11.3 Power Dissipation

The OPA1662-Q1 op amp is capable of driving 2-kΩloads with a power-supply voltage up to ±18 V and full

operating temperature range. Internal power dissipation increases when operating at high supply voltages.

Copper leadframe construction used in the OPA1662-Q1 op amp improves heat dissipation compared to

conventional materials. Circuit board layout can also help minimize junction temperature rise. Wide copper traces

help dissipate the heat by acting as an additional heat sink. Temperature rise can be further minimized by

soldering the devices to the circuit board rather than using a socket.

l TEXAS INSTRUMENTS

OPA1662-Q1

SLOS805C –JULY 2012–REVISED AUGUST 2016

www.ti.com

Product Folder Links: OPA1662-Q1

12 Device and Documentation Support

12.1 Documentation Support

12.1.1 Related Documentation

For related documentation see the following:

•Applications Bulletin: Feedback Plots Define Op Amp AC Performance (SBOA015)

•A High-Power High-Fidelity Headphone Amplifier for Current Output Audio DACs Reference Design

(TIDU672)

12.2 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper

right corner, click on Alert me to register and receive a weekly digest of any product information that has

changed. For change details, review the revision history included in any revised document.

12.3 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective

contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of

Use.

TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration

among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help

solve problems with fellow engineers.

Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and

contact information for technical support.

12.4 Trademarks

E2E is a trademark of Texas Instruments.

All other trademarks are the property of their respective owners.

12.5 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

12.6 Glossary

SLYZ022 —TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.

13 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most

current data available for the designated devices. This data is subject to change without notice and revision of

this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

I TEXAS INSTRUMENTS Sample: Sample:

PACKAGE OPTION ADDENDUM

www.ti.com 10-Dec-2020

Addendum-Page 1

PACKAGING INFORMATION

Orderable Device Status

(1)

Package Type Package

Drawing Pins Package

Qty Eco Plan

(2)

Lead finish/

Ball material

(6)

MSL Peak Temp

(3)

Op Temp (°C) Device Marking

(4/5)

Samples

OPA1662AIDGKRQ1 ACTIVE VSSOP DGK 8 2500 RoHS & Green NIPDAUAG Level-2-260C-1 YEAR -40 to 85 OUUI

OPA1662AIDRQ1 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 O1662Q

(1) The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance

do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may

reference these types of products as "Pb-Free".

RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.

Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based

flame retardants must also meet the <=1000ppm threshold requirement.

(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

(6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two

lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

I TEXAS INSTRUMENTS

PACKAGE OPTION ADDENDUM

www.ti.com 10-Dec-2020

Addendum-Page 2

OTHER QUALIFIED VERSIONS OF OPA1662-Q1 :

•Catalog: OPA1662

NOTE: Qualified Version Definitions:

•Catalog - TI's standard catalog product

I TEXAS INSTRUMENTS ‘3‘ V.'

PACKAGE MATERIALS INFORMATION

www.ti.com 3-Jun-2022

TAPE AND REEL INFORMATION

Reel Width (W1)

REEL DIMENSIONS

Dimension designed to accommodate the component length

Dimension designed to accommodate the component thickness

Overall width of the carrier tape

Pitch between successive cavity centers

Dimension designed to accommodate the component width

TAPE DIMENSIONS

K0 P1

B0 W

Cavity

QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE

Pocket Quadrants

Sprocket Holes

Q1 Q1Q2 Q2

Q3 Q3Q4 Q4 User Direction of Feed

Reel

Diameter

*All dimensions are nominal

Device Package

Type Package

Drawing Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

(mm) B0

(mm) K0

(mm) P1

(mm) W

(mm) Pin1

Quadrant

OPA1662AIDGKRQ1 VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1

OPA1662AIDRQ1 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com 3-Jun-2022

TAPE AND REEL BOX DIMENSIONS

Width (mm)

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

OPA1662AIDGKRQ1 VSSOP DGK 8 2500 366.0 364.0 50.0

OPA1662AIDRQ1 SOIC D 8 2500 356.0 356.0 35.0

Pack Materials-Page 2

‘J

www.ti.com

PACKAGE OUTLINE

.228-.244 TYP

[5.80-6.19]

.069 MAX

[1.75]

6X .050

[1.27]

8X .012-.020

[0.31-0.51]

.150

[3.81]

.005-.010 TYP

[0.13-0.25]

0 - 8 .004-.010

[0.11-0.25]

.010

[0.25]

.016-.050

[0.41-1.27]

4X (0 -15 )

.189-.197

[4.81-5.00]

NOTE 3

B .150-.157

[3.81-3.98]

NOTE 4

4X (0 -15 )

(.041)

[1.04]

SOIC - 1.75 mm max heightD0008A

SMALL OUTLINE INTEGRATED CIRCUIT

4214825/C 02/2019

NOTES:

1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.

Dimensioning and tolerancing per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not

exceed .006 [0.15] per side.

4. This dimension does not include interlead flash.

5. Reference JEDEC registration MS-012, variation AA.

.010 [0.25] C A B

PIN 1 ID AREA

SEATING PLANE

.004 [0.1] C

SEE DETAIL A

DETAIL A

TYPICAL

SCALE 2.800

Yl“‘+

www.ti.com

EXAMPLE BOARD LAYOUT

.0028 MAX

[0.07]

ALL AROUND

.0028 MIN

[0.07]

ALL AROUND

(.213)

[5.4]

6X (.050 )

[1.27]

8X (.061 )

[1.55]

8X (.024)

[0.6]

(R.002 ) TYP

[0.05]

SOIC - 1.75 mm max heightD0008A

SMALL OUTLINE INTEGRATED CIRCUIT

4214825/C 02/2019

NOTES: (continued)

6. Publication IPC-7351 may have alternate designs.

7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

METAL SOLDER MASK

OPENING

NON SOLDER MASK

DEFINED

SOLDER MASK DETAILS

EXPOSED

METAL

OPENING

SOLDER MASK METAL UNDER

SOLDER MASK

DEFINED

EXPOSED

METAL

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN

SCALE:8X

SYMM

SEE

DETAILS

SYMM

www.ti.com

EXAMPLE STENCIL DESIGN

8X (.061 )

[1.55]

8X (.024)

[0.6]

6X (.050 )

[1.27] (.213)

[5.4]

(R.002 ) TYP

[0.05]

SOIC - 1.75 mm max heightD0008A

SMALL OUTLINE INTEGRATED CIRCUIT

4214825/C 02/2019

NOTES: (continued)

8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

9. Board assembly site may have different recommendations for stencil design.

SOLDER PASTE EXAMPLE

BASED ON .005 INCH [0.125 MM] THICK STENCIL

SCALE:8X

SYMM

MECHANICAL DATA DGK (S—PDSO—GS) PLASTIC SMALL—OUTLINE PACKAGE m1 WW“: {[0 VAX % j 3,010 I 4073329/E 05/06 NO'ES' A AH imec' dimensmrs c'e m m'hmeiers 5 Th: drawing is enmec: :e change within: nciice. Body icnqth Coos mi mciucc maid Hash, protrusions or we tms Mom 'iush, aromons, ov qaw burrs shaH m exceed 015 per end b Budy mm does not wcude inierieud ﬂasi‘ inieriead ‘iush s'mii 'mi exceed 050 pe' we : FuHs wiUHn JEDEC M0487 quulion AA, except 'vievieud ricer INSTRUMENTS w. (i. com

LAND PATTERN DATA DGK (37PD30708) PLASTIC SMALL OUTLINE PACKAGE Exampie Board Layout Exampie stencii Openings Based on a stencii thickness of .127mm L005inch), (See Nate 0) (,0 65) TYP ‘ Li 5 LLLLL L, pm ,,,,, PKG PKG "\ i i 4 — ----- i — ----- i D DU D i i ’ PKG PKG Q G . / Exampie , Non Soldermusk Deﬁned Pad i , , —\ L A ~/ ‘\ Example \ Spider Musk Opening / +1 1‘(0,45) ‘ (See Note E) t 1 (1,45) < ‘="" \pud="" geometry="" ’="" (see="" note="" c)="" \="" +ii¢="" (0,05)="" \="" ah="" around="" «="" ,="" \="" e="" ’="" i="" ‘\-=""> muss/A 11/13 NOTES: A. Ali iinear dimensions are in miilimeters. a. This drawing is subject ta change without natiee, C, Publication |PCi7351 is recommended ior alternate designsu a. Laser cutting apertures with trapezoidui walls and aisa rounding corners w‘iH oﬂer eetter paste veiease. Customers snouid Contact their board ussembiy site for stencii design recommendations. Rater tn IFS—7525 for other slenci'i recummendutions. Customers should Contact their tmurd fabrication site for solder musk tolerances between and around signal pads. .r'I {I TEXAS INSTRUMENTS www.li.com

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OPA1662-Q1 Datasheet by Texas Instruments

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