TS4984 Datasheet by STMicroelectronics

m compact and power dissipaiion elficreni QFN package, ii suits various applications. With a BTL configuration, this Audio Power Amplifier is capable of delivering 1W per channel of continuous RMS ouiput power inio an 85) load @ 5V. An exiernally controlled siandby mode control reduces the supply curreni lo less than 10nA per channel. The device also leaiures an internal thermal shutdown protection. The gain ol each channel can be configured by exiernal gain setting resisiors. Applications I Cellular mobile phones I Notebook compuiers & PDAs Order Codes l6 ‘5 u 13 m7 L IN+L BvPAss L NC GNDI GND2 vomvon I LCD monitors & TVs I Ponable audio devices January 2005 Hevlslon l
January 2005 Revision 1 1/29
■Operating from VCC=2.2V to 5.5V
■1W output power per channel @ VCC=5V,
THD+N=1%, RL=8Ω
■10nA standby current
■62dB PSRR @ 217Hz with grounded inputs
■High SNR: 100dB(A) typ.
■Near-zero pop & click
■Available in QFN16 4x4 mm, 0.5mm pitch,
leadfree package
Description
The TS4984 has been designed for top of the
class stereo audio applications. Thanks to its
compact and power dissipation efficient QFN
package, it suits various applications.
With a BTL configuration, this Audio Power
Amplifier is capable of delivering 1W per channel
of continuous RMS output power into an 8Ω load
@ 5V.
An externally controlled standby mode control
reduces the supply current to less than 10nA per
channel. The device also features an internal
thermal shutdown protection.
The gain of each channel can be configured by
external gain setting resistors.
Pin Connections (top view)
Applications
■Cellular mobile phones
■Notebook computers & PDAs
■LCD monitors & TVs
■Portable audio devices
Order Codes
TS4984IQ — TQFN16 4x4mm
1
2
3
4
56 7 8
12
11
10
9
16 15 14 13
IN- L
IN+ L
BYPASS L
NC
GND1 GND2 VO+R VO-R
IN+ R
IN- R
BYPASS R
STBY
VCC2
VCC1
VO+L
VO-L
1
2
3
4
56 7 8
12
11
10
9
16 15 14 13
16 15 14 13
IN- L
IN+ L
BYPASS L
NC
GND1 GND2 VO+R VO-R
IN+ R
IN- R
BYPASS R
STBY
VCC2
VCC1
VO+L
VO-L
Part Number Temperature Range Package Packaging Marking
TS4984IQT -40, +85°C QFN Tape & Reel K984
TS4984
2 x 1W Stereo audio power amplifier
with active low standby mode
LTV T‘H ,eé , T‘H
TS4984 Typical Application
2/29
1 Typical Application
Figure 1 shows a schematic view of a typical audio amplification application using the TS4984. Table 1
describes the components used in this typical application.
Figure 1: Typical application schematic
Table 1: External component descriptions
Components Functional Description
RIN L,R
Inverting input resistors which sets the closed loop gain in conjunction with Rfeed. These resistors
also form a high pass filter with CIN (fc = 1 / (2 x Pi x RIN x CIN)).
CIN L,R Input coupling capacitors which blocks the DC voltage at the amplifier input terminal.
RFEED L,R Feedback resistors which sets the closed loop gain in conjunction with RIN.
CSSupply Bypass capacitor which provides power supply filtering.
CBBypass pin capacitor which provides half supply filtering.
AV L, R Closed loop gain in BTL configuration = 2 x (RFEED / RIN) on each channel.
1
2
12
145
16
15
Bias
3
AV = -1
Bypass L
Standby
VCC1
+
-
+
-
AV = -1
GND1
+
-
+
-
10
9
8
7
11 Bypass R
GND2 VCC2
613
VO-L
VO+L
VO-R
VO+R
IN-L
IN+L
IN+R
IN-R
U1
TS4984
VCC
+
Cs
1u
1
2
3
VCC
Rin-L
Cin-LInput L
GND
Rin-R
Cin-R
Input R
GND
Cfeed-L
Rfeed-L
Cfeed-R
Rfeed-R
+
Cb
1u
Neg. Output L
Pos. Output L
Neg. Output R
Pos. Output R
Wire optional
Internal connection
22k
22k
22k
22k
100n
100n
E]
Absolute maximum ratings and operating conditions TS4984
3/29
2 Absolute maximum ratings and operating conditions
Table 2: Key parameters and their absolute maximum ratings
Symbol Parameter Value Unit
VCC Supply voltage 1
1) All voltages values are measured with respect to the ground pin
6V
ViInput Voltage 2
2) The magnitude of input signal must never exceed VCC + 0.3V / GND - 0.3V
GND to VCC V
Toper Operating Free Air Temperature Range -40 to + 85 °C
Tstg Storage Temperature -65 to +150 °C
TjMaximum Junction Temperature 150 °C
Rthja Thermal Resistance Junction to Ambient
QFN16 120 °C/W
PdPower Dissipation Internally Limited
ESD Human Body Model3
3) The voltage value is measured with respect from pin to supply
2kV
ESD Machine Model 200 V
Latch-up Immunity 200mA
Table 3: Operating conditions
Symbol Parameter Value Unit
VCC Supply Voltage 2.2 to 5.5 V
VICM Common Mode Input Voltage Range 1.2V to VCC V
VSTB
Standby Voltage Input:
Device ON
Device OFF
1.35 ≤ VSTB ≤ VCC
GND ≤ VSTB ≤ 0.4
V
RLLoad Resistor ≥ 4 Ω
ROUTGND Resistor Output to GND (VSTB = GND) ≥ 1MΩ
TSD Thermal Shutdown Temperature 150 °C
RTHJA
Thermal Resistance Junction to Ambient
QFN161
QFN162
1) When mounted on a 4-layer PCB with via
2) When mounted on a 2 layer PCB
45
85
°C/W
E]
TS4984 Electrical characteristics
4/29
3 Electrical characteristics
Table 4: Electrical characteristics for VCC = +5V, GND = 0V, Tamb = 25°C (unless otherwise
specified)
Symbol Parameter Min. Typ. Max. Unit
ICC Supply Current
No input signal, no load 7.4 12 mA
ISTANDBY Standby Current 1
No input signal, Vstdby = GND, RL = 8Ω
1) Standby mode is activated when Vstdby is tied to Gnd.
10 1000 nA
Voo Output Offset Voltage
No input signal, RL = 8Ω110mV
Pout Output Power
THD = 1% Max, F = 1kHz, RL = 8Ω0.8 1 W
THD + N Total Harmonic Distortion + Noise
Po = 1Wrms, Av = 2, 20Hz ≤ F ≤ 20kHz, RL = 8Ω0.2 %
PSRR
Power Supply Rejection Ratio2
RL = 8Ω, Av = 2, Vripple = 200mVpp, Input Grounded
F = 217Hz
F = 1kHz
2) All PSRR data limits are guaranteed by production sampling tests
Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the sinusoidal signal superimposed upon Vcc.
55
55
62
64
dB
Crosstalk
Channel Separation, RL = 8Ω
F = 1kHz
F = 20Hz to 20kHz
-92
-70
dB
TWU Wake-Up Time (Cb = 1µF) 90 130 ms
TSTDB Standby Time (Cb = 1µF) 10 µs
VSTDBH Standby Voltage Level High 1.3 V
VSTDBL Standby Voltage Level Low 0.4 V
ΦM
Phase Margin at Unity Gain
RL = 8Ω, CL = 500pF 65 Degrees
GM Gain Margin
RL = 8Ω, CL = 500pF 15 dB
GBP Gain Bandwidth Product
RL = 8Ω1.5 MHz
E]
Electrical characteristics TS4984
5/29
Table 5: Electrical characteristics for VCC = +3.3V, GND = 0V, Tamb = 25°C (unless otherwise
specified)
Symbol Parameter Min. Typ. Max. Unit
ICC Supply Current
No input signal, no load 6.6 12 mA
ISTANDBY Standby Current 1
No input signal, Vstdby = GND, RL = 8Ω10 1000 nA
Voo Output Offset Voltage
No input signal, RL = 8Ω110mV
Pout Output Power
THD = 1% Max, F = 1kHz, RL = 8Ω300 450 mW
THD + N Total Harmonic Distortion + Noise
Po = 400mWrms, Av = 2, 20Hz ≤ F ≤ 20kHz, RL = 8Ω0.1 %
PSRR
Power Supply Rejection Ratio2
RL = 8Ω, Av = 2, Vripple = 200mVpp, Input Grounded
F = 217Hz
F = 1kHz
55
55
61
63
dB
Crosstalk
Channel Separation, RL = 8Ω
F = 1kHz
F = 20Hz to 20kHz
-94
-68
dB
TWU Wake-Up Time (Cb = 1µF) 110 140 ms
TSTDB Standby Time (Cb = 1µF) 10 µs
VSTDBH Standby Voltage Level High 1.2 V
VSTDBL Standby Voltage Level Low 0.4 V
ΦM
Phase Margin at Unity Gain
RL = 8Ω, CL = 500pF 65 Degrees
GM Gain Margin
RL = 8Ω, CL = 500pF 15 dB
GBP Gain Bandwidth Product
RL = 8Ω1.5 MHz
1) Standby mode is activated when Vstdby is tied to Gnd
2) All PSRR data limits are guaranteed by production sampling tests
Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the sinusoidal signal superimposed upon Vcc.
E]
TS4984 Electrical characteristics
6/29
Table 6: Electrical characteristics for VCC = +2.6V, GND = 0V, Tamb = 25°C (unless otherwise
specified)
Symbol Parameter Min. Typ. Max. Unit
ICC Supply Current
No input signal, no load 6.2 12 mA
ISTANDBY Standby Current 1
No input signal, Vstdby = GND, RL = 8Ω10 1000 nA
Voo Output Offset Voltage
No input signal, RL = 8Ω110mV
Pout Output Power
THD = 1% Max, F = 1kHz, RL = 8Ω200 250 mW
THD + N Total Harmonic Distortion + Noise
Po = 200mWrms, Av = 2, 20Hz ≤ F ≤ 20kHz, RL = 8Ω0.1 %
PSRR
Power Supply Rejection Ratio2
RL = 8Ω, Av = 2, Vripple = 200mVpp, Input Grounded
F = 217Hz
F = 1kHz
55
55
60
62
dB
Crosstalk
Channel Separation, RL = 8Ω
F = 1kHz
F = 20Hz to 20kHz
-95
-68
dB
TWU Wake-Up Time (Cb = 1µF) 125 150 ms
TSTDB Standby Time (Cb = 1µF) 10 µs
VSTDBH Standby Voltage Level High 1.2 V
VSTDBL Standby Voltage Level Low 0.4 V
ΦM
Phase Margin at Unity Gain
RL = 8Ω, CL = 500pF 65 Degrees
GM Gain Margin
RL = 8Ω, CL = 500pF 15 dB
GBP Gain Bandwidth Product
RL = 8Ω1.5 MHz
1) Standby mode is activated when Vstdby is tied to Gnd
2) All PSRR data limits are guaranteed by production sampling tests
Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the sinusoidal signal superimposed upon Vcc.
Electrical characteristics TS4984
7/29
Figure 2: Open loop frequency response
Figure 3: Open loop frequency response
Figure 4: Open loop frequency response
Figure 5: Open loop frequency response
Figure 6: Open loop frequency response
Figure 7: Open loop frequency response
0.1 1 10 100 1000 10000
-60
-40
-20
0
20
40
60
-200
-160
-120
-80
-40
0
Gain
Phase
Gain (dB)
Frequency (kHz)
Vcc = 5V
RL = 8
Ω
Tamb = 25
°
C
Phase (°)
0.1 1 10 100 1000 10000
-60
-40
-20
0
20
40
60
-200
-160
-120
-80
-40
0
Gain
Phase
Gain (dB)
Frequency (kHz)
Vcc = 3.3V
RL = 8
Ω
Tamb = 25
°
C
Phase (°)
0.1 1 10 100 1000 10000
-60
-40
-20
0
20
40
60
-200
-160
-120
-80
-40
0
Gain
Phase
Gain (dB)
Frequency (kHz)
Vcc = 2.6V
RL = 8
Ω
Tamb = 25
°
C
Phase (°)
0.1 1 10 100 1000 10000
-40
-20
0
20
40
60
80
100
-200
-160
-120
-80
-40
0
Gain
Phase
Gain (dB)
Frequency (kHz)
Vcc = 5V
CL = 560pF
Tamb = 25°C
Phase (°)
0.1 1 10 100 1000 10000
-40
-20
0
20
40
60
80
100
-200
-160
-120
-80
-40
0
Gain
Phase
Gain (dB)
Frequency (kHz)
Vcc = 3.3V
CL = 560pF
Tamb = 25°C
Phase (°)
0.1 1 10 100 1000 10000
-40
-20
0
20
40
60
80
100
-200
-160
-120
-80
-40
0
Gain
Phase
Gain (dB)
Frequency (kHz)
Vcc = 2.6V
CL = 560pF
Tamb = 25°C
Phase (°)
TS4984 Electrical characteristics
8/29
Figure 8: Power supply rejection ratio (PSRR)
vs. frequency
Figure 9: Power supply rejection ratio (PSRR)
vs. frequency
Figure 10: Power supply rejection ratio
(PSRR) vs. frequency
Figure 11: Power supply rejection ratio (PSRR)
vs. frequency
Figure 12: Power supply rejection ratio
(PSRR) vs. frequency
Figure 13: Power supply rejection ratio
(PSRR) vs. frequency
100 1000 10000 100000
-70
-60
-50
-40
-30
-20
-10
0
Vcc :
2.2V
2.6V
3.3V
5V
Vripple = 200mVpp
Av = 2
Input = Grounded
Cb = Cin = 1
µ
F
RL >= 4
Ω
Tamb = 25
°
C
PSRR (dB)
Frequency (Hz)
100 1000 10000 100000
-60
-50
-40
-30
-20
-10
0
Vcc :
2.2V
2.6V
3.3V
5V
Vripple = 200mVpp
Av = 5
Input = Grounded
Cb = Cin = 1
µ
F
RL >= 4
Ω
Tamb = 25
°
C
PSRR (dB)
Frequency (Hz)
100 1000 10000 100000
-50
-40
-30
-20
-10
0
Vcc :
2.2V
2.6V
3.3V
5V
Vripple = 200mVpp
Av = 10
Input = Grounded
Cb = Cin = 1
µ
F
RL >= 4
Ω
Tamb = 25
°
C
PSRR (dB)
Frequency (Hz)
100 1000 10000 100000
-60
-50
-40
-30
-20
-10
0
Vcc = 5, 3.3, 2.5 & 2.2V
Vripple = 200mVpp
Av = 2
Input = Grounded
Cb = 0.1
µ
F, Cin = 1
µ
F
RL >= 4
Ω
Tamb = 25
°
C
PSRR (dB)
Frequency (Hz)
100 1000 10000 100000
-80
-70
-60
-50
-40
-30
-20
-10
0
Vcc = 2.2, 2.6, 3.3, 5V
Vripple = 200mVpp
Rfeed = 22k
Ω
Input = Floating
Cb = 1
µ
F
RL >= 4
Ω
Tamb = 25
°
C
PSRR (dB)
Frequency (Hz)
100 1000 10000 100000
-80
-70
-60
-50
-40
-30
-20
-10
0
Vcc = 2.2, 2.6, 3.3, 5V
Vripple = 200mVpp
Rfeed = 22k
Ω
Input = Floating
Cb = 0.1
µ
F
RL >= 4
Ω
Tamb = 25
°
C
PSRR (dB)
Frequency (Hz)
Electrical characteristics TS4984
9/29
Figure 14: Power supply rejection ratio
(PSRR) vs. DC output voltage
Figure 15: Power supply rejection ratio
(PSRR) vs. DC output voltage
Figure 16: Power supply rejection ratio
(PSRR) vs. DC output voltage
Figure 17: Power supply rejection ratio
(PSRR) vs. DC output voltage
Figure 18: Power supply rejection ratio
(PSRR) vs. DC output voltage
Figure 19: Power supply rejection ratio
(PSRR) vs. DC output voltage
-5-4-3-2-1012345
-70
-60
-50
-40
-30
-20
-10
0
Vcc = 5V
Vripple = 200mVpp
RL = 8
Ω
Cb = 1
µ
F
AV = 2
Tamb = 25
°
C
PSRR (dB)
Differential DC Output Voltage (V)
-5-4-3-2-1012345
-60
-50
-40
-30
-20
-10
0
Vcc = 5V
Vripple = 200mVpp
RL = 8
Ω
Cb = 1
µ
F
AV = 5
Tamb = 25
°
C
PSRR (dB)
Differential DC Output Voltage (V)
-5-4-3-2-1012345
-50
-40
-30
-20
-10
0
Vcc = 5V
Vripple = 200mVpp
RL = 8
Ω
Cb = 1
µ
F
AV = 10
Tamb = 25
°
C
PSRR (dB)
Differential DC Output Voltage (V)
-3.0 -2.5 -2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0
-70
-60
-50
-40
-30
-20
-10
0
Vcc = 3.3V
Vripple = 200mVpp
RL = 8
Ω
Cb = 1
µ
F
AV = 2
Tamb = 25
°
C
PSRR (dB)
Differential DC Output Voltage (V)
-3.0 -2.5 -2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0
-60
-50
-40
-30
-20
-10
0
Vcc = 3.3V
Vripple = 200mVpp
RL = 8
Ω
Cb = 1
µ
F
AV = 5
Tamb = 25
°
C
PSRR (dB)
Differential DC Output Voltage (V)
-3.0 -2.5 -2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0
-50
-40
-30
-20
-10
0
Vcc = 3.3V
Vripple = 200mVpp
RL = 8
Ω
Cb = 1
µ
F
AV = 10
Tamb = 25
°
C
PSRR (dB)
Differential DC Output Voltage (V)
TS4984 Electrical characteristics
10/29
Figure 20: Power supply rejection ratio
(PSRR) vs. DC output voltage
Figure 21: Power supply rejection ratio
(PSRR) vs. DC output voltage
Figure 22: Power supply rejection ratio
(PSRR) vs. DC output voltage
Figure 23: Power supply rejection ratio
(PSRR) at f=217Hz vs. bypass
capacitor
Figure 24: Output power vs. power supply
voltage
Figure 25: Output power vs. power supply
voltage
-2.5 -2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 2.5
-70
-60
-50
-40
-30
-20
-10
0
Vcc = 2.6V
Vripple = 200mVpp
RL = 8
Ω
Cb = 1
µ
F
AV = 2
Tamb = 25
°
C
PSRR (dB)
Differential DC Output Voltage (V)
-2.5 -2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 2.5
-60
-50
-40
-30
-20
-10
0
Vcc = 2.6V
Vripple = 200mVpp
RL = 8
Ω
Cb = 1
µ
F
AV = 5
Tamb = 25
°
C
PSRR (dB)
Differential DC Output Voltage (V)
-2.5 -2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 2.5
-50
-40
-30
-20
-10
0
Vcc = 2.6V
Vripple = 200mVpp
RL = 8
Ω
Cb = 1
µ
F
AV = 10
Tamb = 25
°
C
PSRR (dB)
Differential DC Output Voltage (V)
0.1 1
-80
-70
-60
-50
-40
-30 Av=10
Vcc:
2.6V
3.3V
5V
Av=5
Vcc:
2.6V
3.3V
5V
Av=2
Vcc:
2.6V
3.3V
5V
Tamb=25
°
C
PSRR at 217Hz (dB)
Bypass Capacitor Cb ( F)
2.5 3.0 3.5 4.0 4.5 5.0 5.5
0.00
0.25
0.50
0.75
1.00
1.25
1.50
1.75
2.00
THD+N=10%
THD+N=1%
RL = 4
Ω
F = 1kHz
BW < 125kHz
Tamb = 25
°
C
Pout (W)
Vcc (V)
2.5 3.0 3.5 4.0 4.5 5.0 5.5
0.00
0.25
0.50
0.75
1.00
1.25
1.50
1.75
THD+N=10%
THD+N=1%
RL = 8
Ω
F = 1kHz
BW < 125kHz
Tamb = 25
°
C
Pout (W)
Vcc (V)
m» ‘nv E]
Electrical characteristics TS4984
11/29
Figure 26: Output power vs. power supply
voltage
Figure 27: Output power vs. power supply
voltage
Figure 28: Output power vs. load resistor
Figure 29: Output power vs. load resistor
Figure 30: Output power vs. load resistor
Figure 31: Power dissipation vs. output power
2.5 3.0 3.5 4.0 4.5 5.0 5.5
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
THD+N=10%
THD+N=1%
RL = 16
Ω
F = 1kHz
BW < 125kHz
Tamb = 25
°
C
Pout (W)
Vcc (V)
2.5 3.0 3.5 4.0 4.5 5.0 5.5
0.00
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0.40
0.45
0.50
0.55
0.60
THD+N=10%
THD+N=1%
RL = 32
Ω
F = 1kHz
BW < 125kHz
Tamb = 25
°
C
Pout (W)
Vcc (V)
4 8 12 16 20 24 28 32
0.00
0.25
0.50
0.75
1.00
1.25
1.50
1.75
THD+N=10%
THD+N=1%
Vcc = 5V
F = 1kHz
BW < 125kHz
Tamb = 25°C
Pout (W)
Load Resistance (W)
4 8 12 16 20 24 28 32
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
THD+N=10%
THD+N=1%
Vcc = 3.3V
F = 1kHz
BW < 125kHz
Tamb = 25
°
C
Pout (W)
Load resistance
4 8 12 16 20 24 28 32
0.00
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0.40
THD+N=10%
THD+N=1%
Vcc = 2.6V
F = 1kHz
BW < 125kHz
Tamb = 25°C
Pout (W)
Load resistance
0.0 0.2 0.4 0.6 0.8 1.0 1.2
0.0
0.4
0.8
1.2
1.6
2.0
2.4
RL=16
Ω
RL=8
Ω
Vcc=5V
F=1kHz
THD+N<1%
RL=4
Ω
Power Dissipation (W)
Output Power (W)
7 s s 4 a 2 1 5 35:0. Vcc M 4 3 3.5 3, Vs|db (V)
TS4984 Electrical characteristics
12/29
Figure 32: Power dissipation vs. output power
Figure 33: Power dissipation vs. output power
Figure 34: Clipping voltage vs. power supply
voltage and load resistor
Figure 35: Clipping voltage vs. power supply
voltage and load resistor
Figure 36: Current consumption vs. power
supply voltage
Figure 37: Current consumption vs. standby
voltage at Vcc=5V
0.0 0.1 0.2 0.3 0.4 0.5 0.6
0.0
0.2
0.4
0.6
0.8
1.0
1.2
RL=16
Ω
RL=8
Ω
Vcc=3.3V
F=1kHz
THD+N<1%
RL=4
Ω
Power Dissipation (W)
Output Power (W)
0.00 0.04 0.08 0.12 0.16 0.20 0.24 0.28
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
RL=16Ω
RL=8Ω
Vcc=2.6V
F=1kHz
THD+N<1%
RL=4Ω
Power Dissipation (W)
Output Power (W)
2.5 3.0 3.5 4.0 4.5 5.0
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
RL = 16
Ω
RL = 8
Ω
RL = 4
Ω
Tamb = 25 C
Vout1 & Vout2
Clipping Voltage High side (V)
Vcc (V)
2.5 3.0 3.5 4.0 4.5 5.0
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
RL = 16
Ω
RL = 8
Ω
RL = 4
Ω
Tamb = 25 C
Vout1 & Vout2
Clipping Voltage Low side (V)
Vcc (V)
No Loads
Tamb=25°C
Vcc = 5V
No Loads
Tamb=25°C
n5 1 n 1 5 Vstdb w) 20 25 30 as 10 15 2'0 25 man 1v) 1:: (mm 05 1 o Vstdb M 15 20
Electrical characteristics TS4984
13/29
Figure 38: Current consumption vs. standby
voltage at Vcc=3.3V
Figure 39: Current consumption vs. standby
voltage at Vcc=2.6V
Figure 40: Current consumption vs. standby
voltage at Vcc=2.2V
Figure 41: THD+N vs. output power
Figure 42: THD+N vs. output power
Figure 43: THD+N vs. output power
Vcc = 3.3V
No Loads
Tamb=25°C
Vcc = 2.6V
No Loads
Tamb=25°C
Vcc = 2.2V
No Loads
Tamb=25°C
1E−3 0.01 0.1 1
0.01
0.1
1
10
Vcc=5V
Vcc=3.3V
Vcc=2.6V
Vcc=2.2V
RL = 4
Ω
F = 20Hz
Av = 2
Cb = 1
µ
F
BW < 125kHz
Tamb = 25°C
THD+N (%)
Pout (W)
1E−3 0.01 0.1 1
1E−3
0.01
0.1
1
10
Vcc=5V
Vcc=3.3V
Vcc=2.6V
Vcc=2.2V
RL = 8
Ω
F = 20Hz
Av = 2
Cb = 1
µ
F
BW < 125kHz
Tamb = 25°C
THD+N (%)
Pout (W)
1E−3 0.01 0.1 1
1E−3
0.01
0.1
1
10
Vcc=2.6V
Vcc=3.3V
Vcc=5V
Vcc=2.2V
RL = 16
Ω
F = 20Hz
Av = 2
Cb = 1
µ
F
BW < 125kHz
Tamb = 25°C
THD+N (%)
Pout (W)
TS4984 Electrical characteristics
14/29
Figure 44: THD+N vs. output power
Figure 45: THD+N vs. output power
Figure 46: THD+N vs. output power
Figure 47: THD+N vs. output power
Figure 48: THD+N vs. output power
Figure 49: THD+N vs. output power
1E−3 0.01 0.1 1
0.01
0.1
1
10
Vcc = 3.3V
Vcc = 5V
Vcc = 2.6V
Vcc = 2.2V
RL = 4
Ω
F = 1kHz
Av = 2
Cb = 1
µ
F
BW < 125kHz
Tamb = 25°C
THD+N (%)
Pout (W)
1E−3 0.01 0.1 1
0.01
0.1
1
10
Vcc = 3.3V
Vcc = 5V
Vcc = 2.6V
Vcc = 2.2V
RL = 8Ω
F = 1kHz
Av = 2
Cb = 1µF
BW < 125kHz
Tamb = 25°C
THD+N (%)
Pout (W)
1E−3 0.01 0.1 1
0.01
0.1
1
10
Vcc = 5V
Vcc = 3.3V
Vcc = 2.6V
Vcc = 2.2V
RL = 16
Ω
F = 1kHz
Av = 2
Cb = 1
µ
F
BW < 125kHz
Tamb = 25°C
THD+N (%)
Pout (W)
1E−3 0.01 0.1 1
0.1
1
10
Vcc = 3.3V
Vcc = 5V
Vcc = 2.6V
Vcc = 2.2V
RL = 4
Ω
F = 20kHz
Av = 2
Cb = 1
µ
F
BW < 125kHz
Tamb = 25°C
THD+N (%)
Pout (W)
1E−3 0.01 0.1 1
0.1
1
10
Vcc = 3.3V
Vcc = 5V
Vcc = 2.6V
Vcc = 2.2V
RL = 8
Ω
F = 20kHz
Av = 2
Cb = 1
µ
F
BW < 125kHz
Tamb = 25°C
THD+N (%)
Pout (W)
1E−3 0.01 0.1 1
0.1
1
10
Vcc = 5V
Vcc = 3.3V
Vcc = 2.6V
Vcc = 2.2V
RL = 16
Ω
F = 20kHz
Av = 2
Cb = 1
µ
F
BW < 125kHz
Tamb = 25°C
THD+N (%)
Pout (W)
E]
Electrical characteristics TS4984
15/29
Figure 50: THD+N vs. frequency
Figure 51: THD+N vs. frequency
Figure 52: THD+N vs. frequency
Figure 53: SIgnal to noise ratio vs. power supply
with unweighted filter (20Hz to 20kHz)
Figure 54: SIgnal to noise ratio vs. pwr supply
with unweighted filter (20Hz to 20kHz)
Figure 55: SIgnal to noise ratio vs. power
supply with A weighted filter
100 1000 10000
0.01
0.1
Vcc=2.2V, Po=40mW
Vcc=5V, Po=1W
RL=4
Ω
Av=2
Cb = 1
µ
F
Bw < 125kHz
Tamb = 25
°
C
20k20
THD + N (%)
Frequency (Hz)
100 1000 10000
0.01
0.1
Vcc=2.2V, Po=70mW
Vcc=5V, Po=O.8W
RL=8
Ω
Av=2
Cb = 1
µ
F
Bw < 125kHz
Tamb = 25
°
C
20k20
THD + N (%)
Frequency (Hz)
100 1000 10000
0.01
0.1
Vcc=2.2V, Po=70mW
Vcc=5V, Po=O.5W
RL=16
Ω
Av=2
Cb = 1
µ
F
Bw < 125kHz
Tamb = 25
°
C
20k20
THD + N (%)
Frequency (Hz)
2.5 3.0 3.5 4.0 4.5 5.0
85
90
95
100
Power Supply Voltage (V)
Av = 2
Cb = 1
µ
F
THD+N < 0.7%
Tamb = 25
°
C
RL=16
Ω
RL=4
Ω
RL=8
Ω
Signal to Noise Ratio (dB)
2.5 3.0 3.5 4.0 4.5 5.0
70
75
80
85
RL=16
Ω
Av = 10
Cb = 1
µ
F
THD+N < 0.7%
Tamb = 25
°
C
RL=4
Ω
RL=8
Ω
Signal to Noise Ratio (dB)
Power Supply Voltage (V)
2.5 3.0 3.5 4.0 4.5 5.0
90
95
100
105
RL=8
Ω
RL=16
Ω
Av = 2
Cb = 1
µ
F
THD+N < 0.7%
Tamb = 25
°
C
RL=4
Ω
Signal to Noise Ratio (dB)
Power Supply Voltage (V)
TS4984 Electrical characteristics
16/29
Figure 56: SIgnal to noise ratio vs. power
supply with A weighted filter
Figure 57: Crosstalk vs. frequency
Figure 58: Crosstalk vs. frequency
Figure 59: Crosstalk vs. frequency
Figure 60: Crosstalk vs. frequency
Figure 61: Output noise voltage, device ON
2.5 3.0 3.5 4.0 4.5 5.0
80
85
90
95
RL=16
Ω
RL=8
Ω
RL=4
Ω
Av = 10
Cb = 1
µ
F
THD+N < 0.7%
Tamb = 25
°
C
Signal to Noise Ratio (dB)
Power Supply Voltage (V)
100 1000 10000
-120
-100
-80
-60
-40
-20
0
Vcc = 5V
Av = 2
Pout = 1W
RL = 8
Ω
BW < 125kHz
Tamb = 25 C
L to R R to L
Crosstalk (dB)
Frequency (Hz)
100 1000 10000
-120
-100
-80
-60
-40
-20
0
Vcc = 3.3V
Av = 2
Pout = 300mW
RL = 8
Ω
BW < 125kHz
Tamb = 25 C
L to R R to L
Crosstalk (dB)
Frequency (Hz)
100 1000 10000
-120
-100
-80
-60
-40
-20
0
Vcc = 2.6V
Av = 2
Pout = 180mW
RL = 8
Ω
BW < 125kHz
Tamb = 25 C
L to R R to L
Crosstalk (dB)
Frequency (Hz)
100 1000 10000
-120
-100
-80
-60
-40
-20
0
Vcc = 2.2V
Av = 2
Pout = 70mW
RL = 8
Ω
BW < 125kHz
Tamb = 25 C
L to R R to L
Crosstalk (dB)
Frequency (Hz)
246810
10
15
20
25
30
35
40
45
50
A Weighted Filter
Unweighted Filter
Vcc = 2.2V to 5V
Cb = 1µF
RL = 8Ω
Tamb = 25°C
Output Noise Voltage ( Vrms)
Closed Loop Gain
E]
Electrical characteristics TS4984
17/29
Figure 62: Output noise voltage, device in
standby
Figure 63: Power derating curves
246810
0.00
0.25
0.50
0.75
1.00
1.25
1.50
1.75
2.00
2.25
2.50
2.75
3.00
A Weighted Filter
Unweighted Filter
Vcc = 2.2V to 5V
Cb = 1
µ
F
RL = 8
Ω
Tamb = 25°C
Output Noise Voltage ( Vrms)
Closed Loop Gain
0 25 50 75 100 125 150
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
Mounted on 2-layer PCB
No Heat sink
Mounted on 4-layer PCB with via
QFN16 Package Power Dissipation (W)
Ambiant Temperature ( C)
4—‘F
TS4984 Application Information
18/29
4 Application Information
The TS4984 integrates two monolithic power amplifiers with a BTL (Bridge Tied Load) output type
(explained in more detail in Section 4.1). For this discussion, only the left-channel amplifier will be
referred to.
Referring to the schematic in Figure 64, we assign the following variables and values:
Vin =IN-L
Vout1 =VO-L, Vout2 =VO+R
Rin = Rin-L, Rfeed = Rfeed-L
Cfeed = Cfeed-L
4.1 BTL configuration principle
BTL (Bridge Tied Load) means that each end of the load is connected to two single-ended output
amplifiers. Thus, we have:
Single-ended output 1 = Vout1 =V
out (V),
Single-ended output 2 = Vout2 =-V
out (V), Vout1 -V
out2 =2V
out (V)
The output power is:
For the same power supply voltage, the output power in a BTL configuration is four times higher than the
output power in a single-ended configuration.
Figure 64: Typical application schematic - left channel
Rin = Rin-L
Cin = Cin-LInput L
GND
Rfeed = Rfeed-L
VCC
+
Cs
1u
RL
Cfeed = Cfeed-L
AV = -1
Vin-
Vin+
Vout 1
Vout 2
+
-
+
-
VCC1
VCC2
VO-L
VO+L
IN-L
IN+L
=
=
=
=
Bias
Bypass
Standby
TS4984
+
Cb
1u
Pout
2VoutRMS
()
2
RL
-------------------------------------=
E]
Application Information TS4984
19/29
4.2 Gain in typical application schematic
The typical application schematic (Figure 64) is shown on page 18.
In the flat region (no Cin effect), the output voltage of the first stage is:
For the second stage: Vout2 =-V
out1 (V)
The differential output voltage is:
The differential gain, referred to as Gv for greater convenience, is:
Vout2 is in phase with Vin and Vout1 is phased 180° with Vin. This means that the positive terminal of the
loudspeaker should be connected to Vout2 and the negative to Vout1.
4.3 Low and high frequency response
In the low frequency region, Cin starts to have an effect. Cin forms with Rin a high-pass filter with a -3dB
cut-off frequency:
In the high frequency region, you can limit the bandwidth by adding a capacitor (Cfeed) in parallel with
Rfeed. It forms a low-pass filter with a -3dB cut-off frequency. FCH is in Hz.
Vout1V–in
()
Rfeed
Rin
--------------- (V)=
Vout2Vout1
–2Vin
Rfeed
Rin
--------------- (V)=
Gv
Vout2Vout1
–
Vin
------------------------------------ 2
Rfeed
Rin
---------------==
FCL
1
2πRinCin
-------------------------- (Hz)=
FCH
1
2πRfeedCfeed
---------------------------------------- (Hz)=
TS4984 Application Information
20/29
The following graph (Figure 65) shows an example of Cin and Cfeed influence.
4.4 Power dissipation and efficiency
Hypotheses:
Voltage and current in the load are sinusoidal (Vout and Iout).
Supply voltage is a pure DC source (Vcc).
Regarding the load we have:
and
and
Therefore, the average current delivered by the supply voltage is:
The power delivered by the supply voltage is:
Figure 65: Frequency response gain versus Cin & Cfeed
10 100 1000 10000
-25
-20
-15
-10
-5
0
5
10
Rin = Rfeed = 22k
Ω
Tamb = 25
°
C
Cfeed = 2.2nF
Cfeed = 680pF
Cfeed = 330pF
Cin = 470nF
Cin = 82nF
Cin = 22nF
Gain (dB)
Frequency (Hz)
Vout = VPEAK sinωt (V)
Iout = Vout
RL
-------------- (A)
Pout =
VPEAK2
2RL
------------------------- (W)
ICCAVG = 2VPEAK
πRL
------------------- (A)
Psupply VCC ICCAVG
⋅=W()
E] A/ECC
Application Information TS4984
21/29
Then, the power dissipated by each amplifier is:
and the maximum value is obtained when:
and its value is:
Note: This maximum value is only depending on power supply voltage and load values.
The efficiency, η, is the ratio between the output power and the power supply:
The maximum theoretical value is reached when VPEAK =VCC, so that:
The TS4984 has two independent power amplifiers, and each amplifier produces heat due to its power
dissipation. Therefore, the maximum die temperature is the sum of the each amplifier’s maximum power
dissipation. It is calculated as follows:
Pdiss L = Power dissipation due to the left channel power amplifier.
Pdiss R = Power dissipation due to the right channel power amplifier.
Tot a l Pdiss =P
diss L +P
diss R (W)
In most cases, Pdiss L = Pdiss R, giving:
or, stated differently:
Pdiss Psupply Pout
–=W()
Pdiss
22V
CC
πRL
------------------------Pout Pout
–⋅=W()
∂Pdiss
∂Pout
--------------------- = 0
Pdissmax
2Vcc
2
π2RL
-------------=W()
η = Pout
Psupply
--------------------- = πVPEAK
4VCC
-------------------------
π
4
----- = 78.5%
Total Pdiss 2PdissL (W)=
Total Pdiss
42V
CC
πRL
------------------------P
out 2Pout
–=W()
TS4984 Application Information
22/29
4.5 Decoupling the circuit
Two capacitors are needed to correctly bypass the TS4984. A power supply bypass capacitor CS and a
bias voltage bypass capacitor CB.
CS has particular influence on the THD+N in the high frequency region (above 7 kHz) and an indirect
influence on power supply disturbances. With a value for CS of 1 µF, you can expect similar THD+N
performances to those shown in the datasheet. For example:
In the high frequency region, if CS is lower than 1 µF, it increases THD+N and disturbances on the
power supply rail are less filtered.
On the other hand, if CS is higher than 1 µF, those disturbances on the power supply rail are more
filtered.
Cb has an influence on THD+N at lower frequencies, but its function is critical to the final result of PSRR
(with input grounded and in the lower frequency region), in the following manner:
If Cb is lower than 1µF, THD+N increases at lower frequencies and PSRR worsens.
If Cb is higher than 1µF, the benefit on THD+N at lower frequencies is small, but the benefit to PSRR
is substantial.
Note that Cin has a non-negligible effect on PSRR at lower frequencies. The lower the value of Cin, the
higher the PSRR.
4.6 Wake-up time, TWU
When the standby is released to put the device ON, the bypass capacitor Cb will not be charged
immediately. As Cb is directly linked to the bias of the amplifier, the bias will not work properly until the Cb
voltage is correct. The time to reach this voltage is called wake-up time or TWU and specified in electrical
characteristics table with Cb=1µF.
If Cb has a value other than 1 µF, please refer to the graph in Figure 66 to establish the wake-up time
value.
Due to process tolerances, the maximum value of wake-up time could be establish by the graph in
Figure 67.
Note: Bypass capacitor Cb as also a tolerance of typically +/-20%. To calculate the wake-up time with this tolerance,
refer to the previous graph (considering for example for Cb= 1 µF in the range of 0.8 µF ≤1µF≤1.2 µF).
Figure 66: Typical wake-up time vs. CbFigure 67: Maximum wake-up time vs. Cb
1234
0
100
200
300
400
500
600
4.7
0.1
Tamb=25
°
C
Vcc=2.6V
Vcc=3.3V
Vcc=5V
Startup Time (ms)
Bypass Capacitor Cb ( F)
1234
0
100
200
300
400
500
600 Tamb=25
°
C
4.70.1
Vcc=5V
Vcc=3.3V
Vcc=2.6V
Max. Startup Time (ms)
Bypass Capacitor Cb ( F)
E]
Application Information TS4984
23/29
4.7 Shutdown time
When the standby command is set, the time required to put the two output stages in high impedance and
the internal circuitry in shutdown mode is a few microseconds.
Note: In shutdown mode, Bypass pin and Vin- pin are short-circuited to ground by internal switches. This allows for
the quick discharge of the Cb and Cin capacitors.
4.8 Pop performance
Pop performance is intimately linked with the size of the input capacitor Cin and the bias voltage bypass
capacitor Cb.
The size of Cin is dependent on the lower cut-off frequency and PSRR values requested. The size of Cb
is dependent on THD+N and PSRR values requested at lower frequencies.
Moreover, Cb determines the speed with which the amplifier turns ON. In order to reach near zero pop
and click, the equivalent input constant time is:
tin =(Rin+2kΩ)xC
in (s) with Rin ≥5kΩ
must not reach the τin maximum value as indicated in the graph below in Figure 68.
By following previous rules, the TS4984 can reach near zero pop and click even with high gains such as
20 dB.
Example calculation
With Rin =22kΩ and a 20 Hz, -3 db low cut-off frequency, Cin = 361 nF. So, Cin =390 nF with standard
value which gives a lower cut-off frequency equal to 18.5 Hz. In this case, (Rin +2kΩ)xCin =9.36ms.
When referring to the previous graph, if Cb=1 µF and Vcc = 5 V, we read 20 ms max. This value is twice
as high as our current value, thus we can state that pop and click will be reduced to its lowest value.
Minimizing both Cin and the gain benefits both the pop phenomena, and the cost and size of the
application.
Figure 68: τin max. versus bypass capacitor
1234
0
40
80
120
160
Vcc=5V
Vcc=3.3V
Vcc=2.6V
Tamb=25
°
C
in max. (ms)
Bypass Capacitor Cb ( F)
TS4984 Application Information
24/29
4.9 Application example: Differential-input BTL power stereo amplifier
The schematic in Figure 69 shows how to design the TS4984 to work in differential-input mode. For this
discussion, only the left-channel amplifier will be referred to.
Let:
R1R =R
2L =R
1, R2R =R
2L =R
2
CinR = CinL =C
in
The gain of the amplifier is:
In order to reach the optimal performance of the differential function, R1 and R2 should be matched at 1%
maximum.
Figure 69: Differential input amplifier configuration
Gvdif = 2 R2
R1
-------
×
R1LCinL
R2L
VCC
+
Cs
+
Cb
Neg. Input LEFT
8 Ohms
LEFT Sp eaker
8 Ohms
RIGHT Speaker
R1R
CinR
R2R
Neg. Inpu t R IGHT
StandBy
Control
R1LCinL
Pos. Input LEFT
R1R
CinR
Pos. Input RIGHT
R2L
R2R
Bias
StandBy
VCC1GND1
Bypas sL
GND2 VCC2
VO-L
VO+L
VO-R
VO+R
IN-L
IN+L
IN+R
IN-R
+
-
+
-
+
-
AV = -1
+
-
AV = -1
BypassR
TS4984
E]
Application Information TS4984
25/29
The value of the input capacitor CIN can be calculated with the following formula, using the -3dB lower
frequency required (where FL is the lower frequency required):
Note: This formula is true only if:
is 5 times lower than FL.
The following bill of materials is provided as an example of a differential amplifier with a gain of 2 and a
-3 dB lower cut-off frequency of about 80 Hz.
Table 7: Example of a bill of material
Designator Part Type
R1L = R1R 20kΩ / 1%
R2L = R2R 20kΩ / 1%
CinR = CinL 100nF
Cb=CS1µF
U1 TS4984
)F(
FR2
1
C
L1
IN π
≈
)Hz(
C)RR(2
1
F
B21
CB +π
=
WW LIV LTV 7 VJ; WW
TS4984 Application Information
26/29
4.10 Demoboard
A demoboard for the TS4984 is available.
For more information about this demoboard, please refer to Application Note AN2049, which can be
found on www.st.com.
Figure 70 shows the schematic of the demoboard. Figure 71, Figure 72 and Figure 73 show the
component locations, top layer and bottom layer respectively.
Figure 70: Demoboard schematic
1
2
12
145
16
15
Bias
3
AV = -1
Bypass L
Standby
VCC1
+
-
+
-
AV = -1
GND1
+
-
+
-
10
9
8
7
11
Bypass R
GND2 VCC2
613
VO-L
VO+L
VO-R
VO+R
IN-L
IN+L
IN+R
IN-R
U1
*
VCC
Cn1
+
C7
1u C9
100nF
Vcc
GND
1
2
3
Cn8
VCC
Cn4
Cn7
R2
R3
C2
C3
Cn2
Cn3
Neg. Inp ut L
GND
Pos. Input L
GND
Jump er J1
R6
R5
C5
C4
Cn6
Cn5
Neg. Inp ut R
GND
Pos. Input R
GND
C1
R1
C6
R8
R4
R7
+
C8
1u
Neg. O utput L
Pos. Output L
Neg. O utput R
Pos. Output R
£77 TSDZEE‘EEEVNE ,( E]
Application Information TS4984
27/29
Figure 73: Bottom layer
Figure 71: Components location Figure 72: Top layer
TS4984 Package Mechanical Data 5 Package Mechanical Data 5.1 Dimensions of QFN16 package DIMENSIONS mm REF . E . J > K . E1 , MIN. TYP. MAX. v 1 AI ‘ h I e ¢ i D * D2 *1 :x' v . . A3 ' L ‘ ' " The Exposed Pad is connected Io Ground. 5.2 Footprint recommended data +DDIDJ |:| B |:| |:| |:| Dmgfi > QDEE _.i _.i 28/29 ‘77
TS4984 Package Mechanical Data
28/29
5 Package Mechanical Data
5.1 Dimensions of QFN16 package
5.2 Footprint recommended data
* The Exposed Pad is connected to Ground.
*
* The Exposed Pad is connected to Ground.
*
DIMENSIONS
REF mm
MIN. TYP. MAX.
A
A1
A3
b
D
D2
E
E2
e
K
L
r
0.9 1.00.8
0.02 0.05
0.20
0.25 0.300.18
4.0
2.62.1
4.0
2.62.1
0.50
0.2
0.40 0.500.30
0.11
3.85
3.85
4.15
4.15
DIMENSIONS
REF mm
MIN. TYP. MAX.
A
A1
A3
b
D
D2
E
E2
e
K
L
r
0.9 1.00.8
0.02 0.05
0.20
0.25 0.300.18
4.0
2.62.1
4.0
2.62.1
0.50
0.2
0.40 0.500.30
DIMENSIONS
REF mm
MIN. TYP. MAX.
DIMENSIONS
REF mm
MIN. TYP. MAX.
A
A1
A3
b
D
D2
E
E2
e
K
L
r
0.9 1.00.8
0.02 0.05
0.20
0.25 0.300.18
4.0
2.62.1
4.0
2.62.1
0.50
0.2
0.40 0.500.30
0.11
3.85
3.85
4.15
4.15
FOOTPRINT DATA
mm
A
B
C
D
E
F
G0.22
5.0
5.0
0.5
0.35
0.45
2.70
FOOTPRINT DATA
mm
A
B
C
D
E
F
G0.22
5.0
5.0
0.5
0.35
0.45
2.70
C
B
A
E
D
F
G
C
B
A
E
D
F
G
29/29
TS4984 Revision History
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
All other names are the property of their respective owners
© 2004 STMicroelectronics - All rights reserved
STMicroelectronics group of companies
Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan -
Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America
www.st.com
6 Revision History
Date Revision Description of Changes
01 Jan 2005 1 First Release
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
All other names are the property of their respective owners
© 2005 STMicroelectronics - All rights reserved
STMicroelectronics group of companies
Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan -
Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America
www.st.com