ADR45xx Datasheet by Analog Devices Inc.

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Ultralow Noise, High Accuracy
Voltage References
Data Sheet
ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550
Rev. D Document Feedback
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FEATURES
Maximum temperature coefficient (TCVOUT):
0.8 ppm/°C (D grade 0°C to 70°C)
1 ppm/°C (C grade 0°C to 70°C)
2 ppm/°C (B grade −40°C to +125°C)
4 ppm/°C (A grade −40°C to +125°C)
Output noise (0.1 Hz to 10 Hz):
1 μV p-p at VOUT of 2.048 V typical
Initial output voltage error:
B, C, D grade: ±0.02% (maximum)
Input voltage range: 3 V to 15 V
Operating temperature:
A grade and B grade: −40°C to +125°C
C grade and D grade: 0°C to +70°C
Output current: +10 mA source/−10 mA sink
Low quiescent current: 950 μA (maximum)
Low dropout voltage: 300 mV at 2 mA (VOUT ≥ 3 V)
8-lead SOIC and LCC package
AEC-Q100 qualified for automotive applications
Long-term drift: 8 ppm typical at 4500 hours
APPLICATIONS
Precision data acquisition systems
High resolution data converters
High precision measurement devices
Industrial instrumentation
Medical devices
Automotive battery monitoring
GENERAL DESCRIPTION
The ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/
ADR4550 devices are high precision, low power, low noise
voltage references featuring ±0.02% B, C, and D grade
maximum initial error, excellent temperature stability, and low
output noise.
This family of voltage references uses an innovative core topology
to achieve high accuracy while offering industry-leading
temperature stability and noise performance. The low, thermally
induced output voltage hysteresis and low long-term output
voltage drift of the devices also improve system accuracy over
time and temperature variations.
A maximum operating current of 950 μA and a maximum low
dropout voltage of 300 mV allow the devices to function very
well in portable equipment.
The ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/
ADR4550 series of references are each provided in an 8-lead
SOIC and are available in a wide range of output voltages, all of
which are specified over the extended industrial temperature
range of −40°C to +125°C.
PIN CONFIGURATIONS
NIC 1
VIN 2
NIC 3
GND 4
DNC
8
NIC
7
VOUT
6
NIC
5
NOTES
1. NIC = NOT INTERNALLY CONNECTED.
THIS PIN IS NOT CONNECTED INTERNALLY.
2. DNC = DO NOT CONNECT. DO NOT CONNECT TO THIS PIN.
ADR4520/ADR4525/
ADR4530/ADR4533/
ADR4540/ADR4550
TOP VIEW
(Not to Scale)
10203-001
Figure 1. 8-Lead SOIC Pin Configuration
1
2
3
7
6
5
8
4
NOTES
1. NIC = NOT INTERNALLY CONNECTED.
THIS PIN IS NOT CONNECTED INTERNALLY.
2. DNC = DO NOT CONNECT. DO NOT CONNECT TO THIS PIN.
DNC
VIN
GNDFORCE N IC
VOUTSENSE
VOUTFORCE
DNC
GNDSENSE
ADR4520/ADR4525/
ADR4530/ADR4533/
ADR4540/ADR4550
10203-057
Figure 2. 8-Lead LCC Pin Configuration
The ADR4525, ADR4540, and ADR4550 are also available in D,
which are in 8 lead LCC package, and C grade with a temperature
range of 0°C to 70°C. The ADR4525W, available in an 8-lead
SOIC package, is qualified for automotive applications.
Table 1. Selection Guide
Model Output Voltage (V) Grade
ADR4520 2.048 A, B
ADR4525 2.5 A, B, C, D
ADR4525W 2.5 B
ADR4530 3.0 A, B
ADR4533 3.3 A, B
ADR4540 4.096 A, B, C, D
ADR4550 5.0 A, B, C, D
Table 2. Voltage Reference Choices from Analog Devices, Inc.
VOUT (V) Micropower Low Power Ultralow Noise
2.048 ADR3420 ADR360 ADR440
LT6656 LTC6652 LTC6655
LT6654
2.5 ADR3425 ADR361 ADR441
LT1461 LTC6652 LTC6655
LT6656 LT6654
5.0 ADR3450 ADR365 ADR445
LT1461 LTC6652 LTC6655
LT6656 LT6654
ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550 Data Sheet
Rev. D | Page 2 of 40
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ...................................................................................... 1
General Description ......................................................................... 1
Pin Configurations ........................................................................... 1
Revision History ............................................................................... 2
Specifications .................................................................................... 4
ADR4520 Electrical Characteristics ........................................... 4
ADR4525 Electrical Characteristics ........................................... 5
ADR4530 Electrical Characteristics ........................................... 6
ADR4533 Electrical Characteristics ........................................... 7
ADR4540 Electrical Characteristics ........................................... 8
ADR4550 Electrical Characteristics ........................................... 9
Absolute Maximum Ratings ......................................................... 10
Thermal Resistance .................................................................... 10
ESD Caution................................................................................ 10
Pin Configurations and Function Descriptions ......................... 11
Typical Performance Characteristics ........................................... 12
ADR4520 ..................................................................................... 12
ADR4525 ..................................................................................... 15
ADR4530 ..................................................................................... 19
ADR4533 ..................................................................................... 22
ADR4540 ..................................................................................... 25
ADR4550 ..................................................................................... 29
Terminology .................................................................................... 33
Applications Information ............................................................. 34
Basic Voltage Reference Connection ...................................... 34
Input and Output Capacitors ................................................... 34
Location of Reference in System .............................................. 34
Power Dissipation ...................................................................... 34
Sample Applications .................................................................. 34
Long-Term Drift ........................................................................ 35
Thermal Hysteresis .................................................................... 36
Humidity Sensitivity .................................................................. 37
Power Cycle Hysteresis ............................................................. 38
Outline Dimensions ....................................................................... 39
Ordering Guide .......................................................................... 39
Automotive Products ................................................................ 40
REVISION HISTORY
1/2021—Rev. C to Rev. D
Added 8-Lead LCC Package ........................................ Throughout
Changes to Features Section, General Description Section, and
Table 1 .......................................................................................................... 1
Added Figure 2; Renumbered Sequentially .......................................... 1
Changes to Table 4 ........................................................................... 5
Changes to Table 7 ........................................................................... 8
Changes to Table 8 ........................................................................... 9
Changes to Table 9 and Table 10 ................................................. 10
Added Figure 4 and Table 11; Renumbered Sequentially ........ 11
Changes to Typical Performance Characteristics Section ........ 12
Changes to Figure 110 and Figure 11 .......................................... 35
Added Figure 112 ........................................................................... 35
Changes to Figure 113 to Figure 116 ........................................... 36
Added Figure 117 ........................................................................... 36
Added Figure 118 ........................................................................... 37
Changes to Figure 120 and Figure 121 ........................................ 37
Changes to Figure 122 ................................................................... 38
Added Figure 124 ........................................................................... 38
Changes to Ordering Guide .......................................................... 38
3/2020—Rev. B to Rev. C
Added ADR4540 C Grade and ADR4550 C Grade . Throughout
Changes to Table 4 ............................................................................ 5
Changes to Table 7 ............................................................................ 8
Changes to Table 8 ............................................................................ 9
Deleted Figure 32, Renumbered Sequentially ............................ 18
Changes to Figure 39 ..................................................................... 19
Changes to Figure 52 ..................................................................... 22
Added Figure 69, Renumbered Sequentially .............................. 26
Changes to Figure 79 ..................................................................... 28
Added Figure 83 ............................................................................. 29
Updated Ordering Guide .............................................................. 41
12/2018—Rev. A to Rev. B
Changes to Features Section, Table 1, and Table 2 ...................... 1
Changes to Table 3 ............................................................................ 4
Changes to Table 4 ............................................................................ 5
Changes to Table 5 ............................................................................ 6
Changes to Table 6 ............................................................................ 7
Changes to Table 7 ............................................................................ 8
Changes to Table 8 ............................................................................ 9
Data Sheet ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550
Rev. D | Page 3 of 40
Added Electrostatic Discharge (ESD) Human Body Model
(HBM) Parameter and Moisture Sensitivity Level Rating
Parameter, Table 9 .......................................................................... 10
Changes to Thermal Resistance Section and Table 10 .............. 10
Deleted Figure 4; Renumbered Sequentially ............................... 12
Changes to Figure 15 ...................................................................... 14
Deleted Figure 17 ............................................................................ 14
Changes to Figure 16 Caption ....................................................... 15
Added Figure 17; Renumbered Sequentially ............................... 15
Deleted Figure 19 ............................................................................ 15
Changes to Figure 29 ...................................................................... 17
Deleted Figure 32 ............................................................................ 17
Deleted Figure 34 ............................................................................ 18
Changes to Figure 43 ...................................................................... 20
Deleted Figure 48 ............................................................................ 20
Deleted Figure 50 ............................................................................ 21
Changes to Figure 56 ...................................................................... 23
Deleted Figure 63 ............................................................................ 23
Deleted Figure 65 ............................................................................ 24
Changes to Figure 69 ...................................................................... 26
Deleted Figure 78 ............................................................................ 26
Deleted Figure 80 ............................................................................ 27
Changes to Figure 82 ...................................................................... 29
Deleted Figure 93 ............................................................................ 29
Changes to Terminology Section .................................................. 30
Deleted Theory of Operation Section and Long-Term Drift
Section .............................................................................................. 31
Moved Power Dissipation Section ................................................ 31
Added Long-Term Drift (LTD)Section, Figure 86, and
Figure 87 ........................................................................................... 32
Added Thermal Hysteresis Section, Figure 88, Figure 89,
Figure 90, and Figure 91 ................................................................ 33
Added Humidity Sensitivity Section, Figure 92, Figure 93, and
Figure 94 ........................................................................................... 34
Added Power Cycle Hysteresis Section and Figure 95 .............. 35
Changes to Ordering Guide .......................................................... 36
10/2017—Rev. 0 to Rev. A
Changed TP Pin to DNC Pin and NC Pin to
NIC Pin ........................................................................... Throughout
Changes to Features Section, Figure 1, and General Description
Section ................................................................................................ 1
Changes to Figure 2 and Table 11 ................................................ 10
Changes to Ordering Guide .......................................................... 32
Added Automotive Products Section .......................................... 33
4/2012—Revision 0: Initial Version
ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550 Data Sheet
Rev. D | Page 4 of 40
SPECIFICATIONS
ADR4520 ELECTRICAL CHARACTERISTICS
Unless otherwise noted, supply voltage (VIN) = 3 V to 15 V, IL = 0 mA, TA = 25°C.
Table 3.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
OUTPUT VOLTAGE VOUT 2.048 V
INITIAL OUTPUT VOLTAGE ERROR VOUT_ERR
B Grade ±0.02 %
410 μV
A Grade ±0.04 %
820 μV
SOLDER HEAT RESISTANCE SHIFT ±0.02 %
TEMPERATURE COEFFICIENT TCVOUT See Terminology section
B Grade −40°C ≤ TA ≤ +125°C (box method) 2 ppm/°C
−40°C ≤ TA ≤ +125°C (bowtie method) 4 ppm/°C
A Grade
−40°C ≤ T
A
≤ +125°C (box method)
4
ppm/°C
−40°C ≤ TA ≤ +125°C (bowtie method) 8 ppm/°C
LINE REGULATION ΔVOUT/ΔVIN −40°C ≤ TA ≤ +125°C 1 10 ppm/V
LOAD REGULATION ΔVOUT/ΔIL IL = 0 mA to +10 mA source, −40°C ≤ TA ≤
+125°C
30 80 ppm/mA
IL = 0 mA to −10 mA sink, −40°C ≤ TA ≤ +125°C 100 120 ppm/mA
QUIESCENT CURRENT IQ −40°C ≤ TA ≤ +125°C, no load 700 950 μA
DROPOUT VOLTAGE VDO −40°C ≤ TA ≤ +125°C, no load 1 V
−40°C ≤ TA ≤ +125°C, IL = 2 mA 1 V
RIPPLE REJECTION RATIO RRR Input frequency (fIN) = 1 kHz 90 dB
OUTPUT CURRENT CAPACITY IL
Sinking
−8
mA
Sourcing 10 mA
OUTPUT VOLTAGE NOISE eNp-p 0.1 Hz to 10.0 Hz 1.0 μV p-p
OUTPUT VOLTAGE NOISE DENSITY eN 1 kHz 35.8 nV/√Hz
OUTPUT VOLTAGE HYSTERESIS ΔVOUT_HYS TA = temperature cycled from
+25°C to +125°C to−40°C to +25°C (full cycle) −13 ppm
25°C to 125°C to 25°C (half cycle) −97 ppm
25°C to 70°C to 0°C to 25°C (full cycle) −8 ppm
25°C to 70°C to 25°C (half cycle) −17 ppm
LONG-TERM DRIFT ΔVOUT_LTD TA = 25°C
250 hours (early life drift) 19 ppm
1000 hours 25 ppm
4500 hours 51 ppm
TURN-ON SETTLING TIME tR Output capacitor (COUT) = 1 µF, input capacitor
(C
IN
) = 0.1 µF, load resistance (R
LOAD
) = 1 kΩ
90 µs
LOAD CAPACITANCE 1 100 µF
Data Sheet ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550
Rev. D | Page 5 of 40
ADR4525 ELECTRICAL CHARACTERISTICS
Unless otherwise noted, VIN = 3 V to 15 V, IL = 0 mA, TA = 25°C.
Table 4.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
OUTPUT VOLTAGE VOUT 2.500 V
INITIAL OUTPUT VOLTAGE ERROR VOUT_ERR
B, C, D Grade ±0.02 %
500 μV
A Grade ±0.04 %
1 mV
SOLDER HEAT RESISTANCE SHIFT
A, B, C, D Grade ±0.02 %
TEMPERATURE COEFFICIENT TCVOUT See Terminology section
D Grade 0°C ≤ TA ≤ 70°C (box method) 0.8 ppm/°C
0°C ≤ TA ≤ 70°C (bowtie method) 1.6 ppm/°C
C Grade 0°C ≤ TA ≤ 70°C (box method) 1 ppm/°C
0°C ≤ TA ≤ 70°C (bowtie method) 2 ppm/°C
B Grade −40°C ≤ TA ≤ +125°C (box method) 2 ppm/°C
−40°C ≤ TA ≤ +125°C (bowtie method) 4 ppm/°C
A Grade −40°C ≤ TA ≤ +125°C (box method) 4 ppm/°C
−40°C ≤ TA ≤ +125°C (bowtie method) 8 ppm/°C
LINE REGULATION ΔVOUT/ΔVIN −40°C ≤ TA ≤ +125°C 1 10 ppm/V
LOAD REGULATION ΔVOUT/ΔIL
A, B, C Grade IL = 0 mA to +10 mA source, −40°C ≤ TA ≤ +125°C 30 80 ppm/mA
IL = 0 mA to −10 mA sink, −40°C ≤ TA ≤ +125°C 60 120 ppm/mA
D Grade IL = 0 mA to +10 mA source, 0°C ≤ TA ≤ +70°C 35 45 ppm/mA
IL = 0 mA to −10 mA sink, 0°C ≤ TA ≤ +70°C 4 9 ppm/mA
QUIESCENT CURRENT IQ −40°C ≤ TA ≤ +125°C, no load 700 950 μA
DROPOUT VOLTAGE VDO −40°C ≤ TA ≤ +125°C, no load 500 mV
−40°C ≤ TA ≤ +125°C, IL = 2 mA 500 mV
RIPPLE REJECTION RATIO RRR fIN = 1 kHz 90 dB
OUTPUT CURRENT CAPACITY IL
Sinking −10 mA
Sourcing 10 mA
OUTPUT VOLTAGE NOISE eNp-p 0.1 Hz to 10.0 Hz 1.25 μV p-p
OUTPUT VOLTAGE NOISE
DENSITY
eN 1 kHz 41.3 nV/√Hz
OUTPUT VOLTAGE HYSTERESIS ΔVOUT_HYS TA = temperature cycled from
A, B, C Grade +25°C to +125°C to−40°C to +25°C (full cycle) −13 ppm
25°C to 125°C to 25°C (half cycle) −97 ppm
25°C to 70°C to 0°C to 25°C (full cycle) −8 ppm
25°C to 70°C to 25°C (half cycle) −17 ppm
D Grade 25°C to 70°C to 0°C to 25°C (full cycle) 1 ppm
25°C to 70°C to 25°C (half cycle) 5 ppm
LONG-TERM DRIFT ΔVOUT_LTD TA = 25°C
A, B, C Grade 250 hours (early life drift) 19 ppm
1000 hours 25 ppm
4500 hours 51 ppm
D Grade 250 hours (early life drift) 3 ppm
1000 hours 5 ppm
4500 hours 8 ppm
TURN-ON SETTLING TIME tR COUT = 1 µF, CIN = 0.1 µF, RLOAD = 1 kΩ 125 µs
LOAD CAPACITANCE 1 100 µF
ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550 Data Sheet
Rev. D | Page 6 of 40
ADR4530 ELECTRICAL CHARACTERISTICS
Unless otherwise noted, VIN = 3.1 V to 15 V, IL = 0 mA, TA = 25°C.
Table 5.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
OUTPUT VOLTAGE VOUT 3.000 V
INITIAL OUTPUT VOLTAGE ERROR VOUT_ERR
B Grade ±0.02 %
600 μV
A Grade ±0.04 %
1.2 mV
SOLDER HEAT RESISTANCE SHIFT ±0.02 %
TEMPERATURE COEFFICIENT TCVOUT See Terminology section
B Grade −40°C ≤ TA ≤ +125°C (box method) 2 ppm/°C
−40°C ≤ TA ≤ +125°C (bowtie method) 4 ppm/°C
A Grade −40°C ≤ TA ≤ +125°C (box method) 4 ppm/°C
−40°C ≤ TA ≤ +125°C (bowtie method) 8 ppm/°C
LINE REGULATION ΔVOUT/ΔVIN −40°C ≤ TA ≤ +125°C 1 10 ppm/V
LOAD REGULATION ΔVOUT/ΔIL IL = 0 mA to +10 mA source, −40°C ≤ TA ≤ +125°C 30 80 ppm/mA
IL = 0 mA to −10 mA sink, −40°C ≤ TA ≤ +125°C 60 120 ppm/mA
QUIESCENT CURRENT
I
Q
−40°C ≤ T
A
≤ +125°C, no load
700
950
μA
DROPOUT VOLTAGE VDO −40°C ≤ TA ≤ +125°C, no load 100 mV
−40°C ≤ TA ≤ +125°C, IL = 2 mA 300 mV
RIPPLE REJECTION RATIO RRR fIN = 1 kHz 90 dB
OUTPUT CURRENT CAPACITY IL
Sinking −10 mA
Sourcing 10 mA
OUTPUT VOLTAGE NOISE eNp-p 0.1 Hz to 10.0 Hz 1.6 μV p-p
OUTPUT VOLTAGE NOISE DENSITY eN 1 kHz 60 nV/√Hz
OUTPUT VOLTAGE HYSTERESIS ΔVOUT_HYS TA = temperature cycled from
+25°C to +125°C to−40°C to +25°C (full cycle) −13 ppm
25°C to 125°C to 25°C (half cycle) −97 ppm
25°C to 70°C to 0°C to 25°C (full cycle) −8 ppm
25°C to 70°C to 25°C (half cycle) −17 ppm
LONG-TERM DRIFT
ΔV
OUT_LTD
T
A
= 25°C
250 hours (early life drift) 19 ppm
1000 hours 25 ppm
4500 hours 51 ppm
TURN-ON SETTLING TIME tR COUT = 0.1 µF, CIN = 0.1 µF, RLOAD = 1 kΩ 130 µs
LOAD CAPACITANCE 0.1 100 µF
Data Sheet ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550
Rev. D | Page 7 of 40
ADR4533 ELECTRICAL CHARACTERISTICS
Unless otherwise noted, VIN = 3.4 V to 15 V, IL = 0 mA, TA = 25°C.
Table 6.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
OUTPUT VOLTAGE VOUT 3.300 V
INITIAL OUTPUT VOLTAGE ERROR VOUT_ERR
B Grade ±0.02 %
660 µV
A Grade ±0.04 %
1.32 mV
SOLDER HEAT RESISTANCE SHIFT ±0.02 %
TEMPERATURE COEFFICIENT TCVOUT See Terminology section
B Grade −40°C ≤ TA ≤ +125°C (box method) 2 ppm/°C
−40°C ≤ TA ≤ +125°C (bowtie method) 4 ppm/°C
A Grade −40°C ≤ TA ≤ +125°C (box method) 4 ppm/°C
−40°C ≤ TA ≤ +125°C (bowtie method) 8 ppm/°C
LINE REGULATION ΔVOUT/ΔVIN −40°C ≤ TA ≤ +125°C 1 10 ppm/V
LOAD REGULATION ΔVOUT/ΔIL IL = 0 mA to +10 mA source, −40°C ≤ TA ≤ +125°C 30 80 ppm/mA
IL = 0 mA to −10 mA sink, −40°C ≤ TA ≤ +125°C 60 120 ppm/mA
QUIESCENT CURRENT IQ −40°C ≤ TA ≤ +125°C, no load 700 950 μA
DROPOUT VOLTAGE VDO −40°C ≤ TA ≤ +125°C, no load 100 mV
−40°C ≤ TA ≤ +125°C, IL = 2 mA 300 mV
RIPPLE REJECTION RATIO RRR fIN =1 kHz 90 dB
OUTPUT CURRENT CAPACITY IL
Sinking −10 mA
Sourcing 10 mA
OUTPUT VOLTAGE NOISE eNp-p 0.1 Hz to 10.0 Hz 2.1 μV p-p
OUTPUT VOLTAGE NOISE DENSITY eN 1 kHz 64.2 nV/√Hz
OUTPUT VOLTAGE HYSTERESIS ΔVOUT_HYS TA = temperature cycled from
+25°C to +125°C to−40°C to +25°C (full cycle) −13 ppm
25°C to 125°C to 25°C (half cycle) −97 ppm
25°C to 70°C to 0°C to 25°C (full cycle) −8 ppm
25°C to 70°C to 25°C (half cycle) −17 ppm
LONG-TERM DRIFT
ΔV
OUT_LTD
T
A
= 25°C
250 hours (early life drift) 19 ppm
1000 hours 25 ppm
4500 hours 51 ppm
TURN-ON SETTLING TIME tR COUT = 0.1 µF, CIN = 0.1 µF, RLOAD = 1 kΩ 135 µs
LOAD CAPACITANCE 0.1 100 µF
ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550 Data Sheet
Rev. D | Page 8 of 40
ADR4540 ELECTRICAL CHARACTERISTICS
Unless otherwise noted, VIN = 4.2 V to 15 V, IL = 0 mA, TA = 25°C.
Table 7.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
OUTPUT VOLTAGE VOUT 4.096 V
INITIAL OUTPUT VOLTAGE ERROR VOUT_ERR
B, C, D Grade ±0.02 %
820 μV
A Grade ±0.04 %
1.64 mV
SOLDER HEAT RESISTANCE SHIFT
A, B, C, D Grade ±0.02 %
TEMPERATURE COEFFICIENT TCVOUT See Terminology section
D Grade 0°C ≤ TA ≤ +70°C (box method) 0.8 ppm/°C
0°C ≤ TA ≤ +70°C (bowtie method) 1.6 ppm/°C
C Grade 0°C ≤ TA ≤ +70°C (box method) 1 ppm/°C
0°C ≤ TA ≤ +70°C (bowtie method) 2 ppm/°C
B Grade −40°C ≤ TA ≤ +125°C (box method) 2 ppm/°C
−40°C ≤ TA ≤ +125°C (bowtie method) 4 ppm/°C
A Grade −40°C ≤ TA ≤ +125°C (box method) 4 ppm/°C
−40°C ≤ TA ≤ +125°C (bowtie method) 8 ppm/°C
LINE REGULATION ΔVOUT/ΔVIN −40°C ≤ TA ≤ +125°C 1 10 ppm/V
LOAD REGULATION ΔVOUT/ΔIL
A, B, C Grade IL = 0 mA to +10 mA source, −40°C ≤ TA ≤ +125°C 25 80 ppm/mA
IL = 0 mA to −10 mA sink, −40°C ≤ TA ≤ +125°C 50 120 ppm/mA
D Grade IL = 0 mA to +10 mA source, 0°C ≤ TA ≤ +70°C 15 25 ppm/mA
IL = 0 mA to −10 mA sink, 0°C ≤ TA ≤ +70°C 5 9 ppm/mA
QUIESCENT CURRENT IQ −40°C ≤ TA ≤ +125°C, no load 700 950 μA
DROPOUT VOLTAGE VDO −40°C ≤ TA ≤ +125°C, no load 100 mV
−40°C ≤ TA ≤ +125°C, IL = 2 mA 300 mV
RIPPLE REJECTION RATIO RRR fIN = 1 kHz 90 dB
OUTPUT CURRENT CAPACITY IL
Sinking −10 mA
Sourcing 10 mA
OUTPUT VOLTAGE NOISE eNp-p 0.1 Hz to 10.0 Hz 2.7 μV p-p
OUTPUT VOLTAGE NOISE DENSITY eN 1 kHz 83.5 nV/√Hz
OUTPUT VOLTAGE HYSTERESIS ΔVOUT_HYS TA = temperature cycled from
A, B, C Grade +25°C to +125°C to−40°C to +25°C (full cycle) −13 ppm
25°C to 125°C to 25°C (half cycle) −97 ppm
25°C to 70°C to 0°C to 25°C (full cycle) −8 ppm
25°C to 70°C to 25°C (half cycle) −17 ppm
D Grade 25°C to 70°C to 0°C to 25°C (full cycle) 1 ppm
25°C to 70°C to 25°C (half cycle) 5 ppm
LONG-TERM DRIFT ΔVOUT_LTD TA = 25°C
A, B, C Grade
250 hours (early life drift)
19
ppm
1000 hours 25 ppm
4500 hours 51 ppm
D Grade 250 hours (early life drift) 3 ppm
1000 hours 5 ppm
4500 hours 8 ppm
TURN-ON SETTLING TIME tR COUT = 0.1 µF, CIN = 0.1 µF, RLOAD = 1 kΩ 155 µs
LOAD CAPACITANCE 0.1 100 µF
Data Sheet ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550
Rev. D | Page 9 of 40
ADR4550 ELECTRICAL CHARACTERISTICS
Unless otherwise noted, VIN = 5.1 V to 15 V, IL = 0 mA, TA = 25°C.
Table 8.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
OUTPUT VOLTAGE VOUT 5.000 V
INITIAL OUTPUT VOLTAGE ERROR VOUT_ERR
B, C, D Grade ±0.02 %
1 mV
A Grade ±0.04 %
2 mV
SOLDER HEAT RESISTANCE SHIFT
A, B, C, D Grade ±0.02 %
TEMPERATURE COEFFICIENT TCVOUT See Terminology section
D Grade 0°C ≤ TA ≤ +70°C (box method) 0.8 ppm/°C
0°C ≤ TA ≤ +70°C (bowtie method) 1.6 ppm/°C
C Grade 0°C ≤ TA ≤ +70°C (box method) 1 ppm/°C
0°C ≤ TA ≤ +70°C (bowtie method) 2 ppm/°C
B Grade −40°C ≤ TA ≤ +125°C (box method) 2 ppm/°C
−40°C ≤ TA ≤ +125°C (bowtie method) 4 ppm/°C
A Grade −40°C ≤ TA ≤ +125°C (box method) 4 ppm/°C
−40°C ≤ TA ≤ +125°C (bowtie method) 8 ppm/°C
LINE REGULATION ΔVOUT/ΔVIN −40°C ≤ TA ≤ +125°C 1 10 ppm/V
LOAD REGULATION ΔVOUT/ΔIL
A, B, C Grade IL = 0 mA to +10 mA source, −40°C ≤ TA ≤ +125°C 25 80 ppm/mA
IL = 0 mA to −10 mA sink, −40°C ≤ TA ≤ +125°C 35 120 ppm/mA
D Grade IL = 0 mA to +10 mA source, 0°C ≤ TA ≤ +70°C 6 12 ppm/mA
IL = 0 mA to −10 mA sink, 0°C ≤ TA ≤ +70°C 4 9 ppm/mA
QUIESCENT CURRENT IQ −40°C ≤ TA ≤ +125°C, no load 700 950 μA
DROPOUT VOLTAGE VDO −40°C ≤ TA ≤ +125°C, no load 100 mV
−40°C ≤ TA ≤ +125°C, IL = 2 mA 300 mV
RIPPLE REJECTION RATIO
RRR
f
IN
= 1 kHz
90
dB
OUTPUT CURRENT CAPACITY IL
Sinking −10 mA
Sourcing 10 mA
OUTPUT VOLTAGE NOISE eNp-p 0.1 Hz to 10.0 Hz 2.8 μV p-p
OUTPUT VOLTAGE NOISE
DENSITY
eN 1 kHz 95.3 nV/√Hz
OUTPUT VOLTAGE HYSTERESIS ΔVOUT_HYS TA = temperature cycled from
A, B, C Grade +25°C to +125°C to−40°C to +25°C (full cycle) −13 ppm
25°C to 125°C to 25°C (half cycle) −97 ppm
25°C to 70°C to 0°C to 25°C (full cycle) −8 ppm
25°C to 70°C to 25°C (half cycle) −17 ppm
D Grade 25°C to 70°C to 0°C to 25°C (full cycle) 1 ppm
25°C to 70°C to 25°C (half cycle) 5 ppm
LONG-TERM DRIFT
ΔV
OUT_LTD
T
A
= 25°C
A, B, C Grade 250 hours (early life drift) 19 ppm
1000 hours 25 ppm
4500 hours 51 ppm
D Grade 250 hours (early life drift) 3 ppm
1000 hours 5 ppm
4500 hours 8 ppm
TURN-ON SETTLING TIME tR COUT = 0.1 µF, CIN = 0.1 µF, RLOAD = 1 kΩ 160 µs
LOAD CAPACITANCE 0.1 100 µF
Am ESD (elemasmic disdlarge) sensnive dewm Chavged devmes and (Hum board: (an dwschavge wIIhouI deKchon Almough nu: produu leawves patemed u! pmpnemy plmecllon (Ivcumy, damage may 0am! on dewces subleued m mgh energy ESD. Thevefme, pmpev ESD prezaunonx :thd be Iaken m mm pevlovmnnce degvadnnon m ms; of mmmmmy
ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550 Data Sheet
Rev. D | Page 10 of 40
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 9.
Parameter Rating
Supply Voltage 16 V
Operating Temperature Range −40°C to +125°C
ADR4525, ADR4540, ADR4550
C and D Grade Only
0°C to 70°C
Storage Temperature Range −65°C to +150°C
Junction Temperature Range
−65°C to +150°C
Electrostatic Discharge (ESD) Human
Body Model (HBM)
6 kV
Moisture Sensitivity Level Rating MSL-1
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the
operational section of this specification is not implied.
Operation beyond the maximum operating conditions for
extended periods may affect product reliability.
THERMAL RESISTANCE
Thermal performance is directly linked to printed circuit board
(PCB) design and operating environment. Close attention to
PCB thermal design is required.
Table 10. Thermal Resistance
Package Type θJA θJC1 Unit
8-Lead SOIC
2
1-Layer JEDEC Board N/A3 63 °C/W
2-Layer JEDEC Board 120 N/A3 °C/W
8- Lead LCC 120 N/A3 °C/W
1 For the θJC test, 100 μm thermal interface material (TIM) is used. TIM is
assumed to have 3.6 W/mK.
2 Thermal impedance simulated values are based on a JEDEC thermal test
board. See JEDEC JESD51.
3 N/A means not applicable.
ESD CAUTION
jjjj CECE
Data Sheet ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550
Rev. D | Page 11 of 40
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
NIC
1
V
IN 2
NIC
3
GND
4
DNC
8
NIC
7
V
OUT
6
NIC
5
ADR4520/ADR4525/
ADR4530/ADR4533/
ADR4540/ADR4550
TOP VIEW
(Not to Scale)
10203-002
NOTES
1. NIC = NOT INTERNALLY CONNECTED.
THIS PIN IS NOT CONNECTED INTERNALLY.
2. DNC = DO NOT CONNECT. DO NOT CONNECT TO THIS PIN.
Figure 3. 8-Lead SOIC Pin Configuration
Table 11. 8-Lead SOIC Pin Function Descriptions
Pin No. Mnemonic Description
1 NIC Not Internally Connected. This pin is not connected internally.
2 VIN Input Voltage Connection.
3 NIC Not Internally Connected. This pin is not connected internally.
4 GND Ground.
5 NIC Not Internally Connected. This pin is not connected internally.
6 VOUT Output Voltage.
7 NIC Not Internally Connected. This pin is not connected internally.
8 DNC Do Not Connect. Do not connect to this pin.
1
2
3
7
6
5
8
4
NOTES
1. NIC = NOT INTERNALLY CONNECTED.
THIS PIN IS NOT CONNECTED INTERNALLY.
2. DNC = DO NOT CONNECT. DO NOT CONNECT TO THIS PIN.
DNC
V
IN
GND
FORCE
NIC
VOUT
SENSE
VOUT
FORCE
DNC
GND
SENSE
ADR4520/ADR4525/
ADR4530/ADR4533/
ADR4540/ADR4550
10203-058
Figure 4. 8-Lead LCC Pin Configuration
Table 12. 8-Lead LCC Pin Function Descriptions
Pin No. Mnemonic Description
1 NIC Not Internally Connected. This pin is not connected internally.
2 VIN Input Voltage Connection.
3 GNDFORCE Ground connection
4 GNDSENSE Ground sensing connection. Connect directly to the ground connection of the load device
5 NIC Not Internally Connected. This pin is not connected internally.
6 VOUTSENSE Reference Voltage Output.
7 VOUTFORCE Reference Voltage Output sensing connection. Connect directly to the voltage input of the load device
8 DNC Do Not Connect. Do not connect to this pin.
VIN _. I! cm: D.IpF -F“ c m: D.IpF cm I
ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550 Data Sheet
Rev. D | Page 12 of 40
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, unless otherwise noted.
ADR4520
V
OUT
(V)
TEMPERATURE (°C)
2.0475
2.0476
2.0477
2.0478
2.0479
2.0480
2.0481
2.0482
2.0483
2.0484
2.0485 ADR4520
–50 –30 –10 10 30 50 70 90 110 130
10203-101
Figure 5. ADR4520 B Grade Output Voltage vs. Temperature
CH1 5.00V CH2 1.00V M40.0µs A CH1 9.10V
1
2
ADR4520
V
IN
(5V/DIV)
V
OUT
(1V/DIV)
C
IN
= 0.1µF
C
OUT
= 0.1µF
R
L
= 1kΩ
10203-104
Figure 6. ADR4520 Output Voltage Start-Up Response
DROPOUT VOLTAGE (V)
I
LOAD
(mA)
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
–10 –8 –6 –4 –2 0 2 4 6 8 10
–40°C
+25°C
+125°C
ADR4520
10203-106
Figure 7. ADR4520 Dropout Voltage vs. Load Current
LOAD REGULATION (ppm/mA)
TEMPERATURE (°C)
0
35
30
25
20
15
10
5
–60 –40 –20 020 40 60 80 100 120 140
ADR4520
10203-107
Figure 8. ADR4520 Load Regulation vs. Temperature (Sourcing)
LOAD REGULATION (ppm/mA)
TEMPERATURE (°C)
0
100
90
80
70
60
50
40
30
20
10
–60 –40 –20 020 40 60 80 100 120 140
ADR4520
10203-108
Figure 9. ADR4520 Load Regulation vs. Temperature (Sinking)
LINE REGULATION (ppm/V)
TEMPERATURE (°C)
ADR4520
10203-109
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
–60 –40 –20 020 40 60 80 100 120 140
Figure 10. ADR4520 Line Regulation vs. Temperature
Data Sheet ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550
Rev. D | Page 13 of 40
I
SY
(µA)
V
IN
(V)
0
1000
800
600
400
200
0 2 4 6 8 10 12 14 161357911 13 15
–40°C
+25°C
+125°C
ADR4520
10203-110
Figure 11. ADR4520 Supply Current (ISY) vs. Supply Voltage
OCCURRENCE
OUTPUT VOLTAGE NOISE DISTRIBUTION (µV p-p)
0
120
100
80
60
40
20
2.82.52.21.91.61.3
1.00.70.4
ADR4520
10203-111
Figure 12. ADR4520 Output Voltage Noise
(Maximum Amplitude from 0.1 Hz to 10 Hz)
NOISE DENSITY (nV rms/ Hz)
FREQUENCY (Hz)
1
1k
100
10
100k0.01 0.1 110 100 1k 10k
ADR4520
10203-112
Figure 13. ADR4520 Output Noise Spectral Density
RIPPLE REJECTION RATIO (dB)
FREQUENCY (Hz)
–120
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
ADR4520
C
LOAD
= 1µF
100M10 100 1k 10k 100k 1M 10M
10203-113
Figure 14. ADR4520 Ripple Rejection Ratio vs. Frequency
cm I z: 323:2. 5&3
ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550 Data Sheet
Rev. D | Page 14 of 40
CH1 1.00V CH2 1.00mV
BW
M40.0µs A CH1 7.02V
2
1
ADR4520
INPUT
OUTPUT AC
C
IN
= 0.1µF
C
OUT
= 1µF
T
T 12.0%
10203-114
Figure 15. ADR4520 Line Transient Response
OUTPUT IMPEDANCE (Ω)
FREQUENCY (Hz)
0
60
50
40
30
20
10
1M10 100 1k 10k 100k
ADR4520
RL = 100kΩ
CL = 10µF
RL = 1kΩ
CL = 10µF
RL = 1kΩ
CL = 1µF
RL = 100kΩ
CL = 1µF
10203-115
Figure 16. ADR4520 Output Impedance vs. Frequency
–0.06 –0.04 –0.02 00.02 0.04 0.06
SOLDER HEAT SHIFT (%)
0
10
20
30
40
50
60
70
80
NUMBER OF UNITS
10203-716
Figure 17. ADR4520 Solder Heat Resistance Shift (3 × Reflow)
vasv‘mw Vum nvmw»
Data Sheet ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550
Rev. D | Page 15 of 40
ADR4525
V
OUT
(V)
TEMPERATURE (°C)
2.4995
2.4996
2.4997
2.4998
2.4999
2.5000
2.5001
2.5002
2.5003
2.5004
2.5005
–50 –30 –10 10 30 50 70 90 110 130
ADR4525
10203-201
Figure 18. ADR4525 B Grade Output Voltage vs. Temperature
010 20 30 40 50 60 70
TEMPERATURE (°C)
2.49950
2.49955
2.49960
2.49965
2.49970
2.49975
2.49980
OUTPUT VOLTAGE (V)
10203-817
Figure 19. ADR4525 C Grade Output Voltage vs. Temperature
2.50010
2.49970 070
D GRADE OUTPUT VOLTAGE (V)
TEMPERATURE (°C)
2.50000
2.49995
2.49990
2.49985
2.49975
2.49980
2.50005
10 20 30 40 50 60
10203-926
Figure 20. ADR4525 D Grade Output Voltage vs. Temperature
CH1 5.00V CH2 1.00V M40.0µs A CH1 9.10V
1
2
ADR4525
V
IN
(5V/DIV)
V
OUT
(1V/DIV)
10203-204
Figure 21. ADR4525 Output Voltage Start-Up Response
DROPOUT VOLTAGE (V)
I
LOAD
(mA)
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
–15 151050–5–10
–40°C
+25°C
+125°C
ADR4525
10203-206
Figure 22. ADR4525 Dropout Voltage vs. Load Current
LOAD REGULATION (ppm/mA)
TEMPERATURE (°C)
0
35
30
25
20
15
10
5
–60 –40 –20 020 40 60 80 100 120 140
ADR4525
10203-207
Figure 23. ADR4525 Load Regulation vs. Temperature (Sourcing)
msN
ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550 Data Sheet
Rev. D | Page 16 of 40
LOAD REGULATION (ppm/mA)
TEMPERATURE (°C)
0
100
90
80
70
60
50
40
30
20
10
–60 –40 –20 020 40 60 80 100 120 140
ADR4525
10203-208
Figure 24. ADR4525 Load Regulation vs. Temperature (Sinking)
10203-209
LINE REGULATION (ppm/V)
TEMPERATURE (°C)
ADR4525
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
–60 –40 –20 020 40 60 80 100 120 140
Figure 25. ADR4525 Line Regulation vs. Temperature
I
SY
(µA)
V
IN
(V)
0
900
800
700
600
500
400
300
200
100
024 6 8 10 12 14 161357911 13 15
–40°C
+25°C
+125°C ADR4525
10203-210
Figure 26. ADR4525 Supply Current vs. Supply Voltage
OCCURRENCE
OUTPUT VOLTAGE NOISE DISTRIBUTION (µV p-p)
0
160
140
120
100
80
60
40
20
3.02.72.42.11.81.51.20.90.6
ADR4525
10203-211
Figure 27. ADR4525 Output Voltage Noise
(Maximum Amplitude from 0.1 Hz to 10 Hz)
NOISE DENSITY (nV rms/ Hz)
FREQUENCY (Hz)
1
1k
100
10
100k0.01 0.1 110 100 1k 10k
ADR4525
10203-212
Figure 28. ADR4525 Output Noise Spectral Density
RIPPLE REJECTION RATIO (dB)
FREQUENCY (Hz)
–120
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
ADR4525
100M10 100 1k 10k 100k 1M 10M
10203-213
Figure 29. ADR4525 Ripple Rejection Ratio vs. Frequency
cm I z: 323:2. 5&3
Data Sheet ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550
Rev. D | Page 17 of 40
CH1 1.00V CH2 1.00mV
BW
M200µs A CH1 4.08V
2
1
ADR4525
INPUT
OUTPUT AC
C
IN
= 0.1µF
C
OUT
= 1µF
T
T 10.0%
10203-214
Figure 30. ADR4525 Line Transient Response
IOUT
VOUT
100mV/DIV
200µs/DIV
VIN = 4V PART 1
5mA
0mA
10203-920
Figure 31. ADR4525 A, B C Grade Load Transient Response (Sinking)
OUTPUT IMPEDANCE (Ω)
FREQUENCY (Hz)
0
80
70
60
50
40
30
20
10
1M10 100 1k 10k 100k
ADR4525
RL = 100kΩ
CL = 10µF
RL = 1kΩ
CL = 10µF
RL = 1kΩ
CL = 1µF
RL = 100kΩ
CL = 1µF
10203-215
Figure 32. ADR4525 Output Impedance vs. Frequency
–0.06 –0.04 –0.02 00.02 0.04 0.06
SOLDER HEAT SHIFT (%)
0
10
20
30
40
50
60
70
80
NUMBER OF UNITS
10203-731
Figure 33. ADR4525 Solder Heat Resistance Shift (3 × Reflow)
IOUT
VOUT
100mV/DIV
200µs/DIV
VIN = 4V PART 2
0mA
–5mA
10203-919
Figure 34. ADR4525 A, B C Grade Load Transient Response (Sourcing)
40
0070
LOAD REGULATION (ppm/mA)
TEMPERATURE (°C)
V
IN
= 4V
5
10
15
20
25
30
35
10 20 30 40 50 60
SINKING
10203-923
Figure 35. ADR4525 D Grade Load Regulation vs. Temperature (Sinking)
ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550 Data Sheet
Rev. D | Page 18 of 40
IOUT
VOUT
100mV/DIV
200µs/DIV
VIN = 4V PART 1
5mA
0mA
10203-917
Figure 36. ADR4525 D Grade Load Transient Response (Sinking)
40
0070
LOAD REGULATION (ppm/mA)
TEMPERATURE (°C)
V
IN
= 4V
5
10
15
20
25
30
35
10 20 30 40 50 60
SOURCING
10203-918
Figure 37. ADR4525 D Grade Load Regulation vs. Temperature (Sourcing)
IOUT
VOUT
100mV/DIV
200µs/DIV
VIN = 4V PART 1
0mA
–5mA
10203-916
Figure 38. ADR4525 D Grade Load Transient Response (Sourcing)
Data Sheet ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550
Rev. D | Page 19 of 40
ADR4530
V
OUT
(V)
TEMPERATURE (°C)
–50 –30 –10 10 30 50 70 90 110 130
ADR4530
10203-301
2.9995
2.9996
2.9997
2.9998
2.9999
3.0000
3.0001
3.0002
3.0003
3.0004
3.0005
Figure 39. ADR4530 B Grade Output Voltage vs. Temperature
CH1 5.00V CH2 1.00V M40.0µs A CH1 3.10V
1
2
ADR4530
V
IN
(5V/DIV)
V
OUT
(1V/DIV)
10203-304
C
IN
= 0.1µF
C
OUT
= 0.1µF
R
L
= 1kΩ
Figure 40. ADR4530 Output Voltage Start-Up Response
DROPOUT VOLTAGE (V)
I
LOAD
(mA)
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
–15 151050–5–10
–40°C
+25°C
+125°C
ADR4530
10203-306
Figure 41. ADR4530 Dropout Voltage vs. Load Current
LOAD REGULATION (ppm/mA)
TEMPERATURE (°C)
0
35
30
25
20
15
10
5
–60 –40 –20 020 40 60 80 100 120 140
ADR4530
10203-307
Figure 42. ADR4530 Load Regulation vs. Temperature (Sourcing)
LOAD REGULATION (ppm/mA)
TEMPERATURE (°C)
0
100
90
80
70
60
50
40
30
20
10
–60 –40 –20 020 40 60 80 100 120 140
ADR4530
10203-308
Figure 43. ADR4530 Load Regulation vs. Temperature (Sinking)
10203-309
LINE REGULATION (ppm/V)
TEMPERATURE (°C)
ADR4530
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
–60 –40 –20 020 40 60 80 100 120 140
Figure 44. ADR4530 Line Regulation vs. Temperature
ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550 Data Sheet
Rev. D | Page 20 of 40
I
SY
(µA)
V
IN
(V)
0
900
800
700
600
500
400
300
200
100
0246810 12 131357911
–40°C
+25°C
+125°C
ADR4530
10203-310
Figure 45. ADR4530 Supply Current vs. Supply Voltage
OCCURRENCE
OUTPUT VOLTAGE NOISE DISTRIBUTION (µV p-p)
0
100
90
80
70
60
50
40
30
20
10
ADR4530
1.1
1.3
1.5
1.7
1.9
2.1
2.3
2.5
2.7
2.9
10203-311
Figure 46. ADR4530 Output Voltage Noise
(Maximum Amplitude from 0.1 Hz to 10 Hz)
NOISE DENSITY (nV rms/ Hz)
FREQUENCY (Hz)
1
1k
100
10
100k
0.01 0.1 110 100 1k 10k
ADR4530
10203-312
Figure 47. ADR4530 Output Noise Spectral Density
RIPPLE REJECTION RATIO (dB)
FREQUENCY (Hz)
–120
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
100M
110 100 1k 10k 100k 1M 10M
10203-313
ADR4530
Figure 48. ADR4530 Ripple Rejection Ratio vs. Frequency
cm 1 JL'L—r" .8 325E; 5.50
Data Sheet ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550
Rev. D | Page 21 of 40
CH1 1.00V CH2 1.00mV
BW
M200µs A CH1 7.02V
2
1
ADR4530
INPUT
OUTPUT AC
C
IN
= 0.1µF
C
OUT
= 1µF
T
T 10.0%
10203-314
Figure 49. ADR4530 Line Transient Response
OUTPUT IMPEDANCE (Ω)
FREQUENCY (Hz)
0
60
50
40
30
20
10
ADR4530
R
L
= 100kΩ
C
L
= 10µF
R
L
= 1kΩ
C
L
= 10µF R
L
= 1kΩ
C
L
= 1µF
R
L
= 100kΩ
C
L
= 1µF
10M1M110 100 1k 10k 100k
10203-315
Figure 50. ADR4530 Output Impedance vs. Frequency
–0.06 –0.04 –0.02 00.02 0.04 0.06
SOLDER HEAT SHIFT (%)
0
10
20
30
40
50
60
70
80
NUMBER OF UNITS
10203-747
Figure 51. ADR4530 Solder Heat Resistance Shift (3 × Reflow)
:amo cm I /r
ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550 Data Sheet
Rev. D | Page 22 of 40
ADR4533
V
OUT
(V)
TEMPERATURE (°C)
–50 –30 –10 10 30 50 70 90 110 130
ADR4533
10203-401
3.2990
3.2992
3.2994
3.2996
3.2998
3.3000
3.3002
3.3004
3.3006
3.3008
3.3010
Figure 52. ADR4533 B Grade Output Voltage vs. Temperature
CH1 5.00V CH2 1.00V M40.0µs A CH1 3.10V
1
2
ADR4533
V
IN
(5V/DIV)
V
OUT
(1V/DIV)
C
IN
= 0.1µF
C
OUT
= 0.1µF
R
L
= 1kΩ
10203-404
Figure 53. ADR4533 Output Voltage Start-Up Response
DROPOUT VOLTAGE (V)
I
LOAD
(mA)
0
0.2
0.4
0.6
0.8
1.0
–15 151050–5–10
–40°C
+25°C
+125°C
ADR4533
10203-406
Figure 54. ADR4533 Dropout Voltage vs. Load Current
LOAD REGULATION (ppm/mA)
TEMPERATURE (°C)
0
35
30
25
20
15
10
5
–60 –40 –20 020 40 60 80 100 120 140
ADR4533
10203-407
Figure 55. ADR4533 Load Regulation vs. Temperature (Sourcing)
LOAD REGULATION (ppm/mA)
TEMPERATURE (°C)
0
100
90
80
70
60
50
40
30
20
10
–60 –40 –20 020 40 60 80 100 120 140
ADR4533
10203-408
Figure 56. ADR4533 Load Regulation vs. Temperature (Sinking)
10203-409
LINE REGULATION (ppm/V)
TEMPERATURE (°C)
ADR4533
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
–60 –40 –20 020 40 60 80 100 120 140
Figure 57. ADR4533 Line Regulation vs. Temperature
Data Sheet ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550
Rev. D | Page 23 of 40
I
SY
(µA)
V
IN
(V)
0
900
800
700
600
500
400
300
200
100
0246810 12 161514131357911
–40°C
+25°C
+125°C
ADR4533
10203-410
Figure 58. ADR4533 Supply Current vs. Supply Voltage
OCCURRENCE
OUTPUT VOLTAGE NOISE DISTRIBUTION (µV p-p)
0
60
50
40
30
20
10
ADR4533
BIN
1.6
1.8
2.0
2.2
2.4
2.6
2.8
3.0
3.2
3.4
10203-411
Figure 59. ADR4533 Output Voltage Noise
(Maximum Amplitude from 0.1 Hz to 10 Hz)
NOISE DENSITY (nV rms/ Hz)
FREQUENCY (Hz)
1
1k
100
10
100k
0.01 0.1 110 100 1k 10k
ADR4533
10203-412
Figure 60. ADR4533 Output Noise Spectral Density
RIPPLE REJECTION RATIO (dB)
FREQUENCY (kHz)
–130
–120
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
100M10 100 1k 10k 100k 1M 10M
ADR4533
10203-413
Figure 61. ADR4533 Ripple Rejection Ratio vs. Frequency
omPuT IMPEDANCE (n) cm I
ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550 Data Sheet
Rev. D | Page 24 of 40
CH1 1.00V CH2 1.00mV
BW
M200µs A CH1 7.02V
2
1
ADR4533
INPUT
OUTPUT AC
C
IN
= 0.1µF
C
OUT
= 1µF
T
T 12.0%
10203-414
Figure 62. ADR4533 Line Transient Response
OUTPUT IMPEDANCE (Ω)
FREQUENCY (Hz)
0
60
50
40
30
20
10
ADR4533
R
L
= 100kΩ
C
L
= 10µF
R
L
= 1kΩ
C
L
= 10µF
R
L
= 1kΩ
C
L
= 1µF
R
L
= 100kΩ
C
L
= 1µF
10M1M
110 100 1k 10k 100k
10203-415
Figure 63. ADR4533 Output Impedance vs. Frequency
–0.06 –0.04 –0.02 00.02 0.04 0.06
SOLDER HEAT SHIFT (%)
0
10
20
30
40
50
60
70
80
NUMBER OF UNITS
10203-762
Figure 64. ADR4533 Solder Heat Resistance Shift (3 × Reflow)
cm I
Data Sheet ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550
Rev. D | Page 25 of 40
ADR4540
V
OUT
(V)
TEMPERATURE (°C)
–50 –30 –10 10 30 50 70 90 110 130
ADR4540
10203-501
4.0950
4.0955
4.0960
4.0965
4.0970
Figure 65. ADR4540 B Grade Output Voltage vs. Temperature
OUTPUT VOLTAGE (V)
TEMPERATURE (°C)
010 20 30 40 50 60 70
10203-901
4.09555
4.09550
4.09545
4.09540
4.09535
V
SY
= 7V
Figure 66. ADR4540 C Grade Output Voltage vs. Temperature
VOUT REFERENCE (V)
TEMPERATURE (°C)
010 20 30 40 50 60 70
4.09560
4.09610
4.09605
4.09600
4.09595
4.09590
4.09585
4.09580
4.09575
4.09565
4.09570
10203-924
Figure 67. ADR4540 D Grade Output Voltage vs. Temperature
CH1 5.00V CH2 1.00V M40.0µs A CH1 3.10V
1
2
ADR4540
V
IN
(5V/DIV)
V
OUT
(1V/DIV)
C
IN
= 0.1µF
C
OUT
= 0.1µF
R
L
= 1kΩ
10203-504
Figure 68. ADR4540 Output Voltage Start-Up Response
DROPOUT VOLTAGE (V)
I
LOAD
(mA)
0
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
–15 151050–5–10
–40°C
+25°C
+125°C
ADR4540
10203-506
Figure 69. ADR4540 Dropout Voltage vs. Load Current
LOAD REGULATION (ppm/mA)
TEMPERATURE (°C)
0
35
30
25
20
15
10
5
–60 –40 –20 020 40 60 80 100 120 140
ADR4540
10203-507
Figure 70. ADR4540 Load Regulation vs. Temperature (Sourcing)
rmsV
ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550 Data Sheet
Rev. D | Page 26 of 40
LOAD REGULATION (ppm/mA)
TEMPERATURE (°C)
0
100
90
80
70
60
50
40
30
20
10
–60 –40 –20 020 40 60 80 100 120 140
ADR4540
10203-508
Figure 71. ADR4540 Load Regulation vs. Temperature (Sinking)
10203-509
LINE REGULATION (ppm/V)
TEMPERATURE (°C)
ADR4540
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
–60 –40 –20 020 40 60 80 100 120 140
Figure 72. ADR4540 Line Regulation vs. Temperature
I
SY
(µA)
V
IN
(V)
0
900
800
700
600
500
400
300
200
100
0246810 12 161514131357911
–40°C
+25°C
+125°C
ADR4540
10203-510
Figure 73. ADR4540 Supply Current vs. Supply Voltage
OCCURRENCE
OUTPUT VOLTAGE NOISE DISTRIBUTION (µV p-p)
0
70
60
50
40
30
20
10
ADR4540
BIN
2.1
2.3
2.5
2.7
2.9
3.1
3.3
3.5
3.7
3.9
10203-511
Figure 74. ADR4540 Output Voltage Noise
(Maximum Amplitude from 0.1 Hz to 10 Hz)
NOISE DENSITY (nV rms/ Hz)
FREQUENCY (Hz)
1
1k
100
10
100k0.01 0.1 110 100 1k 10k
ADR4540
10203-512
Figure 75. ADR4540 Output Noise Spectral Density
Data Sheet ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550
Rev. D | Page 27 of 40
RIPPLE REJECTION RATIO (dB)
FREQUENCY (Hz)
–120
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
100M10 100 1k 10k 100k 1M 10M
ADR4540
10203-513
Figure 76. ADR4540 Ripple Rejection Ratio vs. Frequency
CH1 1.00V CH2 1.00mV
BW
M200µs A CH1 7.02V
2
1
ADR4540
INPUT
OUTPUT AC
C
IN
= 0.1µF
C
OUT
= 1µF
T
T 12.0%
10203-514
Figure 77. ADR4540 Line Transient Response
IOUT
VOUT
100mV/DIV
200µs/DIV
VIN = 5.6V PART 3
5mA
0mA
10203-914
Figure 78. ADR4540 A, B, C Grade Load Transient Response (Sinking)
OUTPUT IMPEDANCE (Ω)
FREQUENCY (Hz)
0
60
50
40
30
20
10
10M1M110 100 1k 10k 100k
ADR4540
R
L
= 100kΩ
C
L
= 10µF
R
L
= 1kΩ
C
L
= 10µF R
L
= 1kΩ
C
L
= 1µF
R
L
= 100kΩ
C
L
= 1µF
10203-515
Figure 79. ADR4540 Output Impedance vs. Frequency
–0.06 –0.04 –0.02 00.02 0.04 0.06
SOLDER HEAT SHIFT (%)
0
10
20
30
40
50
60
70
80
NUMBER OF UNITS
10203-777
Figure 80. ADR4540 Solder Heat Resistance Shift (3 × Reflow)
IOUT
VOUT
100mV/DIV
200µs/DIV
VIN = 5.6V PART 1
0mA
–5mA
10203-913
Figure 81. ADR4540 A, B, C Grade Load Transient Response (Sourcing)
ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550 Data Sheet
Rev. D | Page 28 of 40
6.0
0070
LOAD REGULATION (ppm/mA)
TEMPERATURE (°C)
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
10 20 30 40 50 60
V
IN
= 5.6V SOURCING
10203-912
Figure 82. ADR4540 D Grade Load Regulation vs. Temperature (Sinking)
I
OUT
V
OUT
100mV/DIV
200µs/DIV
V
IN
= 4V PART 1
5mA
0mA
10203-917
Figure 83. ADR4540 D Grade Load Transient Response (Sinking)
15
0070
LOAD REGULATION (ppm/mA)
TEMPERATURE (°C)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
10 20 30 40 50 60
V
IN
= 5.6V SOURCING
10203-911
Figure 84. ADR4540 D Grade Load Regulation vs. Temperature (Sourcing)
IOUT
VOUT
100mV/DIV
200µs/DIV
VIN = 5.6V PART 1
0mA
–5mA
10203-909
Figure 85. ADR4540 D Grade Load Transient Response (Sourcing)
5m :2 Vm v0." (erIv) cm I
Data Sheet ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550
Rev. D | Page 29 of 40
ADR4550
V
OUT
(V)
TEMPERATURE (°C)
–50 –30 –10 10 30 50 70 90 110 130
ADR4550
10203-601
4.9990
4.9995
5.0000
5.0005
5.0010
Figure 86. ADR4550 B Grade Output Voltage vs. Temperature
OUTPUT VOLTAGE (V)
TEMPERATURE (°C)
10203-902
4.99920
4.99915
4.99910
4.99905
4.99900
V
SY
= 7V
010 20 30 40 50 60 70
Figure 87. ADR4550 C Grade Output Voltage vs. Temperature
VOUT REFERENCE (V)
TEMPERATURE (°C)
010 20 30 40 50 60 70
4.99930
4.09680
4.09675
4.09670
4.09565
4.09560
4.99955
4.99950
4.99945
4.99935
4.99940
10203-924
Figure 88. ADR4550 D Grade Output Voltage vs. Temperature
CH1 5.00V CH2 1.00V M40.0µs A CH1 9.10V
1
2
ADR4550
V
IN
(5V/DIV)
V
OUT
(1V/DIV)
10203-604
Figure 89. ADR4550 Output Voltage Start-Up Response
DROPOUT VOLTAGE (V)
I
LOAD
(mA)
0
0.7
0.6
0.5
0.4
0.3
0.2
0.1
–15 15
1050–5
–10
–40°C
+25°C
+125°C
ADR4550
10203-606
Figure 90. ADR4550 Dropout Voltage vs. Load Current
LOAD REGULATION (ppm/mA)
TEMPERATURE (°C)
0
35
30
25
20
15
10
5
–60 –40 –20 020 40 60 80 100 120 140
ADR4550
10203-607
Figure 91. ADR4550 Load Regulation vs. Temperature (Sourcing)
ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550 Data Sheet
Rev. D | Page 30 of 40
LOAD REGULATION (ppm/mA)
TEMPERATURE (°C)
0
100
90
80
70
60
50
40
30
20
10
–60 –40 –20 020 40 60 80 100 120 140
ADR4550
10203-608
Figure 92. ADR4550 Load Regulation vs. Temperature (Sinking)
10203-609
LINE REGULATION (ppm/V)
TEMPERATURE (°C)
ADR4550
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
–50 050 100 150
Figure 93. ADR4550 Line Regulation vs. Temperature
I
SY
(µA)
V
IN
(V)
0
900
800
700
600
500
400
300
200
100
0 2 4 6 8 10 12 161514131357 9 11
–40°C
+25°C
+125°C
ADR4550
10203-610
Figure 94. ADR4550 Supply Current vs. Supply Voltage
OCCURRENCE
OUTPUT VOLTAGE NOISE DISTRIBUTION (µV p-p)
0
9
8
7
6
5
4
3
2
1
3.73.53.33.12.92.72.52.32.11.9
10203-611
ADR4550
Figure 95. ADR4550 Output Voltage Noise
(Maximum Amplitude from 0.1 Hz to 10 Hz)
NOISE DENSITY (nV rms/ Hz)
FREQUENCY (Hz)
1
1k
100
10
100k0.01 0.1 110 100 1k 10k
10203-612
ADR4550
Figure 96. ADR4550 Output Noise Spectral Density
Data Sheet ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550
Rev. D | Page 31 of 40
RIPPLE REJECTION RATIO (dB)
FREQUENCY (Hz)
–120
0
–20
–40
–60
–80
–100
100M
10 100 1k 10k 100k 1M 10M
10203-613
ADR4550
Figure 97. ADR4550 Ripple Rejection Ratio vs. Frequency
CH1 1.00V CH2 1.00mV
BW
M200µs A CH1 7.02V
2
1
ADR4550
INPUT
OUTPUT AC
C
IN
= 0.1µF
C
OUT
= 1µF
T
T 12.0%
10203-614
Figure 98. ADR4550 Line Transient Response
IOUT
VOUT
100mV/DIV
200µs/DIV
VIN = 6.5V PART 3
5mA
0mA
10203-908
Figure 99. ADR4550 A, B, C Grade Load Transient Response (Sinking)
OUTPUT IMPEDANCE (Ω)
FREQUENCY (Hz)
0
140
100
120
80
60
40
20
1M10 100 1k 10k 100k
ADR4550
RL = 100kΩ
CL = 1µF
RL = 1kΩ
CL = 1µF
RL = 1kΩ
CL = 0.1µF
RL = 100kΩ
CL = 0.1µF
10203-615
Figure 100. ADR4550 Output Impedance vs. Frequency
–0.06 –0.04 –0.02 00.02 0.04 0.06
SOLDER HEAT SHIFT (%)
0
10
20
30
40
50
60
70
80
NUMBER OF UNITS
10203-792
Figure 101. ADR4550 Solder Heat Resistance Shift (3 × Reflow)
I
OUT
V
OUT
100mV/DIV
200µs/DIV
V
IN
= 6.5V PART 3
0mA
–5mA
10203-907
Figure 102. ADR4550 A, B, C Grade Load Transient Response (Sourcing)
ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550 Data Sheet
Rev. D | Page 32 of 40
4.0
0070
LOAD REGULATION (ppm/mA)
TEMPERATURE (°C)
V
IN
= 6.5V SINKING
0.5
1.0
1.5
2.0
2.5
3.0
3.5
10 20 30 40 50 60
10203-906
Figure 103. ADR4550 D Grade Load Regulation (Sinking)
IOUT
VOUT
100mV/DIV
200µs/DIV
VIN = 6.5V PART 1
5mA
0mA
10203-904
Figure 104. ADR4550 D Grade Load Transient Response (Sinking)
5.0
0070
LOAD REGULATION (ppm/mA)
TEMPERATURE (°C)
V
IN
= 6.5V SOURCING
10 20 30 40 50 60
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
10203-905
Figure 105. ADR4550 D Grade Load Regulation (Sourcing)
IOUT
VOUT
100mV/DIV
200µs/DIV
VIN = 6.5V PART 2
0mA
–5mA
10203-903
Figure 106. ADR4550 D Grade Load Transient Response (Sourcing)
Data Sheet ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550
Rev. D | Page 33 of 40
TERMINOLOGY
Dropout Voltage (VDO)
Dropout voltage, sometimes referred to as supply voltage head-
room or supply output voltage differential, is defined as the
minimum voltage differential between the input and output such
that the output voltage is maintained to within 0.1% accuracy.
VDO = (VIN − VOUT)min|IL = constant
Because the dropout voltage depends on the current passing
through the device, it is always specified for a given load current.
In series mode devices, the dropout voltage typically increases
proportionally to the load current (see Figure 7, Figure 22,
Figure 41, Figure 54, Figure 69, and Figure 90).
Line Regulation
Line regulation refers to the change in output voltage in response
to a given change in input voltage and is expressed in percent
per volt, ppm per volt, or μV per volt change in input voltage.
This parameter accounts for the effects of self heating.
Load Regulation
Load regulation refers to the change in output voltage in response
to a given change in load current and is expressed in μV per mA,
ppm per mA, or ohms of dc output resistance. This parameter
accounts for the effects of self heating.
Solder Heat Resistance (SHR) Shift
SHR shift refers to the permanent shift in output voltage that is
induced by exposure to reflow soldering and is expressed as a
percentage of the output voltage. This shift is caused by changes
in the stress exhibited on the die by the package materials when
these materials are exposed to high temperatures. This effect is
more pronounced in lead-free soldering processes due to higher
reflow temperatures. SHR is calculated after three solder reflow
cycles to simulate the worst case conditions when assembling a
two-sided PCB with surface mount components with one addi-
tional rework cycle. The reflow cycles use the JEDEC standard
reflow temperature profile.
Temperature Coefficient (TCVOUT)
The temperature coefficient relates the change in the output
voltage to the change in the ambient temperature of the device, as
normalized by the output voltage at 25°C. The TCVOUT for the
ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550
A grade and B grade is fully tested over three temperatures:
−40°C, +25°C, and +125°C. The TCVOUT for the C grade and D
grade is fully tested over three temperatures: 0°C, +25°C, and
+70°C. This parameter is specified using two methods. The box
method is the most common method and accounts for the
temperature coefficient over the full temperature range,
whereas the bowtie method calculates the worst case slope from
+25°C and is therefore more useful for systems which are
calibrated at +25°C.
Box Method
The box method is represented by the following equation:
6
10
)(
)(
)}
,,({)},,({ ×
−×
−
=
132
OUT
321
OUT
321
OUT
OUT
TTTV
TTTVminTTTVmax
TCV
where:
TCVOUT is expressed in ppm/°C.
VOUT(TX) is the output voltage at Temperature TX.
T1 = −40°C.
T2 = +25°C.
T3 = +125°C.
This box method ensures that TCVOUT accurately portrays the
maximum difference between any of the three temperatures at
which the output voltage of the device is measured.
Bowtie Method
The bowtie method is represented by the following equation:
TCVOUT = |max{TCVOUT1, TCVOUT2}|
where:
6
23
32
32
2
6
2
1
10
)()(
)},({)},({
10
)()(
)},({)},({
×
−×
−
=
×
−×
−
=
TTTV
TTVminTTVmax
TCV
TTTV
TTVminTTVmax
TCV
2OUT
OUTOUT
OUT
12OUT
21OUT21OUT
OUT
TCVOUT is expressed in ppm/°C.
VOUT(TX) is the output voltage at Temperature TX.
T1 = 0°C.
T2 = +25°C.
T3 = +70°C.
Thermally Induced Output Voltage Hysteresis (ΔVOUT_HYS)
Thermally induced output voltage hysteresis represents the
change in the output voltage after the device is exposed to a
specified temperature cycle. This is expressed as a difference in
ppm from the nominal output.
6
_
10 [ppm]
OUT1_25°C OUT2_25°C
OUT HYS
OUT_25°C
VV
VV
−
∆= ×
where:
VOUT1_25°C is the output voltage at 25°C.
VOUT2_25°C is the output voltage after temperature cycling.
Long-Term Stability (ΔVOUT_LTD)
Long-term stability refers to the shift in the output voltage versus
time. This is expressed as a difference in ppm from the nominal
output.
6
_
10
)(
)()( ×
−
=∆
0
OUT
0
OUT
1
OUT
LTDOUT
tV
tVtV
V
[ppm]
where:
VOUT(t0) is the VOUT at the starting time of the measurement.
VOUT(t1) is the VOUT at the end time of the measurement.
ELY}
ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550 Data Sheet
Rev. D | Page 34 of 40
APPLICATIONS INFORMATION
BASIC VOLTAGE REFERENCE CONNECTION
The circuit shown in Figure 107 shows the basic configuration
for the ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/
ADR4550 family of voltage references.
10203-054
V
IN
GND
V
REF
BAND GAP
Figure 107. ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550
Simplified Schematic
INPUT AND OUTPUT CAPACITORS
Input Capacitors
A 1 μF to 10 μF electrolytic or ceramic capacitor can be connected
to the input to improve transient response in applications
where the supply voltage may fluctuate. It is recommended to
connect an additional 0.1 μF ceramic capacitor in parallel to
reduce supply noise.
Output Capacitors
An output capacitor is required for stability and to filter out
low level voltage noise. The minimum value of the output
capacitor (COUT) is shown in Table 13.
Table 13. Minimum COUT Value
Part Number Minimum COUT Value
ADR4520, ADR4525 1.0 µF
ADR4530, ADR4533,
ADR4540, ADR4550
0.1 µF
An additional 1 μF to 10 μF electrolytic or ceramic capacitor can be
added in parallel to improve transient performance in response
to sudden changes in load current; however, doing so increases the
turn-on time of the device.
LOCATION OF REFERENCE IN SYSTEM
It is recommended to place the ADR4520/ADR4525/ADR4530/
ADR4533/ADR4540/ADR4550 reference as close to the load as
possible to minimize the length of the output traces and, therefore,
the error introduced by the voltage drop. Current flowing through
a PCB trace produces a voltage drop; with longer traces, this
drop can reach several millivolts or more, introducing considerable
error into the output voltage of the reference. A 1-inch long, 5 mm
wide trace of 1-ounce copper has a resistance of approximately
100 mΩ at room temperature; at a load current of 10 mA, this
resistance can introduce a full millivolt of error.
POWER DISSIPATION
The ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/
ADR4550 voltage references are capable of sourcing and sinking
up to 10 mA of load current at room temperature across the
rated input voltage range. However, when used in applications
subject to high ambient temperatures, the input voltage and
load current must be monitored carefully to ensure that the
device does not exceeded its maximum power dissipation rating.
The maximum power dissipation of the device can be calculated
using the following equation:
JA
A
J
D
TT
Pθ
−
=
where:
PD is the device power dissipation.
TJ is the device junction temperature.
TA is the ambient temperature.
θJA is the package (junction to air) thermal resistance.
This relationship can cause acceptable load current in high
temperature conditions to be less than the maximum current
sourcing capability of the device. Do not operate the device
outside of its maximum power rating, because doing so can
result in premature failure or permanent damage to the device.
SAMPLE APPLICATIONS
Bipolar Output Reference
Figure 108 shows a bipolar reference configuration. By connecting
the output of the ADR4550 to the inverting terminal of an
operational amplifier, it is possible to obtain both positive and
negative reference voltages. R1 and R2 must be matched as closely
as possible to ensure minimal difference between the negative
and positive outputs. Resistors with low temperature
coefficients must also be used if the circuit is deployed in
environments with large temperature swings; otherwise, a voltage
difference develops between the two outputs as the ambient
temperature changes.
VIN
+15V
–15V
–5V
+5V
ADA4000-1
0.1µF1µF 0.1µF
R1
10kΩ
R2
10kΩ
R3
5kΩ
ADR4550
VIN VOUT
GND
2 6
4
10203-055
Figure 108. ADR4550 Bipolar Output Reference
Jg
Data Sheet ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550
Rev. D | Page 35 of 40
Boosted Output Current Reference
Figure 109 shows a configuration for obtaining higher current
drive capability from the ADR4520/ADR4525/ADR4530/
ADR4533/ADR4540/ADR4550 references without sacrificing
accuracy. The op amp regulates the current flow through the
metal-oxide semiconductor field effect transistor (MOSFET)
until VOUT equals the output voltage of the reference; current is
then drawn directly from VIN instead of from the reference
itself, allowing increased current drive capability.
10203-056
C
L
C
L
0.1µF
2N7002
AD8663
V
IN
U6
V
OUT
+16V
0.1µF1µF
R1
100Ω
R
L
200Ω
ADR4520/ADR4525/
ADR4530/ADR4533/
ADR4540/ADR4550
V
IN
V
OUT
GND
2 6
4
PART
NUMBER MINIMUM
C
L
ADR4520,
ADR4525 1.0µF
ADR4530,
ADR4533,
ADR4540,
ADR4550
0.1µF
Figure 109. Boosted Output Current Reference
Because the current sourcing capability of this circuit depends only
on the current rating of the MOSFET, the output drive
capability can be adjusted to the application simply by choosing
an appropriate MOSFET. In all cases, tie the VOUT pin directly to
the load device to maintain maximum output voltage accuracy.
LONG-TERM DRIFT
The stability of a precision signal path over its lifetime or between
calibration procedures is dependent on the long-term stability
of the analog components in the path, such as op amps, references,
and data converters. To help system designers predict the long-
term drift of circuits that use the ADR4520/ADR4525/ADR4530/
ADR4533/ADR4540/ADR4550, Analog Devices measured the
output voltage of multiple units for more than 4500 hours (more
than 6 months) using a high precision measurement system,
including an ultrastable oil bath. To replicate real-world system
performance, the devices under test (DUTs) were soldered onto
an FR4 PCB using a standard reflow profile (as defined in the
JEDEC J-STD-020D standard), rather than testing them in
sockets. This manner of testing is important because expansion
and contraction of the PCB can apply stress to the integrated
circuit (IC) package and contribute to shifts in the offset voltage.
Figure 110 shows the long-term drift of the ADR4520/
ADR4525/ADR4530/ADR4533/ADR4540/ADR4550. Sample 1,
Sample 2, and Sample 3 plot traces show sample units. The
mean drift after 4500 hours is 51 ppm. Note that the early life
drift (0 hours to 250 hours) accounts for 40% of the total drift
observed over 4500 hours, as shown in Figure 111. The first
1000 hours account for 50% of the total drift, and the remaining
3500 hours account for the remaining 50% of the drift. Thus, the
early life drift is the dominant contributor, whereas the drift
after 1000 hours is significantly lower.
0500 1000 1500 2000 2500 3000 3500 4000 4500
TIME (Hours)
–150
–100
–50
0
50
100
150
CHANGE IN OUTPUT VOLTAGE (ppm)
MEAN
MEAN PLUS ONE STANDARD DEVIATION
MEAN MINUS ONE STANDARD DEVIATION
SAMPLE 1
SAMPLE 2
SAMPLE 3
108 UNITS
T
A
= 25°C
10203-797
Figure 110. Measured Long-Term Drift of the ADR4520/ADR4525/ADR4530/
ADR4533/ADR4540/ADR4550 over 4,500 Hours
050 100 150 200 250
TIME (Hours)
–50
–40
–30
–20
–10
0
10
20
30
40
50
CHANGE IN OUTPUT VOLTAGE (ppm)
108 UNITS
TA = 25°C
MEAN
MEAN PLUS ONE STANDARD DEVIATION
MEAN MINUS ONE STANDARD DEVIATION
SAMPLE 1
SAMPLE 2
SAMPLE 3
10203-798
Figure 111. Measured Early Life Drift of the ADR4520/ADR4525/ADR4530/
ADR4533/ADR4540/ADR4550
10203-812
TIME (HOURS)
–4001000 2000 3000 4000 5000
–30
–20
–10
0
10
20
30
40
CHANGE IN OUTPUT VOLTAGE (ppm)
54 UNITS
T
A
= 25°C
MEAN
MEAN PLUS ONE STANDARD DEVIATION
MEAN MINUS ONE STANDARD DEVIATION
SAMPLE 1
SAMPLE 2
SAMPLE 3
Figure 112. Measured Long-Term Drift of the ADR4525D/ADR4540D/
ADR4550D over 4,500 Hours
is .w 45 an
ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550 Data Sheet
Rev. D | Page 36 of 40
THERMAL HYSTERESIS
In addition to stability over time, as described in the Long-
Term Drift section, it is useful to know the thermal hysteresis,
that is, the stability vs. cycling of temperature. Thermal
hysteresis is an important parameter because it tells the system
designer how closely the signal returns to its starting amplitude
after the ambient temperature changes and the subsequent
return to room temperature. Figure 113 shows the change in
output voltage as the temperature cycles three times from room
temperature to +125°C to −40°C and back to room temperature.
In the three full cycles, the output hysteresis is typically −13 ppm.
The histogram in Figure 114 shows that the hysteresis is larger
when the device is cycled through only a half cycle, from room
temperature to 125°C and back to room temperature, typically
−97 ppm.
–40 –20 020 40 60 80 100 120
TEMPERATURE (°C)
CHANGE IN OUTPUT VOLTAGE (ppm)
CYCLE 1
CYCLE 2
CYCLE 3
10203-799
–250
–200
–150
–100
–50
50
0
100
150
200
250
Figure 113. Change in Output Voltage over Three Full Temperature Cycles
(−40°C to +125°C)
–200 –160 –120 –80 –40 040 80 100
OUTPUT VOLTAGE HYSTERESIS (ppm)
0
10
20
30
40
50
60
70
80
NUMBER OF UNITS
27 UNITS × 3 CYCLES
HALF CYCLE = +26°C, +125°C, +26°C
FULL CYCLE = +26°C, +125°C, +26°C, –40°C, +26°C
HALF CYCLE
FULL CYCLE
10203-801
Figure 114. Histogram Showing the Temperature Hysteresis of the Output
Voltage (−40°C to +125°C)
Figure 115 shows the change in input offset voltage as the
temperature cycles three times from room temperature to
+70°C to 0°C and back to room temperature. In the three full
cycles, the output hysteresis is typically −8 ppm. The histogram
in Figure 116 shows that the hysteresis is larger when the device
is cycled through only a half cycle, from room temperature to
+70°C and back to room temperature, typically −17 ppm.
010 20 30 40 50 60 70
TEMPERATURE (°C)
CHANGE IN OUTPUT VOLTAGE (ppm)
CYCLE 1
CYCLE 2
CYCLE 3
10203-800
Figure 115. Change in Output Voltage over Three Full Temperature Cycles
(0°C to 70°C)
–80 –70 –60 –50 –40 –30 –20 –10 010 20 30 40 50 60 70 80
OUTPUT VOLTAGE HYSTERESIS (ppm)
0
10
20
30
40
50
60
NUMBER OF UNITS
27 UNITS × 3 CYCLES
HALF CYCLE = 25°C, 70°C, 25°C
FULL CYCLE = 25°C, 70°C, 25°C, 0°C, 25°C
HALF CYCLE
FULL CYCLE
10203-802
Figure 116. Histogram Showing the Temperature Hysteresis of the Output
Voltage (0°C to 70°C)
010 20 30 40 50 60 70
TEMPERATURE (°C)
CHANGE IN OUTPUT VOLTAGE VOLTAGE (ppm)
CYCLE 1
CYCLE 2
CYCLE 3
CYCLE 4
10203-816
Figure 117. D Grade Change in Output Voltage over Three Full Temperature
Cycles (0°C to 70°C)
[ \
Data Sheet ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550
Rev. D | Page 37 of 40
–4 –2 0246810 12
OUTPUT VOLTAGE HYSTERESIS (ppm)
0
5
10
15
20
25
30
35
40
45
NUMBER OF UNITS
27 UNITS x 3 CYCLES
HALF CYCLE = 25°C, 70°C, 25°C
FULL CYCLE = 25°C, 70°C, 25°C, 0°C, 25°C
HALF CYCLE
FULL CYCLE
10203-818
Figure 118. D Grade Histogram Showing the Temperature Hysteresis of the
Output Voltage (0°C to 70°C)
Measuring thermal hysteresis over the full operating temperature
range is not reflective of a typical operating environment in
most applications. Instead, smaller temperature variations are
more normal. The ADR4520/ADR4525/ADR4530/ADR4533/
ADR4540/ADR4550 were tested over 20 different temperature
cycles of increasing magnitude, centered at +25°C, starting with
+25°C ± 5°C and going up to the full operating temperature
range of −40°C to +125°C. The results are shown in Figure 119.
For a temperature delta of 100°C (that is, +25°C ± 50°C) the
thermal hysteresis is less than 20 ppm for both the full cycle
and the half cycle. Above this range, the thermal hysteresis
increases significantly. These results show that the standard
specification, which covers the full operating temperature
range, is close to the worst case performance.
020 40 60 80 100 120 140 160
–40
–20
0
20
40
60
80
100
THERMAL HYSTERESIS (ppm)
TEMPERATURE DELTA (°C)
HALF LOOP
FULL LOOP
10203-805
Figure 119. Thermal Hysteresis for Increasing Temperature Range
HUMIDITY SENSITIVITY
The ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/
ADR4550 is packaged in a SOIC plastic package and has a
moisture sensitivity level of MSL-1, per the JEDEC standard.
However, moisture absorption from the air into the package
changes the internal mechanical stresses on the die causing
shifts in the output voltage. Figure 120 shows the effects of a
step change in relative humidity on the output voltage over
time.
The humidity chamber is maintained at an ambient temperature
of +25°C, while the relative humidity undergoes a step change
from 20% to 80% at time zero. The relative humidity is
maintained at 80% for the duration of the testing. Note that the
output voltage shifts quickly compared to the overall settling
time, following the step change in relative humidity.
Figure 121 shows the effects of 10% increases in relative humidity
from 30% to 70% and back to 30%. Note that after the relative
humidity returns to 30%, the output voltage is settling back to
its starting point.
0100 200 300 400 500 600
ELAPSED TIME (Hours)
–400
–300
–200
–100
0
100
200
300
400
CHANGE IN OUTPUT VOLTAGE (ppm)
SAMPLE 1
SAMPLE 2
SAMPLE 3
27 UNITS
T
A
= 25°C
RELATIVE HUMIDITY STEP
FROM 20% TO 80%
10203-803
Figure 120. Change in Output Voltage vs. Time After Humidity Step Change
(20% to 80% Relative Humidity)
0100 200 300 400 500 600
ELAPSED TIME (Hours)
–200
–150
–100
–50
0
50
100
150
200
CHANGE IN OUTPUT VOLTAGE (ppm)
SAMPLE 1
SAMPLE 2
SAMPLE 3
27 UNITS
T
A
= 25°C
RELATIVE HUMIDITY STEP FROM
30% TO 70% TO 30%, 10% STEPS
10203-804
Figure 121. Change in Output Voltage vs. Time for 10% Humidity Steps
(30% to 70% to 30% Relative Humidity in 10% Steps)
ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550 Data Sheet
Rev. D | Page 38 of 40
POWER CYCLE HYSTERESIS
By power cycling large numbers of samples, the power cycle
hysteresis can be determined. To keep this measurement
independent of other variables and environmental effects, the
power cycle testing was performed using a high precision
measurement system, including an ultrastable oil bath.
Figure 122 shows the power cycle hysteresis. The units were
powered down for approximately four hours and then powered
up. The ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/
ADR4550 do not have any power cycle hysteresis even after a
long power-down period, making these devices very suitable for
equipment which must maintain its calibration accuracy
between power cycles.
4370 4380 4390 4400 4410 4420 4430 4440 4450 4460 4470
TIME (Hours)
–20
0
20
40
60
80
100
120
CHANGE IN OUTPUT VOLTAGE (ppm)
108 UNITS
T
A
= 25°C SAMPLE 1
SAMPLE 2
SAMPLE 3
10203-806
Figure 122. Power Cycle Hysteresis
‘ HHHH’ f
Data Sheet ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550
Rev. D | Page 39 of 40
OUTLINE DIMENSIONS
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-012-AA
012407-A
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
0.50 (0.0196)
0.25 (0.0099) 45°
8°
0°
1.75 (0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
4
1
8 5
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
6.20 (0.2441)
5.80 (0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
Figure 123. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
BOTTOM VIEW
(PLATING OPTION 1,
SEE DETAIL A
FOR OPTION 2)
DETAIL A
(OPTION 2)
1
3
5
7
TOP VIEW
0.075 REF
R0.008
(4 PLCS)
0.203
0.197 SQ
0.193 0.020
0.015
0.010
(R 4 PLCS)
0.180
0.177 SQ
0.174
0.087
0.078
0.069
0.008
0.006
0.0040.077
0.070
0.063
0.054
0.050
0.046
0.030
0.025
0.020 0.028
0.020 DIA
0.012
0.019 SQ
0.106
0.100
0.094
R 0.008
(8 PLCS)
05-21-2010-D
Figure 124. 8-Terminal Ceramic Leadless Chip Carrier [LCC]
(E-8-1)
Dimensions shown in inches
ORDERING GUIDE
Model1,2 Temperature Range Package Description Package Option Ordering Quantity
ADR4520ARZ −40°C to +125°C 8-Lead SOIC_N R-8 98
ADR4520ARZ-R7 −40°C to +125°C 8-Lead SOIC_N R-8 1,000
ADR4520BRZ −40°C to +125°C 8-Lead SOIC_N R-8 98
ADR4520BRZ-R7 −40°C to +125°C 8-Lead SOIC_N R-8 1,000
ADR4525ARZ −40°C to +125°C 8-Lead SOIC_N R-8 98
ADR4525ARZ-R7 −40°C to +125°C 8-Lead SOIC_N R-8 1,000
ADR4525BRZ −40°C to +125°C 8-Lead SOIC_N R-8 98
ADR4525BRZ-R7 −40°C to +125°C 8-Lead SOIC_N R-8 1,000
ADR4525CRZ 0°C to 70°C 8-Lead SOIC_N R-8 98
ADR4525CRZ-R7 0°C to 70°C 8-Lead SOIC_N R-8 1,000
ADR4525DEZ 0°C to 70°C 8-Lead LCC E-8 98
ADR4525DEZ-R7 0°C to 70°C 8-Lead LCC E-8 1000
ADR4525WBRZ-R7 −40°C to +125°C 8-Lead SOIC_N R-8 1,000
ANALOG DEVICES www.analng.cum
ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550 Data Sheet
Rev. D | Page 40 of 40
Model1,2 Temperature Range Package Description Package Option Ordering Quantity
ADR4530ARZ −40°C to +125°C 8-Lead SOIC_N R-8 98
ADR4530ARZ-R7 −40°C to +125°C 8-Lead SOIC_N R-8 1,000
ADR4530BRZ −40°C to +125°C 8-Lead SOIC_N R-8 98
ADR4530BRZ-R7 −40°C to +125°C 8-Lead SOIC_N R-8 1,000
ADR4533ARZ −40°C to +125°C 8-Lead SOIC_N R-8 98
ADR4533ARZ-R7 −40°C to +125°C 8-Lead SOIC_N R-8 1,000
ADR4533BRZ −40°C to +125°C 8-Lead SOIC_N R-8 98
ADR4533BRZ-R7 −40°C to +125°C 8-Lead SOIC_N R-8 1,000
ADR4540ARZ −40°C to +125°C 8-Lead SOIC_N R-8 98
ADR4540ARZ-R7 −40°C to +125°C 8-Lead SOIC_N R-8 1,000
ADR4540BRZ −40°C to +125°C 8-Lead SOIC_N R-8 98
ADR4540BRZ-R7 −40°C to +125°C 8-Lead SOIC_N R-8 1,000
ADR4540CRZ 0°C to 70°C 8-Lead SOIC_N R-8 98
ADR4540CRZ-R7 0°C to 70°C 8-Lead SOIC_N R-8 1,000
ADR4540DEZ 0°C to 70°C 8-Lead LCC E-8 98
ADR4540DEZ-R7 0°C to 70°C 8-Lead LCC E-8 1000
ADR4550ARZ −40°C to +125°C 8-Lead SOIC_N R-8 98
ADR4550ARZ-R7 −40°C to +125°C 8-Lead SOIC_N R-8 1,000
ADR4550BRZ −40°C to +125°C 8-Lead SOIC_N R-8 98
ADR4550BRZ-R7 −40°C to +125°C 8-Lead SOIC_N R-8 1,000
ADR4550CRZ 0°C to 70°C 8-Lead SOIC_N R-8 98
ADR4550CRZ-R7 0°C to 70°C 8-Lead SOIC_N R-8 1,000
ADR4550DEZ 0°C to 70°C 8-Lead LCC E-8 98
ADR4550DEZ-R7 0°C to 70°C 8-Lead LCC E-8 1000
1 Z = RoHS Compliant Part.
2 W = Qualified for Automotive Applications. See the Automotive Products section.
AUTOMOTIVE PRODUCTS
The ADR4525W model is available with controlled manufacturing to support the quality and reliability requirements of automotive
applications. Note that this automotive model may have specifications that differ from the commercial models; therefore, designers
should review the Specifications section of this data sheet carefully. Only the automotive grade product shown is available for use in
automotive applications. Contact your local Analog Devices account representative for specific product ordering information and to
obtain the specific Automotive Reliability reports for this model.
©2012–2021 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D10203-1/2021(D)