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ESP32S2SOLO(-U) Datasheet by Espressif Systems
® |
ESP32S2SOLO &
ESP32S2SOLOU
Datasheet
2.4 GHz WiFi (802.11 b/g/n) module
Built around ESP32S2 series of SoC, Xtensa®singlecore 32bit LX7 microprocessor
Flash up to 16 MB, optional 2 MB PSRAM in chip package
36 GPIOs, rich set of peripherals
Onboard PCB antenna or external antenna connector
Version 1.3
Espressif Systems
Copyright © 2021
www.espressif.com
About This Document
This document provides the specifications for the ESP32-S2-SOLO and ESP32-S2-SOLO-U module.
Document Updates
Please always refer to the latest version on https://www.espressif.com/en/support/download/documents.
Revision History
For revision history of this document, please refer to the last page.
Documentation Change Notification
Espressif provides email notifications to keep customers updated on changes to technical documentation.
Please subscribe at www.espressif.com/en/subscribe.
Certification
Download certificates for Espressif products from www.espressif.com/en/certificates.
1 Module Overview
1 Module Overview
1.1 Features
CPU and OnChip Memory
• ESP32-S2 or ESP32-S2R2 chip embedded,
Xtensa®single-core 32-bit LX7 microprocessor,
up to 240 MHz
• 128 KB ROM
• 320 KB SRAM
• 16 KB SRAM in RTC
• 2 MB embedded PSRAM (ESP32-S2R2 only)
WiFi
• 802.11 b/g/n
• Bit rate: 802.11n up to 150 Mbps
• A-MPDU and A-MSDU aggregation
• 0.4 µs guard interval support
• Center frequency range of operating channel:
2412 ~2484 MHz
Peripherals
• GPIO, SPI, LCD, UART, I2C, I2S, Camera
interface, IR, pulse counter, LED PWM, TWAI®
(compatible with ISO 11898-1), USB OTG 1.1,
ADC, DAC, touch sensor, temperature sensor
Integrated Components on Module
• 40 MHz crystal oscillator
• 4 MB SPI flash
Antenna Options
• On-board PCB antenna (ESP32-S2-SOLO)
• External antenna via a connector
(ESP32-S2-SOLO-U)
Operating Conditions
• Operating voltage/Power supply: 3.0 ~3.6 V
• Operating ambient temperature:
–85 °C version module: –40 ~85 °C
–105 °C version module: –40 ~105 °C
(ESP32-S2-SOLO-H4 and
ESP32-S2-SOLO-U-H4 only)
Certification
• Green certification: RoHS/REACH
• RF certification: SRRC/FCC/CE/IC
Test
• HTOL/HTSL/uHAST/TCT/ESD
1.2 Description
ESP32-S2-SOLO and ESP32-S2-SOLO-U are two powerful, generic Wi-Fi MCU modules that have a rich set of
peripherals. They are an ideal choice for a wide variety of application scenarios relating to Internet of Things (IoT),
wearable electronics and smart home.
The ordering information of the two modules is listed as follows:
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ESP32-S2-SOLO & ESP32-S2-SOLO-U Datasheet v1.3
1 Module Overview
Table 1: Ordering Information
Module Ordering code Chip embedded Flash Module
dimensions (mm)
ESP32-S2-SOLO (ANT)
ESP32-S2-SOLO-N4 (85 °C version) ESP32-S2
4 MB
18.0 x 25.5 x 3.1ESP32-S2-SOLO-H4 (105 °C version)
ESP32-S2-SOLO-N4R2 (85 °C version) ESP32-S2R2
ESP32-S2-SOLO-U (CONN)
ESP32-S2-SOLO-U-N4 (85 °C version) ESP32-S2 18.0 x 19.2 x 3.2ESP32-S2-SOLO-U-H4(105 °C version)
ESP32-S2-SOLO-U-N4R2 (85 °C version) ESP32-S2R2
Notes:
1. These modules can be shipped with different flash sizes.
2. 105 °C version modules can integrate the ESP32-S2 chip and 4 MB flash only.
3. For dimensions of the external antenna connector, please see Section 7.3.
ESP32-S2-SOLO comes with an on-board PCB antenna, and ESP32-S2-SOLO-U with an external antenna
connector. Both ESP32-S2-SOLO and ESP32-S2-SOLO-U have two variants:
• integrating the ESP32-S2 chip (which has no embedded flash and PSRAM)
• integrating the ESP32-S2R2 chip (which is embedded with a 2 MB PSRAM)
The two variants only differ in the chip integrated. In this datasheet unless otherwise stated, ESP32-S2-SOLO
refers to both ESP32-S2-SOLO-N4 and ESP32-S2-SOLO-N4R2, whereas ESP32-S2-SOLO-U refers to both
ESP32-S2-SOLO-U-N4 and ESP32-S2-SOLO-U-N4R2.
The ESP32-S2 chip and the ESP32-S2R2 chip falls into the same category, namely ESP32-S2 chip series.
ESP32-S2 series of chips has an Xtensa® 32-bit LX7 CPU that operates at up to 240 MHz. It has a low-power
co-processor that can be used instead of the CPU to save power while performing tasks that do not require
much computing power, such as monitoring of peripherals.
ESP32-S2 series integrates a rich set of peripherals, ranging from SPI, I2S, UART, I2C, LED PWM, TWAI®, LCD,
Camera interface, ADC, DAC, touch sensor, temperature sensor, as well as up to 43 GPIOs. It also includes a
full-speed USB On-The-Go (OTG) interface to enable USB communication.
The ESP32-S2 chip and the ESP32-S2R2 chip vary only in whether a PSRAM is embedded. For details, please
refer to Section Family Member Comparison in ESP32-S2 Series Datasheet.
1.3 Applications
• Generic Low-power IoT Sensor Hub
• Generic Low-power IoT Data Loggers
• Cameras for Video Streaming
• Over-the-top (OTT) Devices
• USB Devices
• Speech Recognition
• Image Recognition
• Mesh Network
• Home Automation
• Smart Home Control Panel
• Smart Building
• Industrial Automation
• Smart Agriculture
• Audio Applications
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ESP32-S2-SOLO & ESP32-S2-SOLO-U Datasheet v1.3
Contents
Contents
1 Module Overview 3
1.1 Features 3
1.2 Description 3
1.3 Applications 4
2 Block Diagram 9
3 Pin Definitions 10
3.1 Pin Layout 10
3.2 Pin Description 10
3.3 Strapping Pins 12
4 Electrical Characteristics 14
4.1 Absolute Maximum Ratings 14
4.2 Recommended Operating Conditions 14
4.3 DC Characteristics (3.3 V, 25 °C) 14
4.4 Current Consumption Characteristics 15
4.5 Wi-Fi RF Characteristics 16
4.5.1 Wi-Fi RF Standards 16
4.5.2 Transmitter Characteristics 16
4.5.3 Receiver Characteristics 17
5 Schematics 19
6 Peripheral Schematics 21
7 Physical Dimensions and PCB Land Pattern 22
7.1 Physical Dimensions 22
7.2 Recommended PCB Land Pattern 23
7.3 Dimensions of External Antenna Connector 25
8 Product Handling 26
8.1 Storage Condition 26
8.2 ESD 26
8.3 Reflow Profile 26
9 MAC Addresses and eFuse 27
10 Learning Resources 28
10.1 Must-Read Documents 28
10.2 Must-Have Resources 28
Revision History 29
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List of Tables
List of Tables
1 Ordering Information 4
2 Pin Definitions 11
3 Strapping Pins 12
4 Absolute Maximum Ratings 14
5 Recommended Operating Conditions 14
6 DC Characteristics (3.3 V, 25 °C) 14
7 Current Consumption Depending on RF Modes 15
8 Current Consumption Depending on Work Modes 15
9 Wi-Fi RF Standards 16
10 Transmitter Characteristics 16
11 Receiver Characteristics 17
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List of Figures
List of Figures
1 ESP32-S2-SOLO Block Diagram 9
2 ESP32-S2-SOLO-U Block Diagram 9
3 Module Pin Layout (Top View) 10
4 ESP32-S2-SOLO Schematics 19
5 ESP32-S2-SOLO-U Schematics 20
6 Peripheral Schematics 21
7 ESP32-S2-SOLO Physical Dimensions 22
8 ESP32-S2-SOLO-U Physical Dimensions 22
9 ESP32-S2-SOLO Recommended PCB Land Pattern 23
10 ESP32-S2-SOLO-U Recommended PCB Land Pattern 24
11 Dimensions of External Antenna Connector 25
12 Reflow Profile 26
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ESP32-S2-SOLO & ESP32-S2-SOLO-U Datasheet v1.3
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2 Block Diagram
2 Block Diagram
ESP32-S2
ESP32-S2R2
RF Matching
40 MHz
Crystal
3V3
ESP32-S2-SOLO-U
EN GPIOs
Antenna
ESP32-S2
ESP32-S2R2
RF Matching
40 MHz
Crystal
3V3
ESP32-S2-SOLO
EN GPIOs
Antenna
SPI Flash
SPICS0
SPICLK
SPID
SPIQ
SPIHD
SPIWP
VDD_SPI
SPI Flash
SPICS0
SPICLK
SPID
SPIQ
SPIHD
SPIWP
VDD_SPI
PSRAM(opt.)
(QSPI)
PSRAM(opt.)
(QSPI)
Figure 1: ESP32S2SOLO Block Diagram
ESP32-S2
ESP32-S2R2
RF Matching
40 MHz
Crystal
3V3
ESP32-S2-SOLO-U
EN GPIOs
Antenna
ESP32-S2
ESP32-S2R2
RF Matching
40 MHz
Crystal
3V3
ESP32-S2-SOLO
EN GPIOs
Antenna
SPI Flash
SPICS0
SPICLK
SPID
SPIQ
SPIHD
SPIWP
VDD_SPI
SPI Flash
SPICS0
SPICLK
SPID
SPIQ
SPIHD
SPIWP
VDD_SPI
PSRAM(opt.)
(QSPI)
PSRAM(opt.)
(QSPI)
Figure 2: ESP32S2SOLOU Block Diagram
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ESP32-S2-SOLO & ESP32-S2-SOLO-U Datasheet v1.3
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3 Pin Definitions
3 Pin Definitions
3.1 Pin Layout
GND
3V3
EN
IO4
IO5
IO6
IO7
IO20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
GND
IO1
IO2
TXD0
RXD0
IO42
IO41
IO40
IO39
IO38
IO37
IO36
IO35
IO0
41
GND
Keepout Zone
GND
GND GND GND
GND
GNDGNDGND
18
19
20
IO10
IO11
IO12
21
22
23
IO13
IO14
IO21
15
16
17
IO3
IO46
IO9
24
25
26
IO33
IO34
IO45
1
2
3
4
5
6
7
8
9
10
11
12
13
14
IO15
IO16
IO17
IO18
IO8
IO19
Figure 3: Module Pin Layout (Top View)
Note:
1. The pin diagram shows the approximate location of pins on the module. For the actual mechanical diagram, please
refer to Figure 7.1 Physical Dimensions.
2. The above pin layout is applicable for ESP32-S2-SOLO and ESP32-S2-SOLO-U, but the latter has no keepout zone.
3.2 Pin Description
The module has 41 pins. See pin definitions in Table 2.
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3 Pin Definitions
Table 2: Pin Definitions
Name No. Type Function
GND 1 P Ground
3V3 2 P Power supply
EN 3 I
High: on, enables the chip.
Low: off, the chip powers off.
Note: Do not leave the EN pin floating.
IO4 4 I/O/T RTC_GPIO4, GPIO4, TOUCH4, ADC1_CH3
IO5 5 I/O/T RTC_GPIO5, GPIO5, TOUCH5, ADC1_CH4
IO6 6 I/O/T RTC_GPIO6, GPIO6, TOUCH6, ADC1_CH5
IO7 7 I/O/T RTC_GPIO7, GPIO7, TOUCH7, ADC1_CH6
IO15 8 I/O/T RTC_GPIO15, GPIO15, U0RTS, ADC2_CH4, XTAL_32K_P
IO16 9 I/O/T RTC_GPIO16, GPIO16, U0CTS, ADC2_CH5, XTAL_32K_N
IO17 10 I/O/T RTC_GPIO17, GPIO17, U1TXD, ADC2_CH6, DAC_1
IO18 11 I/O/T RTC_GPIO18, GPIO18, U1RXD, ADC2_CH7, DAC_2, CLK_OUT3
IO8 12 I/O/T RTC_GPIO8, GPIO8, TOUCH8, ADC1_CH7
IO19 13 I/O/T RTC_GPIO19, GPIO19, U1RTS, ADC2_CH8, CLK_OUT2, USB_D-
IO20 14 I/O/T RTC_GPIO20, GPIO20, U1CTS, ADC2_CH9, CLK_OUT1, USB_D+
IO3 15 I/O/T RTC_GPIO3, GPIO3, TOUCH3, ADC1_CH2
IO46 16 I GPIO46
IO9 17 I/O/T RTC_GPIO9, GPIO9, TOUCH9, ADC1_CH8, FSPIHD
IO10 18 I/O/T RTC_GPIO10, GPIO10, TOUCH10, ADC1_CH9, FSPICS0, FSPIIO4
IO11 19 I/O/T RTC_GPIO11, GPIO11, TOUCH11, ADC2_CH0, FSPID, FSPIIO5
IO12 20 I/O/T RTC_GPIO12, GPIO12, TOUCH12, ADC2_CH1, FSPICLK, FSPIIO6
IO13 21 I/O/T RTC_GPIO13, GPIO13, TOUCH13, ADC2_CH2, FSPIQ, FSPIIO7
IO14 22 I/O/T RTC_GPIO14, GPIO14, TOUCH14, ADC2_CH3, FSPIWP, FSPIDQS
IO21 23 I/O/T RTC_GPIO21, GPIO21
IO33 24 I/O/T SPIIO4, GPIO33, FSPIHD
IO34 25 I/O/T SPIIO5, GPIO34, FSPICS0
IO45 26 I/O/T GPIO45
IO0 27 I/O/T RTC_GPIO0, GPIO0
IO35 28 I/O/T SPIIO6, GPIO35, FSPID
IO36 29 I/O/T SPIIO7, GPIO36, FSPICLK
IO37 30 I/O/T SPIDQS, GPIO37, FSPIQ
IO38 31 I/O/T GPIO38, FSPIWP
IO39 32 I/O/T MTCK, GPIO39, CLK_OUT3
IO40 33 I/O/T MTDO, GPIO40, CLK_OUT2
IO41 34 I/O/T MTDI, GPIO41, CLK_OUT1
IO42 35 I/O/T MTMS, GPIO42
RXD0 36 I/O/T U0RXD, GPIO44, CLK_OUT2
TXD0 37 I/O/T U0TXD, GPIO43, CLK_OUT1
IO2 38 I/O/T RTC_GPIO2, GPIO2, TOUCH2, ADC1_CH1
IO1 39 I/O/T RTC_GPIO1, GPIO1, TOUCH1, ADC1_CH0
GND 40 P Ground
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3 Pin Definitions
Name No. Type Function
EPAD 41 P Ground
Notice:
For peripheral pin configurations, please refer to ESP32-S2 Series Datasheet.
3.3 Strapping Pins
ESP32-S2 series of chips has three strapping pins: GPIO0, GPIO45, GPIO46. The pin-pin mapping between
ESP32-S2 series of chips and the module is as follows, which can be seen in Chapter 5Schematics:
• GPIO0 = IO0
• GPIO45 = IO45
• GPIO46 = IO46
Software can read the values of corresponding bits from register ”GPIO_STRAPPING”.
During the chip’s system reset (power-on-reset, RTC watchdog reset, brownout reset, analog super watchdog
reset, and crystal clock glitch detection reset), the latches of the strapping pins sample the voltage level as
strapping bits of ”0” or ”1”, and hold these bits until the chip is powered down or shut down.
IO0, IO45 and IO46 are connected to the internal pull-up/pull-down. If they are unconnected or the connected
external circuit is high-impedance, the internal weak pull-up/pull-down will determine the default input level of
these strapping pins.
To change the strapping bit values, users can apply the external pull-down/pull-up resistances, or use the host
MCU’s GPIOs to control the voltage level of these pins when powering on ESP32-S2 series of chips.
After reset, the strapping pins work as normal-function pins.
Refer to Table 3for a detailed boot-mode configuration of the strapping pins.
Table 3: Strapping Pins
VDD_SPI Voltage 1
Pin Default 3.3 V 1.8 V
IO45 3Pull-down 0 1
Booting Mode2
Pin Default SPI Boot Download Boot
IO0 Pull-up 1 0
IO46 Pull-down Don’t-care 0
Enabling/Disabling ROM Code Print During Booting 4 5
Pin Default Enabled Disabled
IO46 Pull-down See the fifth note See the fifth note
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3 Pin Definitions
Note:
1. Firmware can configure register bits to change the settings of ”VDD_SPI Voltage”.
2. The strapping combination of GPIO46 = 1 and GPIO0 = 0 is invalid and will trigger unexpected behavior.
3. Internal pull-up resistor (R1) for IO45 is not populated in the module, as the flash in the module works at 3.3 V by
default (output by VDD_SPI). Please make sure IO45 will not be pulled high when the module is powered up by
external circuit.
4. ROM code can be printed over TXD0 (by default) or DAC_1 (IO17), depending on the eFuse bit.
5. When eFuse UART_PRINT_CONTROL value is:
0, print is normal during boot and not controlled by IO46.
1 and IO46 is 0, print is normal during boot; but if IO46 is 1, print is disabled.
2 and IO46 is 0, print is disabled; but if IO46 is 1, print is normal.
3, print is disabled and not controlled by IO46.
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4 Electrical Characteristics
4 Electrical Characteristics
4.1 Absolute Maximum Ratings
Table 4: Absolute Maximum Ratings
Symbol Parameter Min Max Unit
VDD33 Power supply voltage –0.3 3.6 V
TST ORE Storage temperature –40 105 °C
4.2 Recommended Operating Conditions
Table 5: Recommended Operating Conditions
Symbol Parameter Min Typ Max Unit
VDD33 Power supply voltage 3.0 3.3 3.6 V
IV DD Current delivered by external power supply 0.5 — — A
TA
Operating ambient
temperature
85 °C version –40 — 85 °C
105 °C version 105
Humidity Humidity condition — — 85 %RH
4.3 DC Characteristics (3.3 V, 25 °C)
Table 6: DC Characteristics (3.3 V, 25 °C)
Symbol Parameter Min Typ Max Unit
CIN Pin capacitance — 2 — pF
VIH High-level input voltage 0.75 × VDD1— VDD1+ 0.3 V
VIL Low-level input voltage –0.3 — 0.25 × VDD1V
IIH High-level input current — — 50 nA
IIL Low-level input current — — 50 nA
VOH 2High-level output voltage 0.8 × VDD1— — V
VOL 2Low-level output voltage — — 0.1 × VDD1V
IOH
High-level source current (VDD1= 3.3 V, VOH
>= 2.64 V, PAD_DRIVER = 3) — 40 — mA
IOL
Low-level sink current (VDD1= 3.3 V, VOL =
0.495 V, PAD_DRIVER = 3) — 28 — mA
RP U Pull-up resistor — 45 — kΩ
RP D Pull-down resistor — 45 — kΩ
VIH _nRST Chip reset release voltage 0.75 × VDD1— VDD1+ 0.3 V
VIL_nRST Chip reset voltage –0.3 — 0.25 × VDD1V
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4 Electrical Characteristics
Note:
1. VDD is the I/O voltage for a particular power domain of pins.
2. VOH and VOL are measured using high-impedance load.
4.4 Current Consumption Characteristics
With the use of advanced power-management technologies, the module can switch between different power
modes. For details on different power modes, please refer to Section RTC and Low-Power Management in
ESP32-S2 Series Datasheet.
Table 7: Current Consumption Depending on RF Modes
Work mode Description Peak
Active (RF working)
TX
802.11b, 20 MHz, 1 Mbps, @19.5 dBm 310 mA
802.11g, 20 MHz, 54 Mbps, @15 dBm 220 mA
802.11b, 20 MHz, MCS7, @13.5 dBm 205 mA
802.11n, 40 MHz, MCS7, @13.5 dBm 165 mA
RX 802.11b/g/n, 20 MHz 71 mA
802.11n, 40 MHz 75 mA
Note:
• The current consumption measurements are taken with a 3.3 V supply at 25 °C of ambient temperature at the RF
port. All transmitters’ measurements are based on a 100% duty cycle.
• The current consumption figures for in RX mode are for cases when the peripherals are disabled and the CPU idle.
Table 8: Current Consumption Depending on Work Modes
Work mode Description Current consumption (Typ)
Modem-sleep The CPU is
powered on
240 MHz 22 mA
160 MHz 17 mA
Normal speed: 80 MHz 14 mA
Light-sleep — 550 µA
Deep-sleep
The ULP co-processor is powered on. 235 µA
ULP sensor-monitored pattern 22 µA @1% duty
RTC timer + RTC memory 25 µA
RTC timer only 20 µA
Power off CHIP_PU is set to low level, the chip is powered off. 1 µA
Note:
• The current consumption figures in Modem-sleep mode are for cases where the CPU is powered on and the cache
idle.
• When Wi-Fi is enabled, the chip switches between Active and Modem-sleep modes. Therefore, current consump-
tion changes accordingly.
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4 Electrical Characteristics
• In Modem-sleep mode, the CPU frequency changes automatically. The frequency depends on the CPU load and
the peripherals used.
• During Deep-sleep, when the ULP co-processor is powered on, peripherals such as GPIO and I2C are able to
operate.
• The ”ULP sensor-monitored pattern” refers to the mode where the ULP coprocessor or the sensor works periodi-
cally. When touch sensors work with a duty cycle of 1%, the typical current consumption is 22 µA.
4.5 WiFi RF Characteristics
4.5.1 WiFi RF Standards
Table 9: WiFi RF Standards
Name Description
Center frequency range of operating channel note12412 ~2484 MHz
Wi-Fi wireless standard IEEE 802.11b/g/n
Data rate 20 MHz
11b: 1, 2, 5.5 and 11 Mbps
11g: 6, 9, 12, 18, 24, 36, 48, 54 Mbps
11n: MCS0-7, 72.2 Mbps (Max)
40 MHz 11n: MCS0-7, 150 Mbps (Max)
Antenna type PCB antenna, IPEX antenna
1. Device should operate in the center frequency range allocated by regional regulatory authorities. Target center
frequency range is configurable by software.
2. For the modules that use IPEX antennas, the output impedance is 50 Ω. For other modules without IPEX antennas,
users do not need to concern about the output impedance.
4.5.2 Transmitter Characteristics
Table 10: Transmitter Characteristics
Parameter Rate Typ Unit
TX Power note1
11b, 1 Mbps 19.5
dBm
11b, 11 Mbps 19.5
11g, 6 Mbps 18
11g, 54 Mbps 15
11n, HT20, MCS0 18
11n, HT20, MCS7 13.5
11n, HT40, MCS0 18
11n, HT40, MCS7 13.5
1. Target TX power is configurable based on device or certification requirements.
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4 Electrical Characteristics
4.5.3 Receiver Characteristics
Table 11: Receiver Characteristics
Parameter Rate Typ Unit
RX Sensitivity
1 Mbps –97
dBm
2 Mbps –95
5.5 Mbps –93
11 Mbps –88
6 Mbps –92
9 Mbps –91
RX Sensitivity
12 Mbps –89
dBm
18 Mbps –86
24 Mbps –83
36 Mbps –80
48 Mbps –76
54 Mbps –75
11n, HT20, MCS0 –92
11n, HT20, MCS1 –88
11n, HT20, MCS2 –85
11n, HT20, MCS3 –83
11n, HT20, MCS4 –79
11n, HT20, MCS5 –75
11n, HT20, MCS6 –73
11n, HT20, MCS7 –72
11n, HT40, MCS0 –89
11n, HT40, MCS1 –85
11n, HT40, MCS2 –83
11n, HT40, MCS3 –79
11n, HT40, MCS4 –76
11n, HT40, MCS5 –72
11n, HT40, MCS6 –70
11n, HT40, MCS7 –68
RX Maximum Input Level
11b, 1 Mbps 5
dBm
11b, 11 Mbps 5
11g, 6 Mbps 5
11g, 54 Mbps 0
11n, HT20, MCS0 5
11n, HT20, MCS7 0
11n, HT40, MCS0 5
11n, HT40, MCS7 0
Adjacent Channel Rejection
11b, 11 Mbps 35
dB
11g, 6 Mbps 31
11g, 54 Mbps 14
11n, HT20, MCS0 31
11n, HT20, MCS7 13
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5 Schematics
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BVNM5 Schematics
5 Schematics
This is the reference design of the module.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
The values of C11, L2 and C12
vary with the actual PCB board.
The values of C1 and C4 vary with
the selection of the crystal.
The value of R4 varies with the actual
PCB board.
ESP32-S2-SOLO(pin-out)
ESP32-S2
ESP32-S2R2
NC: No component.
SPICLK
SPICS0
SPIHD
SPID
SPIWP
SPIQ
GPIO0
GPIO1
GPIO2
GPIO4
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37
GPIO38
SPIHD
SPIWP
SPID
SPIQ
SPICS0
LNA_INRF_ANT
GPIO39
GPIO40
GPIO41
GPIO42
U0RXD
GPIO46
CHIP_PU
GPIO45
U0TXD
SPICLK
GPIO8
GPIO5
GPIO6
GPIO7
CHIP_PU
GPIO4
GPIO5
GPIO6
GPIO7
GPIO15
GPIO16
GPIO17
GPIO18
GPIO3
GPIO46
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO21
GPIO33
GPIO34
GPIO45
GPIO0
GPIO35
GPIO36
GPIO37
GPIO38
GPIO39
GPIO40
GPIO41
GPIO42
U0RXD
U0TXD
GPIO2
GPIO1
GPIO3
GPIO19
GPIO20
GPIO8
VDD_SPI
GND
GND GND GND
VDD33
GND GND GND
GNDGND
GND
GND
VDD33
VDD33
GND
GNDGND
VDD33
GND
GNDGND
VDD33
GND
VDD33
GND
GND
GND
VDD33
VDD_SPI
GNDVDD33
GND
GND
C11
TBD
C13
0.1uF
D1
ESD
C12
TBD
C4
TBD
R3 499
C14
1uF
R8
10K(NC)
C9
NC
U1
VDDA
1
LNA_IN
2
VDD3P3
3
VDD3P3
4
GPIO0
5
GPIO1
6
GPIO2
7
GPIO3
8
GPIO4
9
GPIO5
10
GPIO6
11
GPIO7
12
GPIO10
15
GPIO11
16
GPIO12
17
GPIO13
18
GPIO14
19
XTAL_32K_P
21 VDD3P3_RTC
20
XTAL_32K_N
22
DAC_1
23
DAC_2
24
GPIO19
25
GPIO20
26
VDD_SPI 30
SPICS1 29
SPIWP 32
SPICS0 33
SPIQ 35
SPID 36
SPICLK 34
GPIO33 37
GND 57
GPIO34 38
GPIO35 39
MTCK 43
GPIO46 55
VDDA 51
XTAL_N 52
XTAL_P 53
MTMS 47
MTDO 44
U0TXD 48
VDD3P3_CPU 45
CHIP_PU 56
VDDA 54
MTDI 46
GPIO8
13
GPIO9
14
VDD3P3_RTC_IO
27
GPIO21
28
SPIHD 31
GPIO36 40
GPIO37 41
GPIO38 42
U0RXD 49
GPIO45 50
L1 2.0nH
C6
10uF
C2
100pF
Y1
40MHz(±10ppm)
XIN
1
GND
2XOUT 3
GND 4
C10
0.1uF
U2 FLASH-3V3
VDD 8
GND
4
/CS
1
CLK
6
/HOLD
7/WP 3
DO 2
DI 5
R1
10K(NC)
C7
1uF
L2 TBD
U3 ESP32-S2-SOLO
GND
1
3V3
2
EN
3
IO4
4
IO5
5
IO6
6
IO7
7
IO15
8
IO16
9
IO17
10
IO18
11
IO19
13
IO20
14
IO8
12
GND 40
IO1 39
IO2 38
TXD0 37
RXD0 36
IO42 35
IO41 34
IO40 33
IO39 32
IO38 31
IO37 30
IO36 29
IO35 28
IO0 27
IO46
16
IO9
17
IO10
18
IO11
19
IO12
20
IO13
21
IO14
22
IO21
23
IO33
24
IO34
25
IO3
15
IO45
26
EPAD 41
ANT1
PCB_ANT
1
2
C1
TBD
R10 0
C16
0.1uF
C3
1uF
C15
0.1uF
R4 0
C5
0.1uF
C8
0.1uF
Figure 4: ESP32S2SOLO Schematics
Espressif Systems 19
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5 Schematics
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
The values of C11, L2 and C12
vary with the actual PCB board.
The values of C1 and C4 vary with
the selection of the crystal.
The value of R4 varies with the actual
PCB board.
ESP32-S2-SOLO-U(pin-out)
ESP32-S2
ESP32-S2R2
NC: No component.
SPICLK
SPICS0
SPIHD
SPID
SPIWP
SPIQ
GPIO0
GPIO1
GPIO2
GPIO4
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37
GPIO38
SPIHD
SPIWP
SPID
SPIQ
SPICS0
LNA_INRF_ANT
GPIO39
GPIO40
GPIO41
GPIO42
U0RXD
GPIO46
CHIP_PU
GPIO45
U0TXD
SPICLK
GPIO8
GPIO5
GPIO6
GPIO7
CHIP_PU
GPIO4
GPIO5
GPIO6
GPIO7
GPIO15
GPIO16
GPIO17
GPIO18
GPIO3
GPIO46
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO21
GPIO33
GPIO34
GPIO45
GPIO0
GPIO35
GPIO36
GPIO37
GPIO38
GPIO39
GPIO40
GPIO41
GPIO42
U0RXD
U0TXD
GPIO2
GPIO1
GPIO3
GPIO19
GPIO20
GPIO8
VDD_SPI
GND
GND GND GND
VDD33
GND GND GND
GNDGND
GND
GND
VDD33
VDD33
GND
GNDGND
VDD33
GND
GNDGND
VDD33
GND
VDD33
GND
GND
GND
VDD33
VDD_SPI
GNDVDD33
GND
GND
C11
TBD
C13
0.1uF
D1
ESD
C12
TBD
C4
TBD
R3 499
C14
1uF
R8
10K(NC)
C9
NC
U1
VDDA
1
LNA_IN
2
VDD3P3
3
VDD3P3
4
GPIO0
5
GPIO1
6
GPIO2
7
GPIO3
8
GPIO4
9
GPIO5
10
GPIO6
11
GPIO7
12
GPIO10
15
GPIO11
16
GPIO12
17
GPIO13
18
GPIO14
19
XTAL_32K_P
21 VDD3P3_RTC
20
XTAL_32K_N
22
DAC_1
23
DAC_2
24
GPIO19
25
GPIO20
26
VDD_SPI 30
SPICS1 29
SPIWP 32
SPICS0 33
SPIQ 35
SPID 36
SPICLK 34
GPIO33 37
GND 57
GPIO34 38
GPIO35 39
MTCK 43
GPIO46 55
VDDA 51
XTAL_N 52
XTAL_P 53
MTMS 47
MTDO 44
U0TXD 48
VDD3P3_CPU 45
CHIP_PU 56
VDDA 54
MTDI 46
GPIO8
13
GPIO9
14
VDD3P3_RTC_IO
27
GPIO21
28
SPIHD 31
GPIO36 40
GPIO37 41
GPIO38 42
U0RXD 49
GPIO45 50
L1 2.0nH
C6
10uF
C2
100pF
Y1
40MHz(±10ppm)
XIN
1
GND
2XOUT 3
GND 4
C10
0.1uF
U2 FLASH-3V3
VDD 8
GND
4
/CS
1
CLK
6
/HOLD
7/WP 3
DO 2
DI 5
R1
10K(NC)
C7
1uF
L2 TBD
U3 ESP32-S2-SOLO-U
GND
1
3V3
2
EN
3
IO4
4
IO5
5
IO6
6
IO7
7
IO15
8
IO16
9
IO17
10
IO18
11
IO19
13
IO20
14
IO8
12
GND 40
IO1 39
IO2 38
TXD0 37
RXD0 36
IO42 35
IO41 34
IO40 33
IO39 32
IO38 31
IO37 30
IO36 29
IO35 28
IO0 27
IO46
16
IO9
17
IO10
18
IO11
19
IO12
20
IO13
21
IO14
22
IO21
23
IO33
24
IO34
25
IO3
15
IO45
26
EPAD 41
ANT1
IPEX
1
2
3
C1
TBD
R10 0
C16
0.1uF
C3
1uF
C15
0.1uF
R4 0
C5
0.1uF
C8
0.1uF
Figure 5: ESP32S2SOLOU Schematics
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6 Peripheral Schematics
6 Peripheral Schematics
This is the typical application circuit of the module connected with peripheral components (for example, power
supply, antenna, reset button, JTAG interface, and UART interface).
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
NC: No component.
X1: ESR = Max. 70 KΩ
EN
IO42 TMS
IO41 TDI
IO37
IO36
IO38
IO40 TDO
IO39 TCK
RXD0
TXD0
IO35
IO34
IO33
IO12
IO13
IO3
IO6
IO7
IO9
IO10
IO11
IO15
IO16
IO14
IO21
IO17
IO18
USB_D-
USB_D+
IO1
IO2
IO45
IO4
IO5
IO0
EN
IO19
IO20
IO46
IO8
GND
GND GND
VDD33 GND GND
GND
GND
GND
VDD33
GNDGND
GND
GND
VDD33
C3
0.1uF
JP4
Boot Option
1
12
2
SW1
C4 12pF(NC)
U1
ESP32-S2-SOLO/ESP32-S2-SOLO-U
GND
1
3V3
2
EN
3
IO4
4
IO5
5
IO6
6
IO7
7
IO15
8
IO16
9
IO17
10
IO18
11
IO19
13
IO20
14
IO8
12
GND 40
IO1 39
IO2 38
TXD0 37
RXD0 36
IO42 35
IO41 34
IO40 33
IO39 32
IO38 31
IO37 30
IO36 29
IO35 28
IO0 27
IO46
16
IO9
17
IO10
18
IO11
19
IO12
20
IO13
21
IO14
22
IO21
23
IO33
24
IO34
25
IO3
15
IO45
26
EPAD 41
R8 10K
R7 0
R4 0
R1 TBD
X1
32.768KHz(NC)
12
R2 NC
R5 0(NC)
C5
TBD
R3 0(NC)
JP1
UART
1
1
2
2
3
3
4
4
C1
22uF
C8 0.1uF
R6 0
JP3
USB OTG
11
22
C2 TBD
JP2
JTAG
1
1
2
2
3
3
4
4
C7 12pF(NC)
C6
TBD
Figure 6: Peripheral Schematics
Note:
• Soldering the EPAD to the ground of the base board is not a must, though doing so can get optimized thermal
performance. If users do want to solder it, they need to ensure that the correct quantity of soldering paste is applied.
• To ensure the power supply to the ESP32-S2 series of chips during power-up, it is advised to add an RC delay
circuit at the EN pin. The recommended setting for the RC delay circuit is usually R = 10 kΩand C = 1 µF. However,
specific parameters should be adjusted based on the power-up timing of the module and the power-up and reset
sequence timing of the chip. For ESP32-S2’s power-up and reset sequence timing diagram, please refer to Section
Power Scheme in ESP32-S2 Series Datasheet.
• GPIO18 works as U1RXD and is in an uncertain state when the chip is powered on, which may affect the chip’s
entry into download boot mode. To solve this issue, add an external pull-up resistor.
Espressif Systems 21
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ESP32-S2-SOLO & ESP32-S2-SOLO-U Datasheet v1.3
7 Physical Dimensions and PCB Land Pattern
7 Physical Dimensions and PCB Land Pattern
7.1 Physical Dimensions
25.5±0.15
1.5
1.27
16.51
40 x 0.9
40 x 0.9
3.1±0.15
Top View Side View Bottom View
18±0.15
15.8
17.6
40 x 0.45 1
1.05
0.8
40 x 0.85
0.5
3.7
3.7
0.9
40 x Ø0.55
6
0.9
Ø0.5
Unit: mm
10.5
10.29
13.97 1.27 2.015
Figure 7: ESP32S2SOLO Physical Dimensions
1.5
1.27
16.51
40 x 0.9
Top View Bottom View
18±0.15
40 x 0.45 40 x 0.85
0.5
3.7
3.7
10.29
0.9
10.75
15.65
17.5
0.9
Side View
40 x 0.9
19.2±0.15
40 x Ø0.55
0.8
1.08
1.1 2.46
3
10.5
1.27
3.2±0.15
Unit: mm
13.97 2.015
13.1
Figure 8: ESP32S2SOLOU Physical Dimensions
Note:
For information about tape, reel, and product marking, please refer to Espressif Module Package Information.
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ESP32-S2-SOLO & ESP32-S2-SOLO-U Datasheet v1.3
7 Physical Dimensions and PCB Land Pattern
7.2 Recommended PCB Land Pattern
Antenna Area
140
18
25.5
1.5
3.7
0.9
15 26
40 x0.9
40 x1.5
3.7
6
7.5
0.9
1.27
0.5
Unit: mm
Copper
Via for thermal pad
7.49
0.5
0.5
2.015 2.015
1.27
17.5
10.29
16.51
Figure 9: ESP32S2SOLO Recommended PCB Land Pattern
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7 Physical Dimensions and PCB Land Pattern
1
19.2
15
18
26
1.5
40 x1.5
0.5
0.5
3.7
0.9
0.9
7.5
1.27
3.7
40
40 x0.9
0.5
Unit: mm
Via for thermal pad
Copper
10.29
1.27
2.015 2.015
17.5
16.51
1.19
Figure 10: ESP32S2SOLOU Recommended PCB Land Pattern
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ESP32-S2-SOLO & ESP32-S2-SOLO-U Datasheet v1.3
L
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7.3 Dimensions of External Antenna Connector
ESP32-S2-SOLO-U uses the first generation external antenna connector as shown in Figure 11. This connector
is compatible with the following connectors:
• U.FL Series connector from Hirose
• MHF I connector from I-PEX
• AMC connector from Amphenol
Unit: mm
Figure 11: Dimensions of External Antenna Connector
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8 Product Handling
8 Product Handling
8.1 Storage Condition
The products sealed in Moisture Barrier Bag (MBB) should be stored in a noncondensing atmospheric
environment of < 40 °C/90%RH.
The module is rated at moisture sensitivity level (MSL) 3.
After unpacking, the module must be soldered within 168 hours with factory conditions 25±5 °C and /60%RH.
The module needs to be baked if the above conditions are not met.
8.2 ESD
• Human body model (HBM): 2000 V
• Charged-device model (CDM): 500 V
• Air discharge: 6000 V
• Contact discharge: 4000 V
8.3 Reflow Profile
50 150
0
25
1 ~ 3 ℃/s
0
200
250
200
–1 ~ –5 ℃/s
Cooling zone
100
217
50
100 250
Reflow zone
217 ℃ 60 ~ 90 s
Temperature (℃)
Preheating zone
150 ~ 200 ℃ 60 ~ 120 s
Ramp-up zone
Peak Temp.
235 ~ 250 ℃
Soldering time
> 30 s
Time (sec.)
Ramp-up zone — Temp.: 25 ~ 150 ℃ Time: 60 ~ 90 s Ramp-up rate: 1 ~ 3 ℃/s
Preheating zone — Temp.: 150 ~ 200 ℃ Time: 60 ~ 120 s
Reflow zone — Temp.: >217 ℃ 60 ~ 90 s; Peak Temp.: 235 ~ 250 ℃ Time: 30 ~ 70 s
Cooling zone — Peak Temp. ~ 180 ℃ Ramp-down rate: –1 ~ –5 ℃/s
Solder — Sn-Ag-Cu (SAC305) lead-free solder alloy
Figure 12: Reflow Profile
Note:
Solder the module in a single reflow.
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ESP32-S2-SOLO & ESP32-S2-SOLO-U Datasheet v1.3
9 MAC Addresses and eFuse
9 MAC Addresses and eFuse
The eFuse in ESP32-S2 series of chips has been burnt into 48-bit mac_address. The actual addresses the chip
uses in station or AP modes correspond to mac_address in the following way:
• Station mode: mac_address
• AP mode: mac_address + 1
There are seven blocks in eFuse for users to use. Each block is 256 bits in size and has independent write/read
disable controller. Six of them can be used to store encrypted key or user data, and the remaining one is only
used to store user data.
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ESP32-S2-SOLO & ESP32-S2-SOLO-U Datasheet v1.3
Learning
Must-Rea
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erview, pm de
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10 Learning Resources
10 Learning Resources
10.1 MustRead Documents
The following link provides documents related to ESP32-S2.
•ESP32-S2 Datasheet
This document provides an introduction to the specifications of the ESP32-S2 hardware, including
overview, pin definitions, functional description, peripheral interface, electrical characteristics, etc.
•ESP-IDF Programming Guide
It hosts extensive documentation for ESP-IDF ranging from hardware guides to API reference.
•ESP32-S2 Technical Reference Manual
The manual provides detailed information on how to use the ESP32-S2 memory and peripherals.
•Espressif Products Ordering Information
10.2 MustHave Resources
Here are the ESP32-S2-related must-have resources.
•ESP32-S2 BBS
This is an Engineer-to-Engineer (E2E) Community for ESP32-S2 where you can post questions, share
knowledge, explore ideas, and help solve problems with fellow engineers.
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ESP32-S2-SOLO & ESP32-S2-SOLO-U Datasheet v1.3
Revision History
Revision History
Date Version Release notes
2021-06-21 V1.3
• Added module variants embedded with the ESP32-S2R2 chip
• Updated Chapter 1Module Overview
• Updated Module Pin Layout (Top View), in which IO3, IO46 and IO45 are
newly added
• Updated Figure 9ESP32-S2-SOLO Recommended PCB Land Pattern
• Added description in Section 7.3 Dimensions of External Antenna Connector
• Replaced ”chip family” with ”chip series” following Espressif’s taxonomy
2020-12-17 V1.2
• Added TWAI to Chapter 1Module Overview
• Updated Table 7Current Consumption Characteristics
• Updated the capacitance value of RC delay circuit to 1 µF in Chapter 6
Peripheral Schematics
• Updated note in Section 8.3 Reflow Profile
2020-07-31 V1.1 Updated notes in table 1
2020-07-22 V1.0 Official release
2020-05-19 V0.1 Preliminary release
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ESP32-S2-SOLO & ESP32-S2-SOLO-U Datasheet v1.3
www.espressif.com
Disclaimer and Copyright Notice
Information in this document, including URL references, is subject to change without notice.
ALL THIRD PARTY’S INFORMATION IN THIS DOCUMENT IS PROVIDED AS IS WITH NO
WARRANTIES TO ITS AUTHENTICITY AND ACCURACY.
NO WARRANTY IS PROVIDED TO THIS DOCUMENT FOR ITS MERCHANTABILITY, NON-
INFRINGEMENT, FITNESS FOR ANY PARTICULAR PURPOSE, NOR DOES ANY WARRANTY
OTHERWISE ARISING OUT OF ANY PROPOSAL, SPECIFICATION OR SAMPLE.
All liability, including liability for infringement of any proprietary rights, relating to use of information
in this document is disclaimed. No licenses express or implied, by estoppel or otherwise, to any
intellectual property rights are granted herein.
The Wi-Fi Alliance Member logo is a trademark of the Wi-Fi Alliance. The Bluetooth logo is a
registered trademark of Bluetooth SIG.
All trade names, trademarks and registered trademarks mentioned in this document are property
of their respective owners, and are hereby acknowledged.
Copyright © 2021 Espressif Systems (Shanghai) Co., Ltd. All rights reserved.
