Field programmable gate arrays (FPGAs) provide a way to solve real-time embedded design problems with hardware when firmware running on a microcontroller or microprocessor would be too slow. They also enable peripheral flexibility. However, using FPGAs has meant learning new programming languages (usually Verilog or VHDL), learning a whole new development flow to generate FPGA bitstreams, and possibly spending a significant amount of money for an FPGA development board.
Because of these obstacles, many design engineers are reluctant to use FPGAs, even though they’re a very useful tool in the design toolbox. To overcome this reluctance, some vendors are working hard to shorten the FPGA learning curve. For example, Arduino introduced the Arduino ABX00022 MKR Vidor 4000 FPGA development board (see, “Quickly and Easily Apply FPGAs with the Arduino MKR Vidor 4000”). The Arduino MKR Vidor 4000 adds a way to program the FPGA that’s seamlessly integrated with the very popular Arduino integrated development environment (IDE) while getting FPGA level performance using special Arduino library extensions.
Now, there’s a new alternative to previous offerings, which include the Arduino MKR Vidor 4000 board. Alorium Technology has developed a somewhat different way to add FPGA performance into the world of Arduino embedded development. Alorium’s approach provides for both preconfigured IP blocks for I/O acceleration as well as custom designed IP blocks.
This article will briefly discuss the traditional ways of using FPGAs. It will then take an in-depth look at Alorium’s Arduino compatible XLR8R22M08V5U0DI and Snō SNOR20M16V3 FPGA modules. The article will show how Alorium has added its own spin on using FPGAs in the Arduino continuum for both using preconfigured IP and creating custom IP, and how designers can get started applying the FPGA modules.
How to speed up an Arduino
Hundreds of thousands of designers, engineers, developers, DIY enthusiasts, and makers around the world now use various versions of the Arduino dev board series for developing embedded systems for a wide range of applications. The Arduino boards and the Arduino IDE have become so popular because they are very simple to use and program.
As Arduino users have continued to push the original Arduino architecture into more complex applications, they have encountered performance issues. Part of the performance issue has been the simple 8-bit architecture of the original Arduino microcontroller. Another part of the problem is the way the Arduino software system implements many real-time peripherals using software when the Arduino’s embedded microcontroller doesn’t have an equivalent hardware block.
One way to address this performance problem is to use more powerful microcontrollers, but there’s still only so much that software can do in a real-time environment. Some high speed, real-time peripherals simply must be implemented in hardware. It’s also possible to specify microcontrollers with more hardware peripherals, but the right mix of peripherals varies from project to project.
Microcontroller manufacturers have addressed the need for different peripheral mixes by offering dozens or sometimes even hundreds of variations in a microprocessor family. However, that’s not a viable approach for board level products like the Arduino because of the need for on board connectors with sufficient I/O pins to meet all needs. Even though there are now many Arduino board variants, there still aren’t enough to meet the needs of every embedded project.
FPGAs fill the need for varied peripheral mix
By making programmable hardware available to the embedded designer, FPGAs can fill the need for a peripheral mix that varies from project to project. One way to add FPGA functionality to an embedded microcontroller board is to simply add an FPGA to an existing design. That’s the approach Arduino took when it designed the Arduino MKR Vidor 4000 board. The board combines Microchip Technology’s 32-bit Arm® Cortex®-M0+-based ATSAMD21G18A-AUT SAMD21 low-power microcontroller with Intel’s 10CL016YU484C6G Cyclone 10 FPGA.
Arduino has added several hardware IP blocks to the Arduino IDE specifically for the MKR Vidor 4000 board. These peripherals are available through two main libraries: VidorPeripherals and VidorGraphics. These hardware IP blocks are automatically constructed in the Intel Cyclone 10 FPGA on the Arduino MKR Vidor 4000 when the relevant peripheral library is included in an Arduino sketch—the name that Arduino uses for a program or unit of code. The current roster of peripheral IP blocks includes:
- I2C ports
- SPI ports
- High frequency PWM controllers
- High-speed timers
- High-speed quadrature decoders
- Adafruit Industries Neopixel addressable RGB smart LED controller
Some of these peripherals, such as I2C and SPI, were already available as software IP blocks for earlier Arduino boards. The difference between these earlier software implementations and the equivalent IP blocks implemented on the Arduino MKR Vidor 4000 board’s FPGA is that the FPGA versions of these peripherals provide much better performance. For example, each I2C and SPI instantiation is implemented with separate programmable hardware blocks inside of the board’s FPGA. As a result, there’s no performance loss when instantiating several such serial ports.
By implementing peripheral blocks as FPGA hardware and making them available using the same library mechanism already familiar to Arduino sketch writers, the Arduino MKR Vidor 4000 board makes FPGAs easy to use. There’s no new hardware description language (HDL), like VHDL or Verilog, to learn. In fact, FPGA-based peripherals look like any other C++ object from the programmer’s viewpoint. Arduino plans to add more such hardware IP block peripherals later.
The Arduino MKR Vidor 4000 board is not yet a general purpose FPGA development board because it lacks support for direct programming of the on board Cyclone 10 FPGA using HDL code. Arduino is planning on allowing more advanced users to realize more utility from the Arduino MKR Vidor 4000 board’s FPGA using Intel’s Quartus HDL development tool for the company’s FPGAs.
Alorium takes the next step
Alorium has already taken that step with its OpenXLR8 methodology and Xcelerator Blocks (XBs) for its Arduino compatible XLR8R22M08V5U0DI and SNOR20M16V3 Snō FPGA dev boards (Figure 1 and Figure 2, respectively). Both boards are based on different versions of the Intel MAX 10 FPGA family with integrated flash configuration memory. The XLR8 combines the Intel 10M08SAU169C8G MAX 10 with an 8-bit ATmega328 instruction set compatible microcontroller. It uses the same form factor as the original Arduino Uno dev board so it’s compatible with the many Arduino shields and accessories.
Figure 1: Alorium Technology’s XLR8R22M08V5U0DI dev board combines an Intel MAX 10 FPGA with an 8-bit ATmega328 instruction set compatible microcontroller, all in an Arduino Uno form factor. (Image source: Alorium Technology)
The Alorium Snō FPGA module is a much smaller dev board, measuring 0.7 x 1.7 inches, per Figure 2. Although the Snō FPGA dev board is physically smaller, it integrates a larger version of the Intel MAX 10 FPGA with twice as many logic elements: 16K in a 10M16SAU169C8G MAX 10 FPGA versus 8K in the 10M08 device on the XLR8 board. It also has more than twice as many I/O pins (32 versus 14 for the XLR8 board).
Figure 2: Like the XLR8 dev board, Alorium Technology’s Snō FPGA dev board combines an 8-bit ATmega328 instruction set compatible microcontroller with an Intel MAX 10—in this case it’s the 10M16SAU169C8G FPGA. However, the Snō FPGA dev board is much smaller. (Image source: Alorium Technology)
Alorium also offers the SNOMAKRR10 breakout board that accepts a Snō FPGA module and transforms it into a slightly oversized Arduino form factor board with a USB port and additional I/O breakout pins from the FPGA. Some of the Snō FPGA module’s pins are routed to the SnōMAKR breakout board’s Arduino compatible shield headers, while others are routed to an additional header along the edge of the board that’s opposite the USB connector (Figure 3).
Figure 3: Alorium’s SNOMAKRR10 breakout board converts the company’s Snō FPGA dev board to an Arduino-compatible form factor with a USB port and an on-board regulator so that the USB cable can power the dev board directly. (Image source: Alorium Technology)
Both the XLR8 and Snō FPGA dev boards implement the 8-bit microcontroller and its hardware peripherals in one chip—an Intel MAX 10 FPGA. Figure 4 illustrates how this is done.
Figure 4: Both the XLR8 and Snō FPGA dev boards implement the Atmel AVR-compatible microcontroller as a soft core inside the MAX 10 FPGA. (Image source: Alorium Technology)
The AVR-compatible microcontroller core (bottom left of Figure 4) is the same Atmel ATmega328 8-bit AVR microcontroller that was used in the original Arduino dev boards. However, instead of residing on a separate chip, Alorium’s version of the AVR microcontroller is implemented as a soft core inside the FPGA.
Five Alorium XBs (XB1 through XB5) appear above the microcontroller core in Figure 4. XBs are IP blocks implemented using the FPGA’s on-chip resources. The AVR microcontroller communicates with the on-chip XBs through an addressable register interface. The XLR8 and Snō dev board ship with pre-installed XBs (also available on GitHub) that correspond to peripherals frequently needed by Arduino developers including:
- Quadrature decoding
- Servomotor control
- NeoPixel RGB LED control
- Enhanced, 12-bit ADC
- Floating point math
Note that the last XB on the list above is not really an I/O peripheral block; it’s a floating point math accelerator. XBs can be any type of hardware accelerator. They’re not limited to I/O.
Pick a block, any block
Both the XLR8 and Snō FPGA dev boards can be updated in the field by selecting different XBs (or multiple copies of the same XB) to be instantiated within the FPGA using Alorium’s OpenXLR8 development flow. Developers can also create custom Xcelerator Blocks using Alorium’s OpenXLR8 flow (Figure 5).
Figure 5: Alorium’s OpenXLR8 development flow lets designers create new hardware blocks using Intel’s Quartus Prime design tools and add them to the Arduino IDE. (Image source: Alorium Technology)
Creating a custom XB currently requires a working knowledge of the Verilog or VHDL hardware description languages and familiarity with the Intel Quartus FPGA tool suite—specifically version 17.1 of the Quartus Prime Lite Edition, and Mentor Graphics' ModelSim simulation tools. HDLs are necessary for FPGA development because they allow the designer to express parallel execution of multiple tasks in a standard, well-defined way. High level languages (HLLs) such as C and C++ are inherently sequential languages.
HLL compilers take HLL source code and translate it into long sequences of machine instructions, which are usually executed one at a time. That’s why FPGAs are so much faster than processors—FPGAs can execute thousands of simultaneous tasks, given a large enough FPGA. There are HLL compilers that can translate code written in C or C++ into an HDL, which is then processed by conventional FPGA tools, but these HLL compilers are not currently part of Alorium’s OpenXLR8 design flow.
However, once an XB has been designed and debugged using HDL and FPGA development tools, it can be used in the Arduino IDE like any other Arduino library block. Alorium is also currently developing additional XBs for its Arduino IDE libraries.
In creating their respective FPGA dev boards, both Arduino and Alorium Technology are recognizing designers’ growing need for more embedded performance from these inexpensive dev boards. Although these two companies have taken somewhat different paths, they’re both heading toward the same end goal: to find a way to make FPGAs more accessible to more embedded developers. At the simplest level, both the Arduino and Alorium approaches make hardware design as simple as picking blocks and running scripts.
Currently, the full design flow has not yet become as simple as possible. Arduino has not yet opened its full FPGA development flow to HDL developers. Alorium’s design flow does accommodate HDL design, but it requires knowledge of Verilog or VHSL FPGA design languages and tools.
However, the door has been opened by these products, so it’s at least theoretically possible to take advantage of other FPGA development advances, including C and C++ hardware compilers. Until then, it’s possible to extract some of the FPGA’s performance using the simple methods that Alorium Technology and Arduino have developed to add these capabilities to the Arduino IDE.