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The first stage of the Quadrature Decoder synchronizes and debounces the input signals from the encoder.  It is based the debounce logic circuit explained and documented here with some minor modifications (allowing for a more precise debounce time at the expense of additional logic).  Figure 3 depicts this circuit.  When the input changes, the output of its corresponding XOR gate clears the counter.  When it does not change, the counter begins to count.  If the inputs remain stable long enough for the count to reach the debounce_time, then the new value is stored in the final register and the counter disables itself until there is another change on one of the inputs.  The defined relationship between the a and b inputs allows them to share a debounce counter, and the same time period is used to debounce both.  The set_origin_n input has an independent debounce circuit that works on the same principle.

 


Figure 3. Synchronization and Debounce Circuit

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Table 1 lists the possible a and b input transitions, along with the corresponding decoded values of direction and position.

Table 1.  Truth Table

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Previous Inputs

New Inputs

Results

set_origin_n

a_prev

b_prev

a_new

b_new

direction

position

1

0

0

1

0

1

Increment

1

1

0

1

1

1

Increment

1

1

1

0

1

1

Increment

1

0

1

0

0

1

Increment

1

0

0

0

1

0

Decrement

1

0

1

1

1

0

Decrement

1

1

1

1

0

0

Decrement

1

1

0

0

0

0

Decrement

0

X

X

X

X

No change

0

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Figure 4 shows the logic circuit. 


Figure 4.  Decoder Circuit

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Table 2.  Generic Descriptions

Generic

Data Type

Default

Description

positions

integer

16

The size of the position counter (i.e. the number of positions counted before wrapping around)

debounce_time

integer

50_000

The number of clock cycles required to register a new position at the a and b inputs = debounce_time + 2

set_origin_debounce_time

integer

500_000

The number of clock cycles required to register a new set_origin_n value = set_origin_debounce_time + 2

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Table 3.  Port Descriptions

Port

Width

Mode

Data Type

Interface

Description

clk

1

in

standard logic

user logic

System clock

a

1

in

standard logic

quadrature encoder

Output A of the quadrature encoder (leading pulse in the positive direction)

b

1

in

standard logic

quadrature encoder

Output B of the quadrature encoder (leading pulse in the negative direction)

set_origin_n

1

in

standard logic

push button or
quadrature encoder

Synchronous active low clear of the position counter, disables changes to the direction output

direction

1

out

standard logic

user logic

Direction between the last two encoder readings
1: positive (clockwise)
0: negative (counter-clockwise)

position

N*

buffer

integer

user logic

Output of an up/down counter that tracks the changes of the encoder signals.  Counts up for each change in the positive direction and down for each change in the negative direction.

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